1 //===-- SimpleRegisterCoalescing.cpp - Register Coalescing ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a simple register coalescing pass that attempts to
11 // aggressively coalesce every register copy that it can.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regcoalescing"
16 #include "SimpleRegisterCoalescing.h"
17 #include "VirtRegMap.h"
18 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
19 #include "llvm/Value.h"
20 #include "llvm/CodeGen/LiveVariables.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineLoopInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/CodeGen/RegisterCoalescer.h"
27 #include "llvm/Target/TargetInstrInfo.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/ADT/SmallSet.h"
32 #include "llvm/ADT/Statistic.h"
33 #include "llvm/ADT/STLExtras.h"
38 STATISTIC(numJoins , "Number of interval joins performed");
39 STATISTIC(numCommutes , "Number of instruction commuting performed");
40 STATISTIC(numExtends , "Number of copies extended");
41 STATISTIC(numPeep , "Number of identity moves eliminated after coalescing");
42 STATISTIC(numAborts , "Number of times interval joining aborted");
44 char SimpleRegisterCoalescing::ID = 0;
47 EnableJoining("join-liveintervals",
48 cl::desc("Coalesce copies (default=true)"),
52 NewHeuristic("new-coalescer-heuristic",
53 cl::desc("Use new coalescer heuristic"),
56 RegisterPass<SimpleRegisterCoalescing>
57 X("simple-register-coalescing", "Simple Register Coalescing");
59 // Declare that we implement the RegisterCoalescer interface
60 RegisterAnalysisGroup<RegisterCoalescer, true/*The Default*/> V(X);
63 const PassInfo *llvm::SimpleRegisterCoalescingID = X.getPassInfo();
65 void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
66 AU.addPreserved<LiveIntervals>();
67 AU.addPreserved<MachineLoopInfo>();
68 AU.addPreservedID(MachineDominatorsID);
69 AU.addPreservedID(PHIEliminationID);
70 AU.addPreservedID(TwoAddressInstructionPassID);
71 AU.addRequired<LiveVariables>();
72 AU.addRequired<LiveIntervals>();
73 AU.addRequired<MachineLoopInfo>();
74 MachineFunctionPass::getAnalysisUsage(AU);
77 /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy with IntA
78 /// being the source and IntB being the dest, thus this defines a value number
79 /// in IntB. If the source value number (in IntA) is defined by a copy from B,
80 /// see if we can merge these two pieces of B into a single value number,
81 /// eliminating a copy. For example:
85 /// B1 = A3 <- this copy
87 /// In this case, B0 can be extended to where the B1 copy lives, allowing the B1
88 /// value number to be replaced with B0 (which simplifies the B liveinterval).
90 /// This returns true if an interval was modified.
92 bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
94 MachineInstr *CopyMI) {
95 unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
97 // BValNo is a value number in B that is defined by a copy from A. 'B3' in
99 LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx);
100 VNInfo *BValNo = BLR->valno;
102 // Get the location that B is defined at. Two options: either this value has
103 // an unknown definition point or it is defined at CopyIdx. If unknown, we
105 if (!BValNo->copy) return false;
106 assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
108 // AValNo is the value number in A that defines the copy, A3 in the example.
109 LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1);
110 VNInfo *AValNo = ALR->valno;
112 // If AValNo is defined as a copy from IntB, we can potentially process this.
113 // Get the instruction that defines this value number.
114 unsigned SrcReg = li_->getVNInfoSourceReg(AValNo);
115 if (!SrcReg) return false; // Not defined by a copy.
117 // If the value number is not defined by a copy instruction, ignore it.
119 // If the source register comes from an interval other than IntB, we can't
121 if (SrcReg != IntB.reg) return false;
123 // Get the LiveRange in IntB that this value number starts with.
124 LiveInterval::iterator ValLR = IntB.FindLiveRangeContaining(AValNo->def-1);
126 // Make sure that the end of the live range is inside the same block as
128 MachineInstr *ValLREndInst = li_->getInstructionFromIndex(ValLR->end-1);
130 ValLREndInst->getParent() != CopyMI->getParent()) return false;
132 // Okay, we now know that ValLR ends in the same block that the CopyMI
133 // live-range starts. If there are no intervening live ranges between them in
134 // IntB, we can merge them.
135 if (ValLR+1 != BLR) return false;
137 // If a live interval is a physical register, conservatively check if any
138 // of its sub-registers is overlapping the live interval of the virtual
139 // register. If so, do not coalesce.
140 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg) &&
141 *tri_->getSubRegisters(IntB.reg)) {
142 for (const unsigned* SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR)
143 if (li_->hasInterval(*SR) && IntA.overlaps(li_->getInterval(*SR))) {
144 DOUT << "Interfere with sub-register ";
145 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
150 DOUT << "\nExtending: "; IntB.print(DOUT, tri_);
152 unsigned FillerStart = ValLR->end, FillerEnd = BLR->start;
153 // We are about to delete CopyMI, so need to remove it as the 'instruction
154 // that defines this value #'. Update the the valnum with the new defining
156 BValNo->def = FillerStart;
159 // Okay, we can merge them. We need to insert a new liverange:
160 // [ValLR.end, BLR.begin) of either value number, then we merge the
161 // two value numbers.
162 IntB.addRange(LiveRange(FillerStart, FillerEnd, BValNo));
164 // If the IntB live range is assigned to a physical register, and if that
165 // physreg has aliases,
166 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
167 // Update the liveintervals of sub-registers.
168 for (const unsigned *AS = tri_->getSubRegisters(IntB.reg); *AS; ++AS) {
169 LiveInterval &AliasLI = li_->getInterval(*AS);
170 AliasLI.addRange(LiveRange(FillerStart, FillerEnd,
171 AliasLI.getNextValue(FillerStart, 0, li_->getVNInfoAllocator())));
175 // Okay, merge "B1" into the same value number as "B0".
176 if (BValNo != ValLR->valno)
177 IntB.MergeValueNumberInto(BValNo, ValLR->valno);
178 DOUT << " result = "; IntB.print(DOUT, tri_);
181 // If the source instruction was killing the source register before the
182 // merge, unset the isKill marker given the live range has been extended.
183 int UIdx = ValLREndInst->findRegisterUseOperandIdx(IntB.reg, true);
185 ValLREndInst->getOperand(UIdx).setIsKill(false);
191 /// HasOtherReachingDefs - Return true if there are definitions of IntB
192 /// other than BValNo val# that can reach uses of AValno val# of IntA.
193 bool SimpleRegisterCoalescing::HasOtherReachingDefs(LiveInterval &IntA,
197 for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
199 if (AI->valno != AValNo) continue;
200 LiveInterval::Ranges::iterator BI =
201 std::upper_bound(IntB.ranges.begin(), IntB.ranges.end(), AI->start);
202 if (BI != IntB.ranges.begin())
204 for (; BI != IntB.ranges.end() && AI->end >= BI->start; ++BI) {
205 if (BI->valno == BValNo)
207 if (BI->start <= AI->start && BI->end > AI->start)
209 if (BI->start > AI->start && BI->start < AI->end)
216 /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with IntA
217 /// being the source and IntB being the dest, thus this defines a value number
218 /// in IntB. If the source value number (in IntA) is defined by a commutable
219 /// instruction and its other operand is coalesced to the copy dest register,
220 /// see if we can transform the copy into a noop by commuting the definition. For
223 /// A3 = op A2 B0<kill>
225 /// B1 = A3 <- this copy
227 /// = op A3 <- more uses
231 /// B2 = op B0 A2<kill>
233 /// B1 = B2 <- now an identify copy
235 /// = op B2 <- more uses
237 /// This returns true if an interval was modified.
239 bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
241 MachineInstr *CopyMI) {
242 unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
244 // FIXME: For now, only eliminate the copy by commuting its def when the
245 // source register is a virtual register. We want to guard against cases
246 // where the copy is a back edge copy and commuting the def lengthen the
247 // live interval of the source register to the entire loop.
248 if (TargetRegisterInfo::isPhysicalRegister(IntA.reg))
251 // BValNo is a value number in B that is defined by a copy from A. 'B3' in
252 // the example above.
253 LiveInterval::iterator BLR = IntB.FindLiveRangeContaining(CopyIdx);
254 VNInfo *BValNo = BLR->valno;
256 // Get the location that B is defined at. Two options: either this value has
257 // an unknown definition point or it is defined at CopyIdx. If unknown, we
259 if (!BValNo->copy) return false;
260 assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
262 // AValNo is the value number in A that defines the copy, A3 in the example.
263 LiveInterval::iterator ALR = IntA.FindLiveRangeContaining(CopyIdx-1);
264 VNInfo *AValNo = ALR->valno;
265 // If other defs can reach uses of this def, then it's not safe to perform
267 if (AValNo->def == ~0U || AValNo->def == ~1U || AValNo->hasPHIKill)
269 MachineInstr *DefMI = li_->getInstructionFromIndex(AValNo->def);
270 const TargetInstrDesc &TID = DefMI->getDesc();
272 if (!TID.isCommutable() ||
273 !tii_->CommuteChangesDestination(DefMI, NewDstIdx))
276 MachineOperand &NewDstMO = DefMI->getOperand(NewDstIdx);
277 unsigned NewReg = NewDstMO.getReg();
278 if (NewReg != IntB.reg || !NewDstMO.isKill())
281 // Make sure there are no other definitions of IntB that would reach the
282 // uses which the new definition can reach.
283 if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
286 // At this point we have decided that it is legal to do this
287 // transformation. Start by commuting the instruction.
288 MachineBasicBlock *MBB = DefMI->getParent();
289 MachineInstr *NewMI = tii_->commuteInstruction(DefMI);
292 if (NewMI != DefMI) {
293 li_->ReplaceMachineInstrInMaps(DefMI, NewMI);
294 MBB->insert(DefMI, NewMI);
297 unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
298 NewMI->getOperand(OpIdx).setIsKill();
300 bool BHasPHIKill = BValNo->hasPHIKill;
301 SmallVector<VNInfo*, 4> BDeadValNos;
302 SmallVector<unsigned, 4> BKills;
303 std::map<unsigned, unsigned> BExtend;
305 // If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
314 // then do not add kills of A to the newly created B interval.
315 bool Extended = BLR->end > ALR->end && ALR->end != ALR->start;
317 BExtend[ALR->end] = BLR->end;
319 // Update uses of IntA of the specific Val# with IntB.
320 for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(IntA.reg),
321 UE = mri_->use_end(); UI != UE;) {
322 MachineOperand &UseMO = UI.getOperand();
323 MachineInstr *UseMI = &*UI;
325 if (JoinedCopies.count(UseMI))
326 // It'll no longer be "joined" after the change.
327 JoinedCopies.erase(UseMI);
328 unsigned UseIdx = li_->getInstructionIndex(UseMI);
329 LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx);
330 if (ULR->valno != AValNo)
332 UseMO.setReg(NewReg);
335 if (UseMO.isKill()) {
337 UseMO.setIsKill(false);
339 BKills.push_back(li_->getUseIndex(UseIdx)+1);
341 unsigned SrcReg, DstReg;
342 if (!tii_->isMoveInstr(*UseMI, SrcReg, DstReg))
344 if (DstReg == IntB.reg) {
345 // This copy will become a noop. If it's defining a new val#,
346 // remove that val# as well. However this live range is being
347 // extended to the end of the existing live range defined by the copy.
348 unsigned DefIdx = li_->getDefIndex(UseIdx);
349 LiveInterval::iterator DLR = IntB.FindLiveRangeContaining(DefIdx);
350 BHasPHIKill |= DLR->valno->hasPHIKill;
351 assert(DLR->valno->def == DefIdx);
352 BDeadValNos.push_back(DLR->valno);
353 BExtend[DLR->start] = DLR->end;
354 JoinedCopies.insert(UseMI);
355 // If this is a kill but it's going to be removed, the last use
356 // of the same val# is the new kill.
362 // We need to insert a new liverange: [ALR.start, LastUse). It may be we can
363 // simply extend BLR if CopyMI doesn't end the range.
364 DOUT << "\nExtending: "; IntB.print(DOUT, tri_);
366 IntB.removeValNo(BValNo);
367 for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i)
368 IntB.removeValNo(BDeadValNos[i]);
369 VNInfo *ValNo = IntB.getNextValue(AValNo->def, 0, li_->getVNInfoAllocator());
370 for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end();
372 if (AI->valno != AValNo) continue;
373 unsigned End = AI->end;
374 std::map<unsigned, unsigned>::iterator EI = BExtend.find(End);
375 if (EI != BExtend.end())
377 IntB.addRange(LiveRange(AI->start, End, ValNo));
379 IntB.addKills(ValNo, BKills);
380 ValNo->hasPHIKill = BHasPHIKill;
382 DOUT << " result = "; IntB.print(DOUT, tri_);
385 DOUT << "\nShortening: "; IntA.print(DOUT, tri_);
386 IntA.removeValNo(AValNo);
387 DOUT << " result = "; IntA.print(DOUT, tri_);
394 /// isBackEdgeCopy - Returns true if CopyMI is a back edge copy.
396 bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI,
398 MachineBasicBlock *MBB = CopyMI->getParent();
399 const MachineLoop *L = loopInfo->getLoopFor(MBB);
402 if (MBB != L->getLoopLatch())
405 LiveInterval &LI = li_->getInterval(DstReg);
406 unsigned DefIdx = li_->getInstructionIndex(CopyMI);
407 LiveInterval::const_iterator DstLR =
408 LI.FindLiveRangeContaining(li_->getDefIndex(DefIdx));
409 if (DstLR == LI.end())
411 unsigned KillIdx = li_->getInstructionIndex(&MBB->back()) + InstrSlots::NUM;
412 if (DstLR->valno->kills.size() == 1 &&
413 DstLR->valno->kills[0] == KillIdx && DstLR->valno->hasPHIKill)
418 /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
419 /// update the subregister number if it is not zero. If DstReg is a
420 /// physical register and the existing subregister number of the def / use
421 /// being updated is not zero, make sure to set it to the correct physical
424 SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
426 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
427 if (DstIsPhys && SubIdx) {
428 // Figure out the real physical register we are updating with.
429 DstReg = tri_->getSubReg(DstReg, SubIdx);
433 for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(SrcReg),
434 E = mri_->reg_end(); I != E; ) {
435 MachineOperand &O = I.getOperand();
436 MachineInstr *UseMI = &*I;
439 unsigned UseSubIdx = O.getSubReg();
440 unsigned UseDstReg = DstReg;
442 UseDstReg = tri_->getSubReg(DstReg, UseSubIdx);
446 unsigned OldSubIdx = O.getSubReg();
447 // Sub-register indexes goes from small to large. e.g.
448 // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX
449 // EAX: 0 -> AL, 1 -> AH, 2 -> AX
450 // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
451 // sub-register 2 is also AX.
452 if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
453 assert(OldSubIdx < SubIdx && "Conflicting sub-register index!");
456 // Remove would-be duplicated kill marker.
457 if (O.isKill() && UseMI->killsRegister(DstReg))
464 /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate
465 /// due to live range lengthening as the result of coalescing.
466 void SimpleRegisterCoalescing::RemoveUnnecessaryKills(unsigned Reg,
468 for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg),
469 UE = mri_->use_end(); UI != UE; ++UI) {
470 MachineOperand &UseMO = UI.getOperand();
471 if (UseMO.isKill()) {
472 MachineInstr *UseMI = UseMO.getParent();
474 if (!tii_->isMoveInstr(*UseMI, SReg, DReg))
476 unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI));
477 if (JoinedCopies.count(UseMI))
479 LiveInterval::const_iterator UI = LI.FindLiveRangeContaining(UseIdx);
480 assert(UI != LI.end());
481 if (!LI.isKill(UI->valno, UseIdx+1))
482 UseMO.setIsKill(false);
487 /// removeRange - Wrapper for LiveInterval::removeRange. This removes a range
488 /// from a physical register live interval as well as from the live intervals
489 /// of its sub-registers.
490 static void removeRange(LiveInterval &li, unsigned Start, unsigned End,
491 LiveIntervals *li_, const TargetRegisterInfo *tri_) {
492 li.removeRange(Start, End, true);
493 if (TargetRegisterInfo::isPhysicalRegister(li.reg)) {
494 for (const unsigned* SR = tri_->getSubRegisters(li.reg); *SR; ++SR) {
495 if (!li_->hasInterval(*SR))
497 LiveInterval &sli = li_->getInterval(*SR);
498 unsigned RemoveEnd = Start;
499 while (RemoveEnd != End) {
500 LiveInterval::iterator LR = sli.FindLiveRangeContaining(Start);
503 RemoveEnd = (LR->end < End) ? LR->end : End;
504 sli.removeRange(Start, RemoveEnd, true);
511 /// removeIntervalIfEmpty - Check if the live interval of a physical register
512 /// is empty, if so remove it and also remove the empty intervals of its
514 static void removeIntervalIfEmpty(LiveInterval &li, LiveIntervals *li_,
515 const TargetRegisterInfo *tri_) {
517 li_->removeInterval(li.reg);
518 if (TargetRegisterInfo::isPhysicalRegister(li.reg))
519 for (const unsigned* SR = tri_->getSubRegisters(li.reg); *SR; ++SR) {
520 if (!li_->hasInterval(*SR))
522 LiveInterval &sli = li_->getInterval(*SR);
524 li_->removeInterval(*SR);
529 /// ShortenDeadCopyLiveRange - Shorten a live range defined by a dead copy.
531 void SimpleRegisterCoalescing::ShortenDeadCopyLiveRange(LiveInterval &li,
532 MachineInstr *CopyMI) {
533 unsigned CopyIdx = li_->getInstructionIndex(CopyMI);
534 LiveInterval::iterator MLR =
535 li.FindLiveRangeContaining(li_->getDefIndex(CopyIdx));
537 return; // Already removed by ShortenDeadCopySrcLiveRange.
538 unsigned RemoveStart = MLR->start;
539 unsigned RemoveEnd = MLR->end;
540 // Remove the liverange that's defined by this.
541 if (RemoveEnd == li_->getDefIndex(CopyIdx)+1) {
542 removeRange(li, RemoveStart, RemoveEnd, li_, tri_);
543 removeIntervalIfEmpty(li, li_, tri_);
547 /// ShortenDeadCopyLiveRange - Shorten a live range as it's artificially
548 /// extended by a dead copy. Mark the last use (if any) of the val# as kill
549 /// as ends the live range there. If there isn't another use, then this
550 /// live range is dead.
552 SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li,
553 MachineInstr *CopyMI) {
554 unsigned CopyIdx = li_->getInstructionIndex(CopyMI);
556 // FIXME: special case: function live in. It can be a general case if the
557 // first instruction index starts at > 0 value.
558 assert(TargetRegisterInfo::isPhysicalRegister(li.reg));
559 // Live-in to the function but dead. Remove it from entry live-in set.
560 mf_->begin()->removeLiveIn(li.reg);
561 LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx);
562 removeRange(li, LR->start, LR->end, li_, tri_);
563 removeIntervalIfEmpty(li, li_, tri_);
567 LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx-1);
569 // Livein but defined by a phi.
572 unsigned RemoveStart = LR->start;
573 unsigned RemoveEnd = li_->getDefIndex(CopyIdx)+1;
574 if (LR->end > RemoveEnd)
575 // More uses past this copy? Nothing to do.
579 MachineOperand *LastUse =
580 lastRegisterUse(LR->start, CopyIdx-1, li.reg, LastUseIdx);
582 // There are uses before the copy, just shorten the live range to the end
584 LastUse->setIsKill();
585 MachineInstr *LastUseMI = LastUse->getParent();
586 removeRange(li, li_->getDefIndex(LastUseIdx), LR->end, li_, tri_);
587 unsigned SrcReg, DstReg;
588 if (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg) &&
590 // Last use is itself an identity code.
591 int DeadIdx = LastUseMI->findRegisterDefOperandIdx(li.reg, false, tri_);
592 LastUseMI->getOperand(DeadIdx).setIsDead();
598 MachineBasicBlock *CopyMBB = CopyMI->getParent();
599 unsigned MBBStart = li_->getMBBStartIdx(CopyMBB);
600 if (LR->start <= MBBStart && LR->end > MBBStart) {
601 if (LR->start == 0) {
602 assert(TargetRegisterInfo::isPhysicalRegister(li.reg));
603 // Live-in to the function but dead. Remove it from entry live-in set.
604 mf_->begin()->removeLiveIn(li.reg);
606 removeRange(li, LR->start, LR->end, li_, tri_);
607 // FIXME: Shorten intervals in BBs that reaches this BB.
609 // Not livein into BB.
610 MachineInstr *DefMI =
611 li_->getInstructionFromIndex(li_->getDefIndex(RemoveStart));
612 if (DefMI && DefMI != CopyMI) {
613 int DeadIdx = DefMI->findRegisterDefOperandIdx(li.reg, false, tri_);
615 DefMI->getOperand(DeadIdx).setIsDead();
616 // A dead def should have a single cycle interval.
620 removeRange(li, RemoveStart, LR->end, li_, tri_);
623 removeIntervalIfEmpty(li, li_, tri_);
626 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
627 /// which are the src/dst of the copy instruction CopyMI. This returns true
628 /// if the copy was successfully coalesced away. If it is not currently
629 /// possible to coalesce this interval, but it may be possible if other
630 /// things get coalesced, then it returns true by reference in 'Again'.
631 bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
632 MachineInstr *CopyMI = TheCopy.MI;
635 if (JoinedCopies.count(CopyMI))
636 return false; // Already done.
638 DOUT << li_->getInstructionIndex(CopyMI) << '\t' << *CopyMI;
642 bool isExtSubReg = CopyMI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG;
645 DstReg = CopyMI->getOperand(0).getReg();
646 SrcReg = CopyMI->getOperand(1).getReg();
647 } else if (!tii_->isMoveInstr(*CopyMI, SrcReg, DstReg)) {
648 assert(0 && "Unrecognized copy instruction!");
652 // If they are already joined we continue.
653 if (SrcReg == DstReg) {
654 DOUT << "\tCopy already coalesced.\n";
655 return false; // Not coalescable.
658 bool SrcIsPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg);
659 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
661 // If they are both physical registers, we cannot join them.
662 if (SrcIsPhys && DstIsPhys) {
663 DOUT << "\tCan not coalesce physregs.\n";
664 return false; // Not coalescable.
667 // We only join virtual registers with allocatable physical registers.
668 if (SrcIsPhys && !allocatableRegs_[SrcReg]) {
669 DOUT << "\tSrc reg is unallocatable physreg.\n";
670 return false; // Not coalescable.
672 if (DstIsPhys && !allocatableRegs_[DstReg]) {
673 DOUT << "\tDst reg is unallocatable physreg.\n";
674 return false; // Not coalescable.
677 unsigned RealDstReg = 0;
679 SubIdx = CopyMI->getOperand(2).getImm();
681 // r1024 = EXTRACT_SUBREG EAX, 0 then r1024 is really going to be
682 // coalesced with AX.
683 SrcReg = tri_->getSubReg(SrcReg, SubIdx);
685 } else if (DstIsPhys) {
686 // If this is a extract_subreg where dst is a physical register, e.g.
687 // cl = EXTRACT_SUBREG reg1024, 1
688 // then create and update the actual physical register allocated to RHS.
689 const TargetRegisterClass *RC = mri_->getRegClass(SrcReg);
690 for (const unsigned *SRs = tri_->getSuperRegisters(DstReg);
691 unsigned SR = *SRs; ++SRs) {
692 if (DstReg == tri_->getSubReg(SR, SubIdx) &&
698 assert(RealDstReg && "Invalid extra_subreg instruction!");
700 // For this type of EXTRACT_SUBREG, conservatively
701 // check if the live interval of the source register interfere with the
702 // actual super physical register we are trying to coalesce with.
703 LiveInterval &RHS = li_->getInterval(SrcReg);
704 if (li_->hasInterval(RealDstReg) &&
705 RHS.overlaps(li_->getInterval(RealDstReg))) {
706 DOUT << "Interfere with register ";
707 DEBUG(li_->getInterval(RealDstReg).print(DOUT, tri_));
708 return false; // Not coalescable
710 for (const unsigned* SR = tri_->getSubRegisters(RealDstReg); *SR; ++SR)
711 if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
712 DOUT << "Interfere with sub-register ";
713 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
714 return false; // Not coalescable
718 unsigned SrcSize= li_->getInterval(SrcReg).getSize() / InstrSlots::NUM;
719 unsigned DstSize= li_->getInterval(DstReg).getSize() / InstrSlots::NUM;
720 const TargetRegisterClass *RC = mri_->getRegClass(DstReg);
721 unsigned Threshold = allocatableRCRegs_[RC].count();
722 // Be conservative. If both sides are virtual registers, do not coalesce
723 // if this will cause a high use density interval to target a smaller set
725 if (DstSize > Threshold || SrcSize > Threshold) {
726 LiveVariables::VarInfo &svi = lv_->getVarInfo(SrcReg);
727 LiveVariables::VarInfo &dvi = lv_->getVarInfo(DstReg);
728 if ((float)dvi.NumUses / DstSize < (float)svi.NumUses / SrcSize) {
729 Again = true; // May be possible to coalesce later.
734 } else if (differingRegisterClasses(SrcReg, DstReg)) {
735 // FIXME: What if the resul of a EXTRACT_SUBREG is then coalesced
736 // with another? If it's the resulting destination register, then
737 // the subidx must be propagated to uses (but only those defined
738 // by the EXTRACT_SUBREG). If it's being coalesced into another
739 // register, it should be safe because register is assumed to have
740 // the register class of the super-register.
742 // If they are not of the same register class, we cannot join them.
743 DOUT << "\tSrc/Dest are different register classes.\n";
744 // Allow the coalescer to try again in case either side gets coalesced to
745 // a physical register that's compatible with the other side. e.g.
746 // r1024 = MOV32to32_ r1025
747 // but later r1024 is assigned EAX then r1025 may be coalesced with EAX.
748 Again = true; // May be possible to coalesce later.
752 LiveInterval &SrcInt = li_->getInterval(SrcReg);
753 LiveInterval &DstInt = li_->getInterval(DstReg);
754 assert(SrcInt.reg == SrcReg && DstInt.reg == DstReg &&
755 "Register mapping is horribly broken!");
757 DOUT << "\t\tInspecting "; SrcInt.print(DOUT, tri_);
758 DOUT << " and "; DstInt.print(DOUT, tri_);
761 // Check if it is necessary to propagate "isDead" property.
762 MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false);
763 bool isDead = mopd->isDead();
765 // We need to be careful about coalescing a source physical register with a
766 // virtual register. Once the coalescing is done, it cannot be broken and
767 // these are not spillable! If the destination interval uses are far away,
768 // think twice about coalescing them!
769 if (!isDead && (SrcIsPhys || DstIsPhys) && !isExtSubReg) {
770 LiveInterval &JoinVInt = SrcIsPhys ? DstInt : SrcInt;
771 unsigned JoinVReg = SrcIsPhys ? DstReg : SrcReg;
772 unsigned JoinPReg = SrcIsPhys ? SrcReg : DstReg;
773 const TargetRegisterClass *RC = mri_->getRegClass(JoinVReg);
774 unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
775 if (TheCopy.isBackEdge)
776 Threshold *= 2; // Favors back edge copies.
778 // If the virtual register live interval is long but it has low use desity,
779 // do not join them, instead mark the physical register as its allocation
781 unsigned Length = JoinVInt.getSize() / InstrSlots::NUM;
782 LiveVariables::VarInfo &vi = lv_->getVarInfo(JoinVReg);
783 if (Length > Threshold &&
784 (((float)vi.NumUses / Length) < (1.0 / Threshold))) {
785 JoinVInt.preference = JoinPReg;
787 DOUT << "\tMay tie down a physical register, abort!\n";
788 Again = true; // May be possible to coalesce later.
793 // Okay, attempt to join these two intervals. On failure, this returns false.
794 // Otherwise, if one of the intervals being joined is a physreg, this method
795 // always canonicalizes DstInt to be it. The output "SrcInt" will not have
796 // been modified, so we can use this information below to update aliases.
797 bool Swapped = false;
798 if (!JoinIntervals(DstInt, SrcInt, Swapped)) {
799 // Coalescing failed.
801 // If we can eliminate the copy without merging the live ranges, do so now.
803 (AdjustCopiesBackFrom(SrcInt, DstInt, CopyMI) ||
804 RemoveCopyByCommutingDef(SrcInt, DstInt, CopyMI))) {
805 JoinedCopies.insert(CopyMI);
809 // Otherwise, we are unable to join the intervals.
810 DOUT << "Interference!\n";
811 Again = true; // May be possible to coalesce later.
815 LiveInterval *ResSrcInt = &SrcInt;
816 LiveInterval *ResDstInt = &DstInt;
818 std::swap(SrcReg, DstReg);
819 std::swap(ResSrcInt, ResDstInt);
821 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
822 "LiveInterval::join didn't work right!");
824 // If we're about to merge live ranges into a physical register live range,
825 // we have to update any aliased register's live ranges to indicate that they
826 // have clobbered values for this range.
827 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) {
828 // If this is a extract_subreg where dst is a physical register, e.g.
829 // cl = EXTRACT_SUBREG reg1024, 1
830 // then create and update the actual physical register allocated to RHS.
832 LiveInterval &RealDstInt = li_->getOrCreateInterval(RealDstReg);
833 SmallSet<const VNInfo*, 4> CopiedValNos;
834 for (LiveInterval::Ranges::const_iterator I = ResSrcInt->ranges.begin(),
835 E = ResSrcInt->ranges.end(); I != E; ++I) {
836 LiveInterval::const_iterator DstLR =
837 ResDstInt->FindLiveRangeContaining(I->start);
838 assert(DstLR != ResDstInt->end() && "Invalid joined interval!");
839 const VNInfo *DstValNo = DstLR->valno;
840 if (CopiedValNos.insert(DstValNo)) {
841 VNInfo *ValNo = RealDstInt.getNextValue(DstValNo->def, DstValNo->copy,
842 li_->getVNInfoAllocator());
843 ValNo->hasPHIKill = DstValNo->hasPHIKill;
844 RealDstInt.addKills(ValNo, DstValNo->kills);
845 RealDstInt.MergeValueInAsValue(*ResDstInt, DstValNo, ValNo);
851 // Update the liveintervals of sub-registers.
852 for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS)
853 li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt,
854 li_->getVNInfoAllocator());
856 // Merge use info if the destination is a virtual register.
857 LiveVariables::VarInfo& dVI = lv_->getVarInfo(DstReg);
858 LiveVariables::VarInfo& sVI = lv_->getVarInfo(SrcReg);
859 dVI.NumUses += sVI.NumUses;
862 // If this is a EXTRACT_SUBREG, make sure the result of coalescing is the
863 // larger super-register.
864 if (isExtSubReg && !SrcIsPhys && !DstIsPhys) {
866 ResSrcInt->Copy(*ResDstInt, li_->getVNInfoAllocator());
867 std::swap(SrcReg, DstReg);
868 std::swap(ResSrcInt, ResDstInt);
873 // Add all copies that define val# in the source interval into the queue.
874 for (LiveInterval::const_vni_iterator i = ResSrcInt->vni_begin(),
875 e = ResSrcInt->vni_end(); i != e; ++i) {
876 const VNInfo *vni = *i;
877 if (!vni->def || vni->def == ~1U || vni->def == ~0U)
879 MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def);
880 unsigned NewSrcReg, NewDstReg;
882 JoinedCopies.count(CopyMI) == 0 &&
883 tii_->isMoveInstr(*CopyMI, NewSrcReg, NewDstReg)) {
884 unsigned LoopDepth = loopInfo->getLoopDepth(CopyMI->getParent());
885 JoinQueue->push(CopyRec(CopyMI, LoopDepth,
886 isBackEdgeCopy(CopyMI, DstReg)));
891 DOUT << "\n\t\tJoined. Result = "; ResDstInt->print(DOUT, tri_);
894 // Remember to delete the copy instruction.
895 JoinedCopies.insert(CopyMI);
897 // Some live range has been lengthened due to colaescing, eliminate the
898 // unnecessary kills.
899 RemoveUnnecessaryKills(SrcReg, *ResDstInt);
900 if (TargetRegisterInfo::isVirtualRegister(DstReg))
901 RemoveUnnecessaryKills(DstReg, *ResDstInt);
903 // SrcReg is guarateed to be the register whose live interval that is
905 li_->removeInterval(SrcReg);
906 UpdateRegDefsUses(SrcReg, DstReg, SubIdx);
912 /// ComputeUltimateVN - Assuming we are going to join two live intervals,
913 /// compute what the resultant value numbers for each value in the input two
914 /// ranges will be. This is complicated by copies between the two which can
915 /// and will commonly cause multiple value numbers to be merged into one.
917 /// VN is the value number that we're trying to resolve. InstDefiningValue
918 /// keeps track of the new InstDefiningValue assignment for the result
919 /// LiveInterval. ThisFromOther/OtherFromThis are sets that keep track of
920 /// whether a value in this or other is a copy from the opposite set.
921 /// ThisValNoAssignments/OtherValNoAssignments keep track of value #'s that have
922 /// already been assigned.
924 /// ThisFromOther[x] - If x is defined as a copy from the other interval, this
925 /// contains the value number the copy is from.
927 static unsigned ComputeUltimateVN(VNInfo *VNI,
928 SmallVector<VNInfo*, 16> &NewVNInfo,
929 DenseMap<VNInfo*, VNInfo*> &ThisFromOther,
930 DenseMap<VNInfo*, VNInfo*> &OtherFromThis,
931 SmallVector<int, 16> &ThisValNoAssignments,
932 SmallVector<int, 16> &OtherValNoAssignments) {
933 unsigned VN = VNI->id;
935 // If the VN has already been computed, just return it.
936 if (ThisValNoAssignments[VN] >= 0)
937 return ThisValNoAssignments[VN];
938 // assert(ThisValNoAssignments[VN] != -2 && "Cyclic case?");
940 // If this val is not a copy from the other val, then it must be a new value
941 // number in the destination.
942 DenseMap<VNInfo*, VNInfo*>::iterator I = ThisFromOther.find(VNI);
943 if (I == ThisFromOther.end()) {
944 NewVNInfo.push_back(VNI);
945 return ThisValNoAssignments[VN] = NewVNInfo.size()-1;
947 VNInfo *OtherValNo = I->second;
949 // Otherwise, this *is* a copy from the RHS. If the other side has already
950 // been computed, return it.
951 if (OtherValNoAssignments[OtherValNo->id] >= 0)
952 return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo->id];
954 // Mark this value number as currently being computed, then ask what the
955 // ultimate value # of the other value is.
956 ThisValNoAssignments[VN] = -2;
957 unsigned UltimateVN =
958 ComputeUltimateVN(OtherValNo, NewVNInfo, OtherFromThis, ThisFromOther,
959 OtherValNoAssignments, ThisValNoAssignments);
960 return ThisValNoAssignments[VN] = UltimateVN;
963 static bool InVector(VNInfo *Val, const SmallVector<VNInfo*, 8> &V) {
964 return std::find(V.begin(), V.end(), Val) != V.end();
967 /// SimpleJoin - Attempt to joint the specified interval into this one. The
968 /// caller of this method must guarantee that the RHS only contains a single
969 /// value number and that the RHS is not defined by a copy from this
970 /// interval. This returns false if the intervals are not joinable, or it
971 /// joins them and returns true.
972 bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
973 assert(RHS.containsOneValue());
975 // Some number (potentially more than one) value numbers in the current
976 // interval may be defined as copies from the RHS. Scan the overlapping
977 // portions of the LHS and RHS, keeping track of this and looking for
978 // overlapping live ranges that are NOT defined as copies. If these exist, we
981 LiveInterval::iterator LHSIt = LHS.begin(), LHSEnd = LHS.end();
982 LiveInterval::iterator RHSIt = RHS.begin(), RHSEnd = RHS.end();
984 if (LHSIt->start < RHSIt->start) {
985 LHSIt = std::upper_bound(LHSIt, LHSEnd, RHSIt->start);
986 if (LHSIt != LHS.begin()) --LHSIt;
987 } else if (RHSIt->start < LHSIt->start) {
988 RHSIt = std::upper_bound(RHSIt, RHSEnd, LHSIt->start);
989 if (RHSIt != RHS.begin()) --RHSIt;
992 SmallVector<VNInfo*, 8> EliminatedLHSVals;
995 // Determine if these live intervals overlap.
996 bool Overlaps = false;
997 if (LHSIt->start <= RHSIt->start)
998 Overlaps = LHSIt->end > RHSIt->start;
1000 Overlaps = RHSIt->end > LHSIt->start;
1002 // If the live intervals overlap, there are two interesting cases: if the
1003 // LHS interval is defined by a copy from the RHS, it's ok and we record
1004 // that the LHS value # is the same as the RHS. If it's not, then we cannot
1005 // coalesce these live ranges and we bail out.
1007 // If we haven't already recorded that this value # is safe, check it.
1008 if (!InVector(LHSIt->valno, EliminatedLHSVals)) {
1009 // Copy from the RHS?
1010 unsigned SrcReg = li_->getVNInfoSourceReg(LHSIt->valno);
1011 if (SrcReg != RHS.reg)
1012 return false; // Nope, bail out.
1014 EliminatedLHSVals.push_back(LHSIt->valno);
1017 // We know this entire LHS live range is okay, so skip it now.
1018 if (++LHSIt == LHSEnd) break;
1022 if (LHSIt->end < RHSIt->end) {
1023 if (++LHSIt == LHSEnd) break;
1025 // One interesting case to check here. It's possible that we have
1026 // something like "X3 = Y" which defines a new value number in the LHS,
1027 // and is the last use of this liverange of the RHS. In this case, we
1028 // want to notice this copy (so that it gets coalesced away) even though
1029 // the live ranges don't actually overlap.
1030 if (LHSIt->start == RHSIt->end) {
1031 if (InVector(LHSIt->valno, EliminatedLHSVals)) {
1032 // We already know that this value number is going to be merged in
1033 // if coalescing succeeds. Just skip the liverange.
1034 if (++LHSIt == LHSEnd) break;
1036 // Otherwise, if this is a copy from the RHS, mark it as being merged
1038 if (li_->getVNInfoSourceReg(LHSIt->valno) == RHS.reg) {
1039 EliminatedLHSVals.push_back(LHSIt->valno);
1041 // We know this entire LHS live range is okay, so skip it now.
1042 if (++LHSIt == LHSEnd) break;
1047 if (++RHSIt == RHSEnd) break;
1051 // If we got here, we know that the coalescing will be successful and that
1052 // the value numbers in EliminatedLHSVals will all be merged together. Since
1053 // the most common case is that EliminatedLHSVals has a single number, we
1054 // optimize for it: if there is more than one value, we merge them all into
1055 // the lowest numbered one, then handle the interval as if we were merging
1056 // with one value number.
1058 if (EliminatedLHSVals.size() > 1) {
1059 // Loop through all the equal value numbers merging them into the smallest
1061 VNInfo *Smallest = EliminatedLHSVals[0];
1062 for (unsigned i = 1, e = EliminatedLHSVals.size(); i != e; ++i) {
1063 if (EliminatedLHSVals[i]->id < Smallest->id) {
1064 // Merge the current notion of the smallest into the smaller one.
1065 LHS.MergeValueNumberInto(Smallest, EliminatedLHSVals[i]);
1066 Smallest = EliminatedLHSVals[i];
1068 // Merge into the smallest.
1069 LHS.MergeValueNumberInto(EliminatedLHSVals[i], Smallest);
1072 LHSValNo = Smallest;
1074 assert(!EliminatedLHSVals.empty() && "No copies from the RHS?");
1075 LHSValNo = EliminatedLHSVals[0];
1078 // Okay, now that there is a single LHS value number that we're merging the
1079 // RHS into, update the value number info for the LHS to indicate that the
1080 // value number is defined where the RHS value number was.
1081 const VNInfo *VNI = RHS.getValNumInfo(0);
1082 LHSValNo->def = VNI->def;
1083 LHSValNo->copy = VNI->copy;
1085 // Okay, the final step is to loop over the RHS live intervals, adding them to
1087 LHSValNo->hasPHIKill |= VNI->hasPHIKill;
1088 LHS.addKills(LHSValNo, VNI->kills);
1089 LHS.MergeRangesInAsValue(RHS, LHSValNo);
1090 LHS.weight += RHS.weight;
1091 if (RHS.preference && !LHS.preference)
1092 LHS.preference = RHS.preference;
1097 /// JoinIntervals - Attempt to join these two intervals. On failure, this
1098 /// returns false. Otherwise, if one of the intervals being joined is a
1099 /// physreg, this method always canonicalizes LHS to be it. The output
1100 /// "RHS" will not have been modified, so we can use this information
1101 /// below to update aliases.
1102 bool SimpleRegisterCoalescing::JoinIntervals(LiveInterval &LHS,
1103 LiveInterval &RHS, bool &Swapped) {
1104 // Compute the final value assignment, assuming that the live ranges can be
1106 SmallVector<int, 16> LHSValNoAssignments;
1107 SmallVector<int, 16> RHSValNoAssignments;
1108 DenseMap<VNInfo*, VNInfo*> LHSValsDefinedFromRHS;
1109 DenseMap<VNInfo*, VNInfo*> RHSValsDefinedFromLHS;
1110 SmallVector<VNInfo*, 16> NewVNInfo;
1112 // If a live interval is a physical register, conservatively check if any
1113 // of its sub-registers is overlapping the live interval of the virtual
1114 // register. If so, do not coalesce.
1115 if (TargetRegisterInfo::isPhysicalRegister(LHS.reg) &&
1116 *tri_->getSubRegisters(LHS.reg)) {
1117 for (const unsigned* SR = tri_->getSubRegisters(LHS.reg); *SR; ++SR)
1118 if (li_->hasInterval(*SR) && RHS.overlaps(li_->getInterval(*SR))) {
1119 DOUT << "Interfere with sub-register ";
1120 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
1123 } else if (TargetRegisterInfo::isPhysicalRegister(RHS.reg) &&
1124 *tri_->getSubRegisters(RHS.reg)) {
1125 for (const unsigned* SR = tri_->getSubRegisters(RHS.reg); *SR; ++SR)
1126 if (li_->hasInterval(*SR) && LHS.overlaps(li_->getInterval(*SR))) {
1127 DOUT << "Interfere with sub-register ";
1128 DEBUG(li_->getInterval(*SR).print(DOUT, tri_));
1133 // Compute ultimate value numbers for the LHS and RHS values.
1134 if (RHS.containsOneValue()) {
1135 // Copies from a liveinterval with a single value are simple to handle and
1136 // very common, handle the special case here. This is important, because
1137 // often RHS is small and LHS is large (e.g. a physreg).
1139 // Find out if the RHS is defined as a copy from some value in the LHS.
1140 int RHSVal0DefinedFromLHS = -1;
1142 VNInfo *RHSValNoInfo = NULL;
1143 VNInfo *RHSValNoInfo0 = RHS.getValNumInfo(0);
1144 unsigned RHSSrcReg = li_->getVNInfoSourceReg(RHSValNoInfo0);
1145 if ((RHSSrcReg == 0 || RHSSrcReg != LHS.reg)) {
1146 // If RHS is not defined as a copy from the LHS, we can use simpler and
1147 // faster checks to see if the live ranges are coalescable. This joiner
1148 // can't swap the LHS/RHS intervals though.
1149 if (!TargetRegisterInfo::isPhysicalRegister(RHS.reg)) {
1150 return SimpleJoin(LHS, RHS);
1152 RHSValNoInfo = RHSValNoInfo0;
1155 // It was defined as a copy from the LHS, find out what value # it is.
1156 RHSValNoInfo = LHS.getLiveRangeContaining(RHSValNoInfo0->def-1)->valno;
1157 RHSValID = RHSValNoInfo->id;
1158 RHSVal0DefinedFromLHS = RHSValID;
1161 LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
1162 RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
1163 NewVNInfo.resize(LHS.getNumValNums(), NULL);
1165 // Okay, *all* of the values in LHS that are defined as a copy from RHS
1166 // should now get updated.
1167 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1170 unsigned VN = VNI->id;
1171 if (unsigned LHSSrcReg = li_->getVNInfoSourceReg(VNI)) {
1172 if (LHSSrcReg != RHS.reg) {
1173 // If this is not a copy from the RHS, its value number will be
1174 // unmodified by the coalescing.
1175 NewVNInfo[VN] = VNI;
1176 LHSValNoAssignments[VN] = VN;
1177 } else if (RHSValID == -1) {
1178 // Otherwise, it is a copy from the RHS, and we don't already have a
1179 // value# for it. Keep the current value number, but remember it.
1180 LHSValNoAssignments[VN] = RHSValID = VN;
1181 NewVNInfo[VN] = RHSValNoInfo;
1182 LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0;
1184 // Otherwise, use the specified value #.
1185 LHSValNoAssignments[VN] = RHSValID;
1186 if (VN == (unsigned)RHSValID) { // Else this val# is dead.
1187 NewVNInfo[VN] = RHSValNoInfo;
1188 LHSValsDefinedFromRHS[VNI] = RHSValNoInfo0;
1192 NewVNInfo[VN] = VNI;
1193 LHSValNoAssignments[VN] = VN;
1197 assert(RHSValID != -1 && "Didn't find value #?");
1198 RHSValNoAssignments[0] = RHSValID;
1199 if (RHSVal0DefinedFromLHS != -1) {
1200 // This path doesn't go through ComputeUltimateVN so just set
1202 RHSValsDefinedFromLHS[RHSValNoInfo0] = (VNInfo*)1;
1205 // Loop over the value numbers of the LHS, seeing if any are defined from
1207 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1210 if (VNI->def == ~1U || VNI->copy == 0) // Src not defined by a copy?
1213 // DstReg is known to be a register in the LHS interval. If the src is
1214 // from the RHS interval, we can use its value #.
1215 if (li_->getVNInfoSourceReg(VNI) != RHS.reg)
1218 // Figure out the value # from the RHS.
1219 LHSValsDefinedFromRHS[VNI]=RHS.getLiveRangeContaining(VNI->def-1)->valno;
1222 // Loop over the value numbers of the RHS, seeing if any are defined from
1224 for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
1227 if (VNI->def == ~1U || VNI->copy == 0) // Src not defined by a copy?
1230 // DstReg is known to be a register in the RHS interval. If the src is
1231 // from the LHS interval, we can use its value #.
1232 if (li_->getVNInfoSourceReg(VNI) != LHS.reg)
1235 // Figure out the value # from the LHS.
1236 RHSValsDefinedFromLHS[VNI]=LHS.getLiveRangeContaining(VNI->def-1)->valno;
1239 LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
1240 RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
1241 NewVNInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums());
1243 for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
1246 unsigned VN = VNI->id;
1247 if (LHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
1249 ComputeUltimateVN(VNI, NewVNInfo,
1250 LHSValsDefinedFromRHS, RHSValsDefinedFromLHS,
1251 LHSValNoAssignments, RHSValNoAssignments);
1253 for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
1256 unsigned VN = VNI->id;
1257 if (RHSValNoAssignments[VN] >= 0 || VNI->def == ~1U)
1259 // If this value number isn't a copy from the LHS, it's a new number.
1260 if (RHSValsDefinedFromLHS.find(VNI) == RHSValsDefinedFromLHS.end()) {
1261 NewVNInfo.push_back(VNI);
1262 RHSValNoAssignments[VN] = NewVNInfo.size()-1;
1266 ComputeUltimateVN(VNI, NewVNInfo,
1267 RHSValsDefinedFromLHS, LHSValsDefinedFromRHS,
1268 RHSValNoAssignments, LHSValNoAssignments);
1272 // Armed with the mappings of LHS/RHS values to ultimate values, walk the
1273 // interval lists to see if these intervals are coalescable.
1274 LiveInterval::const_iterator I = LHS.begin();
1275 LiveInterval::const_iterator IE = LHS.end();
1276 LiveInterval::const_iterator J = RHS.begin();
1277 LiveInterval::const_iterator JE = RHS.end();
1279 // Skip ahead until the first place of potential sharing.
1280 if (I->start < J->start) {
1281 I = std::upper_bound(I, IE, J->start);
1282 if (I != LHS.begin()) --I;
1283 } else if (J->start < I->start) {
1284 J = std::upper_bound(J, JE, I->start);
1285 if (J != RHS.begin()) --J;
1289 // Determine if these two live ranges overlap.
1291 if (I->start < J->start) {
1292 Overlaps = I->end > J->start;
1294 Overlaps = J->end > I->start;
1297 // If so, check value # info to determine if they are really different.
1299 // If the live range overlap will map to the same value number in the
1300 // result liverange, we can still coalesce them. If not, we can't.
1301 if (LHSValNoAssignments[I->valno->id] !=
1302 RHSValNoAssignments[J->valno->id])
1306 if (I->end < J->end) {
1315 // Update kill info. Some live ranges are extended due to copy coalescing.
1316 for (DenseMap<VNInfo*, VNInfo*>::iterator I = LHSValsDefinedFromRHS.begin(),
1317 E = LHSValsDefinedFromRHS.end(); I != E; ++I) {
1318 VNInfo *VNI = I->first;
1319 unsigned LHSValID = LHSValNoAssignments[VNI->id];
1320 LiveInterval::removeKill(NewVNInfo[LHSValID], VNI->def);
1321 NewVNInfo[LHSValID]->hasPHIKill |= VNI->hasPHIKill;
1322 RHS.addKills(NewVNInfo[LHSValID], VNI->kills);
1325 // Update kill info. Some live ranges are extended due to copy coalescing.
1326 for (DenseMap<VNInfo*, VNInfo*>::iterator I = RHSValsDefinedFromLHS.begin(),
1327 E = RHSValsDefinedFromLHS.end(); I != E; ++I) {
1328 VNInfo *VNI = I->first;
1329 unsigned RHSValID = RHSValNoAssignments[VNI->id];
1330 LiveInterval::removeKill(NewVNInfo[RHSValID], VNI->def);
1331 NewVNInfo[RHSValID]->hasPHIKill |= VNI->hasPHIKill;
1332 LHS.addKills(NewVNInfo[RHSValID], VNI->kills);
1335 // If we get here, we know that we can coalesce the live ranges. Ask the
1336 // intervals to coalesce themselves now.
1337 if ((RHS.ranges.size() > LHS.ranges.size() &&
1338 TargetRegisterInfo::isVirtualRegister(LHS.reg)) ||
1339 TargetRegisterInfo::isPhysicalRegister(RHS.reg)) {
1340 RHS.join(LHS, &RHSValNoAssignments[0], &LHSValNoAssignments[0], NewVNInfo);
1343 LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo);
1350 // DepthMBBCompare - Comparison predicate that sort first based on the loop
1351 // depth of the basic block (the unsigned), and then on the MBB number.
1352 struct DepthMBBCompare {
1353 typedef std::pair<unsigned, MachineBasicBlock*> DepthMBBPair;
1354 bool operator()(const DepthMBBPair &LHS, const DepthMBBPair &RHS) const {
1355 if (LHS.first > RHS.first) return true; // Deeper loops first
1356 return LHS.first == RHS.first &&
1357 LHS.second->getNumber() < RHS.second->getNumber();
1362 /// getRepIntervalSize - Returns the size of the interval that represents the
1363 /// specified register.
1365 unsigned JoinPriorityQueue<SF>::getRepIntervalSize(unsigned Reg) {
1366 return Rc->getRepIntervalSize(Reg);
1369 /// CopyRecSort::operator - Join priority queue sorting function.
1371 bool CopyRecSort::operator()(CopyRec left, CopyRec right) const {
1372 // Inner loops first.
1373 if (left.LoopDepth > right.LoopDepth)
1375 else if (left.LoopDepth == right.LoopDepth)
1376 if (left.isBackEdge && !right.isBackEdge)
1381 void SimpleRegisterCoalescing::CopyCoalesceInMBB(MachineBasicBlock *MBB,
1382 std::vector<CopyRec> &TryAgain) {
1383 DOUT << ((Value*)MBB->getBasicBlock())->getName() << ":\n";
1385 std::vector<CopyRec> VirtCopies;
1386 std::vector<CopyRec> PhysCopies;
1387 unsigned LoopDepth = loopInfo->getLoopDepth(MBB);
1388 for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end();
1390 MachineInstr *Inst = MII++;
1392 // If this isn't a copy nor a extract_subreg, we can't join intervals.
1393 unsigned SrcReg, DstReg;
1394 if (Inst->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
1395 DstReg = Inst->getOperand(0).getReg();
1396 SrcReg = Inst->getOperand(1).getReg();
1397 } else if (!tii_->isMoveInstr(*Inst, SrcReg, DstReg))
1400 bool SrcIsPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg);
1401 bool DstIsPhys = TargetRegisterInfo::isPhysicalRegister(DstReg);
1403 JoinQueue->push(CopyRec(Inst, LoopDepth, isBackEdgeCopy(Inst, DstReg)));
1405 if (SrcIsPhys || DstIsPhys)
1406 PhysCopies.push_back(CopyRec(Inst, 0, false));
1408 VirtCopies.push_back(CopyRec(Inst, 0, false));
1415 // Try coalescing physical register + virtual register first.
1416 for (unsigned i = 0, e = PhysCopies.size(); i != e; ++i) {
1417 CopyRec &TheCopy = PhysCopies[i];
1419 if (!JoinCopy(TheCopy, Again))
1421 TryAgain.push_back(TheCopy);
1423 for (unsigned i = 0, e = VirtCopies.size(); i != e; ++i) {
1424 CopyRec &TheCopy = VirtCopies[i];
1426 if (!JoinCopy(TheCopy, Again))
1428 TryAgain.push_back(TheCopy);
1432 void SimpleRegisterCoalescing::joinIntervals() {
1433 DOUT << "********** JOINING INTERVALS ***********\n";
1436 JoinQueue = new JoinPriorityQueue<CopyRecSort>(this);
1438 std::vector<CopyRec> TryAgainList;
1439 if (loopInfo->begin() == loopInfo->end()) {
1440 // If there are no loops in the function, join intervals in function order.
1441 for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();
1443 CopyCoalesceInMBB(I, TryAgainList);
1445 // Otherwise, join intervals in inner loops before other intervals.
1446 // Unfortunately we can't just iterate over loop hierarchy here because
1447 // there may be more MBB's than BB's. Collect MBB's for sorting.
1449 // Join intervals in the function prolog first. We want to join physical
1450 // registers with virtual registers before the intervals got too long.
1451 std::vector<std::pair<unsigned, MachineBasicBlock*> > MBBs;
1452 for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();I != E;++I){
1453 MachineBasicBlock *MBB = I;
1454 MBBs.push_back(std::make_pair(loopInfo->getLoopDepth(MBB), I));
1457 // Sort by loop depth.
1458 std::sort(MBBs.begin(), MBBs.end(), DepthMBBCompare());
1460 // Finally, join intervals in loop nest order.
1461 for (unsigned i = 0, e = MBBs.size(); i != e; ++i)
1462 CopyCoalesceInMBB(MBBs[i].second, TryAgainList);
1465 // Joining intervals can allow other intervals to be joined. Iteratively join
1466 // until we make no progress.
1468 SmallVector<CopyRec, 16> TryAgain;
1469 bool ProgressMade = true;
1470 while (ProgressMade) {
1471 ProgressMade = false;
1472 while (!JoinQueue->empty()) {
1473 CopyRec R = JoinQueue->pop();
1475 bool Success = JoinCopy(R, Again);
1477 ProgressMade = true;
1479 TryAgain.push_back(R);
1483 while (!TryAgain.empty()) {
1484 JoinQueue->push(TryAgain.back());
1485 TryAgain.pop_back();
1490 bool ProgressMade = true;
1491 while (ProgressMade) {
1492 ProgressMade = false;
1494 for (unsigned i = 0, e = TryAgainList.size(); i != e; ++i) {
1495 CopyRec &TheCopy = TryAgainList[i];
1498 bool Success = JoinCopy(TheCopy, Again);
1499 if (Success || !Again) {
1500 TheCopy.MI = 0; // Mark this one as done.
1501 ProgressMade = true;
1512 /// Return true if the two specified registers belong to different register
1513 /// classes. The registers may be either phys or virt regs.
1514 bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA,
1515 unsigned RegB) const {
1517 // Get the register classes for the first reg.
1518 if (TargetRegisterInfo::isPhysicalRegister(RegA)) {
1519 assert(TargetRegisterInfo::isVirtualRegister(RegB) &&
1520 "Shouldn't consider two physregs!");
1521 return !mri_->getRegClass(RegB)->contains(RegA);
1524 // Compare against the regclass for the second reg.
1525 const TargetRegisterClass *RegClass = mri_->getRegClass(RegA);
1526 if (TargetRegisterInfo::isVirtualRegister(RegB))
1527 return RegClass != mri_->getRegClass(RegB);
1529 return !RegClass->contains(RegB);
1532 /// lastRegisterUse - Returns the last use of the specific register between
1533 /// cycles Start and End or NULL if there are no uses.
1535 SimpleRegisterCoalescing::lastRegisterUse(unsigned Start, unsigned End,
1536 unsigned Reg, unsigned &UseIdx) const{
1538 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
1539 MachineOperand *LastUse = NULL;
1540 for (MachineRegisterInfo::use_iterator I = mri_->use_begin(Reg),
1541 E = mri_->use_end(); I != E; ++I) {
1542 MachineOperand &Use = I.getOperand();
1543 MachineInstr *UseMI = Use.getParent();
1544 unsigned SrcReg, DstReg;
1545 if (tii_->isMoveInstr(*UseMI, SrcReg, DstReg) && SrcReg == DstReg)
1546 // Ignore identity copies.
1548 unsigned Idx = li_->getInstructionIndex(UseMI);
1549 if (Idx >= Start && Idx < End && Idx >= UseIdx) {
1557 int e = (End-1) / InstrSlots::NUM * InstrSlots::NUM;
1560 // Skip deleted instructions
1561 MachineInstr *MI = li_->getInstructionFromIndex(e);
1562 while ((e - InstrSlots::NUM) >= s && !MI) {
1563 e -= InstrSlots::NUM;
1564 MI = li_->getInstructionFromIndex(e);
1566 if (e < s || MI == NULL)
1569 // Ignore identity copies.
1570 unsigned SrcReg, DstReg;
1571 if (!(tii_->isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg))
1572 for (unsigned i = 0, NumOps = MI->getNumOperands(); i != NumOps; ++i) {
1573 MachineOperand &Use = MI->getOperand(i);
1574 if (Use.isRegister() && Use.isUse() && Use.getReg() &&
1575 tri_->regsOverlap(Use.getReg(), Reg)) {
1581 e -= InstrSlots::NUM;
1588 void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
1589 if (TargetRegisterInfo::isPhysicalRegister(reg))
1590 cerr << tri_->getName(reg);
1592 cerr << "%reg" << reg;
1595 void SimpleRegisterCoalescing::releaseMemory() {
1596 JoinedCopies.clear();
1599 static bool isZeroLengthInterval(LiveInterval *li) {
1600 for (LiveInterval::Ranges::const_iterator
1601 i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
1602 if (i->end - i->start > LiveIntervals::InstrSlots::NUM)
1607 bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
1609 mri_ = &fn.getRegInfo();
1610 tm_ = &fn.getTarget();
1611 tri_ = tm_->getRegisterInfo();
1612 tii_ = tm_->getInstrInfo();
1613 li_ = &getAnalysis<LiveIntervals>();
1614 lv_ = &getAnalysis<LiveVariables>();
1615 loopInfo = &getAnalysis<MachineLoopInfo>();
1617 DOUT << "********** SIMPLE REGISTER COALESCING **********\n"
1618 << "********** Function: "
1619 << ((Value*)mf_->getFunction())->getName() << '\n';
1621 allocatableRegs_ = tri_->getAllocatableSet(fn);
1622 for (TargetRegisterInfo::regclass_iterator I = tri_->regclass_begin(),
1623 E = tri_->regclass_end(); I != E; ++I)
1624 allocatableRCRegs_.insert(std::make_pair(*I,
1625 tri_->getAllocatableSet(fn, *I)));
1627 // Join (coalesce) intervals if requested.
1628 if (EnableJoining) {
1630 DOUT << "********** INTERVALS POST JOINING **********\n";
1631 for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I){
1632 I->second.print(DOUT, tri_);
1636 // Delete all coalesced copies.
1637 for (SmallPtrSet<MachineInstr*,32>::iterator I = JoinedCopies.begin(),
1638 E = JoinedCopies.end(); I != E; ++I) {
1639 MachineInstr *CopyMI = *I;
1640 unsigned SrcReg, DstReg;
1641 tii_->isMoveInstr(*CopyMI, SrcReg, DstReg);
1642 if (CopyMI->registerDefIsDead(DstReg)) {
1643 LiveInterval &li = li_->getInterval(DstReg);
1644 ShortenDeadCopySrcLiveRange(li, CopyMI);
1645 ShortenDeadCopyLiveRange(li, CopyMI);
1647 li_->RemoveMachineInstrFromMaps(*I);
1648 (*I)->eraseFromParent();
1653 // Perform a final pass over the instructions and compute spill weights
1654 // and remove identity moves.
1655 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
1656 mbbi != mbbe; ++mbbi) {
1657 MachineBasicBlock* mbb = mbbi;
1658 unsigned loopDepth = loopInfo->getLoopDepth(mbb);
1660 for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end();
1662 // if the move will be an identity move delete it
1663 unsigned srcReg, dstReg;
1664 if (tii_->isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) {
1665 if (li_->hasInterval(srcReg)) {
1666 LiveInterval &RegInt = li_->getInterval(srcReg);
1667 // If def of this move instruction is dead, remove its live range
1668 // from the dstination register's live interval.
1669 if (mii->registerDefIsDead(dstReg)) {
1670 ShortenDeadCopySrcLiveRange(RegInt, mii);
1671 ShortenDeadCopyLiveRange(RegInt, mii);
1674 li_->RemoveMachineInstrFromMaps(mii);
1675 mii = mbbi->erase(mii);
1678 SmallSet<unsigned, 4> UniqueUses;
1679 for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
1680 const MachineOperand &mop = mii->getOperand(i);
1681 if (mop.isRegister() && mop.getReg() &&
1682 TargetRegisterInfo::isVirtualRegister(mop.getReg())) {
1683 unsigned reg = mop.getReg();
1684 // Multiple uses of reg by the same instruction. It should not
1685 // contribute to spill weight again.
1686 if (UniqueUses.count(reg) != 0)
1688 LiveInterval &RegInt = li_->getInterval(reg);
1690 li_->getSpillWeight(mop.isDef(), mop.isUse(), loopDepth);
1691 UniqueUses.insert(reg);
1699 for (LiveIntervals::iterator I = li_->begin(), E = li_->end(); I != E; ++I) {
1700 LiveInterval &LI = I->second;
1701 if (TargetRegisterInfo::isVirtualRegister(LI.reg)) {
1702 // If the live interval length is essentially zero, i.e. in every live
1703 // range the use follows def immediately, it doesn't make sense to spill
1704 // it and hope it will be easier to allocate for this li.
1705 if (isZeroLengthInterval(&LI))
1706 LI.weight = HUGE_VALF;
1708 bool isLoad = false;
1709 if (li_->isReMaterializable(LI, isLoad)) {
1710 // If all of the definitions of the interval are re-materializable,
1711 // it is a preferred candidate for spilling. If non of the defs are
1712 // loads, then it's potentially very cheap to re-materialize.
1713 // FIXME: this gets much more complicated once we support non-trivial
1714 // re-materialization.
1722 // Slightly prefer live interval that has been assigned a preferred reg.
1726 // Divide the weight of the interval by its size. This encourages
1727 // spilling of intervals that are large and have few uses, and
1728 // discourages spilling of small intervals with many uses.
1729 LI.weight /= LI.getSize();
1737 /// print - Implement the dump method.
1738 void SimpleRegisterCoalescing::print(std::ostream &O, const Module* m) const {
1742 RegisterCoalescer* llvm::createSimpleRegisterCoalescer() {
1743 return new SimpleRegisterCoalescing();
1746 // Make sure that anything that uses RegisterCoalescer pulls in this file...
1747 DEFINING_FILE_FOR(SimpleRegisterCoalescing)