1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/Constants.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/Target/TargetLowering.h"
26 static bool isCommutativeBinOp(unsigned Opcode) {
32 case ISD::XOR: return true;
33 default: return false; // FIXME: Need commutative info for user ops!
37 static bool isAssociativeBinOp(unsigned Opcode) {
43 case ISD::XOR: return true;
44 default: return false; // FIXME: Need associative info for user ops!
48 static unsigned ExactLog2(uint64_t Val) {
57 // isInvertibleForFree - Return true if there is no cost to emitting the logical
58 // inverse of this node.
59 static bool isInvertibleForFree(SDOperand N) {
60 if (isa<ConstantSDNode>(N.Val)) return true;
61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse())
67 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
68 /// when given the operation for (X op Y).
69 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
70 // To perform this operation, we just need to swap the L and G bits of the
72 unsigned OldL = (Operation >> 2) & 1;
73 unsigned OldG = (Operation >> 1) & 1;
74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
75 (OldL << 1) | // New G bit
76 (OldG << 2)); // New L bit.
79 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
80 /// 'op' is a valid SetCC operation.
81 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
82 unsigned Operation = Op;
84 Operation ^= 7; // Flip L, G, E bits, but not U.
86 Operation ^= 15; // Flip all of the condition bits.
87 if (Operation > ISD::SETTRUE2)
88 Operation &= ~8; // Don't let N and U bits get set.
89 return ISD::CondCode(Operation);
93 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
94 /// signed operation and 2 if the result is an unsigned comparison. Return zero
95 /// if the operation does not depend on the sign of the input (setne and seteq).
96 static int isSignedOp(ISD::CondCode Opcode) {
98 default: assert(0 && "Illegal integer setcc operation!");
100 case ISD::SETNE: return 0;
104 case ISD::SETGE: return 1;
108 case ISD::SETUGE: return 2;
112 /// getSetCCOrOperation - Return the result of a logical OR between different
113 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
114 /// returns SETCC_INVALID if it is not possible to represent the resultant
116 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
119 // Cannot fold a signed integer setcc with an unsigned integer setcc.
120 return ISD::SETCC_INVALID;
122 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
124 // If the N and U bits get set then the resultant comparison DOES suddenly
125 // care about orderedness, and is true when ordered.
126 if (Op > ISD::SETTRUE2)
127 Op &= ~16; // Clear the N bit.
128 return ISD::CondCode(Op);
131 /// getSetCCAndOperation - Return the result of a logical AND between different
132 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
133 /// function returns zero if it is not possible to represent the resultant
135 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
138 // Cannot fold a signed setcc with an unsigned setcc.
139 return ISD::SETCC_INVALID;
141 // Combine all of the condition bits.
142 return ISD::CondCode(Op1 & Op2);
145 const TargetMachine &SelectionDAG::getTarget() const {
146 return TLI.getTargetMachine();
150 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
151 /// SelectionDAG, including nodes (like loads) that have uses of their token
152 /// chain but no other uses and no side effect. If a node is passed in as an
153 /// argument, it is used as the seed for node deletion.
154 void SelectionDAG::RemoveDeadNodes(SDNode *N) {
155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
157 // Create a dummy node (which is not added to allnodes), that adds a reference
158 // to the root node, preventing it from being deleted.
159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot());
161 DeleteNodeIfDead(N, &AllNodeSet);
164 unsigned NumNodes = AllNodeSet.size();
165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
167 // Try to delete this node.
168 DeleteNodeIfDead(*I, &AllNodeSet);
170 // If we actually deleted any nodes, do not use invalid iterators in
172 if (AllNodeSet.size() != NumNodes)
177 if (AllNodes.size() != NumNodes)
178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
180 // If the root changed (e.g. it was a dead load, update the root).
181 setRoot(DummyNode->getOperand(0));
183 // Now that we are done with the dummy node, delete it.
184 DummyNode->getOperand(0).Val->removeUser(DummyNode);
188 void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
192 // Okay, we really are going to delete this node. First take this out of the
193 // appropriate CSE map.
194 switch (N->getOpcode()) {
196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
197 N->getValueType(0)));
199 case ISD::ConstantFP: {
204 DV = cast<ConstantFPSDNode>(N)->getValue();
205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0)));
208 case ISD::GlobalAddress:
209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
211 case ISD::FrameIndex:
212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
214 case ISD::ConstantPool:
215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex());
217 case ISD::BasicBlock:
218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
220 case ISD::ExternalSymbol:
221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
225 Loads.erase(std::make_pair(N->getOperand(1),
226 std::make_pair(N->getOperand(0),
227 N->getValueType(0))));
230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0),
233 cast<SetCCSDNode>(N)->getCondition(),
234 N->getValueType(0))));
236 case ISD::TRUNCSTORE:
237 case ISD::SIGN_EXTEND_INREG:
238 case ISD::FP_ROUND_INREG:
241 case ISD::ZEXTLOAD: {
243 NN.Opcode = N->getOpcode();
244 NN.VT = N->getValueType(0);
245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType();
246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
247 NN.Ops.push_back(N->getOperand(i));
248 MVTSDNodes.erase(NN);
252 if (N->getNumOperands() == 1)
253 UnaryOps.erase(std::make_pair(N->getOpcode(),
254 std::make_pair(N->getOperand(0),
255 N->getValueType(0))));
256 else if (N->getNumOperands() == 2)
257 BinaryOps.erase(std::make_pair(N->getOpcode(),
258 std::make_pair(N->getOperand(0),
263 // Next, brutally remove the operand list.
264 while (!N->Operands.empty()) {
265 SDNode *O = N->Operands.back().Val;
266 N->Operands.pop_back();
269 // Now that we removed this operand, see if there are no uses of it left.
270 DeleteNodeIfDead(O, NodeSet);
273 // Remove the node from the nodes set and delete it.
274 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
277 // Now that the node is gone, check to see if any of the operands of this node
283 SelectionDAG::~SelectionDAG() {
284 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
288 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
289 if (Op.getValueType() == VT) return Op;
290 int64_t Imm = ~0ULL >> 64-MVT::getSizeInBits(VT);
291 return getNode(ISD::AND, Op.getValueType(), Op,
292 getConstant(Imm, Op.getValueType()));
295 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
296 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
297 // Mask out any bits that are not valid for this constant.
299 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
301 SDNode *&N = Constants[std::make_pair(Val, VT)];
302 if (N) return SDOperand(N, 0);
303 N = new ConstantSDNode(Val, VT);
304 AllNodes.push_back(N);
305 return SDOperand(N, 0);
308 SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
309 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
311 Val = (float)Val; // Mask out extra precision.
313 // Do the map lookup using the actual bit pattern for the floating point
314 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
315 // we don't have issues with SNANs.
323 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)];
324 if (N) return SDOperand(N, 0);
325 N = new ConstantFPSDNode(Val, VT);
326 AllNodes.push_back(N);
327 return SDOperand(N, 0);
332 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
334 SDNode *&N = GlobalValues[GV];
335 if (N) return SDOperand(N, 0);
336 N = new GlobalAddressSDNode(GV,VT);
337 AllNodes.push_back(N);
338 return SDOperand(N, 0);
341 SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
342 SDNode *&N = FrameIndices[FI];
343 if (N) return SDOperand(N, 0);
344 N = new FrameIndexSDNode(FI, VT);
345 AllNodes.push_back(N);
346 return SDOperand(N, 0);
349 SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) {
350 SDNode *N = ConstantPoolIndices[CPIdx];
351 if (N) return SDOperand(N, 0);
352 N = new ConstantPoolSDNode(CPIdx, VT);
353 AllNodes.push_back(N);
354 return SDOperand(N, 0);
357 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
358 SDNode *&N = BBNodes[MBB];
359 if (N) return SDOperand(N, 0);
360 N = new BasicBlockSDNode(MBB);
361 AllNodes.push_back(N);
362 return SDOperand(N, 0);
365 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
366 SDNode *&N = ExternalSymbols[Sym];
367 if (N) return SDOperand(N, 0);
368 N = new ExternalSymbolSDNode(Sym, VT);
369 AllNodes.push_back(N);
370 return SDOperand(N, 0);
373 SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT,
374 SDOperand N1, SDOperand N2) {
375 // These setcc operations always fold.
379 case ISD::SETFALSE2: return getConstant(0, VT);
381 case ISD::SETTRUE2: return getConstant(1, VT);
384 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
385 uint64_t C2 = N2C->getValue();
386 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
387 uint64_t C1 = N1C->getValue();
389 // Sign extend the operands if required
390 if (ISD::isSignedIntSetCC(Cond)) {
391 C1 = N1C->getSignExtended();
392 C2 = N2C->getSignExtended();
396 default: assert(0 && "Unknown integer setcc!");
397 case ISD::SETEQ: return getConstant(C1 == C2, VT);
398 case ISD::SETNE: return getConstant(C1 != C2, VT);
399 case ISD::SETULT: return getConstant(C1 < C2, VT);
400 case ISD::SETUGT: return getConstant(C1 > C2, VT);
401 case ISD::SETULE: return getConstant(C1 <= C2, VT);
402 case ISD::SETUGE: return getConstant(C1 >= C2, VT);
403 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
404 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
405 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
406 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
409 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform
410 // the comparison on the input.
411 if (N1.getOpcode() == ISD::ZERO_EXTEND) {
412 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
414 // If the comparison constant has bits in the upper part, the
415 // zero-extended value could never match.
416 if (C2 & (~0ULL << InSize)) {
417 unsigned VSize = MVT::getSizeInBits(N1.getValueType());
421 case ISD::SETEQ: return getConstant(0, VT);
424 case ISD::SETNE: return getConstant(1, VT);
427 // True if the sign bit of C2 is set.
428 return getConstant((C2 & (1ULL << VSize)) != 0, VT);
431 // True if the sign bit of C2 isn't set.
432 return getConstant((C2 & (1ULL << VSize)) == 0, VT);
438 // Otherwise, we can perform the comparison with the low bits.
446 return getSetCC(Cond, VT, N1.getOperand(0),
447 getConstant(C2, N1.getOperand(0).getValueType()));
449 break; // todo, be more careful with signed comparisons
454 uint64_t MinVal, MaxVal;
455 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
456 if (ISD::isSignedIntSetCC(Cond)) {
457 MinVal = 1ULL << (OperandBitSize-1);
458 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
459 MaxVal = ~0ULL >> (65-OperandBitSize);
464 MaxVal = ~0ULL >> (64-OperandBitSize);
467 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
468 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
469 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
470 --C2; // X >= C1 --> X > (C1-1)
471 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT;
472 N2 = getConstant(C2, N2.getValueType());
473 N2C = cast<ConstantSDNode>(N2.Val);
476 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
477 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
478 ++C2; // X <= C1 --> X < (C1+1)
479 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT;
480 N2 = getConstant(C2, N2.getValueType());
481 N2C = cast<ConstantSDNode>(N2.Val);
484 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
485 return getConstant(0, VT); // X < MIN --> false
487 // Canonicalize setgt X, Min --> setne X, Min
488 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
489 return getSetCC(ISD::SETNE, VT, N1, N2);
491 // If we have setult X, 1, turn it into seteq X, 0
492 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
493 return getSetCC(ISD::SETEQ, VT, N1,
494 getConstant(MinVal, N1.getValueType()));
495 // If we have setugt X, Max-1, turn it into seteq X, Max
496 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
497 return getSetCC(ISD::SETEQ, VT, N1,
498 getConstant(MaxVal, N1.getValueType()));
500 // If we have "setcc X, C1", check to see if we can shrink the immediate
503 // SETUGT X, SINTMAX -> SETLT X, 0
504 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
505 C2 == (~0ULL >> (65-OperandBitSize)))
506 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType()));
508 // FIXME: Implement the rest of these.
511 // Fold bit comparisons when we can.
512 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
513 VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
514 if (ConstantSDNode *AndRHS =
515 dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
516 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
517 // Perform the xform if the AND RHS is a single bit.
518 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
519 return getNode(ISD::SRL, VT, N1,
520 getConstant(ExactLog2(AndRHS->getValue()),
521 TLI.getShiftAmountTy()));
523 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
524 // (X & 8) == 8 --> (X & 8) >> 3
525 // Perform the xform if C2 is a single bit.
526 if ((C2 & (C2-1)) == 0) {
527 return getNode(ISD::SRL, VT, N1,
528 getConstant(ExactLog2(C2),TLI.getShiftAmountTy()));
533 } else if (isa<ConstantSDNode>(N1.Val)) {
534 // Ensure that the constant occurs on the RHS.
535 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1);
538 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
539 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
540 double C1 = N1C->getValue(), C2 = N2C->getValue();
543 default: break; // FIXME: Implement the rest of these!
544 case ISD::SETEQ: return getConstant(C1 == C2, VT);
545 case ISD::SETNE: return getConstant(C1 != C2, VT);
546 case ISD::SETLT: return getConstant(C1 < C2, VT);
547 case ISD::SETGT: return getConstant(C1 > C2, VT);
548 case ISD::SETLE: return getConstant(C1 <= C2, VT);
549 case ISD::SETGE: return getConstant(C1 >= C2, VT);
552 // Ensure that the constant occurs on the RHS.
553 Cond = ISD::getSetCCSwappedOperands(Cond);
558 // We can always fold X == Y for integer setcc's.
559 if (MVT::isInteger(N1.getValueType()))
560 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
561 unsigned UOF = ISD::getUnorderedFlavor(Cond);
562 if (UOF == 2) // FP operators that are undefined on NaNs.
563 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
564 if (UOF == ISD::isTrueWhenEqual(Cond))
565 return getConstant(UOF, VT);
566 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
567 // if it is not already.
568 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO;
571 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
572 MVT::isInteger(N1.getValueType())) {
573 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
574 N1.getOpcode() == ISD::XOR) {
575 // Simplify (X+Y) == (X+Z) --> Y == Z
576 if (N1.getOpcode() == N2.getOpcode()) {
577 if (N1.getOperand(0) == N2.getOperand(0))
578 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1));
579 if (N1.getOperand(1) == N2.getOperand(1))
580 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0));
581 if (isCommutativeBinOp(N1.getOpcode())) {
582 // If X op Y == Y op X, try other combinations.
583 if (N1.getOperand(0) == N2.getOperand(1))
584 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0));
585 if (N1.getOperand(1) == N2.getOperand(0))
586 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1));
590 // FIXME: move this stuff to the DAG Combiner when it exists!
592 // Simplify (X+Z) == X --> Z == 0
593 if (N1.getOperand(0) == N2)
594 return getSetCC(Cond, VT, N1.getOperand(1),
595 getConstant(0, N1.getValueType()));
596 if (N1.getOperand(1) == N2) {
597 if (isCommutativeBinOp(N1.getOpcode()))
598 return getSetCC(Cond, VT, N1.getOperand(0),
599 getConstant(0, N1.getValueType()));
601 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
602 // (Z-X) == X --> Z == X<<1
603 return getSetCC(Cond, VT, N1.getOperand(0),
604 getNode(ISD::SHL, N2.getValueType(),
605 N2, getConstant(1, TLI.getShiftAmountTy())));
610 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
611 N2.getOpcode() == ISD::XOR) {
612 // Simplify X == (X+Z) --> Z == 0
613 if (N2.getOperand(0) == N1)
614 return getSetCC(Cond, VT, N2.getOperand(1),
615 getConstant(0, N2.getValueType()));
616 else if (N2.getOperand(1) == N1)
617 return getSetCC(Cond, VT, N2.getOperand(0),
618 getConstant(0, N2.getValueType()));
622 // Fold away ALL boolean setcc's.
623 if (N1.getValueType() == MVT::i1) {
625 default: assert(0 && "Unknown integer setcc!");
626 case ISD::SETEQ: // X == Y -> (X^Y)^1
627 N1 = getNode(ISD::XOR, MVT::i1,
628 getNode(ISD::XOR, MVT::i1, N1, N2),
629 getConstant(1, MVT::i1));
631 case ISD::SETNE: // X != Y --> (X^Y)
632 N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
634 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
635 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
636 N1 = getNode(ISD::AND, MVT::i1, N2,
637 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
639 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
640 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
641 N1 = getNode(ISD::AND, MVT::i1, N1,
642 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
644 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
645 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
646 N1 = getNode(ISD::OR, MVT::i1, N2,
647 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
649 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
650 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
651 N1 = getNode(ISD::OR, MVT::i1, N1,
652 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
656 N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
661 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2),
662 std::make_pair(Cond, VT))];
663 if (N) return SDOperand(N, 0);
664 N = new SetCCSDNode(Cond, N1, N2);
665 N->setValueTypes(VT);
666 AllNodes.push_back(N);
667 return SDOperand(N, 0);
672 /// getNode - Gets or creates the specified node.
674 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
675 SDNode *N = new SDNode(Opcode, VT);
676 AllNodes.push_back(N);
677 return SDOperand(N, 0);
680 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
682 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
683 uint64_t Val = C->getValue();
686 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
687 case ISD::ZERO_EXTEND: return getConstant(Val, VT);
688 case ISD::TRUNCATE: return getConstant(Val, VT);
689 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT);
690 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT);
694 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
697 return getConstantFP(-C->getValue(), VT);
700 return getConstantFP(C->getValue(), VT);
701 case ISD::FP_TO_SINT:
702 return getConstant((int64_t)C->getValue(), VT);
703 case ISD::FP_TO_UINT:
704 return getConstant((uint64_t)C->getValue(), VT);
707 unsigned OpOpcode = Operand.Val->getOpcode();
709 case ISD::TokenFactor:
710 return Operand; // Factor of one node? No factor.
711 case ISD::SIGN_EXTEND:
712 if (Operand.getValueType() == VT) return Operand; // noop extension
713 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
714 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
716 case ISD::ZERO_EXTEND:
717 if (Operand.getValueType() == VT) return Operand; // noop extension
718 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
719 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
722 if (Operand.getValueType() == VT) return Operand; // noop truncate
723 if (OpOpcode == ISD::TRUNCATE)
724 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
725 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) {
726 // If the source is smaller than the dest, we still need an extend.
727 if (Operand.Val->getOperand(0).getValueType() < VT)
728 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
729 else if (Operand.Val->getOperand(0).getValueType() > VT)
730 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
732 return Operand.Val->getOperand(0);
736 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X)
737 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1),
738 Operand.Val->getOperand(0));
739 if (OpOpcode == ISD::FNEG) // --X -> X
740 return Operand.Val->getOperand(0);
743 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
744 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
748 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
749 if (N) return SDOperand(N, 0);
750 N = new SDNode(Opcode, Operand);
751 N->setValueTypes(VT);
752 AllNodes.push_back(N);
753 return SDOperand(N, 0);
756 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
757 /// this predicate to simplify operations downstream. V and Mask are known to
758 /// be the same type.
759 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
760 const TargetLowering &TLI) {
762 if (Mask == 0) return true;
764 // If we know the result of a setcc has the top bits zero, use this info.
765 switch (Op.getOpcode()) {
769 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
772 return ((Mask & 1) == 0) &&
773 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
776 SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType());
777 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
778 case ISD::ZERO_EXTEND:
779 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
780 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
783 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
784 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
785 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
790 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
791 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
793 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
794 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
797 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
798 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
799 uint64_t NewVal = Mask << ShAmt->getValue();
800 SrcBits = MVT::getSizeInBits(Op.getValueType());
801 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
802 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
806 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
807 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
808 uint64_t NewVal = Mask >> ShAmt->getValue();
809 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
812 // TODO we could handle some SRA cases here.
821 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
822 SDOperand N1, SDOperand N2) {
825 case ISD::TokenFactor:
826 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
827 N2.getValueType() == MVT::Other && "Invalid token factor!");
834 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
841 assert(N1.getValueType() == N2.getValueType() &&
842 N1.getValueType() == VT && "Binary operator types must match!");
848 assert(VT == N1.getValueType() &&
849 "Shift operators return type must be the same as their first arg");
850 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
851 VT != MVT::i1 && "Shifts only work on integers");
857 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
858 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
861 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
863 case ISD::ADD: return getConstant(C1 + C2, VT);
864 case ISD::SUB: return getConstant(C1 - C2, VT);
865 case ISD::MUL: return getConstant(C1 * C2, VT);
867 if (C2) return getConstant(C1 / C2, VT);
870 if (C2) return getConstant(C1 % C2, VT);
873 if (C2) return getConstant(N1C->getSignExtended() /
874 N2C->getSignExtended(), VT);
877 if (C2) return getConstant(N1C->getSignExtended() %
878 N2C->getSignExtended(), VT);
880 case ISD::AND : return getConstant(C1 & C2, VT);
881 case ISD::OR : return getConstant(C1 | C2, VT);
882 case ISD::XOR : return getConstant(C1 ^ C2, VT);
883 case ISD::SHL : return getConstant(C1 << (int)C2, VT);
884 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT);
885 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
889 } else { // Cannonicalize constant to RHS if commutative
890 if (isCommutativeBinOp(Opcode)) {
898 case ISD::SHL: // shl 0, X -> 0
899 if (N1C->isNullValue()) return N1;
901 case ISD::SRL: // srl 0, X -> 0
902 if (N1C->isNullValue()) return N1;
904 case ISD::SRA: // sra -1, X -> -1
905 if (N1C->isAllOnesValue()) return N1;
911 uint64_t C2 = N2C->getValue();
915 if (!C2) return N1; // add X, 0 -> X
918 if (!C2) return N1; // sub X, 0 -> X
921 if (!C2) return N2; // mul X, 0 -> 0
922 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
923 return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
925 // FIXME: Move this to the DAG combiner when it exists.
926 if ((C2 & C2-1) == 0) {
927 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy());
928 return getNode(ISD::SHL, VT, N1, ShAmt);
933 // FIXME: Move this to the DAG combiner when it exists.
934 if ((C2 & C2-1) == 0 && C2) {
935 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy());
936 return getNode(ISD::SRL, VT, N1, ShAmt);
943 // If the shift amount is bigger than the size of the data, then all the
944 // bits are shifted out. Simplify to undef.
945 if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
946 return getNode(ISD::UNDEF, N1.getValueType());
948 if (C2 == 0) return N1;
952 if (!C2) return N2; // X and 0 -> 0
953 if (N2C->isAllOnesValue())
954 return N1; // X and -1 -> X
956 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0
957 return getConstant(0, VT);
960 uint64_t NotC2 = ~C2;
962 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
964 if (MaskedValueIsZero(N1, NotC2, TLI))
965 return N1; // if (X & ~C2) -> 0, the and is redundant
968 // FIXME: Should add a corresponding version of this for
969 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
970 // we don't have yet.
972 // and (sign_extend_inreg x:16:32), 1 -> and x, 1
973 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
974 // If we are masking out the part of our input that was extended, just
975 // mask the input to the extension directly.
976 unsigned ExtendBits =
977 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType());
978 if ((C2 & (~0ULL << ExtendBits)) == 0)
979 return getNode(ISD::AND, VT, N1.getOperand(0), N2);
983 if (!C2)return N1; // X or 0 -> X
984 if (N2C->isAllOnesValue())
985 return N2; // X or -1 -> -1
988 if (!C2) return N1; // X xor 0 -> X
989 if (N2C->isAllOnesValue()) {
990 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){
991 // !(X op Y) -> (X !op Y)
992 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
993 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger),
994 SetCC->getValueType(0),
995 SetCC->getOperand(0), SetCC->getOperand(1));
996 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
998 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
999 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1000 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1001 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1002 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS
1003 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS
1004 if (Op->getOpcode() == ISD::AND)
1005 return getNode(ISD::OR, VT, LHS, RHS);
1006 return getNode(ISD::AND, VT, LHS, RHS);
1009 // X xor -1 -> not(x) ?
1014 // Reassociate ((X op C1) op C2) if possible.
1015 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1016 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1017 return getNode(Opcode, VT, N1.Val->getOperand(0),
1018 getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1021 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1022 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1025 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1027 case ISD::ADD: return getConstantFP(C1 + C2, VT);
1028 case ISD::SUB: return getConstantFP(C1 - C2, VT);
1029 case ISD::MUL: return getConstantFP(C1 * C2, VT);
1031 if (C2) return getConstantFP(C1 / C2, VT);
1034 if (C2) return getConstantFP(fmod(C1, C2), VT);
1039 } else { // Cannonicalize constant to RHS if commutative
1040 if (isCommutativeBinOp(Opcode)) {
1041 std::swap(N1CFP, N2CFP);
1046 // Finally, fold operations that do not require constants.
1048 case ISD::TokenFactor:
1049 if (N1.getOpcode() == ISD::EntryToken)
1051 if (N2.getOpcode() == ISD::EntryToken)
1057 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val))
1058 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) {
1059 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1060 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1061 ISD::CondCode Op2 = RHS->getCondition();
1063 if (LR == RR && isa<ConstantSDNode>(LR) &&
1064 Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) {
1065 // (X != 0) | (Y != 0) -> (X|Y != 0)
1066 // (X == 0) & (Y == 0) -> (X|Y == 0)
1067 // (X < 0) | (Y < 0) -> (X|Y < 0)
1068 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1069 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1070 (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1071 (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1072 return getSetCC(Op2, VT,
1073 getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
1075 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1076 // (X == -1) & (Y == -1) -> (X&Y == -1)
1077 // (X != -1) | (Y != -1) -> (X&Y != -1)
1078 // (X > -1) | (Y > -1) -> (X&Y > -1)
1079 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1080 (Opcode == ISD::OR && Op2 == ISD::SETNE) ||
1081 (Opcode == ISD::OR && Op2 == ISD::SETGT))
1082 return getSetCC(Op2, VT,
1083 getNode(ISD::AND, LR.getValueType(), LL, RL), LR);
1084 // (X > -1) & (Y > -1) -> (X|Y > -1)
1085 if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1086 return getSetCC(Op2, VT,
1087 getNode(ISD::OR, LR.getValueType(), LL, RL), LR);
1091 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1092 if (LL == RR && LR == RL) {
1093 Op2 = ISD::getSetCCSwappedOperands(Op2);
1094 goto MatchedBackwards;
1097 if (LL == RL && LR == RR) {
1099 ISD::CondCode Result;
1100 bool isInteger = MVT::isInteger(LL.getValueType());
1101 if (Opcode == ISD::OR)
1102 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2,
1105 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2,
1107 if (Result != ISD::SETCC_INVALID)
1108 return getSetCC(Result, LHS->getValueType(0), LL, LR);
1112 // and/or zext(a), zext(b) -> zext(and/or a, b)
1113 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1114 N2.getOpcode() == ISD::ZERO_EXTEND &&
1115 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1116 return getNode(ISD::ZERO_EXTEND, VT,
1117 getNode(Opcode, N1.getOperand(0).getValueType(),
1118 N1.getOperand(0), N2.getOperand(0)));
1121 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
1124 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B
1125 return getNode(ISD::SUB, VT, N1, N2.getOperand(0));
1126 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A
1127 return getNode(ISD::SUB, VT, N2, N1.getOperand(0));
1128 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1129 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1130 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1131 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1132 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1133 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1136 if (N1.getOpcode() == ISD::ADD) {
1137 if (N1.Val->getOperand(0) == N2)
1138 return N1.Val->getOperand(1); // (A+B)-A == B
1139 if (N1.Val->getOperand(1) == N2)
1140 return N1.Val->getOperand(0); // (A+B)-B == A
1142 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B
1143 return getNode(ISD::ADD, VT, N1, N2.getOperand(0));
1145 // FIXME: figure out how to safely handle things like
1146 // int foo(int x) { return 1 << (x & 255); }
1147 // int bar() { return foo(256); }
1152 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1153 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1)
1154 return getNode(Opcode, VT, N1, N2.getOperand(0));
1155 else if (N2.getOpcode() == ISD::AND)
1156 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1157 // If the and is only masking out bits that cannot effect the shift,
1158 // eliminate the and.
1159 unsigned NumBits = MVT::getSizeInBits(VT);
1160 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1161 return getNode(Opcode, VT, N1, N2.getOperand(0));
1167 SDNode *&N = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1168 if (N) return SDOperand(N, 0);
1169 N = new SDNode(Opcode, N1, N2);
1170 N->setValueTypes(VT);
1172 AllNodes.push_back(N);
1173 return SDOperand(N, 0);
1176 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1177 SDOperand Chain, SDOperand Ptr,
1179 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1180 if (N) return SDOperand(N, 0);
1181 N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1183 // Loads have a token chain.
1184 N->setValueTypes(VT, MVT::Other);
1185 AllNodes.push_back(N);
1186 return SDOperand(N, 0);
1189 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1190 SDOperand N1, SDOperand N2, SDOperand N3) {
1191 assert(Opcode != ISD::STORE && "Store shouldn't use this anymore");
1192 // Perform various simplifications.
1193 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1194 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1195 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1199 if (N1C->getValue())
1200 return N2; // select true, X, Y -> X
1202 return N3; // select false, X, Y -> Y
1204 if (N2 == N3) return N2; // select C, X, X -> X
1206 if (VT == MVT::i1) { // Boolean SELECT
1208 if (N2C->getValue()) // select C, 1, X -> C | X
1209 return getNode(ISD::OR, VT, N1, N3);
1210 else // select C, 0, X -> ~C & X
1211 return getNode(ISD::AND, VT,
1212 getNode(ISD::XOR, N1.getValueType(), N1,
1213 getConstant(1, N1.getValueType())), N3);
1215 if (N3C->getValue()) // select C, X, 1 -> ~C | X
1216 return getNode(ISD::OR, VT,
1217 getNode(ISD::XOR, N1.getValueType(), N1,
1218 getConstant(1, N1.getValueType())), N2);
1219 else // select C, X, 0 -> C & X
1220 return getNode(ISD::AND, VT, N1, N2);
1223 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y
1224 return getNode(ISD::OR, VT, N1, N3);
1225 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y
1226 return getNode(ISD::AND, VT, N1, N2);
1229 // If this is a selectcc, check to see if we can simplify the result.
1230 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) {
1231 if (ConstantFPSDNode *CFP =
1232 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1)))
1233 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0
1234 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
1235 if ((SetCC->getCondition() == ISD::SETGE ||
1236 SetCC->getCondition() == ISD::SETGT) &&
1237 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG &&
1238 N3.getOperand(0) == N2)
1239 return getNode(ISD::FABS, VT, N2);
1241 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
1242 if ((SetCC->getCondition() == ISD::SETLT ||
1243 SetCC->getCondition() == ISD::SETLE) &&
1244 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG &&
1245 N2.getOperand(0) == N3)
1246 return getNode(ISD::FABS, VT, N3);
1248 // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1, A)
1249 if (ConstantSDNode *CN =
1250 dyn_cast<ConstantSDNode>(SetCC->getOperand(1)))
1251 if (CN->getValue() == 0 && N3C && N3C->getValue() == 0)
1252 if (SetCC->getCondition() == ISD::SETLT) {
1253 MVT::ValueType XType = SetCC->getOperand(0).getValueType();
1254 MVT::ValueType AType = N2.getValueType();
1255 if (XType >= AType) {
1256 SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0),
1257 getConstant(MVT::getSizeInBits(XType)-1,
1258 TLI.getShiftAmountTy()));
1260 Shift = getNode(ISD::TRUNCATE, AType, Shift);
1261 return getNode(ISD::AND, AType, Shift, N2);
1268 if (N2C->getValue()) // Unconditional branch
1269 return getNode(ISD::BR, MVT::Other, N1, N3);
1271 return N1; // Never-taken branch
1273 // FIXME: figure out how to safely handle things like
1274 // int foo(int x) { return 1 << (x & 255); }
1275 // int bar() { return foo(256); }
1277 case ISD::SRA_PARTS:
1278 case ISD::SRL_PARTS:
1279 case ISD::SHL_PARTS:
1280 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1281 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1)
1282 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1283 else if (N3.getOpcode() == ISD::AND)
1284 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
1285 // If the and is only masking out bits that cannot effect the shift,
1286 // eliminate the and.
1287 unsigned NumBits = MVT::getSizeInBits(VT)*2;
1288 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1289 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
1295 SDNode *N = new SDNode(Opcode, N1, N2, N3);
1298 N->setValueTypes(VT);
1300 case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain
1301 N->setValueTypes(VT, MVT::Other);
1304 case ISD::SRA_PARTS:
1305 case ISD::SRL_PARTS:
1306 case ISD::SHL_PARTS: {
1307 std::vector<MVT::ValueType> V(N->getNumOperands()-1, VT);
1308 N->setValueTypes(V);
1313 // FIXME: memoize NODES
1314 AllNodes.push_back(N);
1315 return SDOperand(N, 0);
1318 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1319 SDOperand N1, SDOperand N2, SDOperand N3,
1321 assert(Opcode == ISD::STORE && "Only stores should use this");
1323 SDNode *N = new SDNode(Opcode, N1, N2, N3, N4);
1324 N->setValueTypes(VT);
1326 // FIXME: memoize NODES
1327 AllNodes.push_back(N);
1328 return SDOperand(N, 0);
1331 SDOperand SelectionDAG::getSrcValue(const Value* v) {
1332 SDNode *N = new SrcValueSDNode(v);
1333 N->setValueTypes(MVT::Other);
1334 // FIXME: memoize NODES
1335 AllNodes.push_back(N);
1336 return SDOperand(N, 0);
1339 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1340 std::vector<SDOperand> &Children) {
1341 switch (Children.size()) {
1342 case 0: return getNode(Opcode, VT);
1343 case 1: return getNode(Opcode, VT, Children[0]);
1344 case 2: return getNode(Opcode, VT, Children[0], Children[1]);
1345 case 3: return getNode(Opcode, VT, Children[0], Children[1], Children[2]);
1349 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Children[1].Val);
1352 case ISD::BRCONDTWOWAY:
1354 if (N1C->getValue()) // Unconditional branch to true dest.
1355 return getNode(ISD::BR, MVT::Other, Children[0], Children[2]);
1356 else // Unconditional branch to false dest.
1357 return getNode(ISD::BR, MVT::Other, Children[0], Children[3]);
1362 SDNode *N = new SDNode(Opcode, Children);
1363 if (Opcode != ISD::ADD_PARTS && Opcode != ISD::SUB_PARTS) {
1364 N->setValueTypes(VT);
1366 std::vector<MVT::ValueType> V(N->getNumOperands()/2, VT);
1367 N->setValueTypes(V);
1369 AllNodes.push_back(N);
1370 return SDOperand(N, 0);
1373 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1374 MVT::ValueType EVT) {
1377 default: assert(0 && "Bad opcode for this accessor!");
1378 case ISD::FP_ROUND_INREG:
1379 assert(VT == N1.getValueType() && "Not an inreg round!");
1380 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1381 "Cannot FP_ROUND_INREG integer types");
1382 if (EVT == VT) return N1; // Not actually rounding
1383 assert(EVT < VT && "Not rounding down!");
1385 if (isa<ConstantFPSDNode>(N1))
1386 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1));
1388 case ISD::SIGN_EXTEND_INREG:
1389 assert(VT == N1.getValueType() && "Not an inreg extend!");
1390 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1391 "Cannot *_EXTEND_INREG FP types");
1392 if (EVT == VT) return N1; // Not actually extending
1393 assert(EVT < VT && "Not extending!");
1395 // Extending a constant? Just return the extended constant.
1396 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
1397 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1);
1398 return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1401 // If we are sign extending an extension, use the original source.
1402 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG)
1403 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT)
1406 // If we are sign extending a sextload, return just the load.
1407 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG)
1408 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT)
1411 // If we are extending the result of a setcc, and we already know the
1412 // contents of the top bits, eliminate the extension.
1413 if (N1.getOpcode() == ISD::SETCC &&
1414 TLI.getSetCCResultContents() ==
1415 TargetLowering::ZeroOrNegativeOneSetCCResult)
1418 // If we are sign extending the result of an (and X, C) operation, and we
1419 // know the extended bits are zeros already, don't do the extend.
1420 if (N1.getOpcode() == ISD::AND)
1421 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1422 uint64_t Mask = N1C->getValue();
1423 unsigned NumBits = MVT::getSizeInBits(EVT);
1424 if ((Mask & (~0ULL << (NumBits-1))) == 0)
1434 NN.Ops.push_back(N1);
1436 SDNode *&N = MVTSDNodes[NN];
1437 if (N) return SDOperand(N, 0);
1438 N = new MVTSDNode(Opcode, VT, N1, EVT);
1439 AllNodes.push_back(N);
1440 return SDOperand(N, 0);
1443 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1444 SDOperand N2, SDOperand N3, MVT::ValueType EVT) {
1446 default: assert(0 && "Bad opcode for this accessor!");
1450 // If they are asking for an extending load from/to the same thing, return a
1453 return getLoad(VT, N1, N2, N3);
1454 assert(EVT < VT && "Should only be an extending load, not truncating!");
1455 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) &&
1456 "Cannot sign/zero extend a FP load!");
1457 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) &&
1458 "Cannot convert from FP to Int or Int -> FP!");
1466 NN.Ops.push_back(N1);
1467 NN.Ops.push_back(N2);
1468 NN.Ops.push_back(N3);
1470 SDNode *&N = MVTSDNodes[NN];
1471 if (N) return SDOperand(N, 0);
1472 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, N3, EVT);
1473 AllNodes.push_back(N);
1474 return SDOperand(N, 0);
1477 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1,
1478 SDOperand N2, SDOperand N3, SDOperand N4, MVT::ValueType EVT) {
1480 default: assert(0 && "Bad opcode for this accessor!");
1481 case ISD::TRUNCSTORE:
1482 #if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1483 // If this is a truncating store of a constant, convert to the desired type
1484 // and store it instead.
1485 if (isa<Constant>(N1)) {
1486 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1487 if (isa<Constant>(Op))
1490 // Also for ConstantFP?
1492 if (N1.getValueType() == EVT) // Normal store?
1493 return getNode(ISD::STORE, VT, N1, N2, N3, N4);
1494 assert(N2.getValueType() > EVT && "Not a truncation?");
1495 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) &&
1496 "Can't do FP-INT conversion!");
1504 NN.Ops.push_back(N1);
1505 NN.Ops.push_back(N2);
1506 NN.Ops.push_back(N3);
1507 NN.Ops.push_back(N4);
1509 SDNode *&N = MVTSDNodes[NN];
1510 if (N) return SDOperand(N, 0);
1511 N = new MVTSDNode(Opcode, VT, N1, N2, N3, N4, EVT);
1512 AllNodes.push_back(N);
1513 return SDOperand(N, 0);
1517 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
1518 /// indicated value. This method ignores uses of other values defined by this
1520 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
1521 assert(Value < getNumValues() && "Bad value!");
1523 // If there is only one value, this is easy.
1524 if (getNumValues() == 1)
1525 return use_size() == NUses;
1526 if (Uses.size() < NUses) return false;
1528 SDOperand TheValue(this, Value);
1530 std::set<SDNode*> UsersHandled;
1532 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
1535 if (User->getNumOperands() == 1 ||
1536 UsersHandled.insert(User).second) // First time we've seen this?
1537 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
1538 if (User->getOperand(i) == TheValue) {
1540 return false; // too many uses
1545 // Found exactly the right number of uses?
1550 const char *SDNode::getOperationName() const {
1551 switch (getOpcode()) {
1552 default: return "<<Unknown>>";
1553 case ISD::PCMARKER: return "PCMarker";
1554 case ISD::EntryToken: return "EntryToken";
1555 case ISD::TokenFactor: return "TokenFactor";
1556 case ISD::Constant: return "Constant";
1557 case ISD::ConstantFP: return "ConstantFP";
1558 case ISD::GlobalAddress: return "GlobalAddress";
1559 case ISD::FrameIndex: return "FrameIndex";
1560 case ISD::BasicBlock: return "BasicBlock";
1561 case ISD::ExternalSymbol: return "ExternalSymbol";
1562 case ISD::ConstantPool: return "ConstantPoolIndex";
1563 case ISD::CopyToReg: return "CopyToReg";
1564 case ISD::CopyFromReg: return "CopyFromReg";
1565 case ISD::ImplicitDef: return "ImplicitDef";
1566 case ISD::UNDEF: return "undef";
1569 case ISD::FABS: return "fabs";
1570 case ISD::FNEG: return "fneg";
1571 case ISD::FSQRT: return "fsqrt";
1572 case ISD::FSIN: return "fsin";
1573 case ISD::FCOS: return "fcos";
1576 case ISD::ADD: return "add";
1577 case ISD::SUB: return "sub";
1578 case ISD::MUL: return "mul";
1579 case ISD::MULHU: return "mulhu";
1580 case ISD::MULHS: return "mulhs";
1581 case ISD::SDIV: return "sdiv";
1582 case ISD::UDIV: return "udiv";
1583 case ISD::SREM: return "srem";
1584 case ISD::UREM: return "urem";
1585 case ISD::AND: return "and";
1586 case ISD::OR: return "or";
1587 case ISD::XOR: return "xor";
1588 case ISD::SHL: return "shl";
1589 case ISD::SRA: return "sra";
1590 case ISD::SRL: return "srl";
1592 case ISD::SELECT: return "select";
1593 case ISD::ADD_PARTS: return "add_parts";
1594 case ISD::SUB_PARTS: return "sub_parts";
1595 case ISD::SHL_PARTS: return "shl_parts";
1596 case ISD::SRA_PARTS: return "sra_parts";
1597 case ISD::SRL_PARTS: return "srl_parts";
1599 // Conversion operators.
1600 case ISD::SIGN_EXTEND: return "sign_extend";
1601 case ISD::ZERO_EXTEND: return "zero_extend";
1602 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
1603 case ISD::TRUNCATE: return "truncate";
1604 case ISD::FP_ROUND: return "fp_round";
1605 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
1606 case ISD::FP_EXTEND: return "fp_extend";
1608 case ISD::SINT_TO_FP: return "sint_to_fp";
1609 case ISD::UINT_TO_FP: return "uint_to_fp";
1610 case ISD::FP_TO_SINT: return "fp_to_sint";
1611 case ISD::FP_TO_UINT: return "fp_to_uint";
1613 // Control flow instructions
1614 case ISD::BR: return "br";
1615 case ISD::BRCOND: return "brcond";
1616 case ISD::BRCONDTWOWAY: return "brcondtwoway";
1617 case ISD::RET: return "ret";
1618 case ISD::CALL: return "call";
1619 case ISD::ADJCALLSTACKDOWN: return "adjcallstackdown";
1620 case ISD::ADJCALLSTACKUP: return "adjcallstackup";
1623 case ISD::LOAD: return "load";
1624 case ISD::STORE: return "store";
1625 case ISD::EXTLOAD: return "extload";
1626 case ISD::SEXTLOAD: return "sextload";
1627 case ISD::ZEXTLOAD: return "zextload";
1628 case ISD::TRUNCSTORE: return "truncstore";
1630 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
1631 case ISD::EXTRACT_ELEMENT: return "extract_element";
1632 case ISD::BUILD_PAIR: return "build_pair";
1633 case ISD::MEMSET: return "memset";
1634 case ISD::MEMCPY: return "memcpy";
1635 case ISD::MEMMOVE: return "memmove";
1638 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this);
1639 switch (SetCC->getCondition()) {
1640 default: assert(0 && "Unknown setcc condition!");
1641 case ISD::SETOEQ: return "setcc:setoeq";
1642 case ISD::SETOGT: return "setcc:setogt";
1643 case ISD::SETOGE: return "setcc:setoge";
1644 case ISD::SETOLT: return "setcc:setolt";
1645 case ISD::SETOLE: return "setcc:setole";
1646 case ISD::SETONE: return "setcc:setone";
1648 case ISD::SETO: return "setcc:seto";
1649 case ISD::SETUO: return "setcc:setuo";
1650 case ISD::SETUEQ: return "setcc:setue";
1651 case ISD::SETUGT: return "setcc:setugt";
1652 case ISD::SETUGE: return "setcc:setuge";
1653 case ISD::SETULT: return "setcc:setult";
1654 case ISD::SETULE: return "setcc:setule";
1655 case ISD::SETUNE: return "setcc:setune";
1657 case ISD::SETEQ: return "setcc:seteq";
1658 case ISD::SETGT: return "setcc:setgt";
1659 case ISD::SETGE: return "setcc:setge";
1660 case ISD::SETLT: return "setcc:setlt";
1661 case ISD::SETLE: return "setcc:setle";
1662 case ISD::SETNE: return "setcc:setne";
1667 void SDNode::dump() const {
1668 std::cerr << (void*)this << ": ";
1670 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
1671 if (i) std::cerr << ",";
1672 if (getValueType(i) == MVT::Other)
1675 std::cerr << MVT::getValueTypeString(getValueType(i));
1677 std::cerr << " = " << getOperationName();
1680 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1681 if (i) std::cerr << ", ";
1682 std::cerr << (void*)getOperand(i).Val;
1683 if (unsigned RN = getOperand(i).ResNo)
1684 std::cerr << ":" << RN;
1687 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
1688 std::cerr << "<" << CSDN->getValue() << ">";
1689 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
1690 std::cerr << "<" << CSDN->getValue() << ">";
1691 } else if (const GlobalAddressSDNode *GADN =
1692 dyn_cast<GlobalAddressSDNode>(this)) {
1694 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
1695 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
1696 std::cerr << "<" << FIDN->getIndex() << ">";
1697 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
1698 std::cerr << "<" << CP->getIndex() << ">";
1699 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
1701 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
1703 std::cerr << LBB->getName() << " ";
1704 std::cerr << (const void*)BBDN->getBasicBlock() << ">";
1705 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) {
1706 std::cerr << "<reg #" << C2V->getReg() << ">";
1707 } else if (const ExternalSymbolSDNode *ES =
1708 dyn_cast<ExternalSymbolSDNode>(this)) {
1709 std::cerr << "'" << ES->getSymbol() << "'";
1710 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) {
1711 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType());
1715 static void DumpNodes(SDNode *N, unsigned indent) {
1716 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
1717 if (N->getOperand(i).Val->hasOneUse())
1718 DumpNodes(N->getOperand(i).Val, indent+2);
1720 std::cerr << "\n" << std::string(indent+2, ' ')
1721 << (void*)N->getOperand(i).Val << ": <multiple use>";
1724 std::cerr << "\n" << std::string(indent, ' ');
1728 void SelectionDAG::dump() const {
1729 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
1730 std::vector<SDNode*> Nodes(AllNodes);
1731 std::sort(Nodes.begin(), Nodes.end());
1733 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
1734 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
1735 DumpNodes(Nodes[i], 2);
1738 DumpNodes(getRoot().Val, 2);
1740 std::cerr << "\n\n";