1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetSelectionDAGInfo.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetIntrinsicInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/ManagedStatic.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Support/Mutex.h"
47 #include "llvm/ADT/SetVector.h"
48 #include "llvm/ADT/SmallPtrSet.h"
49 #include "llvm/ADT/SmallSet.h"
50 #include "llvm/ADT/SmallVector.h"
51 #include "llvm/ADT/StringExtras.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
76 //===----------------------------------------------------------------------===//
77 // ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85 return getValueAPF().bitwiseIsEqual(V);
88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
90 assert(VT.isFloatingPoint() && "Can only convert between FP types");
92 // PPC long double cannot be converted to any other type.
93 if (VT == MVT::ppcf128 ||
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 // convert modifies in place, so make a copy.
98 APFloat Val2 = APFloat(Val);
100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112 // Look through a bit convert.
113 if (N->getOpcode() == ISD::BITCAST)
114 N = N->getOperand(0).getNode();
116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
118 unsigned i = 0, e = N->getNumOperands();
120 // Skip over all of the undef values.
121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 // Do not accept an all-undef vector.
125 if (i == e) return false;
127 // Do not accept build_vectors that aren't all constants or which have non-~0
129 SDValue NotZero = N->getOperand(i);
130 if (isa<ConstantSDNode>(NotZero)) {
131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
133 } else if (isa<ConstantFPSDNode>(NotZero)) {
134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
135 bitcastToAPInt().isAllOnesValue())
140 // Okay, we have at least one ~0 value, check to see if the rest match or are
142 for (++i; i != e; ++i)
143 if (N->getOperand(i) != NotZero &&
144 N->getOperand(i).getOpcode() != ISD::UNDEF)
150 /// isBuildVectorAllZeros - Return true if the specified node is a
151 /// BUILD_VECTOR where all of the elements are 0 or undef.
152 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
153 // Look through a bit convert.
154 if (N->getOpcode() == ISD::BITCAST)
155 N = N->getOperand(0).getNode();
157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
159 unsigned i = 0, e = N->getNumOperands();
161 // Skip over all of the undef values.
162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
165 // Do not accept an all-undef vector.
166 if (i == e) return false;
168 // Do not accept build_vectors that aren't all constants or which have non-0
170 SDValue Zero = N->getOperand(i);
171 if (isa<ConstantSDNode>(Zero)) {
172 if (!cast<ConstantSDNode>(Zero)->isNullValue())
174 } else if (isa<ConstantFPSDNode>(Zero)) {
175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
180 // Okay, we have at least one 0 value, check to see if the rest match or are
182 for (++i; i != e; ++i)
183 if (N->getOperand(i) != Zero &&
184 N->getOperand(i).getOpcode() != ISD::UNDEF)
189 /// isScalarToVector - Return true if the specified node is a
190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
191 /// element is not an undef.
192 bool ISD::isScalarToVector(const SDNode *N) {
193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
196 if (N->getOpcode() != ISD::BUILD_VECTOR)
198 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
200 unsigned NumElems = N->getNumOperands();
203 for (unsigned i = 1; i < NumElems; ++i) {
204 SDValue V = N->getOperand(i);
205 if (V.getOpcode() != ISD::UNDEF)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: llvm_unreachable("Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX:
436 case ISD::ATOMIC_LOAD:
437 case ISD::ATOMIC_STORE: {
438 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
439 ID.AddInteger(AT->getMemoryVT().getRawBits());
440 ID.AddInteger(AT->getRawSubclassData());
443 case ISD::VECTOR_SHUFFLE: {
444 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
445 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
447 ID.AddInteger(SVN->getMaskElt(i));
450 case ISD::TargetBlockAddress:
451 case ISD::BlockAddress: {
452 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
453 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
456 } // end switch (N->getOpcode())
459 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
461 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
462 AddNodeIDOpcode(ID, N->getOpcode());
463 // Add the return value info.
464 AddNodeIDValueTypes(ID, N->getVTList());
465 // Add the operand info.
466 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
468 // Handle SDNode leafs with special info.
469 AddNodeIDCustom(ID, N);
472 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
473 /// the CSE map that carries volatility, temporalness, indexing mode, and
474 /// extension/truncation information.
476 static inline unsigned
477 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
478 bool isNonTemporal) {
479 assert((ConvType & 3) == ConvType &&
480 "ConvType may not require more than 2 bits!");
481 assert((AM & 7) == AM &&
482 "AM may not require more than 3 bits!");
486 (isNonTemporal << 6);
489 //===----------------------------------------------------------------------===//
490 // SelectionDAG Class
491 //===----------------------------------------------------------------------===//
493 /// doNotCSE - Return true if CSE should not be performed for this node.
494 static bool doNotCSE(SDNode *N) {
495 if (N->getValueType(0) == MVT::Glue)
496 return true; // Never CSE anything that produces a flag.
498 switch (N->getOpcode()) {
500 case ISD::HANDLENODE:
502 return true; // Never CSE these nodes.
505 // Check that remaining values produced are not flags.
506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
507 if (N->getValueType(i) == MVT::Glue)
508 return true; // Never CSE anything that produces a flag.
513 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
515 void SelectionDAG::RemoveDeadNodes() {
516 // Create a dummy node (which is not added to allnodes), that adds a reference
517 // to the root node, preventing it from being deleted.
518 HandleSDNode Dummy(getRoot());
520 SmallVector<SDNode*, 128> DeadNodes;
522 // Add all obviously-dead nodes to the DeadNodes worklist.
523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
525 DeadNodes.push_back(I);
527 RemoveDeadNodes(DeadNodes);
529 // If the root changed (e.g. it was a dead load, update the root).
530 setRoot(Dummy.getValue());
533 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
534 /// given list, and any nodes that become unreachable as a result.
535 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
536 DAGUpdateListener *UpdateListener) {
538 // Process the worklist, deleting the nodes and adding their uses to the
540 while (!DeadNodes.empty()) {
541 SDNode *N = DeadNodes.pop_back_val();
544 UpdateListener->NodeDeleted(N, 0);
546 // Take the node out of the appropriate CSE map.
547 RemoveNodeFromCSEMaps(N);
549 // Next, brutally remove the operand list. This is safe to do, as there are
550 // no cycles in the graph.
551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
553 SDNode *Operand = Use.getNode();
556 // Now that we removed this operand, see if there are no uses of it left.
557 if (Operand->use_empty())
558 DeadNodes.push_back(Operand);
565 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
566 SmallVector<SDNode*, 16> DeadNodes(1, N);
567 RemoveDeadNodes(DeadNodes, UpdateListener);
570 void SelectionDAG::DeleteNode(SDNode *N) {
571 // First take this out of the appropriate CSE map.
572 RemoveNodeFromCSEMaps(N);
574 // Finally, remove uses due to operands of this node, remove from the
575 // AllNodes list, and delete the node.
576 DeleteNodeNotInCSEMaps(N);
579 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
580 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
581 assert(N->use_empty() && "Cannot delete a node that is not dead!");
583 // Drop all of the operands and decrement used node's use counts.
589 void SelectionDAG::DeallocateNode(SDNode *N) {
590 if (N->OperandsNeedDelete)
591 delete[] N->OperandList;
593 // Set the opcode to DELETED_NODE to help catch bugs when node
594 // memory is reallocated.
595 N->NodeType = ISD::DELETED_NODE;
597 NodeAllocator.Deallocate(AllNodes.remove(N));
599 // Remove the ordering of this node.
602 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
603 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
604 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
605 DbgVals[i]->setIsInvalidated();
608 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
609 /// correspond to it. This is useful when we're about to delete or repurpose
610 /// the node. We don't want future request for structurally identical nodes
611 /// to return N anymore.
612 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
614 switch (N->getOpcode()) {
615 case ISD::HANDLENODE: return false; // noop.
617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
618 "Cond code doesn't exist!");
619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
622 case ISD::ExternalSymbol:
623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
625 case ISD::TargetExternalSymbol: {
626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
627 Erased = TargetExternalSymbols.erase(
628 std::pair<std::string,unsigned char>(ESN->getSymbol(),
629 ESN->getTargetFlags()));
632 case ISD::VALUETYPE: {
633 EVT VT = cast<VTSDNode>(N)->getVT();
634 if (VT.isExtended()) {
635 Erased = ExtendedValueTypeNodes.erase(VT);
637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
643 // Remove it from the CSE Map.
644 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
645 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
749 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
750 static void VerifyNodeCommon(SDNode *N) {
751 switch (N->getOpcode()) {
754 case ISD::BUILD_PAIR: {
755 EVT VT = N->getValueType(0);
756 assert(N->getNumValues() == 1 && "Too many results!");
757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
758 "Wrong return type!");
759 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
761 "Mismatched operand types!");
762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
763 "Wrong operand type!");
764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
765 "Wrong return type size");
768 case ISD::BUILD_VECTOR: {
769 assert(N->getNumValues() == 1 && "Too many results!");
770 assert(N->getValueType(0).isVector() && "Wrong return type!");
771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
772 "Wrong number of operands!");
773 EVT EltVT = N->getValueType(0).getVectorElementType();
774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
775 assert((I->getValueType() == EltVT ||
776 (EltVT.isInteger() && I->getValueType().isInteger() &&
777 EltVT.bitsLE(I->getValueType()))) &&
778 "Wrong operand type!");
779 assert(I->getValueType() == N->getOperand(0).getValueType() &&
780 "Operands must all have the same type");
787 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
788 static void VerifySDNode(SDNode *N) {
789 // The SDNode allocators cannot be used to allocate nodes with fields that are
790 // not present in an SDNode!
791 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
792 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
793 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
794 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
795 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
796 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
797 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
798 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
799 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
800 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
801 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
802 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
803 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
804 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
805 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
806 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
807 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
808 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
809 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
814 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
816 static void VerifyMachineNode(SDNode *N) {
817 // The MachineNode allocators cannot be used to allocate nodes with fields
818 // that are not present in a MachineNode!
819 // Currently there are no such nodes.
825 /// getEVTAlignment - Compute the default alignment value for the
828 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
829 Type *Ty = VT == MVT::iPTR ?
830 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
831 VT.getTypeForEVT(*getContext());
833 return TLI.getTargetData()->getABITypeAlignment(Ty);
836 // EntryNode could meaningfully have debug info if we can find it...
837 SelectionDAG::SelectionDAG(const TargetMachine &tm)
838 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
839 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
840 Root(getEntryNode()), Ordering(0) {
841 AllNodes.push_back(&EntryNode);
842 Ordering = new SDNodeOrdering();
843 DbgInfo = new SDDbgInfo();
846 void SelectionDAG::init(MachineFunction &mf) {
848 Context = &mf.getFunction()->getContext();
851 SelectionDAG::~SelectionDAG() {
857 void SelectionDAG::allnodes_clear() {
858 assert(&*AllNodes.begin() == &EntryNode);
859 AllNodes.remove(AllNodes.begin());
860 while (!AllNodes.empty())
861 DeallocateNode(AllNodes.begin());
864 void SelectionDAG::clear() {
866 OperandAllocator.Reset();
869 ExtendedValueTypeNodes.clear();
870 ExternalSymbols.clear();
871 TargetExternalSymbols.clear();
872 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
873 static_cast<CondCodeSDNode*>(0));
874 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
875 static_cast<SDNode*>(0));
877 EntryNode.UseList = 0;
878 AllNodes.push_back(&EntryNode);
879 Root = getEntryNode();
884 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
885 return VT.bitsGT(Op.getValueType()) ?
886 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
887 getNode(ISD::TRUNCATE, DL, VT, Op);
890 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
891 return VT.bitsGT(Op.getValueType()) ?
892 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
893 getNode(ISD::TRUNCATE, DL, VT, Op);
896 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
897 return VT.bitsGT(Op.getValueType()) ?
898 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
899 getNode(ISD::TRUNCATE, DL, VT, Op);
902 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
903 assert(!VT.isVector() &&
904 "getZeroExtendInReg should use the vector element type instead of "
906 if (Op.getValueType() == VT) return Op;
907 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
908 APInt Imm = APInt::getLowBitsSet(BitWidth,
910 return getNode(ISD::AND, DL, Op.getValueType(), Op,
911 getConstant(Imm, Op.getValueType()));
914 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
916 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
917 EVT EltVT = VT.getScalarType();
919 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
920 return getNode(ISD::XOR, DL, VT, Val, NegOne);
923 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
924 EVT EltVT = VT.getScalarType();
925 assert((EltVT.getSizeInBits() >= 64 ||
926 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
927 "getConstant with a uint64_t value that doesn't fit in the type!");
928 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
931 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
932 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
935 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
936 assert(VT.isInteger() && "Cannot create FP integer constant!");
938 EVT EltVT = VT.getScalarType();
939 const ConstantInt *Elt = &Val;
941 // In some cases the vector type is legal but the element type is illegal and
942 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
943 // inserted value (the type does not need to match the vector element type).
944 // Any extra bits introduced will be truncated away.
945 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
946 TargetLowering::TypePromoteInteger) {
947 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
948 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
949 Elt = ConstantInt::get(*getContext(), NewVal);
952 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
953 "APInt size does not match type size!");
954 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
956 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
960 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
962 return SDValue(N, 0);
965 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
966 CSEMap.InsertNode(N, IP);
967 AllNodes.push_back(N);
970 SDValue Result(N, 0);
972 SmallVector<SDValue, 8> Ops;
973 Ops.assign(VT.getVectorNumElements(), Result);
974 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
979 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
980 return getConstant(Val, TLI.getPointerTy(), isTarget);
984 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
985 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
988 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
989 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
991 EVT EltVT = VT.getScalarType();
993 // Do the map lookup using the actual bit pattern for the floating point
994 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
995 // we don't have issues with SNANs.
996 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
998 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1002 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1004 return SDValue(N, 0);
1007 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1008 CSEMap.InsertNode(N, IP);
1009 AllNodes.push_back(N);
1012 SDValue Result(N, 0);
1013 if (VT.isVector()) {
1014 SmallVector<SDValue, 8> Ops;
1015 Ops.assign(VT.getVectorNumElements(), Result);
1016 // FIXME DebugLoc info might be appropriate here
1017 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1022 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1023 EVT EltVT = VT.getScalarType();
1024 if (EltVT==MVT::f32)
1025 return getConstantFP(APFloat((float)Val), VT, isTarget);
1026 else if (EltVT==MVT::f64)
1027 return getConstantFP(APFloat(Val), VT, isTarget);
1028 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1030 APFloat apf = APFloat(Val);
1031 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1033 return getConstantFP(apf, VT, isTarget);
1035 assert(0 && "Unsupported type in getConstantFP");
1040 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1041 EVT VT, int64_t Offset,
1043 unsigned char TargetFlags) {
1044 assert((TargetFlags == 0 || isTargetGA) &&
1045 "Cannot set target flags on target-independent globals");
1047 // Truncate (with sign-extension) the offset value to the pointer size.
1048 EVT PTy = TLI.getPointerTy();
1049 unsigned BitWidth = PTy.getSizeInBits();
1051 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1053 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1055 // If GV is an alias then use the aliasee for determining thread-localness.
1056 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1057 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1061 if (GVar && GVar->isThreadLocal())
1062 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1064 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1066 FoldingSetNodeID ID;
1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1069 ID.AddInteger(Offset);
1070 ID.AddInteger(TargetFlags);
1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1073 return SDValue(E, 0);
1075 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1076 Offset, TargetFlags);
1077 CSEMap.InsertNode(N, IP);
1078 AllNodes.push_back(N);
1079 return SDValue(N, 0);
1082 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1083 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1084 FoldingSetNodeID ID;
1085 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1088 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1089 return SDValue(E, 0);
1091 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1092 CSEMap.InsertNode(N, IP);
1093 AllNodes.push_back(N);
1094 return SDValue(N, 0);
1097 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1098 unsigned char TargetFlags) {
1099 assert((TargetFlags == 0 || isTarget) &&
1100 "Cannot set target flags on target-independent jump tables");
1101 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1102 FoldingSetNodeID ID;
1103 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1105 ID.AddInteger(TargetFlags);
1107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1108 return SDValue(E, 0);
1110 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1112 CSEMap.InsertNode(N, IP);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1118 unsigned Alignment, int Offset,
1120 unsigned char TargetFlags) {
1121 assert((TargetFlags == 0 || isTarget) &&
1122 "Cannot set target flags on target-independent globals");
1124 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1125 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1126 FoldingSetNodeID ID;
1127 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1128 ID.AddInteger(Alignment);
1129 ID.AddInteger(Offset);
1131 ID.AddInteger(TargetFlags);
1133 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1134 return SDValue(E, 0);
1136 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1137 Alignment, TargetFlags);
1138 CSEMap.InsertNode(N, IP);
1139 AllNodes.push_back(N);
1140 return SDValue(N, 0);
1144 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1145 unsigned Alignment, int Offset,
1147 unsigned char TargetFlags) {
1148 assert((TargetFlags == 0 || isTarget) &&
1149 "Cannot set target flags on target-independent globals");
1151 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1152 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1153 FoldingSetNodeID ID;
1154 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1155 ID.AddInteger(Alignment);
1156 ID.AddInteger(Offset);
1157 C->addSelectionDAGCSEId(ID);
1158 ID.AddInteger(TargetFlags);
1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1161 return SDValue(E, 0);
1163 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1164 Alignment, TargetFlags);
1165 CSEMap.InsertNode(N, IP);
1166 AllNodes.push_back(N);
1167 return SDValue(N, 0);
1170 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1171 FoldingSetNodeID ID;
1172 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1176 return SDValue(E, 0);
1178 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1179 CSEMap.InsertNode(N, IP);
1180 AllNodes.push_back(N);
1181 return SDValue(N, 0);
1184 SDValue SelectionDAG::getValueType(EVT VT) {
1185 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1186 ValueTypeNodes.size())
1187 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1189 SDNode *&N = VT.isExtended() ?
1190 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1192 if (N) return SDValue(N, 0);
1193 N = new (NodeAllocator) VTSDNode(VT);
1194 AllNodes.push_back(N);
1195 return SDValue(N, 0);
1198 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1199 SDNode *&N = ExternalSymbols[Sym];
1200 if (N) return SDValue(N, 0);
1201 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1202 AllNodes.push_back(N);
1203 return SDValue(N, 0);
1206 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1207 unsigned char TargetFlags) {
1209 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1211 if (N) return SDValue(N, 0);
1212 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1213 AllNodes.push_back(N);
1214 return SDValue(N, 0);
1217 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1218 if ((unsigned)Cond >= CondCodeNodes.size())
1219 CondCodeNodes.resize(Cond+1);
1221 if (CondCodeNodes[Cond] == 0) {
1222 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1223 CondCodeNodes[Cond] = N;
1224 AllNodes.push_back(N);
1227 return SDValue(CondCodeNodes[Cond], 0);
1230 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1231 // the shuffle mask M that point at N1 to point at N2, and indices that point
1232 // N2 to point at N1.
1233 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1235 int NElts = M.size();
1236 for (int i = 0; i != NElts; ++i) {
1244 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1245 SDValue N2, const int *Mask) {
1246 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1247 assert(VT.isVector() && N1.getValueType().isVector() &&
1248 "Vector Shuffle VTs must be a vectors");
1249 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1250 && "Vector Shuffle VTs must have same element type");
1252 // Canonicalize shuffle undef, undef -> undef
1253 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1254 return getUNDEF(VT);
1256 // Validate that all indices in Mask are within the range of the elements
1257 // input to the shuffle.
1258 unsigned NElts = VT.getVectorNumElements();
1259 SmallVector<int, 8> MaskVec;
1260 for (unsigned i = 0; i != NElts; ++i) {
1261 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1262 MaskVec.push_back(Mask[i]);
1265 // Canonicalize shuffle v, v -> v, undef
1268 for (unsigned i = 0; i != NElts; ++i)
1269 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1272 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1273 if (N1.getOpcode() == ISD::UNDEF)
1274 commuteShuffle(N1, N2, MaskVec);
1276 // Canonicalize all index into lhs, -> shuffle lhs, undef
1277 // Canonicalize all index into rhs, -> shuffle rhs, undef
1278 bool AllLHS = true, AllRHS = true;
1279 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1280 for (unsigned i = 0; i != NElts; ++i) {
1281 if (MaskVec[i] >= (int)NElts) {
1286 } else if (MaskVec[i] >= 0) {
1290 if (AllLHS && AllRHS)
1291 return getUNDEF(VT);
1292 if (AllLHS && !N2Undef)
1296 commuteShuffle(N1, N2, MaskVec);
1299 // If Identity shuffle, or all shuffle in to undef, return that node.
1300 bool AllUndef = true;
1301 bool Identity = true;
1302 for (unsigned i = 0; i != NElts; ++i) {
1303 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1304 if (MaskVec[i] >= 0) AllUndef = false;
1306 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1309 return getUNDEF(VT);
1311 FoldingSetNodeID ID;
1312 SDValue Ops[2] = { N1, N2 };
1313 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1314 for (unsigned i = 0; i != NElts; ++i)
1315 ID.AddInteger(MaskVec[i]);
1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1319 return SDValue(E, 0);
1321 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1322 // SDNode doesn't have access to it. This memory will be "leaked" when
1323 // the node is deallocated, but recovered when the NodeAllocator is released.
1324 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1325 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1327 ShuffleVectorSDNode *N =
1328 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1329 CSEMap.InsertNode(N, IP);
1330 AllNodes.push_back(N);
1331 return SDValue(N, 0);
1334 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1335 SDValue Val, SDValue DTy,
1336 SDValue STy, SDValue Rnd, SDValue Sat,
1337 ISD::CvtCode Code) {
1338 // If the src and dest types are the same and the conversion is between
1339 // integer types of the same sign or two floats, no conversion is necessary.
1341 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1344 FoldingSetNodeID ID;
1345 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1346 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1349 return SDValue(E, 0);
1351 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1353 CSEMap.InsertNode(N, IP);
1354 AllNodes.push_back(N);
1355 return SDValue(N, 0);
1358 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1359 FoldingSetNodeID ID;
1360 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1361 ID.AddInteger(RegNo);
1363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1364 return SDValue(E, 0);
1366 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1367 CSEMap.InsertNode(N, IP);
1368 AllNodes.push_back(N);
1369 return SDValue(N, 0);
1372 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1373 FoldingSetNodeID ID;
1374 SDValue Ops[] = { Root };
1375 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1376 ID.AddPointer(Label);
1378 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1379 return SDValue(E, 0);
1381 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1382 CSEMap.InsertNode(N, IP);
1383 AllNodes.push_back(N);
1384 return SDValue(N, 0);
1388 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1390 unsigned char TargetFlags) {
1391 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1393 FoldingSetNodeID ID;
1394 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1396 ID.AddInteger(TargetFlags);
1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1399 return SDValue(E, 0);
1401 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1402 CSEMap.InsertNode(N, IP);
1403 AllNodes.push_back(N);
1404 return SDValue(N, 0);
1407 SDValue SelectionDAG::getSrcValue(const Value *V) {
1408 assert((!V || V->getType()->isPointerTy()) &&
1409 "SrcValue is not a pointer?");
1411 FoldingSetNodeID ID;
1412 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1416 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1417 return SDValue(E, 0);
1419 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1420 CSEMap.InsertNode(N, IP);
1421 AllNodes.push_back(N);
1422 return SDValue(N, 0);
1425 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1426 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1427 FoldingSetNodeID ID;
1428 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1432 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1433 return SDValue(E, 0);
1435 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1436 CSEMap.InsertNode(N, IP);
1437 AllNodes.push_back(N);
1438 return SDValue(N, 0);
1442 /// getShiftAmountOperand - Return the specified value casted to
1443 /// the target's desired shift amount type.
1444 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1445 EVT OpTy = Op.getValueType();
1446 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1447 if (OpTy == ShTy || OpTy.isVector()) return Op;
1449 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1450 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1453 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1454 /// specified value type.
1455 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1456 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1457 unsigned ByteSize = VT.getStoreSize();
1458 Type *Ty = VT.getTypeForEVT(*getContext());
1459 unsigned StackAlign =
1460 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1462 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1463 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1466 /// CreateStackTemporary - Create a stack temporary suitable for holding
1467 /// either of the specified value types.
1468 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1469 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1470 VT2.getStoreSizeInBits())/8;
1471 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1472 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1473 const TargetData *TD = TLI.getTargetData();
1474 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1475 TD->getPrefTypeAlignment(Ty2));
1477 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1478 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1479 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1482 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1483 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1484 // These setcc operations always fold.
1488 case ISD::SETFALSE2: return getConstant(0, VT);
1490 case ISD::SETTRUE2: return getConstant(1, VT);
1502 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1506 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1507 const APInt &C2 = N2C->getAPIntValue();
1508 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1509 const APInt &C1 = N1C->getAPIntValue();
1512 default: llvm_unreachable("Unknown integer setcc!");
1513 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1514 case ISD::SETNE: return getConstant(C1 != C2, VT);
1515 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1516 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1517 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1518 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1519 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1520 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1521 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1522 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1526 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1527 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1528 // No compile time operations on this type yet.
1529 if (N1C->getValueType(0) == MVT::ppcf128)
1532 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1535 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1536 return getUNDEF(VT);
1538 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1539 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1540 return getUNDEF(VT);
1542 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1543 R==APFloat::cmpLessThan, VT);
1544 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1545 return getUNDEF(VT);
1547 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1548 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1549 return getUNDEF(VT);
1551 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1552 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1553 return getUNDEF(VT);
1555 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1556 R==APFloat::cmpEqual, VT);
1557 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1558 return getUNDEF(VT);
1560 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1561 R==APFloat::cmpEqual, VT);
1562 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1563 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1564 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1565 R==APFloat::cmpEqual, VT);
1566 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1567 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1568 R==APFloat::cmpLessThan, VT);
1569 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1570 R==APFloat::cmpUnordered, VT);
1571 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1572 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1575 // Ensure that the constant occurs on the RHS.
1576 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1580 // Could not fold it.
1584 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1585 /// use this predicate to simplify operations downstream.
1586 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1587 // This predicate is not safe for vector operations.
1588 if (Op.getValueType().isVector())
1591 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1592 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1595 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1596 /// this predicate to simplify operations downstream. Mask is known to be zero
1597 /// for bits that V cannot have.
1598 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1599 unsigned Depth) const {
1600 APInt KnownZero, KnownOne;
1601 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1602 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1603 return (KnownZero & Mask) == Mask;
1606 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1607 /// known to be either zero or one and return them in the KnownZero/KnownOne
1608 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1610 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1611 APInt &KnownZero, APInt &KnownOne,
1612 unsigned Depth) const {
1613 unsigned BitWidth = Mask.getBitWidth();
1614 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1615 "Mask size mismatches value type size!");
1617 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1618 if (Depth == 6 || Mask == 0)
1619 return; // Limit search depth.
1621 APInt KnownZero2, KnownOne2;
1623 switch (Op.getOpcode()) {
1625 // We know all of the bits for a constant!
1626 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1627 KnownZero = ~KnownOne & Mask;
1630 // If either the LHS or the RHS are Zero, the result is zero.
1631 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1632 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1633 KnownZero2, KnownOne2, Depth+1);
1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1637 // Output known-1 bits are only known if set in both the LHS & RHS.
1638 KnownOne &= KnownOne2;
1639 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1640 KnownZero |= KnownZero2;
1643 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1644 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1645 KnownZero2, KnownOne2, Depth+1);
1646 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1647 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1649 // Output known-0 bits are only known if clear in both the LHS & RHS.
1650 KnownZero &= KnownZero2;
1651 // Output known-1 are known to be set if set in either the LHS | RHS.
1652 KnownOne |= KnownOne2;
1655 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1656 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1657 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1658 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1660 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1661 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1662 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1663 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1664 KnownZero = KnownZeroOut;
1668 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1669 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1670 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1671 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1672 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1674 // If low bits are zero in either operand, output low known-0 bits.
1675 // Also compute a conserative estimate for high known-0 bits.
1676 // More trickiness is possible, but this is sufficient for the
1677 // interesting case of alignment computation.
1678 KnownOne.clearAllBits();
1679 unsigned TrailZ = KnownZero.countTrailingOnes() +
1680 KnownZero2.countTrailingOnes();
1681 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1682 KnownZero2.countLeadingOnes(),
1683 BitWidth) - BitWidth;
1685 TrailZ = std::min(TrailZ, BitWidth);
1686 LeadZ = std::min(LeadZ, BitWidth);
1687 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1688 APInt::getHighBitsSet(BitWidth, LeadZ);
1693 // For the purposes of computing leading zeros we can conservatively
1694 // treat a udiv as a logical right shift by the power of 2 known to
1695 // be less than the denominator.
1696 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1697 ComputeMaskedBits(Op.getOperand(0),
1698 AllOnes, KnownZero2, KnownOne2, Depth+1);
1699 unsigned LeadZ = KnownZero2.countLeadingOnes();
1701 KnownOne2.clearAllBits();
1702 KnownZero2.clearAllBits();
1703 ComputeMaskedBits(Op.getOperand(1),
1704 AllOnes, KnownZero2, KnownOne2, Depth+1);
1705 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1706 if (RHSUnknownLeadingOnes != BitWidth)
1707 LeadZ = std::min(BitWidth,
1708 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1710 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1714 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1715 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1716 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1717 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1719 // Only known if known in both the LHS and RHS.
1720 KnownOne &= KnownOne2;
1721 KnownZero &= KnownZero2;
1723 case ISD::SELECT_CC:
1724 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1725 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1726 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1727 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1729 // Only known if known in both the LHS and RHS.
1730 KnownOne &= KnownOne2;
1731 KnownZero &= KnownZero2;
1739 if (Op.getResNo() != 1)
1741 // The boolean result conforms to getBooleanContents. Fall through.
1743 // If we know the result of a setcc has the top bits zero, use this info.
1744 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1745 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1746 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1749 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1750 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1751 unsigned ShAmt = SA->getZExtValue();
1753 // If the shift count is an invalid immediate, don't do anything.
1754 if (ShAmt >= BitWidth)
1757 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1758 KnownZero, KnownOne, Depth+1);
1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1760 KnownZero <<= ShAmt;
1762 // low bits known zero.
1763 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1767 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1768 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1769 unsigned ShAmt = SA->getZExtValue();
1771 // If the shift count is an invalid immediate, don't do anything.
1772 if (ShAmt >= BitWidth)
1775 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1776 KnownZero, KnownOne, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 KnownZero = KnownZero.lshr(ShAmt);
1779 KnownOne = KnownOne.lshr(ShAmt);
1781 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1782 KnownZero |= HighBits; // High bits known zero.
1786 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1787 unsigned ShAmt = SA->getZExtValue();
1789 // If the shift count is an invalid immediate, don't do anything.
1790 if (ShAmt >= BitWidth)
1793 APInt InDemandedMask = (Mask << ShAmt);
1794 // If any of the demanded bits are produced by the sign extension, we also
1795 // demand the input sign bit.
1796 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1797 if (HighBits.getBoolValue())
1798 InDemandedMask |= APInt::getSignBit(BitWidth);
1800 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1802 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1803 KnownZero = KnownZero.lshr(ShAmt);
1804 KnownOne = KnownOne.lshr(ShAmt);
1806 // Handle the sign bits.
1807 APInt SignBit = APInt::getSignBit(BitWidth);
1808 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1810 if (KnownZero.intersects(SignBit)) {
1811 KnownZero |= HighBits; // New bits are known zero.
1812 } else if (KnownOne.intersects(SignBit)) {
1813 KnownOne |= HighBits; // New bits are known one.
1817 case ISD::SIGN_EXTEND_INREG: {
1818 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1819 unsigned EBits = EVT.getScalarType().getSizeInBits();
1821 // Sign extension. Compute the demanded bits in the result that are not
1822 // present in the input.
1823 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1825 APInt InSignBit = APInt::getSignBit(EBits);
1826 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1828 // If the sign extended bits are demanded, we know that the sign
1830 InSignBit = InSignBit.zext(BitWidth);
1831 if (NewBits.getBoolValue())
1832 InputDemandedBits |= InSignBit;
1834 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1835 KnownZero, KnownOne, Depth+1);
1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1838 // If the sign bit of the input is known set or clear, then we know the
1839 // top bits of the result.
1840 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1841 KnownZero |= NewBits;
1842 KnownOne &= ~NewBits;
1843 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1844 KnownOne |= NewBits;
1845 KnownZero &= ~NewBits;
1846 } else { // Input sign bit unknown
1847 KnownZero &= ~NewBits;
1848 KnownOne &= ~NewBits;
1855 unsigned LowBits = Log2_32(BitWidth)+1;
1856 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1857 KnownOne.clearAllBits();
1861 if (ISD::isZEXTLoad(Op.getNode())) {
1862 LoadSDNode *LD = cast<LoadSDNode>(Op);
1863 EVT VT = LD->getMemoryVT();
1864 unsigned MemBits = VT.getScalarType().getSizeInBits();
1865 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1869 case ISD::ZERO_EXTEND: {
1870 EVT InVT = Op.getOperand(0).getValueType();
1871 unsigned InBits = InVT.getScalarType().getSizeInBits();
1872 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1873 APInt InMask = Mask.trunc(InBits);
1874 KnownZero = KnownZero.trunc(InBits);
1875 KnownOne = KnownOne.trunc(InBits);
1876 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1877 KnownZero = KnownZero.zext(BitWidth);
1878 KnownOne = KnownOne.zext(BitWidth);
1879 KnownZero |= NewBits;
1882 case ISD::SIGN_EXTEND: {
1883 EVT InVT = Op.getOperand(0).getValueType();
1884 unsigned InBits = InVT.getScalarType().getSizeInBits();
1885 APInt InSignBit = APInt::getSignBit(InBits);
1886 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1887 APInt InMask = Mask.trunc(InBits);
1889 // If any of the sign extended bits are demanded, we know that the sign
1890 // bit is demanded. Temporarily set this bit in the mask for our callee.
1891 if (NewBits.getBoolValue())
1892 InMask |= InSignBit;
1894 KnownZero = KnownZero.trunc(InBits);
1895 KnownOne = KnownOne.trunc(InBits);
1896 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1898 // Note if the sign bit is known to be zero or one.
1899 bool SignBitKnownZero = KnownZero.isNegative();
1900 bool SignBitKnownOne = KnownOne.isNegative();
1901 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1902 "Sign bit can't be known to be both zero and one!");
1904 // If the sign bit wasn't actually demanded by our caller, we don't
1905 // want it set in the KnownZero and KnownOne result values. Reset the
1906 // mask and reapply it to the result values.
1907 InMask = Mask.trunc(InBits);
1908 KnownZero &= InMask;
1911 KnownZero = KnownZero.zext(BitWidth);
1912 KnownOne = KnownOne.zext(BitWidth);
1914 // If the sign bit is known zero or one, the top bits match.
1915 if (SignBitKnownZero)
1916 KnownZero |= NewBits;
1917 else if (SignBitKnownOne)
1918 KnownOne |= NewBits;
1921 case ISD::ANY_EXTEND: {
1922 EVT InVT = Op.getOperand(0).getValueType();
1923 unsigned InBits = InVT.getScalarType().getSizeInBits();
1924 APInt InMask = Mask.trunc(InBits);
1925 KnownZero = KnownZero.trunc(InBits);
1926 KnownOne = KnownOne.trunc(InBits);
1927 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1928 KnownZero = KnownZero.zext(BitWidth);
1929 KnownOne = KnownOne.zext(BitWidth);
1932 case ISD::TRUNCATE: {
1933 EVT InVT = Op.getOperand(0).getValueType();
1934 unsigned InBits = InVT.getScalarType().getSizeInBits();
1935 APInt InMask = Mask.zext(InBits);
1936 KnownZero = KnownZero.zext(InBits);
1937 KnownOne = KnownOne.zext(InBits);
1938 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1939 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1940 KnownZero = KnownZero.trunc(BitWidth);
1941 KnownOne = KnownOne.trunc(BitWidth);
1944 case ISD::AssertZext: {
1945 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1946 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1947 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1949 KnownZero |= (~InMask) & Mask;
1953 // All bits are zero except the low bit.
1954 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1958 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1959 // We know that the top bits of C-X are clear if X contains less bits
1960 // than C (i.e. no wrap-around can happen). For example, 20-X is
1961 // positive if we can prove that X is >= 0 and < 16.
1962 if (CLHS->getAPIntValue().isNonNegative()) {
1963 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1964 // NLZ can't be BitWidth with no sign bit
1965 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1966 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1969 // If all of the MaskV bits are known to be zero, then we know the
1970 // output top bits are zero, because we now know that the output is
1972 if ((KnownZero2 & MaskV) == MaskV) {
1973 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1974 // Top bits known zero.
1975 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1983 // Output known-0 bits are known if clear or set in both the low clear bits
1984 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1985 // low 3 bits clear.
1986 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1987 BitWidth - Mask.countLeadingZeros());
1988 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1989 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1990 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1992 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1993 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1994 KnownZeroOut = std::min(KnownZeroOut,
1995 KnownZero2.countTrailingOnes());
1997 if (Op.getOpcode() == ISD::ADD) {
1998 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2002 // With ADDE, a carry bit may be added in, so we can only use this
2003 // information if we know (at least) that the low two bits are clear. We
2004 // then return to the caller that the low bit is unknown but that other bits
2006 if (KnownZeroOut >= 2) // ADDE
2007 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2011 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2012 const APInt &RA = Rem->getAPIntValue().abs();
2013 if (RA.isPowerOf2()) {
2014 APInt LowBits = RA - 1;
2015 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2016 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
2018 // The low bits of the first operand are unchanged by the srem.
2019 KnownZero = KnownZero2 & LowBits;
2020 KnownOne = KnownOne2 & LowBits;
2022 // If the first operand is non-negative or has all low bits zero, then
2023 // the upper bits are all zero.
2024 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2025 KnownZero |= ~LowBits;
2027 // If the first operand is negative and not all low bits are zero, then
2028 // the upper bits are all one.
2029 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2030 KnownOne |= ~LowBits;
2035 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2040 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2041 const APInt &RA = Rem->getAPIntValue();
2042 if (RA.isPowerOf2()) {
2043 APInt LowBits = (RA - 1);
2044 APInt Mask2 = LowBits & Mask;
2045 KnownZero |= ~LowBits & Mask;
2046 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2047 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2052 // Since the result is less than or equal to either operand, any leading
2053 // zero bits in either operand must also exist in the result.
2054 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2055 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2057 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2060 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2061 KnownZero2.countLeadingOnes());
2062 KnownOne.clearAllBits();
2063 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2066 case ISD::FrameIndex:
2067 case ISD::TargetFrameIndex:
2068 if (unsigned Align = InferPtrAlignment(Op)) {
2069 // The low bits are known zero if the pointer is aligned.
2070 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2076 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2079 case ISD::INTRINSIC_WO_CHAIN:
2080 case ISD::INTRINSIC_W_CHAIN:
2081 case ISD::INTRINSIC_VOID:
2082 // Allow the target to implement this method for its nodes.
2083 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2089 /// ComputeNumSignBits - Return the number of times the sign bit of the
2090 /// register is replicated into the other bits. We know that at least 1 bit
2091 /// is always equal to the sign bit (itself), but other cases can give us
2092 /// information. For example, immediately after an "SRA X, 2", we know that
2093 /// the top 3 bits are all equal to each other, so we return 3.
2094 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2095 EVT VT = Op.getValueType();
2096 assert(VT.isInteger() && "Invalid VT!");
2097 unsigned VTBits = VT.getScalarType().getSizeInBits();
2099 unsigned FirstAnswer = 1;
2102 return 1; // Limit search depth.
2104 switch (Op.getOpcode()) {
2106 case ISD::AssertSext:
2107 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2108 return VTBits-Tmp+1;
2109 case ISD::AssertZext:
2110 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2113 case ISD::Constant: {
2114 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2115 return Val.getNumSignBits();
2118 case ISD::SIGN_EXTEND:
2119 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2120 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2122 case ISD::SIGN_EXTEND_INREG:
2123 // Max of the input and what this extends.
2125 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2128 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2129 return std::max(Tmp, Tmp2);
2132 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2133 // SRA X, C -> adds C sign bits.
2134 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2135 Tmp += C->getZExtValue();
2136 if (Tmp > VTBits) Tmp = VTBits;
2140 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2141 // shl destroys sign bits.
2142 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2143 if (C->getZExtValue() >= VTBits || // Bad shift.
2144 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2145 return Tmp - C->getZExtValue();
2150 case ISD::XOR: // NOT is handled here.
2151 // Logical binary ops preserve the number of sign bits at the worst.
2152 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2154 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2155 FirstAnswer = std::min(Tmp, Tmp2);
2156 // We computed what we know about the sign bits as our first
2157 // answer. Now proceed to the generic code that uses
2158 // ComputeMaskedBits, and pick whichever answer is better.
2163 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2164 if (Tmp == 1) return 1; // Early out.
2165 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2166 return std::min(Tmp, Tmp2);
2174 if (Op.getResNo() != 1)
2176 // The boolean result conforms to getBooleanContents. Fall through.
2178 // If setcc returns 0/-1, all bits are sign bits.
2179 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2180 TargetLowering::ZeroOrNegativeOneBooleanContent)
2185 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2186 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2188 // Handle rotate right by N like a rotate left by 32-N.
2189 if (Op.getOpcode() == ISD::ROTR)
2190 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2192 // If we aren't rotating out all of the known-in sign bits, return the
2193 // number that are left. This handles rotl(sext(x), 1) for example.
2194 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2195 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2199 // Add can have at most one carry bit. Thus we know that the output
2200 // is, at worst, one more bit than the inputs.
2201 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2202 if (Tmp == 1) return 1; // Early out.
2204 // Special case decrementing a value (ADD X, -1):
2205 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2206 if (CRHS->isAllOnesValue()) {
2207 APInt KnownZero, KnownOne;
2208 APInt Mask = APInt::getAllOnesValue(VTBits);
2209 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2211 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2213 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2216 // If we are subtracting one from a positive number, there is no carry
2217 // out of the result.
2218 if (KnownZero.isNegative())
2222 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2223 if (Tmp2 == 1) return 1;
2224 return std::min(Tmp, Tmp2)-1;
2228 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2229 if (Tmp2 == 1) return 1;
2232 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2233 if (CLHS->isNullValue()) {
2234 APInt KnownZero, KnownOne;
2235 APInt Mask = APInt::getAllOnesValue(VTBits);
2236 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2237 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2239 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2242 // If the input is known to be positive (the sign bit is known clear),
2243 // the output of the NEG has the same number of sign bits as the input.
2244 if (KnownZero.isNegative())
2247 // Otherwise, we treat this like a SUB.
2250 // Sub can have at most one carry bit. Thus we know that the output
2251 // is, at worst, one more bit than the inputs.
2252 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2253 if (Tmp == 1) return 1; // Early out.
2254 return std::min(Tmp, Tmp2)-1;
2257 // FIXME: it's tricky to do anything useful for this, but it is an important
2258 // case for targets like X86.
2262 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2263 if (Op.getOpcode() == ISD::LOAD) {
2264 LoadSDNode *LD = cast<LoadSDNode>(Op);
2265 unsigned ExtType = LD->getExtensionType();
2268 case ISD::SEXTLOAD: // '17' bits known
2269 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2270 return VTBits-Tmp+1;
2271 case ISD::ZEXTLOAD: // '16' bits known
2272 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2277 // Allow the target to implement this method for its nodes.
2278 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2279 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2280 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2281 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2282 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2283 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2286 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2287 // use this information.
2288 APInt KnownZero, KnownOne;
2289 APInt Mask = APInt::getAllOnesValue(VTBits);
2290 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2292 if (KnownZero.isNegative()) { // sign bit is 0
2294 } else if (KnownOne.isNegative()) { // sign bit is 1;
2301 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2302 // the number of identical bits in the top of the input value.
2304 Mask <<= Mask.getBitWidth()-VTBits;
2305 // Return # leading zeros. We use 'min' here in case Val was zero before
2306 // shifting. We don't want to return '64' as for an i32 "0".
2307 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2310 /// isBaseWithConstantOffset - Return true if the specified operand is an
2311 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2312 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2313 /// semantics as an ADD. This handles the equivalence:
2314 /// X|Cst == X+Cst iff X&Cst = 0.
2315 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2316 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2317 !isa<ConstantSDNode>(Op.getOperand(1)))
2320 if (Op.getOpcode() == ISD::OR &&
2321 !MaskedValueIsZero(Op.getOperand(0),
2322 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2329 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2330 // If we're told that NaNs won't happen, assume they won't.
2334 // If the value is a constant, we can obviously see if it is a NaN or not.
2335 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2336 return !C->getValueAPF().isNaN();
2338 // TODO: Recognize more cases here.
2343 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2344 // If the value is a constant, we can obviously see if it is a zero or not.
2345 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2346 return !C->isZero();
2348 // TODO: Recognize more cases here.
2349 switch (Op.getOpcode()) {
2352 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2353 return !C->isNullValue();
2360 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2361 // Check the obvious case.
2362 if (A == B) return true;
2364 // For for negative and positive zero.
2365 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2366 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2367 if (CA->isZero() && CB->isZero()) return true;
2369 // Otherwise they may not be equal.
2373 /// getNode - Gets or creates the specified node.
2375 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2376 FoldingSetNodeID ID;
2377 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2379 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2380 return SDValue(E, 0);
2382 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2383 CSEMap.InsertNode(N, IP);
2385 AllNodes.push_back(N);
2389 return SDValue(N, 0);
2392 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2393 EVT VT, SDValue Operand) {
2394 // Constant fold unary operations with an integer constant operand.
2395 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2396 const APInt &Val = C->getAPIntValue();
2399 case ISD::SIGN_EXTEND:
2400 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2401 case ISD::ANY_EXTEND:
2402 case ISD::ZERO_EXTEND:
2404 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2405 case ISD::UINT_TO_FP:
2406 case ISD::SINT_TO_FP: {
2407 // No compile time operations on ppcf128.
2408 if (VT == MVT::ppcf128) break;
2409 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2410 (void)apf.convertFromAPInt(Val,
2411 Opcode==ISD::SINT_TO_FP,
2412 APFloat::rmNearestTiesToEven);
2413 return getConstantFP(apf, VT);
2416 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2417 return getConstantFP(Val.bitsToFloat(), VT);
2418 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2419 return getConstantFP(Val.bitsToDouble(), VT);
2422 return getConstant(Val.byteSwap(), VT);
2424 return getConstant(Val.countPopulation(), VT);
2426 return getConstant(Val.countLeadingZeros(), VT);
2428 return getConstant(Val.countTrailingZeros(), VT);
2432 // Constant fold unary operations with a floating point constant operand.
2433 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2434 APFloat V = C->getValueAPF(); // make copy
2435 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2439 return getConstantFP(V, VT);
2442 return getConstantFP(V, VT);
2444 case ISD::FP_EXTEND: {
2446 // This can return overflow, underflow, or inexact; we don't care.
2447 // FIXME need to be more flexible about rounding mode.
2448 (void)V.convert(*EVTToAPFloatSemantics(VT),
2449 APFloat::rmNearestTiesToEven, &ignored);
2450 return getConstantFP(V, VT);
2452 case ISD::FP_TO_SINT:
2453 case ISD::FP_TO_UINT: {
2456 assert(integerPartWidth >= 64);
2457 // FIXME need to be more flexible about rounding mode.
2458 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2459 Opcode==ISD::FP_TO_SINT,
2460 APFloat::rmTowardZero, &ignored);
2461 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2463 APInt api(VT.getSizeInBits(), x);
2464 return getConstant(api, VT);
2467 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2468 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2469 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2470 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2476 unsigned OpOpcode = Operand.getNode()->getOpcode();
2478 case ISD::TokenFactor:
2479 case ISD::MERGE_VALUES:
2480 case ISD::CONCAT_VECTORS:
2481 return Operand; // Factor, merge or concat of one node? No need.
2482 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2483 case ISD::FP_EXTEND:
2484 assert(VT.isFloatingPoint() &&
2485 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2486 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2487 assert((!VT.isVector() ||
2488 VT.getVectorNumElements() ==
2489 Operand.getValueType().getVectorNumElements()) &&
2490 "Vector element count mismatch!");
2491 if (Operand.getOpcode() == ISD::UNDEF)
2492 return getUNDEF(VT);
2494 case ISD::SIGN_EXTEND:
2495 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2496 "Invalid SIGN_EXTEND!");
2497 if (Operand.getValueType() == VT) return Operand; // noop extension
2498 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2499 "Invalid sext node, dst < src!");
2500 assert((!VT.isVector() ||
2501 VT.getVectorNumElements() ==
2502 Operand.getValueType().getVectorNumElements()) &&
2503 "Vector element count mismatch!");
2504 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2505 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2506 else if (OpOpcode == ISD::UNDEF)
2507 // sext(undef) = 0, because the top bits will all be the same.
2508 return getConstant(0, VT);
2510 case ISD::ZERO_EXTEND:
2511 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2512 "Invalid ZERO_EXTEND!");
2513 if (Operand.getValueType() == VT) return Operand; // noop extension
2514 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2515 "Invalid zext node, dst < src!");
2516 assert((!VT.isVector() ||
2517 VT.getVectorNumElements() ==
2518 Operand.getValueType().getVectorNumElements()) &&
2519 "Vector element count mismatch!");
2520 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2521 return getNode(ISD::ZERO_EXTEND, DL, VT,
2522 Operand.getNode()->getOperand(0));
2523 else if (OpOpcode == ISD::UNDEF)
2524 // zext(undef) = 0, because the top bits will be zero.
2525 return getConstant(0, VT);
2527 case ISD::ANY_EXTEND:
2528 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2529 "Invalid ANY_EXTEND!");
2530 if (Operand.getValueType() == VT) return Operand; // noop extension
2531 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2532 "Invalid anyext node, dst < src!");
2533 assert((!VT.isVector() ||
2534 VT.getVectorNumElements() ==
2535 Operand.getValueType().getVectorNumElements()) &&
2536 "Vector element count mismatch!");
2538 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2539 OpOpcode == ISD::ANY_EXTEND)
2540 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2541 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2542 else if (OpOpcode == ISD::UNDEF)
2543 return getUNDEF(VT);
2545 // (ext (trunx x)) -> x
2546 if (OpOpcode == ISD::TRUNCATE) {
2547 SDValue OpOp = Operand.getNode()->getOperand(0);
2548 if (OpOp.getValueType() == VT)
2553 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2554 "Invalid TRUNCATE!");
2555 if (Operand.getValueType() == VT) return Operand; // noop truncate
2556 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2557 "Invalid truncate node, src < dst!");
2558 assert((!VT.isVector() ||
2559 VT.getVectorNumElements() ==
2560 Operand.getValueType().getVectorNumElements()) &&
2561 "Vector element count mismatch!");
2562 if (OpOpcode == ISD::TRUNCATE)
2563 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2564 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2565 OpOpcode == ISD::ANY_EXTEND) {
2566 // If the source is smaller than the dest, we still need an extend.
2567 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2568 .bitsLT(VT.getScalarType()))
2569 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2570 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2571 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2573 return Operand.getNode()->getOperand(0);
2577 // Basic sanity checking.
2578 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2579 && "Cannot BITCAST between types of different sizes!");
2580 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2581 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2582 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2583 if (OpOpcode == ISD::UNDEF)
2584 return getUNDEF(VT);
2586 case ISD::SCALAR_TO_VECTOR:
2587 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2588 (VT.getVectorElementType() == Operand.getValueType() ||
2589 (VT.getVectorElementType().isInteger() &&
2590 Operand.getValueType().isInteger() &&
2591 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2592 "Illegal SCALAR_TO_VECTOR node!");
2593 if (OpOpcode == ISD::UNDEF)
2594 return getUNDEF(VT);
2595 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2596 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2597 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2598 Operand.getConstantOperandVal(1) == 0 &&
2599 Operand.getOperand(0).getValueType() == VT)
2600 return Operand.getOperand(0);
2603 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2604 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2605 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2606 Operand.getNode()->getOperand(0));
2607 if (OpOpcode == ISD::FNEG) // --X -> X
2608 return Operand.getNode()->getOperand(0);
2611 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2612 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2617 SDVTList VTs = getVTList(VT);
2618 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2619 FoldingSetNodeID ID;
2620 SDValue Ops[1] = { Operand };
2621 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2623 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2624 return SDValue(E, 0);
2626 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2627 CSEMap.InsertNode(N, IP);
2629 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2632 AllNodes.push_back(N);
2636 return SDValue(N, 0);
2639 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2641 ConstantSDNode *Cst1,
2642 ConstantSDNode *Cst2) {
2643 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2646 case ISD::ADD: return getConstant(C1 + C2, VT);
2647 case ISD::SUB: return getConstant(C1 - C2, VT);
2648 case ISD::MUL: return getConstant(C1 * C2, VT);
2650 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2653 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2656 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2659 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2661 case ISD::AND: return getConstant(C1 & C2, VT);
2662 case ISD::OR: return getConstant(C1 | C2, VT);
2663 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2664 case ISD::SHL: return getConstant(C1 << C2, VT);
2665 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2666 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2667 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2668 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2675 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2676 SDValue N1, SDValue N2) {
2677 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2678 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2681 case ISD::TokenFactor:
2682 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2683 N2.getValueType() == MVT::Other && "Invalid token factor!");
2684 // Fold trivial token factors.
2685 if (N1.getOpcode() == ISD::EntryToken) return N2;
2686 if (N2.getOpcode() == ISD::EntryToken) return N1;
2687 if (N1 == N2) return N1;
2689 case ISD::CONCAT_VECTORS:
2690 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2691 // one big BUILD_VECTOR.
2692 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2693 N2.getOpcode() == ISD::BUILD_VECTOR) {
2694 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2695 N1.getNode()->op_end());
2696 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2697 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2701 assert(VT.isInteger() && "This operator does not apply to FP types!");
2702 assert(N1.getValueType() == N2.getValueType() &&
2703 N1.getValueType() == VT && "Binary operator types must match!");
2704 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2705 // worth handling here.
2706 if (N2C && N2C->isNullValue())
2708 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2715 assert(VT.isInteger() && "This operator does not apply to FP types!");
2716 assert(N1.getValueType() == N2.getValueType() &&
2717 N1.getValueType() == VT && "Binary operator types must match!");
2718 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2719 // it's worth handling here.
2720 if (N2C && N2C->isNullValue())
2730 assert(VT.isInteger() && "This operator does not apply to FP types!");
2731 assert(N1.getValueType() == N2.getValueType() &&
2732 N1.getValueType() == VT && "Binary operator types must match!");
2740 if (Opcode == ISD::FADD) {
2742 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2743 if (CFP->getValueAPF().isZero())
2746 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2747 if (CFP->getValueAPF().isZero())
2749 } else if (Opcode == ISD::FSUB) {
2751 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2752 if (CFP->getValueAPF().isZero())
2756 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2757 assert(N1.getValueType() == N2.getValueType() &&
2758 N1.getValueType() == VT && "Binary operator types must match!");
2760 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2761 assert(N1.getValueType() == VT &&
2762 N1.getValueType().isFloatingPoint() &&
2763 N2.getValueType().isFloatingPoint() &&
2764 "Invalid FCOPYSIGN!");
2771 assert(VT == N1.getValueType() &&
2772 "Shift operators return type must be the same as their first arg");
2773 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2774 "Shifts only work on integers");
2775 // Verify that the shift amount VT is bit enough to hold valid shift
2776 // amounts. This catches things like trying to shift an i1024 value by an
2777 // i8, which is easy to fall into in generic code that uses
2778 // TLI.getShiftAmount().
2779 assert(N2.getValueType().getSizeInBits() >=
2780 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2781 "Invalid use of small shift amount with oversized value!");
2783 // Always fold shifts of i1 values so the code generator doesn't need to
2784 // handle them. Since we know the size of the shift has to be less than the
2785 // size of the value, the shift/rotate count is guaranteed to be zero.
2788 if (N2C && N2C->isNullValue())
2791 case ISD::FP_ROUND_INREG: {
2792 EVT EVT = cast<VTSDNode>(N2)->getVT();
2793 assert(VT == N1.getValueType() && "Not an inreg round!");
2794 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2795 "Cannot FP_ROUND_INREG integer types");
2796 assert(EVT.isVector() == VT.isVector() &&
2797 "FP_ROUND_INREG type should be vector iff the operand "
2799 assert((!EVT.isVector() ||
2800 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2801 "Vector element counts must match in FP_ROUND_INREG");
2802 assert(EVT.bitsLE(VT) && "Not rounding down!");
2803 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2807 assert(VT.isFloatingPoint() &&
2808 N1.getValueType().isFloatingPoint() &&
2809 VT.bitsLE(N1.getValueType()) &&
2810 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2811 if (N1.getValueType() == VT) return N1; // noop conversion.
2813 case ISD::AssertSext:
2814 case ISD::AssertZext: {
2815 EVT EVT = cast<VTSDNode>(N2)->getVT();
2816 assert(VT == N1.getValueType() && "Not an inreg extend!");
2817 assert(VT.isInteger() && EVT.isInteger() &&
2818 "Cannot *_EXTEND_INREG FP types");
2819 assert(!EVT.isVector() &&
2820 "AssertSExt/AssertZExt type should be the vector element type "
2821 "rather than the vector type!");
2822 assert(EVT.bitsLE(VT) && "Not extending!");
2823 if (VT == EVT) return N1; // noop assertion.
2826 case ISD::SIGN_EXTEND_INREG: {
2827 EVT EVT = cast<VTSDNode>(N2)->getVT();
2828 assert(VT == N1.getValueType() && "Not an inreg extend!");
2829 assert(VT.isInteger() && EVT.isInteger() &&
2830 "Cannot *_EXTEND_INREG FP types");
2831 assert(EVT.isVector() == VT.isVector() &&
2832 "SIGN_EXTEND_INREG type should be vector iff the operand "
2834 assert((!EVT.isVector() ||
2835 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2836 "Vector element counts must match in SIGN_EXTEND_INREG");
2837 assert(EVT.bitsLE(VT) && "Not extending!");
2838 if (EVT == VT) return N1; // Not actually extending
2841 APInt Val = N1C->getAPIntValue();
2842 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2843 Val <<= Val.getBitWidth()-FromBits;
2844 Val = Val.ashr(Val.getBitWidth()-FromBits);
2845 return getConstant(Val, VT);
2849 case ISD::EXTRACT_VECTOR_ELT:
2850 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2851 if (N1.getOpcode() == ISD::UNDEF)
2852 return getUNDEF(VT);
2854 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2855 // expanding copies of large vectors from registers.
2857 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2858 N1.getNumOperands() > 0) {
2860 N1.getOperand(0).getValueType().getVectorNumElements();
2861 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2862 N1.getOperand(N2C->getZExtValue() / Factor),
2863 getConstant(N2C->getZExtValue() % Factor,
2864 N2.getValueType()));
2867 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2868 // expanding large vector constants.
2869 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2870 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2871 EVT VEltTy = N1.getValueType().getVectorElementType();
2872 if (Elt.getValueType() != VEltTy) {
2873 // If the vector element type is not legal, the BUILD_VECTOR operands
2874 // are promoted and implicitly truncated. Make that explicit here.
2875 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2878 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2879 // result is implicitly extended.
2880 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2885 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2886 // operations are lowered to scalars.
2887 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2888 // If the indices are the same, return the inserted element else
2889 // if the indices are known different, extract the element from
2890 // the original vector.
2891 SDValue N1Op2 = N1.getOperand(2);
2892 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2894 if (N1Op2C && N2C) {
2895 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2896 if (VT == N1.getOperand(1).getValueType())
2897 return N1.getOperand(1);
2899 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2902 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2906 case ISD::EXTRACT_ELEMENT:
2907 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2908 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2909 (N1.getValueType().isInteger() == VT.isInteger()) &&
2910 N1.getValueType() != VT &&
2911 "Wrong types for EXTRACT_ELEMENT!");
2913 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2914 // 64-bit integers into 32-bit parts. Instead of building the extract of
2915 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2916 if (N1.getOpcode() == ISD::BUILD_PAIR)
2917 return N1.getOperand(N2C->getZExtValue());
2919 // EXTRACT_ELEMENT of a constant int is also very common.
2920 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2921 unsigned ElementSize = VT.getSizeInBits();
2922 unsigned Shift = ElementSize * N2C->getZExtValue();
2923 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2924 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2927 case ISD::EXTRACT_SUBVECTOR: {
2929 if (VT.isSimple() && N1.getValueType().isSimple()) {
2930 assert(VT.isVector() && N1.getValueType().isVector() &&
2931 "Extract subvector VTs must be a vectors!");
2932 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2933 "Extract subvector VTs must have the same element type!");
2934 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2935 "Extract subvector must be from larger vector to smaller vector!");
2937 if (isa<ConstantSDNode>(Index.getNode())) {
2938 assert((VT.getVectorNumElements() +
2939 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2940 <= N1.getValueType().getVectorNumElements())
2941 && "Extract subvector overflow!");
2944 // Trivial extraction.
2945 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2954 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2955 if (SV.getNode()) return SV;
2956 } else { // Cannonicalize constant to RHS if commutative
2957 if (isCommutativeBinOp(Opcode)) {
2958 std::swap(N1C, N2C);
2964 // Constant fold FP operations.
2965 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2966 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2968 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2969 // Cannonicalize constant to RHS if commutative
2970 std::swap(N1CFP, N2CFP);
2972 } else if (N2CFP && VT != MVT::ppcf128) {
2973 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2974 APFloat::opStatus s;
2977 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2978 if (s != APFloat::opInvalidOp)
2979 return getConstantFP(V1, VT);
2982 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2983 if (s!=APFloat::opInvalidOp)
2984 return getConstantFP(V1, VT);
2987 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2988 if (s!=APFloat::opInvalidOp)
2989 return getConstantFP(V1, VT);
2992 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2993 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2994 return getConstantFP(V1, VT);
2997 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2998 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2999 return getConstantFP(V1, VT);
3001 case ISD::FCOPYSIGN:
3003 return getConstantFP(V1, VT);
3009 // Canonicalize an UNDEF to the RHS, even over a constant.
3010 if (N1.getOpcode() == ISD::UNDEF) {
3011 if (isCommutativeBinOp(Opcode)) {
3015 case ISD::FP_ROUND_INREG:
3016 case ISD::SIGN_EXTEND_INREG:
3022 return N1; // fold op(undef, arg2) -> undef
3030 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3031 // For vectors, we can't easily build an all zero vector, just return
3038 // Fold a bunch of operators when the RHS is undef.
3039 if (N2.getOpcode() == ISD::UNDEF) {
3042 if (N1.getOpcode() == ISD::UNDEF)
3043 // Handle undef ^ undef -> 0 special case. This is a common
3045 return getConstant(0, VT);
3055 return N2; // fold op(arg1, undef) -> undef
3069 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3070 // For vectors, we can't easily build an all zero vector, just return
3075 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3076 // For vectors, we can't easily build an all one vector, just return
3084 // Memoize this node if possible.
3086 SDVTList VTs = getVTList(VT);
3087 if (VT != MVT::Glue) {
3088 SDValue Ops[] = { N1, N2 };
3089 FoldingSetNodeID ID;
3090 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3093 return SDValue(E, 0);
3095 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3096 CSEMap.InsertNode(N, IP);
3098 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3101 AllNodes.push_back(N);
3105 return SDValue(N, 0);
3108 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3109 SDValue N1, SDValue N2, SDValue N3) {
3110 // Perform various simplifications.
3111 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3113 case ISD::CONCAT_VECTORS:
3114 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3115 // one big BUILD_VECTOR.
3116 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3117 N2.getOpcode() == ISD::BUILD_VECTOR &&
3118 N3.getOpcode() == ISD::BUILD_VECTOR) {
3119 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3120 N1.getNode()->op_end());
3121 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3122 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3123 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3127 // Use FoldSetCC to simplify SETCC's.
3128 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3129 if (Simp.getNode()) return Simp;
3134 if (N1C->getZExtValue())
3135 return N2; // select true, X, Y -> X
3137 return N3; // select false, X, Y -> Y
3140 if (N2 == N3) return N2; // select C, X, X -> X
3142 case ISD::VECTOR_SHUFFLE:
3143 llvm_unreachable("should use getVectorShuffle constructor!");
3145 case ISD::INSERT_SUBVECTOR: {
3147 if (VT.isSimple() && N1.getValueType().isSimple()
3148 && N2.getValueType().isSimple()) {
3149 assert(VT.isVector() && N1.getValueType().isVector() &&
3150 N2.getValueType().isVector() &&
3151 "Insert subvector VTs must be a vectors");
3152 assert(VT == N1.getValueType() &&
3153 "Dest and insert subvector source types must match!");
3154 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3155 "Insert subvector must be from smaller vector to larger vector!");
3156 if (isa<ConstantSDNode>(Index.getNode())) {
3157 assert((N2.getValueType().getVectorNumElements() +
3158 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3159 <= VT.getVectorNumElements())
3160 && "Insert subvector overflow!");
3163 // Trivial insertion.
3164 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3170 // Fold bit_convert nodes from a type to themselves.
3171 if (N1.getValueType() == VT)
3176 // Memoize node if it doesn't produce a flag.
3178 SDVTList VTs = getVTList(VT);
3179 if (VT != MVT::Glue) {
3180 SDValue Ops[] = { N1, N2, N3 };
3181 FoldingSetNodeID ID;
3182 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3184 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3185 return SDValue(E, 0);
3187 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3188 CSEMap.InsertNode(N, IP);
3190 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3193 AllNodes.push_back(N);
3197 return SDValue(N, 0);
3200 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3201 SDValue N1, SDValue N2, SDValue N3,
3203 SDValue Ops[] = { N1, N2, N3, N4 };
3204 return getNode(Opcode, DL, VT, Ops, 4);
3207 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3208 SDValue N1, SDValue N2, SDValue N3,
3209 SDValue N4, SDValue N5) {
3210 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3211 return getNode(Opcode, DL, VT, Ops, 5);
3214 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3215 /// the incoming stack arguments to be loaded from the stack.
3216 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3217 SmallVector<SDValue, 8> ArgChains;
3219 // Include the original chain at the beginning of the list. When this is
3220 // used by target LowerCall hooks, this helps legalize find the
3221 // CALLSEQ_BEGIN node.
3222 ArgChains.push_back(Chain);
3224 // Add a chain value for each stack argument.
3225 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3226 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3227 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3228 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3229 if (FI->getIndex() < 0)
3230 ArgChains.push_back(SDValue(L, 1));
3232 // Build a tokenfactor for all the chains.
3233 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3234 &ArgChains[0], ArgChains.size());
3237 /// SplatByte - Distribute ByteVal over NumBits bits.
3238 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3239 APInt Val = APInt(NumBits, ByteVal);
3241 for (unsigned i = NumBits; i > 8; i >>= 1) {
3242 Val = (Val << Shift) | Val;
3248 /// getMemsetValue - Vectorized representation of the memset value
3250 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3252 assert(Value.getOpcode() != ISD::UNDEF);
3254 unsigned NumBits = VT.getScalarType().getSizeInBits();
3255 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3256 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3258 return DAG.getConstant(Val, VT);
3259 return DAG.getConstantFP(APFloat(Val), VT);
3262 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3264 // Use a multiplication with 0x010101... to extend the input to the
3266 APInt Magic = SplatByte(NumBits, 0x01);
3267 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3273 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3274 /// used when a memcpy is turned into a memset when the source is a constant
3276 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3277 const TargetLowering &TLI,
3278 std::string &Str, unsigned Offset) {
3279 // Handle vector with all elements zero.
3282 return DAG.getConstant(0, VT);
3283 else if (VT == MVT::f32 || VT == MVT::f64)
3284 return DAG.getConstantFP(0.0, VT);
3285 else if (VT.isVector()) {
3286 unsigned NumElts = VT.getVectorNumElements();
3287 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3288 return DAG.getNode(ISD::BITCAST, dl, VT,
3289 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3292 llvm_unreachable("Expected type!");
3295 assert(!VT.isVector() && "Can't handle vector type here!");
3296 unsigned NumBits = VT.getSizeInBits();
3297 unsigned MSB = NumBits / 8;
3299 if (TLI.isLittleEndian())
3300 Offset = Offset + MSB - 1;
3301 for (unsigned i = 0; i != MSB; ++i) {
3302 Val = (Val << 8) | (unsigned char)Str[Offset];
3303 Offset += TLI.isLittleEndian() ? -1 : 1;
3305 return DAG.getConstant(Val, VT);
3308 /// getMemBasePlusOffset - Returns base and offset node for the
3310 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3311 SelectionDAG &DAG) {
3312 EVT VT = Base.getValueType();
3313 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3314 VT, Base, DAG.getConstant(Offset, VT));
3317 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3319 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3320 unsigned SrcDelta = 0;
3321 GlobalAddressSDNode *G = NULL;
3322 if (Src.getOpcode() == ISD::GlobalAddress)
3323 G = cast<GlobalAddressSDNode>(Src);
3324 else if (Src.getOpcode() == ISD::ADD &&
3325 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3326 Src.getOperand(1).getOpcode() == ISD::Constant) {
3327 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3328 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3333 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3334 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3340 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3341 /// to replace the memset / memcpy. Return true if the number of memory ops
3342 /// is below the threshold. It returns the types of the sequence of
3343 /// memory ops to perform memset / memcpy by reference.
3344 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3345 unsigned Limit, uint64_t Size,
3346 unsigned DstAlign, unsigned SrcAlign,
3347 bool NonScalarIntSafe,
3350 const TargetLowering &TLI) {
3351 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3352 "Expecting memcpy / memset source to meet alignment requirement!");
3353 // If 'SrcAlign' is zero, that means the memory operation does not need to
3354 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3355 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3356 // is the specified alignment of the memory operation. If it is zero, that
3357 // means it's possible to change the alignment of the destination.
3358 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3359 // not need to be loaded.
3360 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3361 NonScalarIntSafe, MemcpyStrSrc,
3362 DAG.getMachineFunction());
3364 if (VT == MVT::Other) {
3365 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3366 TLI.allowsUnalignedMemoryAccesses(VT)) {
3367 VT = TLI.getPointerTy();
3369 switch (DstAlign & 7) {
3370 case 0: VT = MVT::i64; break;
3371 case 4: VT = MVT::i32; break;
3372 case 2: VT = MVT::i16; break;
3373 default: VT = MVT::i8; break;
3378 while (!TLI.isTypeLegal(LVT))
3379 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3380 assert(LVT.isInteger());
3386 unsigned NumMemOps = 0;
3388 unsigned VTSize = VT.getSizeInBits() / 8;
3389 while (VTSize > Size) {
3390 // For now, only use non-vector load / store's for the left-over pieces.
3391 if (VT.isVector() || VT.isFloatingPoint()) {
3393 while (!TLI.isTypeLegal(VT))
3394 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3395 VTSize = VT.getSizeInBits() / 8;
3397 // This can result in a type that is not legal on the target, e.g.
3398 // 1 or 2 bytes on PPC.
3399 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3404 if (++NumMemOps > Limit)
3406 MemOps.push_back(VT);
3413 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3414 SDValue Chain, SDValue Dst,
3415 SDValue Src, uint64_t Size,
3416 unsigned Align, bool isVol,
3418 MachinePointerInfo DstPtrInfo,
3419 MachinePointerInfo SrcPtrInfo) {
3420 // Turn a memcpy of undef to nop.
3421 if (Src.getOpcode() == ISD::UNDEF)
3424 // Expand memcpy to a series of load and store ops if the size operand falls
3425 // below a certain threshold.
3426 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3427 // rather than maybe a humongous number of loads and stores.
3428 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3429 std::vector<EVT> MemOps;
3430 bool DstAlignCanChange = false;
3431 MachineFunction &MF = DAG.getMachineFunction();
3432 MachineFrameInfo *MFI = MF.getFrameInfo();
3433 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3434 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3435 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3436 DstAlignCanChange = true;
3437 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3438 if (Align > SrcAlign)
3441 bool CopyFromStr = isMemSrcFromString(Src, Str);
3442 bool isZeroStr = CopyFromStr && Str.empty();
3443 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3445 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3446 (DstAlignCanChange ? 0 : Align),
3447 (isZeroStr ? 0 : SrcAlign),
3448 true, CopyFromStr, DAG, TLI))
3451 if (DstAlignCanChange) {
3452 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3453 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3454 if (NewAlign > Align) {
3455 // Give the stack frame object a larger alignment if needed.
3456 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3457 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3462 SmallVector<SDValue, 8> OutChains;
3463 unsigned NumMemOps = MemOps.size();
3464 uint64_t SrcOff = 0, DstOff = 0;
3465 for (unsigned i = 0; i != NumMemOps; ++i) {
3467 unsigned VTSize = VT.getSizeInBits() / 8;
3468 SDValue Value, Store;
3471 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3472 // It's unlikely a store of a vector immediate can be done in a single
3473 // instruction. It would require a load from a constantpool first.
3474 // We only handle zero vectors here.
3475 // FIXME: Handle other cases where store of vector immediate is done in
3476 // a single instruction.
3477 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3478 Store = DAG.getStore(Chain, dl, Value,
3479 getMemBasePlusOffset(Dst, DstOff, DAG),
3480 DstPtrInfo.getWithOffset(DstOff), isVol,
3483 // The type might not be legal for the target. This should only happen
3484 // if the type is smaller than a legal type, as on PPC, so the right
3485 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3486 // to Load/Store if NVT==VT.
3487 // FIXME does the case above also need this?
3488 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3489 assert(NVT.bitsGE(VT));
3490 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3491 getMemBasePlusOffset(Src, SrcOff, DAG),
3492 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3493 MinAlign(SrcAlign, SrcOff));
3494 Store = DAG.getTruncStore(Chain, dl, Value,
3495 getMemBasePlusOffset(Dst, DstOff, DAG),
3496 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3499 OutChains.push_back(Store);
3504 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3505 &OutChains[0], OutChains.size());
3508 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3509 SDValue Chain, SDValue Dst,
3510 SDValue Src, uint64_t Size,
3511 unsigned Align, bool isVol,
3513 MachinePointerInfo DstPtrInfo,
3514 MachinePointerInfo SrcPtrInfo) {
3515 // Turn a memmove of undef to nop.
3516 if (Src.getOpcode() == ISD::UNDEF)
3519 // Expand memmove to a series of load and store ops if the size operand falls
3520 // below a certain threshold.
3521 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3522 std::vector<EVT> MemOps;
3523 bool DstAlignCanChange = false;
3524 MachineFunction &MF = DAG.getMachineFunction();
3525 MachineFrameInfo *MFI = MF.getFrameInfo();
3526 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3527 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3528 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3529 DstAlignCanChange = true;
3530 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3531 if (Align > SrcAlign)
3533 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3535 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3536 (DstAlignCanChange ? 0 : Align),
3537 SrcAlign, true, false, DAG, TLI))
3540 if (DstAlignCanChange) {
3541 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3542 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3543 if (NewAlign > Align) {
3544 // Give the stack frame object a larger alignment if needed.
3545 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3546 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3551 uint64_t SrcOff = 0, DstOff = 0;
3552 SmallVector<SDValue, 8> LoadValues;
3553 SmallVector<SDValue, 8> LoadChains;
3554 SmallVector<SDValue, 8> OutChains;
3555 unsigned NumMemOps = MemOps.size();
3556 for (unsigned i = 0; i < NumMemOps; i++) {
3558 unsigned VTSize = VT.getSizeInBits() / 8;
3559 SDValue Value, Store;
3561 Value = DAG.getLoad(VT, dl, Chain,
3562 getMemBasePlusOffset(Src, SrcOff, DAG),
3563 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3565 LoadValues.push_back(Value);
3566 LoadChains.push_back(Value.getValue(1));
3569 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3570 &LoadChains[0], LoadChains.size());
3572 for (unsigned i = 0; i < NumMemOps; i++) {
3574 unsigned VTSize = VT.getSizeInBits() / 8;
3575 SDValue Value, Store;
3577 Store = DAG.getStore(Chain, dl, LoadValues[i],
3578 getMemBasePlusOffset(Dst, DstOff, DAG),
3579 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3580 OutChains.push_back(Store);
3584 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3585 &OutChains[0], OutChains.size());
3588 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3589 SDValue Chain, SDValue Dst,
3590 SDValue Src, uint64_t Size,
3591 unsigned Align, bool isVol,
3592 MachinePointerInfo DstPtrInfo) {
3593 // Turn a memset of undef to nop.
3594 if (Src.getOpcode() == ISD::UNDEF)
3597 // Expand memset to a series of load/store ops if the size operand
3598 // falls below a certain threshold.
3599 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3600 std::vector<EVT> MemOps;
3601 bool DstAlignCanChange = false;
3602 MachineFunction &MF = DAG.getMachineFunction();
3603 MachineFrameInfo *MFI = MF.getFrameInfo();
3604 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3605 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3606 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3607 DstAlignCanChange = true;
3608 bool NonScalarIntSafe =
3609 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3610 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3611 Size, (DstAlignCanChange ? 0 : Align), 0,
3612 NonScalarIntSafe, false, DAG, TLI))
3615 if (DstAlignCanChange) {
3616 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3617 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3618 if (NewAlign > Align) {
3619 // Give the stack frame object a larger alignment if needed.
3620 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3621 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3626 SmallVector<SDValue, 8> OutChains;
3627 uint64_t DstOff = 0;
3628 unsigned NumMemOps = MemOps.size();
3630 // Find the largest store and generate the bit pattern for it.
3631 EVT LargestVT = MemOps[0];
3632 for (unsigned i = 1; i < NumMemOps; i++)
3633 if (MemOps[i].bitsGT(LargestVT))
3634 LargestVT = MemOps[i];
3635 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3637 for (unsigned i = 0; i < NumMemOps; i++) {
3640 // If this store is smaller than the largest store see whether we can get
3641 // the smaller value for free with a truncate.
3642 SDValue Value = MemSetValue;
3643 if (VT.bitsLT(LargestVT)) {
3644 if (!LargestVT.isVector() && !VT.isVector() &&
3645 TLI.isTruncateFree(LargestVT, VT))
3646 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3648 Value = getMemsetValue(Src, VT, DAG, dl);
3650 assert(Value.getValueType() == VT && "Value with wrong type.");
3651 SDValue Store = DAG.getStore(Chain, dl, Value,
3652 getMemBasePlusOffset(Dst, DstOff, DAG),
3653 DstPtrInfo.getWithOffset(DstOff),
3654 isVol, false, Align);
3655 OutChains.push_back(Store);
3656 DstOff += VT.getSizeInBits() / 8;
3659 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3660 &OutChains[0], OutChains.size());
3663 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3664 SDValue Src, SDValue Size,
3665 unsigned Align, bool isVol, bool AlwaysInline,
3666 MachinePointerInfo DstPtrInfo,
3667 MachinePointerInfo SrcPtrInfo) {
3669 // Check to see if we should lower the memcpy to loads and stores first.
3670 // For cases within the target-specified limits, this is the best choice.
3671 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3673 // Memcpy with size zero? Just return the original chain.
3674 if (ConstantSize->isNullValue())
3677 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3678 ConstantSize->getZExtValue(),Align,
3679 isVol, false, DstPtrInfo, SrcPtrInfo);
3680 if (Result.getNode())
3684 // Then check to see if we should lower the memcpy with target-specific
3685 // code. If the target chooses to do this, this is the next best.
3687 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3688 isVol, AlwaysInline,
3689 DstPtrInfo, SrcPtrInfo);
3690 if (Result.getNode())
3693 // If we really need inline code and the target declined to provide it,
3694 // use a (potentially long) sequence of loads and stores.
3696 assert(ConstantSize && "AlwaysInline requires a constant size!");
3697 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3698 ConstantSize->getZExtValue(), Align, isVol,
3699 true, DstPtrInfo, SrcPtrInfo);
3702 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3703 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3704 // respect volatile, so they may do things like read or write memory
3705 // beyond the given memory regions. But fixing this isn't easy, and most
3706 // people don't care.
3708 // Emit a library call.
3709 TargetLowering::ArgListTy Args;
3710 TargetLowering::ArgListEntry Entry;
3711 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3712 Entry.Node = Dst; Args.push_back(Entry);
3713 Entry.Node = Src; Args.push_back(Entry);
3714 Entry.Node = Size; Args.push_back(Entry);
3715 // FIXME: pass in DebugLoc
3716 std::pair<SDValue,SDValue> CallResult =
3717 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3718 false, false, false, false, 0,
3719 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3720 /*isReturnValueUsed=*/false,
3721 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3722 TLI.getPointerTy()),
3724 return CallResult.second;
3727 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3728 SDValue Src, SDValue Size,
3729 unsigned Align, bool isVol,
3730 MachinePointerInfo DstPtrInfo,
3731 MachinePointerInfo SrcPtrInfo) {
3733 // Check to see if we should lower the memmove to loads and stores first.
3734 // For cases within the target-specified limits, this is the best choice.
3735 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3737 // Memmove with size zero? Just return the original chain.
3738 if (ConstantSize->isNullValue())
3742 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3743 ConstantSize->getZExtValue(), Align, isVol,
3744 false, DstPtrInfo, SrcPtrInfo);
3745 if (Result.getNode())
3749 // Then check to see if we should lower the memmove with target-specific
3750 // code. If the target chooses to do this, this is the next best.
3752 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3753 DstPtrInfo, SrcPtrInfo);
3754 if (Result.getNode())
3757 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3758 // not be safe. See memcpy above for more details.
3760 // Emit a library call.
3761 TargetLowering::ArgListTy Args;
3762 TargetLowering::ArgListEntry Entry;
3763 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3764 Entry.Node = Dst; Args.push_back(Entry);
3765 Entry.Node = Src; Args.push_back(Entry);
3766 Entry.Node = Size; Args.push_back(Entry);
3767 // FIXME: pass in DebugLoc
3768 std::pair<SDValue,SDValue> CallResult =
3769 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3770 false, false, false, false, 0,
3771 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3772 /*isReturnValueUsed=*/false,
3773 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3774 TLI.getPointerTy()),
3776 return CallResult.second;
3779 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3780 SDValue Src, SDValue Size,
3781 unsigned Align, bool isVol,
3782 MachinePointerInfo DstPtrInfo) {
3784 // Check to see if we should lower the memset to stores first.
3785 // For cases within the target-specified limits, this is the best choice.
3786 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3788 // Memset with size zero? Just return the original chain.
3789 if (ConstantSize->isNullValue())
3793 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3794 Align, isVol, DstPtrInfo);
3796 if (Result.getNode())
3800 // Then check to see if we should lower the memset with target-specific
3801 // code. If the target chooses to do this, this is the next best.
3803 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3805 if (Result.getNode())
3808 // Emit a library call.
3809 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3810 TargetLowering::ArgListTy Args;
3811 TargetLowering::ArgListEntry Entry;
3812 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3813 Args.push_back(Entry);
3814 // Extend or truncate the argument to be an i32 value for the call.
3815 if (Src.getValueType().bitsGT(MVT::i32))
3816 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3818 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3820 Entry.Ty = Type::getInt32Ty(*getContext());
3821 Entry.isSExt = true;
3822 Args.push_back(Entry);
3824 Entry.Ty = IntPtrTy;
3825 Entry.isSExt = false;
3826 Args.push_back(Entry);
3827 // FIXME: pass in DebugLoc
3828 std::pair<SDValue,SDValue> CallResult =
3829 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3830 false, false, false, false, 0,
3831 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3832 /*isReturnValueUsed=*/false,
3833 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3834 TLI.getPointerTy()),
3836 return CallResult.second;
3839 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3840 SDValue Chain, SDValue Ptr, SDValue Cmp,
3841 SDValue Swp, MachinePointerInfo PtrInfo,
3843 AtomicOrdering Ordering,
3844 SynchronizationScope SynchScope) {
3845 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3846 Alignment = getEVTAlignment(MemVT);
3848 MachineFunction &MF = getMachineFunction();
3849 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3851 // For now, atomics are considered to be volatile always.
3852 // FIXME: Volatile isn't really correct; we should keep track of atomic
3853 // orderings in the memoperand.
3854 Flags |= MachineMemOperand::MOVolatile;
3856 MachineMemOperand *MMO =
3857 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3859 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3860 Ordering, SynchScope);
3863 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3865 SDValue Ptr, SDValue Cmp,
3866 SDValue Swp, MachineMemOperand *MMO,
3867 AtomicOrdering Ordering,
3868 SynchronizationScope SynchScope) {
3869 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3870 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3872 EVT VT = Cmp.getValueType();
3874 SDVTList VTs = getVTList(VT, MVT::Other);
3875 FoldingSetNodeID ID;
3876 ID.AddInteger(MemVT.getRawBits());
3877 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3878 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3880 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3881 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3882 return SDValue(E, 0);
3884 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3885 Ptr, Cmp, Swp, MMO, Ordering,
3887 CSEMap.InsertNode(N, IP);
3888 AllNodes.push_back(N);
3889 return SDValue(N, 0);
3892 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3894 SDValue Ptr, SDValue Val,
3895 const Value* PtrVal,
3897 AtomicOrdering Ordering,
3898 SynchronizationScope SynchScope) {
3899 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3900 Alignment = getEVTAlignment(MemVT);
3902 MachineFunction &MF = getMachineFunction();
3903 // A monotonic store does not load; a release store "loads" in the sense
3904 // that other stores cannot be sunk past it.
3905 // (An atomicrmw obviously both loads and stores.)
3906 unsigned Flags = MachineMemOperand::MOStore;
3907 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3908 Flags |= MachineMemOperand::MOLoad;
3910 // For now, atomics are considered to be volatile always.
3911 // FIXME: Volatile isn't really correct; we should keep track of atomic
3912 // orderings in the memoperand.
3913 Flags |= MachineMemOperand::MOVolatile;
3915 MachineMemOperand *MMO =
3916 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3917 MemVT.getStoreSize(), Alignment);
3919 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3920 Ordering, SynchScope);
3923 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3925 SDValue Ptr, SDValue Val,
3926 MachineMemOperand *MMO,
3927 AtomicOrdering Ordering,
3928 SynchronizationScope SynchScope) {
3929 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3930 Opcode == ISD::ATOMIC_LOAD_SUB ||
3931 Opcode == ISD::ATOMIC_LOAD_AND ||
3932 Opcode == ISD::ATOMIC_LOAD_OR ||
3933 Opcode == ISD::ATOMIC_LOAD_XOR ||
3934 Opcode == ISD::ATOMIC_LOAD_NAND ||
3935 Opcode == ISD::ATOMIC_LOAD_MIN ||
3936 Opcode == ISD::ATOMIC_LOAD_MAX ||
3937 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3938 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3939 Opcode == ISD::ATOMIC_SWAP ||
3940 Opcode == ISD::ATOMIC_STORE) &&
3941 "Invalid Atomic Op");
3943 EVT VT = Val.getValueType();
3945 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3946 getVTList(VT, MVT::Other);
3947 FoldingSetNodeID ID;
3948 ID.AddInteger(MemVT.getRawBits());
3949 SDValue Ops[] = {Chain, Ptr, Val};
3950 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3952 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3953 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3954 return SDValue(E, 0);
3956 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3958 Ordering, SynchScope);
3959 CSEMap.InsertNode(N, IP);
3960 AllNodes.push_back(N);
3961 return SDValue(N, 0);
3964 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3965 EVT VT, SDValue Chain,
3967 const Value* PtrVal,
3969 AtomicOrdering Ordering,
3970 SynchronizationScope SynchScope) {
3971 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3972 Alignment = getEVTAlignment(MemVT);
3974 MachineFunction &MF = getMachineFunction();
3975 // A monotonic load does not store; an acquire load "stores" in the sense
3976 // that other loads cannot be hoisted past it.
3977 unsigned Flags = MachineMemOperand::MOLoad;
3978 if (Ordering > Monotonic)
3979 Flags |= MachineMemOperand::MOStore;
3981 // For now, atomics are considered to be volatile always.
3982 // FIXME: Volatile isn't really correct; we should keep track of atomic
3983 // orderings in the memoperand.
3984 Flags |= MachineMemOperand::MOVolatile;
3986 MachineMemOperand *MMO =
3987 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3988 MemVT.getStoreSize(), Alignment);
3990 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3991 Ordering, SynchScope);
3994 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3995 EVT VT, SDValue Chain,
3997 MachineMemOperand *MMO,
3998 AtomicOrdering Ordering,
3999 SynchronizationScope SynchScope) {
4000 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4002 SDVTList VTs = getVTList(VT, MVT::Other);
4003 FoldingSetNodeID ID;
4004 ID.AddInteger(MemVT.getRawBits());
4005 SDValue Ops[] = {Chain, Ptr};
4006 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4008 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4009 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4010 return SDValue(E, 0);
4012 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4013 Ptr, MMO, Ordering, SynchScope);
4014 CSEMap.InsertNode(N, IP);
4015 AllNodes.push_back(N);
4016 return SDValue(N, 0);
4019 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4020 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4025 SmallVector<EVT, 4> VTs;
4026 VTs.reserve(NumOps);
4027 for (unsigned i = 0; i < NumOps; ++i)
4028 VTs.push_back(Ops[i].getValueType());
4029 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4034 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4035 const EVT *VTs, unsigned NumVTs,
4036 const SDValue *Ops, unsigned NumOps,
4037 EVT MemVT, MachinePointerInfo PtrInfo,
4038 unsigned Align, bool Vol,
4039 bool ReadMem, bool WriteMem) {
4040 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4041 MemVT, PtrInfo, Align, Vol,
4046 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4047 const SDValue *Ops, unsigned NumOps,
4048 EVT MemVT, MachinePointerInfo PtrInfo,
4049 unsigned Align, bool Vol,
4050 bool ReadMem, bool WriteMem) {
4051 if (Align == 0) // Ensure that codegen never sees alignment 0
4052 Align = getEVTAlignment(MemVT);
4054 MachineFunction &MF = getMachineFunction();
4057 Flags |= MachineMemOperand::MOStore;
4059 Flags |= MachineMemOperand::MOLoad;
4061 Flags |= MachineMemOperand::MOVolatile;
4062 MachineMemOperand *MMO =
4063 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4065 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4069 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4070 const SDValue *Ops, unsigned NumOps,
4071 EVT MemVT, MachineMemOperand *MMO) {
4072 assert((Opcode == ISD::INTRINSIC_VOID ||
4073 Opcode == ISD::INTRINSIC_W_CHAIN ||
4074 Opcode == ISD::PREFETCH ||
4075 (Opcode <= INT_MAX &&
4076 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4077 "Opcode is not a memory-accessing opcode!");
4079 // Memoize the node unless it returns a flag.
4080 MemIntrinsicSDNode *N;
4081 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4082 FoldingSetNodeID ID;
4083 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4086 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4087 return SDValue(E, 0);
4090 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4092 CSEMap.InsertNode(N, IP);
4094 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4097 AllNodes.push_back(N);
4098 return SDValue(N, 0);
4101 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4102 /// MachinePointerInfo record from it. This is particularly useful because the
4103 /// code generator has many cases where it doesn't bother passing in a
4104 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4105 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4106 // If this is FI+Offset, we can model it.
4107 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4108 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4110 // If this is (FI+Offset1)+Offset2, we can model it.
4111 if (Ptr.getOpcode() != ISD::ADD ||
4112 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4113 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4114 return MachinePointerInfo();
4116 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4117 return MachinePointerInfo::getFixedStack(FI, Offset+
4118 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4121 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4122 /// MachinePointerInfo record from it. This is particularly useful because the
4123 /// code generator has many cases where it doesn't bother passing in a
4124 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4125 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4126 // If the 'Offset' value isn't a constant, we can't handle this.
4127 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4128 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4129 if (OffsetOp.getOpcode() == ISD::UNDEF)
4130 return InferPointerInfo(Ptr);
4131 return MachinePointerInfo();
4136 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4137 EVT VT, DebugLoc dl, SDValue Chain,
4138 SDValue Ptr, SDValue Offset,
4139 MachinePointerInfo PtrInfo, EVT MemVT,
4140 bool isVolatile, bool isNonTemporal,
4141 unsigned Alignment, const MDNode *TBAAInfo) {
4142 assert(Chain.getValueType() == MVT::Other &&
4143 "Invalid chain type");
4144 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4145 Alignment = getEVTAlignment(VT);
4147 unsigned Flags = MachineMemOperand::MOLoad;
4149 Flags |= MachineMemOperand::MOVolatile;
4151 Flags |= MachineMemOperand::MONonTemporal;
4153 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4156 PtrInfo = InferPointerInfo(Ptr, Offset);
4158 MachineFunction &MF = getMachineFunction();
4159 MachineMemOperand *MMO =
4160 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4162 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4166 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4167 EVT VT, DebugLoc dl, SDValue Chain,
4168 SDValue Ptr, SDValue Offset, EVT MemVT,
4169 MachineMemOperand *MMO) {
4171 ExtType = ISD::NON_EXTLOAD;
4172 } else if (ExtType == ISD::NON_EXTLOAD) {
4173 assert(VT == MemVT && "Non-extending load from different memory type!");
4176 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4177 "Should only be an extending load, not truncating!");
4178 assert(VT.isInteger() == MemVT.isInteger() &&
4179 "Cannot convert from FP to Int or Int -> FP!");
4180 assert(VT.isVector() == MemVT.isVector() &&
4181 "Cannot use trunc store to convert to or from a vector!");
4182 assert((!VT.isVector() ||
4183 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4184 "Cannot use trunc store to change the number of vector elements!");
4187 bool Indexed = AM != ISD::UNINDEXED;
4188 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4189 "Unindexed load with an offset!");
4191 SDVTList VTs = Indexed ?
4192 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4193 SDValue Ops[] = { Chain, Ptr, Offset };
4194 FoldingSetNodeID ID;
4195 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4196 ID.AddInteger(MemVT.getRawBits());
4197 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4198 MMO->isNonTemporal()));
4200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4201 cast<LoadSDNode>(E)->refineAlignment(MMO);
4202 return SDValue(E, 0);
4204 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4206 CSEMap.InsertNode(N, IP);
4207 AllNodes.push_back(N);
4208 return SDValue(N, 0);
4211 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4212 SDValue Chain, SDValue Ptr,
4213 MachinePointerInfo PtrInfo,
4214 bool isVolatile, bool isNonTemporal,
4215 unsigned Alignment, const MDNode *TBAAInfo) {
4216 SDValue Undef = getUNDEF(Ptr.getValueType());
4217 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4218 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4221 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4222 SDValue Chain, SDValue Ptr,
4223 MachinePointerInfo PtrInfo, EVT MemVT,
4224 bool isVolatile, bool isNonTemporal,
4225 unsigned Alignment, const MDNode *TBAAInfo) {
4226 SDValue Undef = getUNDEF(Ptr.getValueType());
4227 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4228 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4234 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4235 SDValue Offset, ISD::MemIndexedMode AM) {
4236 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4237 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4238 "Load is already a indexed load!");
4239 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4240 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4242 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4245 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4246 SDValue Ptr, MachinePointerInfo PtrInfo,
4247 bool isVolatile, bool isNonTemporal,
4248 unsigned Alignment, const MDNode *TBAAInfo) {
4249 assert(Chain.getValueType() == MVT::Other &&
4250 "Invalid chain type");
4251 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4252 Alignment = getEVTAlignment(Val.getValueType());
4254 unsigned Flags = MachineMemOperand::MOStore;
4256 Flags |= MachineMemOperand::MOVolatile;
4258 Flags |= MachineMemOperand::MONonTemporal;
4261 PtrInfo = InferPointerInfo(Ptr);
4263 MachineFunction &MF = getMachineFunction();
4264 MachineMemOperand *MMO =
4265 MF.getMachineMemOperand(PtrInfo, Flags,
4266 Val.getValueType().getStoreSize(), Alignment,
4269 return getStore(Chain, dl, Val, Ptr, MMO);
4272 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4273 SDValue Ptr, MachineMemOperand *MMO) {
4274 assert(Chain.getValueType() == MVT::Other &&
4275 "Invalid chain type");
4276 EVT VT = Val.getValueType();
4277 SDVTList VTs = getVTList(MVT::Other);
4278 SDValue Undef = getUNDEF(Ptr.getValueType());
4279 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4280 FoldingSetNodeID ID;
4281 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4282 ID.AddInteger(VT.getRawBits());
4283 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4284 MMO->isNonTemporal()));
4286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4287 cast<StoreSDNode>(E)->refineAlignment(MMO);
4288 return SDValue(E, 0);
4290 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4292 CSEMap.InsertNode(N, IP);
4293 AllNodes.push_back(N);
4294 return SDValue(N, 0);
4297 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4298 SDValue Ptr, MachinePointerInfo PtrInfo,
4299 EVT SVT,bool isVolatile, bool isNonTemporal,
4301 const MDNode *TBAAInfo) {
4302 assert(Chain.getValueType() == MVT::Other &&
4303 "Invalid chain type");
4304 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4305 Alignment = getEVTAlignment(SVT);
4307 unsigned Flags = MachineMemOperand::MOStore;
4309 Flags |= MachineMemOperand::MOVolatile;
4311 Flags |= MachineMemOperand::MONonTemporal;
4314 PtrInfo = InferPointerInfo(Ptr);
4316 MachineFunction &MF = getMachineFunction();
4317 MachineMemOperand *MMO =
4318 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4321 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4324 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4325 SDValue Ptr, EVT SVT,
4326 MachineMemOperand *MMO) {
4327 EVT VT = Val.getValueType();
4329 assert(Chain.getValueType() == MVT::Other &&
4330 "Invalid chain type");
4332 return getStore(Chain, dl, Val, Ptr, MMO);
4334 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4335 "Should only be a truncating store, not extending!");
4336 assert(VT.isInteger() == SVT.isInteger() &&
4337 "Can't do FP-INT conversion!");
4338 assert(VT.isVector() == SVT.isVector() &&
4339 "Cannot use trunc store to convert to or from a vector!");
4340 assert((!VT.isVector() ||
4341 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4342 "Cannot use trunc store to change the number of vector elements!");
4344 SDVTList VTs = getVTList(MVT::Other);
4345 SDValue Undef = getUNDEF(Ptr.getValueType());
4346 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4347 FoldingSetNodeID ID;
4348 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4349 ID.AddInteger(SVT.getRawBits());
4350 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4351 MMO->isNonTemporal()));
4353 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4354 cast<StoreSDNode>(E)->refineAlignment(MMO);
4355 return SDValue(E, 0);
4357 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4359 CSEMap.InsertNode(N, IP);
4360 AllNodes.push_back(N);
4361 return SDValue(N, 0);
4365 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4366 SDValue Offset, ISD::MemIndexedMode AM) {
4367 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4368 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4369 "Store is already a indexed store!");
4370 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4371 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4372 FoldingSetNodeID ID;
4373 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4374 ID.AddInteger(ST->getMemoryVT().getRawBits());
4375 ID.AddInteger(ST->getRawSubclassData());
4377 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4378 return SDValue(E, 0);
4380 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4381 ST->isTruncatingStore(),
4383 ST->getMemOperand());
4384 CSEMap.InsertNode(N, IP);
4385 AllNodes.push_back(N);
4386 return SDValue(N, 0);
4389 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4390 SDValue Chain, SDValue Ptr,
4393 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4394 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4397 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4398 const SDUse *Ops, unsigned NumOps) {
4400 case 0: return getNode(Opcode, DL, VT);
4401 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4402 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4403 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4407 // Copy from an SDUse array into an SDValue array for use with
4408 // the regular getNode logic.
4409 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4410 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4413 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4414 const SDValue *Ops, unsigned NumOps) {
4416 case 0: return getNode(Opcode, DL, VT);
4417 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4418 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4419 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4425 case ISD::SELECT_CC: {
4426 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4427 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4428 "LHS and RHS of condition must have same type!");
4429 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4430 "True and False arms of SelectCC must have same type!");
4431 assert(Ops[2].getValueType() == VT &&
4432 "select_cc node must be of same type as true and false value!");
4436 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4437 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4438 "LHS/RHS of comparison should match types!");
4445 SDVTList VTs = getVTList(VT);
4447 if (VT != MVT::Glue) {
4448 FoldingSetNodeID ID;
4449 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4452 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4453 return SDValue(E, 0);
4455 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4456 CSEMap.InsertNode(N, IP);
4458 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4461 AllNodes.push_back(N);
4465 return SDValue(N, 0);
4468 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4469 const std::vector<EVT> &ResultTys,
4470 const SDValue *Ops, unsigned NumOps) {
4471 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4475 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4476 const EVT *VTs, unsigned NumVTs,
4477 const SDValue *Ops, unsigned NumOps) {
4479 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4480 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4483 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4484 const SDValue *Ops, unsigned NumOps) {
4485 if (VTList.NumVTs == 1)
4486 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4490 // FIXME: figure out how to safely handle things like
4491 // int foo(int x) { return 1 << (x & 255); }
4492 // int bar() { return foo(256); }
4493 case ISD::SRA_PARTS:
4494 case ISD::SRL_PARTS:
4495 case ISD::SHL_PARTS:
4496 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4497 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4498 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4499 else if (N3.getOpcode() == ISD::AND)
4500 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4501 // If the and is only masking out bits that cannot effect the shift,
4502 // eliminate the and.
4503 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4504 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4505 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4511 // Memoize the node unless it returns a flag.
4513 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4514 FoldingSetNodeID ID;
4515 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4517 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4518 return SDValue(E, 0);
4521 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4522 } else if (NumOps == 2) {
4523 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4524 } else if (NumOps == 3) {
4525 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4528 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4530 CSEMap.InsertNode(N, IP);
4533 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4534 } else if (NumOps == 2) {
4535 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4536 } else if (NumOps == 3) {
4537 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4540 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4543 AllNodes.push_back(N);
4547 return SDValue(N, 0);
4550 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4551 return getNode(Opcode, DL, VTList, 0, 0);
4554 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4556 SDValue Ops[] = { N1 };
4557 return getNode(Opcode, DL, VTList, Ops, 1);
4560 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4561 SDValue N1, SDValue N2) {
4562 SDValue Ops[] = { N1, N2 };
4563 return getNode(Opcode, DL, VTList, Ops, 2);
4566 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4567 SDValue N1, SDValue N2, SDValue N3) {
4568 SDValue Ops[] = { N1, N2, N3 };
4569 return getNode(Opcode, DL, VTList, Ops, 3);
4572 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4573 SDValue N1, SDValue N2, SDValue N3,
4575 SDValue Ops[] = { N1, N2, N3, N4 };
4576 return getNode(Opcode, DL, VTList, Ops, 4);
4579 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4580 SDValue N1, SDValue N2, SDValue N3,
4581 SDValue N4, SDValue N5) {
4582 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4583 return getNode(Opcode, DL, VTList, Ops, 5);
4586 SDVTList SelectionDAG::getVTList(EVT VT) {
4587 return makeVTList(SDNode::getValueTypeList(VT), 1);
4590 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4591 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4592 E = VTList.rend(); I != E; ++I)
4593 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4596 EVT *Array = Allocator.Allocate<EVT>(2);
4599 SDVTList Result = makeVTList(Array, 2);
4600 VTList.push_back(Result);
4604 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4605 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4606 E = VTList.rend(); I != E; ++I)
4607 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4611 EVT *Array = Allocator.Allocate<EVT>(3);
4615 SDVTList Result = makeVTList(Array, 3);
4616 VTList.push_back(Result);
4620 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4621 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4622 E = VTList.rend(); I != E; ++I)
4623 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4624 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4627 EVT *Array = Allocator.Allocate<EVT>(4);
4632 SDVTList Result = makeVTList(Array, 4);
4633 VTList.push_back(Result);
4637 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4639 case 0: llvm_unreachable("Cannot have nodes without results!");
4640 case 1: return getVTList(VTs[0]);
4641 case 2: return getVTList(VTs[0], VTs[1]);
4642 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4643 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4647 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4648 E = VTList.rend(); I != E; ++I) {
4649 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4652 bool NoMatch = false;
4653 for (unsigned i = 2; i != NumVTs; ++i)
4654 if (VTs[i] != I->VTs[i]) {
4662 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4663 std::copy(VTs, VTs+NumVTs, Array);
4664 SDVTList Result = makeVTList(Array, NumVTs);
4665 VTList.push_back(Result);
4670 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4671 /// specified operands. If the resultant node already exists in the DAG,
4672 /// this does not modify the specified node, instead it returns the node that
4673 /// already exists. If the resultant node does not exist in the DAG, the
4674 /// input node is returned. As a degenerate case, if you specify the same
4675 /// input operands as the node already has, the input node is returned.
4676 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4677 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4679 // Check to see if there is no change.
4680 if (Op == N->getOperand(0)) return N;
4682 // See if the modified node already exists.
4683 void *InsertPos = 0;
4684 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4687 // Nope it doesn't. Remove the node from its current place in the maps.
4689 if (!RemoveNodeFromCSEMaps(N))
4692 // Now we update the operands.
4693 N->OperandList[0].set(Op);
4695 // If this gets put into a CSE map, add it.
4696 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4700 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4701 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4703 // Check to see if there is no change.
4704 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4705 return N; // No operands changed, just return the input node.
4707 // See if the modified node already exists.
4708 void *InsertPos = 0;
4709 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4712 // Nope it doesn't. Remove the node from its current place in the maps.
4714 if (!RemoveNodeFromCSEMaps(N))
4717 // Now we update the operands.
4718 if (N->OperandList[0] != Op1)
4719 N->OperandList[0].set(Op1);
4720 if (N->OperandList[1] != Op2)
4721 N->OperandList[1].set(Op2);
4723 // If this gets put into a CSE map, add it.
4724 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4728 SDNode *SelectionDAG::
4729 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4730 SDValue Ops[] = { Op1, Op2, Op3 };
4731 return UpdateNodeOperands(N, Ops, 3);
4734 SDNode *SelectionDAG::
4735 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4736 SDValue Op3, SDValue Op4) {
4737 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4738 return UpdateNodeOperands(N, Ops, 4);
4741 SDNode *SelectionDAG::
4742 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4743 SDValue Op3, SDValue Op4, SDValue Op5) {
4744 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4745 return UpdateNodeOperands(N, Ops, 5);
4748 SDNode *SelectionDAG::
4749 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4750 assert(N->getNumOperands() == NumOps &&
4751 "Update with wrong number of operands");
4753 // Check to see if there is no change.
4754 bool AnyChange = false;
4755 for (unsigned i = 0; i != NumOps; ++i) {
4756 if (Ops[i] != N->getOperand(i)) {
4762 // No operands changed, just return the input node.
4763 if (!AnyChange) return N;
4765 // See if the modified node already exists.
4766 void *InsertPos = 0;
4767 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4770 // Nope it doesn't. Remove the node from its current place in the maps.
4772 if (!RemoveNodeFromCSEMaps(N))
4775 // Now we update the operands.
4776 for (unsigned i = 0; i != NumOps; ++i)
4777 if (N->OperandList[i] != Ops[i])
4778 N->OperandList[i].set(Ops[i]);
4780 // If this gets put into a CSE map, add it.
4781 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4785 /// DropOperands - Release the operands and set this node to have
4787 void SDNode::DropOperands() {
4788 // Unlike the code in MorphNodeTo that does this, we don't need to
4789 // watch for dead nodes here.
4790 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4796 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4799 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4801 SDVTList VTs = getVTList(VT);
4802 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4805 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4806 EVT VT, SDValue Op1) {
4807 SDVTList VTs = getVTList(VT);
4808 SDValue Ops[] = { Op1 };
4809 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4812 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4813 EVT VT, SDValue Op1,
4815 SDVTList VTs = getVTList(VT);
4816 SDValue Ops[] = { Op1, Op2 };
4817 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4820 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4821 EVT VT, SDValue Op1,
4822 SDValue Op2, SDValue Op3) {
4823 SDVTList VTs = getVTList(VT);
4824 SDValue Ops[] = { Op1, Op2, Op3 };
4825 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4828 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4829 EVT VT, const SDValue *Ops,
4831 SDVTList VTs = getVTList(VT);
4832 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4835 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4836 EVT VT1, EVT VT2, const SDValue *Ops,
4838 SDVTList VTs = getVTList(VT1, VT2);
4839 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4842 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4844 SDVTList VTs = getVTList(VT1, VT2);
4845 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4848 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4849 EVT VT1, EVT VT2, EVT VT3,
4850 const SDValue *Ops, unsigned NumOps) {
4851 SDVTList VTs = getVTList(VT1, VT2, VT3);
4852 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4855 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4856 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4857 const SDValue *Ops, unsigned NumOps) {
4858 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4859 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4862 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4865 SDVTList VTs = getVTList(VT1, VT2);
4866 SDValue Ops[] = { Op1 };
4867 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4870 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4872 SDValue Op1, SDValue Op2) {
4873 SDVTList VTs = getVTList(VT1, VT2);
4874 SDValue Ops[] = { Op1, Op2 };
4875 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4878 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4880 SDValue Op1, SDValue Op2,
4882 SDVTList VTs = getVTList(VT1, VT2);
4883 SDValue Ops[] = { Op1, Op2, Op3 };
4884 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4887 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4888 EVT VT1, EVT VT2, EVT VT3,
4889 SDValue Op1, SDValue Op2,
4891 SDVTList VTs = getVTList(VT1, VT2, VT3);
4892 SDValue Ops[] = { Op1, Op2, Op3 };
4893 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4896 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4897 SDVTList VTs, const SDValue *Ops,
4899 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4900 // Reset the NodeID to -1.
4905 /// MorphNodeTo - This *mutates* the specified node to have the specified
4906 /// return type, opcode, and operands.
4908 /// Note that MorphNodeTo returns the resultant node. If there is already a
4909 /// node of the specified opcode and operands, it returns that node instead of
4910 /// the current one. Note that the DebugLoc need not be the same.
4912 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4913 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4914 /// node, and because it doesn't require CSE recalculation for any of
4915 /// the node's users.
4917 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4918 SDVTList VTs, const SDValue *Ops,
4920 // If an identical node already exists, use it.
4922 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4923 FoldingSetNodeID ID;
4924 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4925 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4929 if (!RemoveNodeFromCSEMaps(N))
4932 // Start the morphing.
4934 N->ValueList = VTs.VTs;
4935 N->NumValues = VTs.NumVTs;
4937 // Clear the operands list, updating used nodes to remove this from their
4938 // use list. Keep track of any operands that become dead as a result.
4939 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4940 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4942 SDNode *Used = Use.getNode();
4944 if (Used->use_empty())
4945 DeadNodeSet.insert(Used);
4948 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4949 // Initialize the memory references information.
4950 MN->setMemRefs(0, 0);
4951 // If NumOps is larger than the # of operands we can have in a
4952 // MachineSDNode, reallocate the operand list.
4953 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4954 if (MN->OperandsNeedDelete)
4955 delete[] MN->OperandList;
4956 if (NumOps > array_lengthof(MN->LocalOperands))
4957 // We're creating a final node that will live unmorphed for the
4958 // remainder of the current SelectionDAG iteration, so we can allocate
4959 // the operands directly out of a pool with no recycling metadata.
4960 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4963 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4964 MN->OperandsNeedDelete = false;
4966 MN->InitOperands(MN->OperandList, Ops, NumOps);
4968 // If NumOps is larger than the # of operands we currently have, reallocate
4969 // the operand list.
4970 if (NumOps > N->NumOperands) {
4971 if (N->OperandsNeedDelete)
4972 delete[] N->OperandList;
4973 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4974 N->OperandsNeedDelete = true;
4976 N->InitOperands(N->OperandList, Ops, NumOps);
4979 // Delete any nodes that are still dead after adding the uses for the
4981 if (!DeadNodeSet.empty()) {
4982 SmallVector<SDNode *, 16> DeadNodes;
4983 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4984 E = DeadNodeSet.end(); I != E; ++I)
4985 if ((*I)->use_empty())
4986 DeadNodes.push_back(*I);
4987 RemoveDeadNodes(DeadNodes);
4991 CSEMap.InsertNode(N, IP); // Memoize the new node.
4996 /// getMachineNode - These are used for target selectors to create a new node
4997 /// with specified return type(s), MachineInstr opcode, and operands.
4999 /// Note that getMachineNode returns the resultant node. If there is already a
5000 /// node of the specified opcode and operands, it returns that node instead of
5001 /// the current one.
5003 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5004 SDVTList VTs = getVTList(VT);
5005 return getMachineNode(Opcode, dl, VTs, 0, 0);
5009 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5010 SDVTList VTs = getVTList(VT);
5011 SDValue Ops[] = { Op1 };
5012 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5016 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5017 SDValue Op1, SDValue Op2) {
5018 SDVTList VTs = getVTList(VT);
5019 SDValue Ops[] = { Op1, Op2 };
5020 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5024 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5025 SDValue Op1, SDValue Op2, SDValue Op3) {
5026 SDVTList VTs = getVTList(VT);
5027 SDValue Ops[] = { Op1, Op2, Op3 };
5028 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5032 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5033 const SDValue *Ops, unsigned NumOps) {
5034 SDVTList VTs = getVTList(VT);
5035 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5039 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5040 SDVTList VTs = getVTList(VT1, VT2);
5041 return getMachineNode(Opcode, dl, VTs, 0, 0);
5045 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5046 EVT VT1, EVT VT2, SDValue Op1) {
5047 SDVTList VTs = getVTList(VT1, VT2);
5048 SDValue Ops[] = { Op1 };
5049 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5053 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5054 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5055 SDVTList VTs = getVTList(VT1, VT2);
5056 SDValue Ops[] = { Op1, Op2 };
5057 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5061 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5062 EVT VT1, EVT VT2, SDValue Op1,
5063 SDValue Op2, SDValue Op3) {
5064 SDVTList VTs = getVTList(VT1, VT2);
5065 SDValue Ops[] = { Op1, Op2, Op3 };
5066 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5070 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5072 const SDValue *Ops, unsigned NumOps) {
5073 SDVTList VTs = getVTList(VT1, VT2);
5074 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5078 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5079 EVT VT1, EVT VT2, EVT VT3,
5080 SDValue Op1, SDValue Op2) {
5081 SDVTList VTs = getVTList(VT1, VT2, VT3);
5082 SDValue Ops[] = { Op1, Op2 };
5083 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5087 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5088 EVT VT1, EVT VT2, EVT VT3,
5089 SDValue Op1, SDValue Op2, SDValue Op3) {
5090 SDVTList VTs = getVTList(VT1, VT2, VT3);
5091 SDValue Ops[] = { Op1, Op2, Op3 };
5092 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5096 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5097 EVT VT1, EVT VT2, EVT VT3,
5098 const SDValue *Ops, unsigned NumOps) {
5099 SDVTList VTs = getVTList(VT1, VT2, VT3);
5100 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5104 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5105 EVT VT2, EVT VT3, EVT VT4,
5106 const SDValue *Ops, unsigned NumOps) {
5107 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5108 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5112 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5113 const std::vector<EVT> &ResultTys,
5114 const SDValue *Ops, unsigned NumOps) {
5115 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5116 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5120 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5121 const SDValue *Ops, unsigned NumOps) {
5122 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5127 FoldingSetNodeID ID;
5128 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5130 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5131 return cast<MachineSDNode>(E);
5134 // Allocate a new MachineSDNode.
5135 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5137 // Initialize the operands list.
5138 if (NumOps > array_lengthof(N->LocalOperands))
5139 // We're creating a final node that will live unmorphed for the
5140 // remainder of the current SelectionDAG iteration, so we can allocate
5141 // the operands directly out of a pool with no recycling metadata.
5142 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5145 N->InitOperands(N->LocalOperands, Ops, NumOps);
5146 N->OperandsNeedDelete = false;
5149 CSEMap.InsertNode(N, IP);
5151 AllNodes.push_back(N);
5153 VerifyMachineNode(N);
5158 /// getTargetExtractSubreg - A convenience function for creating
5159 /// TargetOpcode::EXTRACT_SUBREG nodes.
5161 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5163 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5164 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5165 VT, Operand, SRIdxVal);
5166 return SDValue(Subreg, 0);
5169 /// getTargetInsertSubreg - A convenience function for creating
5170 /// TargetOpcode::INSERT_SUBREG nodes.
5172 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5173 SDValue Operand, SDValue Subreg) {
5174 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5175 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5176 VT, Operand, Subreg, SRIdxVal);
5177 return SDValue(Result, 0);
5180 /// getNodeIfExists - Get the specified node if it's already available, or
5181 /// else return NULL.
5182 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5183 const SDValue *Ops, unsigned NumOps) {
5184 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5185 FoldingSetNodeID ID;
5186 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5188 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5194 /// getDbgValue - Creates a SDDbgValue node.
5197 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5198 DebugLoc DL, unsigned O) {
5199 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5203 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5204 DebugLoc DL, unsigned O) {
5205 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5209 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5210 DebugLoc DL, unsigned O) {
5211 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5216 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5217 /// pointed to by a use iterator is deleted, increment the use iterator
5218 /// so that it doesn't dangle.
5220 /// This class also manages a "downlink" DAGUpdateListener, to forward
5221 /// messages to ReplaceAllUsesWith's callers.
5223 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5224 SelectionDAG::DAGUpdateListener *DownLink;
5225 SDNode::use_iterator &UI;
5226 SDNode::use_iterator &UE;
5228 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5229 // Increment the iterator as needed.
5230 while (UI != UE && N == *UI)
5233 // Then forward the message.
5234 if (DownLink) DownLink->NodeDeleted(N, E);
5237 virtual void NodeUpdated(SDNode *N) {
5238 // Just forward the message.
5239 if (DownLink) DownLink->NodeUpdated(N);
5243 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5244 SDNode::use_iterator &ui,
5245 SDNode::use_iterator &ue)
5246 : DownLink(dl), UI(ui), UE(ue) {}
5251 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5252 /// This can cause recursive merging of nodes in the DAG.
5254 /// This version assumes From has a single result value.
5256 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5257 DAGUpdateListener *UpdateListener) {
5258 SDNode *From = FromN.getNode();
5259 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5260 "Cannot replace with this method!");
5261 assert(From != To.getNode() && "Cannot replace uses of with self");
5263 // Iterate over all the existing uses of From. New uses will be added
5264 // to the beginning of the use list, which we avoid visiting.
5265 // This specifically avoids visiting uses of From that arise while the
5266 // replacement is happening, because any such uses would be the result
5267 // of CSE: If an existing node looks like From after one of its operands
5268 // is replaced by To, we don't want to replace of all its users with To
5269 // too. See PR3018 for more info.
5270 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5271 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5275 // This node is about to morph, remove its old self from the CSE maps.
5276 RemoveNodeFromCSEMaps(User);
5278 // A user can appear in a use list multiple times, and when this
5279 // happens the uses are usually next to each other in the list.
5280 // To help reduce the number of CSE recomputations, process all
5281 // the uses of this user that we can find this way.
5283 SDUse &Use = UI.getUse();
5286 } while (UI != UE && *UI == User);
5288 // Now that we have modified User, add it back to the CSE maps. If it
5289 // already exists there, recursively merge the results together.
5290 AddModifiedNodeToCSEMaps(User, &Listener);
5294 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5295 /// This can cause recursive merging of nodes in the DAG.
5297 /// This version assumes that for each value of From, there is a
5298 /// corresponding value in To in the same position with the same type.
5300 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5301 DAGUpdateListener *UpdateListener) {
5303 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5304 assert((!From->hasAnyUseOfValue(i) ||
5305 From->getValueType(i) == To->getValueType(i)) &&
5306 "Cannot use this version of ReplaceAllUsesWith!");
5309 // Handle the trivial case.
5313 // Iterate over just the existing users of From. See the comments in
5314 // the ReplaceAllUsesWith above.
5315 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5316 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5320 // This node is about to morph, remove its old self from the CSE maps.
5321 RemoveNodeFromCSEMaps(User);
5323 // A user can appear in a use list multiple times, and when this
5324 // happens the uses are usually next to each other in the list.
5325 // To help reduce the number of CSE recomputations, process all
5326 // the uses of this user that we can find this way.
5328 SDUse &Use = UI.getUse();
5331 } while (UI != UE && *UI == User);
5333 // Now that we have modified User, add it back to the CSE maps. If it
5334 // already exists there, recursively merge the results together.
5335 AddModifiedNodeToCSEMaps(User, &Listener);
5339 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5340 /// This can cause recursive merging of nodes in the DAG.
5342 /// This version can replace From with any result values. To must match the
5343 /// number and types of values returned by From.
5344 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5346 DAGUpdateListener *UpdateListener) {
5347 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5348 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5350 // Iterate over just the existing users of From. See the comments in
5351 // the ReplaceAllUsesWith above.
5352 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5353 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5357 // This node is about to morph, remove its old self from the CSE maps.
5358 RemoveNodeFromCSEMaps(User);
5360 // A user can appear in a use list multiple times, and when this
5361 // happens the uses are usually next to each other in the list.
5362 // To help reduce the number of CSE recomputations, process all
5363 // the uses of this user that we can find this way.
5365 SDUse &Use = UI.getUse();
5366 const SDValue &ToOp = To[Use.getResNo()];
5369 } while (UI != UE && *UI == User);
5371 // Now that we have modified User, add it back to the CSE maps. If it
5372 // already exists there, recursively merge the results together.
5373 AddModifiedNodeToCSEMaps(User, &Listener);
5377 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5378 /// uses of other values produced by From.getNode() alone. The Deleted
5379 /// vector is handled the same way as for ReplaceAllUsesWith.
5380 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5381 DAGUpdateListener *UpdateListener){
5382 // Handle the really simple, really trivial case efficiently.
5383 if (From == To) return;
5385 // Handle the simple, trivial, case efficiently.
5386 if (From.getNode()->getNumValues() == 1) {
5387 ReplaceAllUsesWith(From, To, UpdateListener);
5391 // Iterate over just the existing users of From. See the comments in
5392 // the ReplaceAllUsesWith above.
5393 SDNode::use_iterator UI = From.getNode()->use_begin(),
5394 UE = From.getNode()->use_end();
5395 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5398 bool UserRemovedFromCSEMaps = false;
5400 // A user can appear in a use list multiple times, and when this
5401 // happens the uses are usually next to each other in the list.
5402 // To help reduce the number of CSE recomputations, process all
5403 // the uses of this user that we can find this way.
5405 SDUse &Use = UI.getUse();
5407 // Skip uses of different values from the same node.
5408 if (Use.getResNo() != From.getResNo()) {
5413 // If this node hasn't been modified yet, it's still in the CSE maps,
5414 // so remove its old self from the CSE maps.
5415 if (!UserRemovedFromCSEMaps) {
5416 RemoveNodeFromCSEMaps(User);
5417 UserRemovedFromCSEMaps = true;
5422 } while (UI != UE && *UI == User);
5424 // We are iterating over all uses of the From node, so if a use
5425 // doesn't use the specific value, no changes are made.
5426 if (!UserRemovedFromCSEMaps)
5429 // Now that we have modified User, add it back to the CSE maps. If it
5430 // already exists there, recursively merge the results together.
5431 AddModifiedNodeToCSEMaps(User, &Listener);
5436 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5437 /// to record information about a use.
5444 /// operator< - Sort Memos by User.
5445 bool operator<(const UseMemo &L, const UseMemo &R) {
5446 return (intptr_t)L.User < (intptr_t)R.User;
5450 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5451 /// uses of other values produced by From.getNode() alone. The same value
5452 /// may appear in both the From and To list. The Deleted vector is
5453 /// handled the same way as for ReplaceAllUsesWith.
5454 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5457 DAGUpdateListener *UpdateListener){
5458 // Handle the simple, trivial case efficiently.
5460 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5462 // Read up all the uses and make records of them. This helps
5463 // processing new uses that are introduced during the
5464 // replacement process.
5465 SmallVector<UseMemo, 4> Uses;
5466 for (unsigned i = 0; i != Num; ++i) {
5467 unsigned FromResNo = From[i].getResNo();
5468 SDNode *FromNode = From[i].getNode();
5469 for (SDNode::use_iterator UI = FromNode->use_begin(),
5470 E = FromNode->use_end(); UI != E; ++UI) {
5471 SDUse &Use = UI.getUse();
5472 if (Use.getResNo() == FromResNo) {
5473 UseMemo Memo = { *UI, i, &Use };
5474 Uses.push_back(Memo);
5479 // Sort the uses, so that all the uses from a given User are together.
5480 std::sort(Uses.begin(), Uses.end());
5482 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5483 UseIndex != UseIndexEnd; ) {
5484 // We know that this user uses some value of From. If it is the right
5485 // value, update it.
5486 SDNode *User = Uses[UseIndex].User;
5488 // This node is about to morph, remove its old self from the CSE maps.
5489 RemoveNodeFromCSEMaps(User);
5491 // The Uses array is sorted, so all the uses for a given User
5492 // are next to each other in the list.
5493 // To help reduce the number of CSE recomputations, process all
5494 // the uses of this user that we can find this way.
5496 unsigned i = Uses[UseIndex].Index;
5497 SDUse &Use = *Uses[UseIndex].Use;
5501 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5503 // Now that we have modified User, add it back to the CSE maps. If it
5504 // already exists there, recursively merge the results together.
5505 AddModifiedNodeToCSEMaps(User, UpdateListener);
5509 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5510 /// based on their topological order. It returns the maximum id and a vector
5511 /// of the SDNodes* in assigned order by reference.
5512 unsigned SelectionDAG::AssignTopologicalOrder() {
5514 unsigned DAGSize = 0;
5516 // SortedPos tracks the progress of the algorithm. Nodes before it are
5517 // sorted, nodes after it are unsorted. When the algorithm completes
5518 // it is at the end of the list.
5519 allnodes_iterator SortedPos = allnodes_begin();
5521 // Visit all the nodes. Move nodes with no operands to the front of
5522 // the list immediately. Annotate nodes that do have operands with their
5523 // operand count. Before we do this, the Node Id fields of the nodes
5524 // may contain arbitrary values. After, the Node Id fields for nodes
5525 // before SortedPos will contain the topological sort index, and the
5526 // Node Id fields for nodes At SortedPos and after will contain the
5527 // count of outstanding operands.
5528 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5531 unsigned Degree = N->getNumOperands();
5533 // A node with no uses, add it to the result array immediately.
5534 N->setNodeId(DAGSize++);
5535 allnodes_iterator Q = N;
5537 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5538 assert(SortedPos != AllNodes.end() && "Overran node list");
5541 // Temporarily use the Node Id as scratch space for the degree count.
5542 N->setNodeId(Degree);
5546 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5547 // such that by the time the end is reached all nodes will be sorted.
5548 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5551 // N is in sorted position, so all its uses have one less operand
5552 // that needs to be sorted.
5553 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5556 unsigned Degree = P->getNodeId();
5557 assert(Degree != 0 && "Invalid node degree");
5560 // All of P's operands are sorted, so P may sorted now.
5561 P->setNodeId(DAGSize++);
5563 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5564 assert(SortedPos != AllNodes.end() && "Overran node list");
5567 // Update P's outstanding operand count.
5568 P->setNodeId(Degree);
5571 if (I == SortedPos) {
5574 dbgs() << "Overran sorted position:\n";
5577 llvm_unreachable(0);
5581 assert(SortedPos == AllNodes.end() &&
5582 "Topological sort incomplete!");
5583 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5584 "First node in topological sort is not the entry token!");
5585 assert(AllNodes.front().getNodeId() == 0 &&
5586 "First node in topological sort has non-zero id!");
5587 assert(AllNodes.front().getNumOperands() == 0 &&
5588 "First node in topological sort has operands!");
5589 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5590 "Last node in topologic sort has unexpected id!");
5591 assert(AllNodes.back().use_empty() &&
5592 "Last node in topologic sort has users!");
5593 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5597 /// AssignOrdering - Assign an order to the SDNode.
5598 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5599 assert(SD && "Trying to assign an order to a null node!");
5600 Ordering->add(SD, Order);
5603 /// GetOrdering - Get the order for the SDNode.
5604 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5605 assert(SD && "Trying to get the order of a null node!");
5606 return Ordering->getOrder(SD);
5609 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5610 /// value is produced by SD.
5611 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5612 DbgInfo->add(DB, SD, isParameter);
5614 SD->setHasDebugValue(true);
5617 /// TransferDbgValues - Transfer SDDbgValues.
5618 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5619 if (From == To || !From.getNode()->getHasDebugValue())
5621 SDNode *FromNode = From.getNode();
5622 SDNode *ToNode = To.getNode();
5623 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5624 SmallVector<SDDbgValue *, 2> ClonedDVs;
5625 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5627 SDDbgValue *Dbg = *I;
5628 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5629 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5630 Dbg->getOffset(), Dbg->getDebugLoc(),
5632 ClonedDVs.push_back(Clone);
5635 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5636 E = ClonedDVs.end(); I != E; ++I)
5637 AddDbgValue(*I, ToNode, false);
5640 //===----------------------------------------------------------------------===//
5642 //===----------------------------------------------------------------------===//
5644 HandleSDNode::~HandleSDNode() {
5648 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5649 const GlobalValue *GA,
5650 EVT VT, int64_t o, unsigned char TF)
5651 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5655 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5656 MachineMemOperand *mmo)
5657 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5658 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5659 MMO->isNonTemporal());
5660 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5661 assert(isNonTemporal() == MMO->isNonTemporal() &&
5662 "Non-temporal encoding error!");
5663 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5666 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5667 const SDValue *Ops, unsigned NumOps, EVT memvt,
5668 MachineMemOperand *mmo)
5669 : SDNode(Opc, dl, VTs, Ops, NumOps),
5670 MemoryVT(memvt), MMO(mmo) {
5671 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5672 MMO->isNonTemporal());
5673 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5674 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5677 /// Profile - Gather unique data for the node.
5679 void SDNode::Profile(FoldingSetNodeID &ID) const {
5680 AddNodeIDNode(ID, this);
5685 std::vector<EVT> VTs;
5688 VTs.reserve(MVT::LAST_VALUETYPE);
5689 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5690 VTs.push_back(MVT((MVT::SimpleValueType)i));
5695 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5696 static ManagedStatic<EVTArray> SimpleVTArray;
5697 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5699 /// getValueTypeList - Return a pointer to the specified value type.
5701 const EVT *SDNode::getValueTypeList(EVT VT) {
5702 if (VT.isExtended()) {
5703 sys::SmartScopedLock<true> Lock(*VTMutex);
5704 return &(*EVTs->insert(VT).first);
5706 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5707 "Value type out of range!");
5708 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5712 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5713 /// indicated value. This method ignores uses of other values defined by this
5715 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5716 assert(Value < getNumValues() && "Bad value!");
5718 // TODO: Only iterate over uses of a given value of the node
5719 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5720 if (UI.getUse().getResNo() == Value) {
5727 // Found exactly the right number of uses?
5732 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5733 /// value. This method ignores uses of other values defined by this operation.
5734 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5735 assert(Value < getNumValues() && "Bad value!");
5737 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5738 if (UI.getUse().getResNo() == Value)
5745 /// isOnlyUserOf - Return true if this node is the only use of N.
5747 bool SDNode::isOnlyUserOf(SDNode *N) const {
5749 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5760 /// isOperand - Return true if this node is an operand of N.
5762 bool SDValue::isOperandOf(SDNode *N) const {
5763 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5764 if (*this == N->getOperand(i))
5769 bool SDNode::isOperandOf(SDNode *N) const {
5770 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5771 if (this == N->OperandList[i].getNode())
5776 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5777 /// be a chain) reaches the specified operand without crossing any
5778 /// side-effecting instructions on any chain path. In practice, this looks
5779 /// through token factors and non-volatile loads. In order to remain efficient,
5780 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5781 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5782 unsigned Depth) const {
5783 if (*this == Dest) return true;
5785 // Don't search too deeply, we just want to be able to see through
5786 // TokenFactor's etc.
5787 if (Depth == 0) return false;
5789 // If this is a token factor, all inputs to the TF happen in parallel. If any
5790 // of the operands of the TF does not reach dest, then we cannot do the xform.
5791 if (getOpcode() == ISD::TokenFactor) {
5792 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5793 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5798 // Loads don't have side effects, look through them.
5799 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5800 if (!Ld->isVolatile())
5801 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5806 /// hasPredecessor - Return true if N is a predecessor of this node.
5807 /// N is either an operand of this node, or can be reached by recursively
5808 /// traversing up the operands.
5809 /// NOTE: This is an expensive method. Use it carefully.
5810 bool SDNode::hasPredecessor(const SDNode *N) const {
5811 SmallPtrSet<const SDNode *, 32> Visited;
5812 SmallVector<const SDNode *, 16> Worklist;
5813 return hasPredecessorHelper(N, Visited, Worklist);
5816 bool SDNode::hasPredecessorHelper(const SDNode *N,
5817 SmallPtrSet<const SDNode *, 32> &Visited,
5818 SmallVector<const SDNode *, 16> &Worklist) const {
5819 if (Visited.empty()) {
5820 Worklist.push_back(this);
5822 // Take a look in the visited set. If we've already encountered this node
5823 // we needn't search further.
5824 if (Visited.count(N))
5828 // Haven't visited N yet. Continue the search.
5829 while (!Worklist.empty()) {
5830 const SDNode *M = Worklist.pop_back_val();
5831 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5832 SDNode *Op = M->getOperand(i).getNode();
5833 if (Visited.insert(Op))
5834 Worklist.push_back(Op);
5843 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5844 assert(Num < NumOperands && "Invalid child # of SDNode!");
5845 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5848 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5849 switch (getOpcode()) {
5851 if (getOpcode() < ISD::BUILTIN_OP_END)
5852 return "<<Unknown DAG Node>>";
5853 if (isMachineOpcode()) {
5855 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5856 if (getMachineOpcode() < TII->getNumOpcodes())
5857 return TII->get(getMachineOpcode()).getName();
5858 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5861 const TargetLowering &TLI = G->getTargetLoweringInfo();
5862 const char *Name = TLI.getTargetNodeName(getOpcode());
5863 if (Name) return Name;
5864 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5866 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5869 case ISD::DELETED_NODE:
5870 return "<<Deleted Node!>>";
5872 case ISD::PREFETCH: return "Prefetch";
5873 case ISD::MEMBARRIER: return "MemBarrier";
5874 case ISD::ATOMIC_FENCE: return "AtomicFence";
5875 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5876 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5877 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5878 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5879 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5880 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5881 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5882 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5883 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5884 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5885 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5886 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5887 case ISD::ATOMIC_LOAD: return "AtomicLoad";
5888 case ISD::ATOMIC_STORE: return "AtomicStore";
5889 case ISD::PCMARKER: return "PCMarker";
5890 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5891 case ISD::SRCVALUE: return "SrcValue";
5892 case ISD::MDNODE_SDNODE: return "MDNode";
5893 case ISD::EntryToken: return "EntryToken";
5894 case ISD::TokenFactor: return "TokenFactor";
5895 case ISD::AssertSext: return "AssertSext";
5896 case ISD::AssertZext: return "AssertZext";
5898 case ISD::BasicBlock: return "BasicBlock";
5899 case ISD::VALUETYPE: return "ValueType";
5900 case ISD::Register: return "Register";
5902 case ISD::Constant: return "Constant";
5903 case ISD::ConstantFP: return "ConstantFP";
5904 case ISD::GlobalAddress: return "GlobalAddress";
5905 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5906 case ISD::FrameIndex: return "FrameIndex";
5907 case ISD::JumpTable: return "JumpTable";
5908 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5909 case ISD::RETURNADDR: return "RETURNADDR";
5910 case ISD::FRAMEADDR: return "FRAMEADDR";
5911 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5912 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5913 case ISD::LSDAADDR: return "LSDAADDR";
5914 case ISD::EHSELECTION: return "EHSELECTION";
5915 case ISD::EH_RETURN: return "EH_RETURN";
5916 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5917 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5918 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5919 case ISD::ConstantPool: return "ConstantPool";
5920 case ISD::ExternalSymbol: return "ExternalSymbol";
5921 case ISD::BlockAddress: return "BlockAddress";
5922 case ISD::INTRINSIC_WO_CHAIN:
5923 case ISD::INTRINSIC_VOID:
5924 case ISD::INTRINSIC_W_CHAIN: {
5925 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5926 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5927 if (IID < Intrinsic::num_intrinsics)
5928 return Intrinsic::getName((Intrinsic::ID)IID);
5929 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5930 return TII->getName(IID);
5931 llvm_unreachable("Invalid intrinsic ID");
5934 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5935 case ISD::TargetConstant: return "TargetConstant";
5936 case ISD::TargetConstantFP:return "TargetConstantFP";
5937 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5938 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5939 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5940 case ISD::TargetJumpTable: return "TargetJumpTable";
5941 case ISD::TargetConstantPool: return "TargetConstantPool";
5942 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5943 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5945 case ISD::CopyToReg: return "CopyToReg";
5946 case ISD::CopyFromReg: return "CopyFromReg";
5947 case ISD::UNDEF: return "undef";
5948 case ISD::MERGE_VALUES: return "merge_values";
5949 case ISD::INLINEASM: return "inlineasm";
5950 case ISD::EH_LABEL: return "eh_label";
5951 case ISD::HANDLENODE: return "handlenode";
5954 case ISD::FABS: return "fabs";
5955 case ISD::FNEG: return "fneg";
5956 case ISD::FSQRT: return "fsqrt";
5957 case ISD::FSIN: return "fsin";
5958 case ISD::FCOS: return "fcos";
5959 case ISD::FTRUNC: return "ftrunc";
5960 case ISD::FFLOOR: return "ffloor";
5961 case ISD::FCEIL: return "fceil";
5962 case ISD::FRINT: return "frint";
5963 case ISD::FNEARBYINT: return "fnearbyint";
5964 case ISD::FEXP: return "fexp";
5965 case ISD::FEXP2: return "fexp2";
5966 case ISD::FLOG: return "flog";
5967 case ISD::FLOG2: return "flog2";
5968 case ISD::FLOG10: return "flog10";
5971 case ISD::ADD: return "add";
5972 case ISD::SUB: return "sub";
5973 case ISD::MUL: return "mul";
5974 case ISD::MULHU: return "mulhu";
5975 case ISD::MULHS: return "mulhs";
5976 case ISD::SDIV: return "sdiv";
5977 case ISD::UDIV: return "udiv";
5978 case ISD::SREM: return "srem";
5979 case ISD::UREM: return "urem";
5980 case ISD::SMUL_LOHI: return "smul_lohi";
5981 case ISD::UMUL_LOHI: return "umul_lohi";
5982 case ISD::SDIVREM: return "sdivrem";
5983 case ISD::UDIVREM: return "udivrem";
5984 case ISD::AND: return "and";
5985 case ISD::OR: return "or";
5986 case ISD::XOR: return "xor";
5987 case ISD::SHL: return "shl";
5988 case ISD::SRA: return "sra";
5989 case ISD::SRL: return "srl";
5990 case ISD::ROTL: return "rotl";
5991 case ISD::ROTR: return "rotr";
5992 case ISD::FADD: return "fadd";
5993 case ISD::FSUB: return "fsub";
5994 case ISD::FMUL: return "fmul";
5995 case ISD::FDIV: return "fdiv";
5996 case ISD::FMA: return "fma";
5997 case ISD::FREM: return "frem";
5998 case ISD::FCOPYSIGN: return "fcopysign";
5999 case ISD::FGETSIGN: return "fgetsign";
6000 case ISD::FPOW: return "fpow";
6002 case ISD::FPOWI: return "fpowi";
6003 case ISD::SETCC: return "setcc";
6004 case ISD::SELECT: return "select";
6005 case ISD::VSELECT: return "vselect";
6006 case ISD::SELECT_CC: return "select_cc";
6007 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
6008 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
6009 case ISD::CONCAT_VECTORS: return "concat_vectors";
6010 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
6011 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
6012 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
6013 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
6014 case ISD::CARRY_FALSE: return "carry_false";
6015 case ISD::ADDC: return "addc";
6016 case ISD::ADDE: return "adde";
6017 case ISD::SADDO: return "saddo";
6018 case ISD::UADDO: return "uaddo";
6019 case ISD::SSUBO: return "ssubo";
6020 case ISD::USUBO: return "usubo";
6021 case ISD::SMULO: return "smulo";
6022 case ISD::UMULO: return "umulo";
6023 case ISD::SUBC: return "subc";
6024 case ISD::SUBE: return "sube";
6025 case ISD::SHL_PARTS: return "shl_parts";
6026 case ISD::SRA_PARTS: return "sra_parts";
6027 case ISD::SRL_PARTS: return "srl_parts";
6029 // Conversion operators.
6030 case ISD::SIGN_EXTEND: return "sign_extend";
6031 case ISD::ZERO_EXTEND: return "zero_extend";
6032 case ISD::ANY_EXTEND: return "any_extend";
6033 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
6034 case ISD::TRUNCATE: return "truncate";
6035 case ISD::FP_ROUND: return "fp_round";
6036 case ISD::FLT_ROUNDS_: return "flt_rounds";
6037 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
6038 case ISD::FP_EXTEND: return "fp_extend";
6040 case ISD::SINT_TO_FP: return "sint_to_fp";
6041 case ISD::UINT_TO_FP: return "uint_to_fp";
6042 case ISD::FP_TO_SINT: return "fp_to_sint";
6043 case ISD::FP_TO_UINT: return "fp_to_uint";
6044 case ISD::BITCAST: return "bitcast";
6045 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
6046 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
6048 case ISD::CONVERT_RNDSAT: {
6049 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
6050 default: llvm_unreachable("Unknown cvt code!");
6051 case ISD::CVT_FF: return "cvt_ff";
6052 case ISD::CVT_FS: return "cvt_fs";
6053 case ISD::CVT_FU: return "cvt_fu";
6054 case ISD::CVT_SF: return "cvt_sf";
6055 case ISD::CVT_UF: return "cvt_uf";
6056 case ISD::CVT_SS: return "cvt_ss";
6057 case ISD::CVT_SU: return "cvt_su";
6058 case ISD::CVT_US: return "cvt_us";
6059 case ISD::CVT_UU: return "cvt_uu";
6063 // Control flow instructions
6064 case ISD::BR: return "br";
6065 case ISD::BRIND: return "brind";
6066 case ISD::BR_JT: return "br_jt";
6067 case ISD::BRCOND: return "brcond";
6068 case ISD::BR_CC: return "br_cc";
6069 case ISD::CALLSEQ_START: return "callseq_start";
6070 case ISD::CALLSEQ_END: return "callseq_end";
6073 case ISD::LOAD: return "load";
6074 case ISD::STORE: return "store";
6075 case ISD::VAARG: return "vaarg";
6076 case ISD::VACOPY: return "vacopy";
6077 case ISD::VAEND: return "vaend";
6078 case ISD::VASTART: return "vastart";
6079 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
6080 case ISD::EXTRACT_ELEMENT: return "extract_element";
6081 case ISD::BUILD_PAIR: return "build_pair";
6082 case ISD::STACKSAVE: return "stacksave";
6083 case ISD::STACKRESTORE: return "stackrestore";
6084 case ISD::TRAP: return "trap";
6087 case ISD::BSWAP: return "bswap";
6088 case ISD::CTPOP: return "ctpop";
6089 case ISD::CTTZ: return "cttz";
6090 case ISD::CTLZ: return "ctlz";
6093 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
6094 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
6097 switch (cast<CondCodeSDNode>(this)->get()) {
6098 default: llvm_unreachable("Unknown setcc condition!");
6099 case ISD::SETOEQ: return "setoeq";
6100 case ISD::SETOGT: return "setogt";
6101 case ISD::SETOGE: return "setoge";
6102 case ISD::SETOLT: return "setolt";
6103 case ISD::SETOLE: return "setole";
6104 case ISD::SETONE: return "setone";
6106 case ISD::SETO: return "seto";
6107 case ISD::SETUO: return "setuo";
6108 case ISD::SETUEQ: return "setue";
6109 case ISD::SETUGT: return "setugt";
6110 case ISD::SETUGE: return "setuge";
6111 case ISD::SETULT: return "setult";
6112 case ISD::SETULE: return "setule";
6113 case ISD::SETUNE: return "setune";
6115 case ISD::SETEQ: return "seteq";
6116 case ISD::SETGT: return "setgt";
6117 case ISD::SETGE: return "setge";
6118 case ISD::SETLT: return "setlt";
6119 case ISD::SETLE: return "setle";
6120 case ISD::SETNE: return "setne";
6125 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6134 return "<post-inc>";
6136 return "<post-dec>";
6140 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6141 std::string S = "< ";
6155 if (getByValAlign())
6156 S += "byval-align:" + utostr(getByValAlign()) + " ";
6158 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6160 S += "byval-size:" + utostr(getByValSize()) + " ";
6164 void SDNode::dump() const { dump(0); }
6165 void SDNode::dump(const SelectionDAG *G) const {
6170 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6171 OS << (void*)this << ": ";
6173 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6175 if (getValueType(i) == MVT::Other)
6178 OS << getValueType(i).getEVTString();
6180 OS << " = " << getOperationName(G);
6183 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6184 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6185 if (!MN->memoperands_empty()) {
6188 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6189 e = MN->memoperands_end(); i != e; ++i) {
6191 if (llvm::next(i) != e)
6196 } else if (const ShuffleVectorSDNode *SVN =
6197 dyn_cast<ShuffleVectorSDNode>(this)) {
6199 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6200 int Idx = SVN->getMaskElt(i);
6208 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6209 OS << '<' << CSDN->getAPIntValue() << '>';
6210 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6211 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6212 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6213 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6214 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6217 CSDN->getValueAPF().bitcastToAPInt().dump();
6220 } else if (const GlobalAddressSDNode *GADN =
6221 dyn_cast<GlobalAddressSDNode>(this)) {
6222 int64_t offset = GADN->getOffset();
6224 WriteAsOperand(OS, GADN->getGlobal());
6227 OS << " + " << offset;
6229 OS << " " << offset;
6230 if (unsigned int TF = GADN->getTargetFlags())
6231 OS << " [TF=" << TF << ']';
6232 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6233 OS << "<" << FIDN->getIndex() << ">";
6234 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6235 OS << "<" << JTDN->getIndex() << ">";
6236 if (unsigned int TF = JTDN->getTargetFlags())
6237 OS << " [TF=" << TF << ']';
6238 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6239 int offset = CP->getOffset();
6240 if (CP->isMachineConstantPoolEntry())
6241 OS << "<" << *CP->getMachineCPVal() << ">";
6243 OS << "<" << *CP->getConstVal() << ">";
6245 OS << " + " << offset;
6247 OS << " " << offset;
6248 if (unsigned int TF = CP->getTargetFlags())
6249 OS << " [TF=" << TF << ']';
6250 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6252 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6254 OS << LBB->getName() << " ";
6255 OS << (const void*)BBDN->getBasicBlock() << ">";
6256 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6257 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6258 } else if (const ExternalSymbolSDNode *ES =
6259 dyn_cast<ExternalSymbolSDNode>(this)) {
6260 OS << "'" << ES->getSymbol() << "'";
6261 if (unsigned int TF = ES->getTargetFlags())
6262 OS << " [TF=" << TF << ']';
6263 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6265 OS << "<" << M->getValue() << ">";
6268 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6270 OS << "<" << MD->getMD() << ">";
6273 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6274 OS << ":" << N->getVT().getEVTString();
6276 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6277 OS << "<" << *LD->getMemOperand();
6280 switch (LD->getExtensionType()) {
6281 default: doExt = false; break;
6282 case ISD::EXTLOAD: OS << ", anyext"; break;
6283 case ISD::SEXTLOAD: OS << ", sext"; break;
6284 case ISD::ZEXTLOAD: OS << ", zext"; break;
6287 OS << " from " << LD->getMemoryVT().getEVTString();
6289 const char *AM = getIndexedModeName(LD->getAddressingMode());
6294 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6295 OS << "<" << *ST->getMemOperand();
6297 if (ST->isTruncatingStore())
6298 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6300 const char *AM = getIndexedModeName(ST->getAddressingMode());
6305 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6306 OS << "<" << *M->getMemOperand() << ">";
6307 } else if (const BlockAddressSDNode *BA =
6308 dyn_cast<BlockAddressSDNode>(this)) {
6310 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6312 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6314 if (unsigned int TF = BA->getTargetFlags())
6315 OS << " [TF=" << TF << ']';
6319 if (unsigned Order = G->GetOrdering(this))
6320 OS << " [ORD=" << Order << ']';
6322 if (getNodeId() != -1)
6323 OS << " [ID=" << getNodeId() << ']';
6325 DebugLoc dl = getDebugLoc();
6326 if (G && !dl.isUnknown()) {
6328 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6330 // Omit the directory, since it's usually long and uninteresting.
6332 OS << Scope.getFilename();
6335 OS << ':' << dl.getLine();
6336 if (dl.getCol() != 0)
6337 OS << ':' << dl.getCol();
6341 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6343 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6344 if (i) OS << ", "; else OS << " ";
6345 OS << (void*)getOperand(i).getNode();
6346 if (unsigned RN = getOperand(i).getResNo())
6349 print_details(OS, G);
6352 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6353 const SelectionDAG *G, unsigned depth,
6365 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6366 // Don't follow chain operands.
6367 if (N->getOperand(i).getValueType() == MVT::Other)
6370 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6374 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6375 unsigned depth) const {
6376 printrWithDepthHelper(OS, this, G, depth, 0);
6379 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6380 // Don't print impossibly deep things.
6381 printrWithDepth(OS, G, 10);
6384 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6385 printrWithDepth(dbgs(), G, depth);
6388 void SDNode::dumprFull(const SelectionDAG *G) const {
6389 // Don't print impossibly deep things.
6390 dumprWithDepth(G, 10);
6393 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6394 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6395 if (N->getOperand(i).getNode()->hasOneUse())
6396 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6398 dbgs() << "\n" << std::string(indent+2, ' ')
6399 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6403 dbgs().indent(indent);
6407 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6408 assert(N->getNumValues() == 1 &&
6409 "Can't unroll a vector with multiple results!");
6411 EVT VT = N->getValueType(0);
6412 unsigned NE = VT.getVectorNumElements();
6413 EVT EltVT = VT.getVectorElementType();
6414 DebugLoc dl = N->getDebugLoc();
6416 SmallVector<SDValue, 8> Scalars;
6417 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6419 // If ResNE is 0, fully unroll the vector op.
6422 else if (NE > ResNE)
6426 for (i= 0; i != NE; ++i) {
6427 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6428 SDValue Operand = N->getOperand(j);
6429 EVT OperandVT = Operand.getValueType();
6430 if (OperandVT.isVector()) {
6431 // A vector operand; extract a single element.
6432 EVT OperandEltVT = OperandVT.getVectorElementType();
6433 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6436 getConstant(i, TLI.getPointerTy()));
6438 // A scalar operand; just use it as is.
6439 Operands[j] = Operand;
6443 switch (N->getOpcode()) {
6445 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6446 &Operands[0], Operands.size()));
6449 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6450 &Operands[0], Operands.size()));
6457 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6458 getShiftAmountOperand(Operands[0].getValueType(),
6461 case ISD::SIGN_EXTEND_INREG:
6462 case ISD::FP_ROUND_INREG: {
6463 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6464 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6466 getValueType(ExtVT)));
6471 for (; i < ResNE; ++i)
6472 Scalars.push_back(getUNDEF(EltVT));
6474 return getNode(ISD::BUILD_VECTOR, dl,
6475 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6476 &Scalars[0], Scalars.size());
6480 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6481 /// location that is 'Dist' units away from the location that the 'Base' load
6482 /// is loading from.
6483 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6484 unsigned Bytes, int Dist) const {
6485 if (LD->getChain() != Base->getChain())
6487 EVT VT = LD->getValueType(0);
6488 if (VT.getSizeInBits() / 8 != Bytes)
6491 SDValue Loc = LD->getOperand(1);
6492 SDValue BaseLoc = Base->getOperand(1);
6493 if (Loc.getOpcode() == ISD::FrameIndex) {
6494 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6496 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6497 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6498 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6499 int FS = MFI->getObjectSize(FI);
6500 int BFS = MFI->getObjectSize(BFI);
6501 if (FS != BFS || FS != (int)Bytes) return false;
6502 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6506 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6507 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6510 const GlobalValue *GV1 = NULL;
6511 const GlobalValue *GV2 = NULL;
6512 int64_t Offset1 = 0;
6513 int64_t Offset2 = 0;
6514 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6515 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6516 if (isGA1 && isGA2 && GV1 == GV2)
6517 return Offset1 == (Offset2 + Dist*Bytes);
6522 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6523 /// it cannot be inferred.
6524 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6525 // If this is a GlobalAddress + cst, return the alignment.
6526 const GlobalValue *GV;
6527 int64_t GVOffset = 0;
6528 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6529 // If GV has specified alignment, then use it. Otherwise, use the preferred
6531 unsigned Align = GV->getAlignment();
6533 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6534 if (GVar->hasInitializer()) {
6535 const TargetData *TD = TLI.getTargetData();
6536 Align = TD->getPreferredAlignment(GVar);
6540 Align = TLI.getTargetData()->getABITypeAlignment(GV->getType());
6542 return MinAlign(Align, GVOffset);
6545 // If this is a direct reference to a stack slot, use information about the
6546 // stack slot's alignment.
6547 int FrameIdx = 1 << 31;
6548 int64_t FrameOffset = 0;
6549 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6550 FrameIdx = FI->getIndex();
6551 } else if (isBaseWithConstantOffset(Ptr) &&
6552 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6554 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6555 FrameOffset = Ptr.getConstantOperandVal(1);
6558 if (FrameIdx != (1 << 31)) {
6559 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6560 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6568 void SelectionDAG::dump() const {
6569 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6571 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6573 const SDNode *N = I;
6574 if (!N->hasOneUse() && N != getRoot().getNode())
6575 DumpNodes(N, 2, this);
6578 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6583 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6585 print_details(OS, G);
6588 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6589 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6590 const SelectionDAG *G, VisitedSDNodeSet &once) {
6591 if (!once.insert(N)) // If we've been here before, return now.
6594 // Dump the current SDNode, but don't end the line yet.
6595 OS << std::string(indent, ' ');
6598 // Having printed this SDNode, walk the children:
6599 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6600 const SDNode *child = N->getOperand(i).getNode();
6605 if (child->getNumOperands() == 0) {
6606 // This child has no grandchildren; print it inline right here.
6607 child->printr(OS, G);
6609 } else { // Just the address. FIXME: also print the child's opcode.
6611 if (unsigned RN = N->getOperand(i).getResNo())
6618 // Dump children that have grandchildren on their own line(s).
6619 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6620 const SDNode *child = N->getOperand(i).getNode();
6621 DumpNodesr(OS, child, indent+2, G, once);
6625 void SDNode::dumpr() const {
6626 VisitedSDNodeSet once;
6627 DumpNodesr(dbgs(), this, 0, 0, once);
6630 void SDNode::dumpr(const SelectionDAG *G) const {
6631 VisitedSDNodeSet once;
6632 DumpNodesr(dbgs(), this, 0, G, once);
6636 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6637 unsigned GlobalAddressSDNode::getAddressSpace() const {
6638 return getGlobal()->getType()->getAddressSpace();
6642 Type *ConstantPoolSDNode::getType() const {
6643 if (isMachineConstantPoolEntry())
6644 return Val.MachineCPVal->getType();
6645 return Val.ConstVal->getType();
6648 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6650 unsigned &SplatBitSize,
6652 unsigned MinSplatBits,
6654 EVT VT = getValueType(0);
6655 assert(VT.isVector() && "Expected a vector type");
6656 unsigned sz = VT.getSizeInBits();
6657 if (MinSplatBits > sz)
6660 SplatValue = APInt(sz, 0);
6661 SplatUndef = APInt(sz, 0);
6663 // Get the bits. Bits with undefined values (when the corresponding element
6664 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6665 // in SplatValue. If any of the values are not constant, give up and return
6667 unsigned int nOps = getNumOperands();
6668 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6669 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6671 for (unsigned j = 0; j < nOps; ++j) {
6672 unsigned i = isBigEndian ? nOps-1-j : j;
6673 SDValue OpVal = getOperand(i);
6674 unsigned BitPos = j * EltBitSize;
6676 if (OpVal.getOpcode() == ISD::UNDEF)
6677 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6678 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6679 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6680 zextOrTrunc(sz) << BitPos;
6681 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6682 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6687 // The build_vector is all constants or undefs. Find the smallest element
6688 // size that splats the vector.
6690 HasAnyUndefs = (SplatUndef != 0);
6693 unsigned HalfSize = sz / 2;
6694 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6695 APInt LowValue = SplatValue.trunc(HalfSize);
6696 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6697 APInt LowUndef = SplatUndef.trunc(HalfSize);
6699 // If the two halves do not match (ignoring undef bits), stop here.
6700 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6701 MinSplatBits > HalfSize)
6704 SplatValue = HighValue | LowValue;
6705 SplatUndef = HighUndef & LowUndef;
6714 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6715 // Find the first non-undef value in the shuffle mask.
6717 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6720 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6722 // Make sure all remaining elements are either undef or the same as the first
6724 for (int Idx = Mask[i]; i != e; ++i)
6725 if (Mask[i] >= 0 && Mask[i] != Idx)
6731 static void checkForCyclesHelper(const SDNode *N,
6732 SmallPtrSet<const SDNode*, 32> &Visited,
6733 SmallPtrSet<const SDNode*, 32> &Checked) {
6734 // If this node has already been checked, don't check it again.
6735 if (Checked.count(N))
6738 // If a node has already been visited on this depth-first walk, reject it as
6740 if (!Visited.insert(N)) {
6741 dbgs() << "Offending node:\n";
6743 errs() << "Detected cycle in SelectionDAG\n";
6747 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6748 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6755 void llvm::checkForCycles(const llvm::SDNode *N) {
6757 assert(N && "Checking nonexistant SDNode");
6758 SmallPtrSet<const SDNode*, 32> visited;
6759 SmallPtrSet<const SDNode*, 32> checked;
6760 checkForCyclesHelper(N, visited, checked);
6764 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6765 checkForCycles(DAG->getRoot().getNode());