1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// isScalarToVector - Return true if the specified node is a
200 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
201 /// element is not an undef.
202 bool ISD::isScalarToVector(const SDNode *N) {
203 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
206 if (N->getOpcode() != ISD::BUILD_VECTOR)
208 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
210 unsigned NumElems = N->getNumOperands();
213 for (unsigned i = 1; i < NumElems; ++i) {
214 SDValue V = N->getOperand(i);
215 if (V.getOpcode() != ISD::UNDEF)
221 /// allOperandsUndef - Return true if the node has at least one operand
222 /// and all operands of the specified node are ISD::UNDEF.
223 bool ISD::allOperandsUndef(const SDNode *N) {
224 // Return false if the node has no operands.
225 // This is "logically inconsistent" with the definition of "all" but
226 // is probably the desired behavior.
227 if (N->getNumOperands() == 0)
230 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
231 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
237 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
240 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
242 return ISD::SIGN_EXTEND;
244 return ISD::ZERO_EXTEND;
249 llvm_unreachable("Invalid LoadExtType");
252 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
253 /// when given the operation for (X op Y).
254 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
255 // To perform this operation, we just need to swap the L and G bits of the
257 unsigned OldL = (Operation >> 2) & 1;
258 unsigned OldG = (Operation >> 1) & 1;
259 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
260 (OldL << 1) | // New G bit
261 (OldG << 2)); // New L bit.
264 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
265 /// 'op' is a valid SetCC operation.
266 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
267 unsigned Operation = Op;
269 Operation ^= 7; // Flip L, G, E bits, but not U.
271 Operation ^= 15; // Flip all of the condition bits.
273 if (Operation > ISD::SETTRUE2)
274 Operation &= ~8; // Don't let N and U bits get set.
276 return ISD::CondCode(Operation);
280 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
281 /// signed operation and 2 if the result is an unsigned comparison. Return zero
282 /// if the operation does not depend on the sign of the input (setne and seteq).
283 static int isSignedOp(ISD::CondCode Opcode) {
285 default: llvm_unreachable("Illegal integer setcc operation!");
287 case ISD::SETNE: return 0;
291 case ISD::SETGE: return 1;
295 case ISD::SETUGE: return 2;
299 /// getSetCCOrOperation - Return the result of a logical OR between different
300 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
301 /// returns SETCC_INVALID if it is not possible to represent the resultant
303 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
305 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
306 // Cannot fold a signed integer setcc with an unsigned integer setcc.
307 return ISD::SETCC_INVALID;
309 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
311 // If the N and U bits get set then the resultant comparison DOES suddenly
312 // care about orderedness, and is true when ordered.
313 if (Op > ISD::SETTRUE2)
314 Op &= ~16; // Clear the U bit if the N bit is set.
316 // Canonicalize illegal integer setcc's.
317 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
320 return ISD::CondCode(Op);
323 /// getSetCCAndOperation - Return the result of a logical AND between different
324 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
325 /// function returns zero if it is not possible to represent the resultant
327 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
329 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
330 // Cannot fold a signed setcc with an unsigned setcc.
331 return ISD::SETCC_INVALID;
333 // Combine all of the condition bits.
334 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
336 // Canonicalize illegal integer setcc's.
340 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
341 case ISD::SETOEQ: // SETEQ & SETU[LG]E
342 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
343 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
344 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
351 //===----------------------------------------------------------------------===//
352 // SDNode Profile Support
353 //===----------------------------------------------------------------------===//
355 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
357 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
361 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
362 /// solely with their pointer.
363 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
364 ID.AddPointer(VTList.VTs);
367 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
369 static void AddNodeIDOperands(FoldingSetNodeID &ID,
370 ArrayRef<SDValue> Ops) {
371 for (auto& Op : Ops) {
372 ID.AddPointer(Op.getNode());
373 ID.AddInteger(Op.getResNo());
377 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
379 static void AddNodeIDOperands(FoldingSetNodeID &ID,
380 ArrayRef<SDUse> Ops) {
381 for (auto& Op : Ops) {
382 ID.AddPointer(Op.getNode());
383 ID.AddInteger(Op.getResNo());
387 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
391 ID.AddBoolean(exact);
394 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
395 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
396 bool nuw, bool nsw, bool exact) {
397 if (isBinOpWithFlags(Opcode))
398 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
401 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
402 SDVTList VTList, ArrayRef<SDValue> OpList) {
403 AddNodeIDOpcode(ID, OpC);
404 AddNodeIDValueTypes(ID, VTList);
405 AddNodeIDOperands(ID, OpList);
408 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
410 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
411 switch (N->getOpcode()) {
412 case ISD::TargetExternalSymbol:
413 case ISD::ExternalSymbol:
414 llvm_unreachable("Should only be used on nodes with operands");
415 default: break; // Normal nodes don't need extra info.
416 case ISD::TargetConstant:
417 case ISD::Constant: {
418 const ConstantSDNode *C = cast<ConstantSDNode>(N);
419 ID.AddPointer(C->getConstantIntValue());
420 ID.AddBoolean(C->isOpaque());
423 case ISD::TargetConstantFP:
424 case ISD::ConstantFP: {
425 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
428 case ISD::TargetGlobalAddress:
429 case ISD::GlobalAddress:
430 case ISD::TargetGlobalTLSAddress:
431 case ISD::GlobalTLSAddress: {
432 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
433 ID.AddPointer(GA->getGlobal());
434 ID.AddInteger(GA->getOffset());
435 ID.AddInteger(GA->getTargetFlags());
436 ID.AddInteger(GA->getAddressSpace());
439 case ISD::BasicBlock:
440 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
443 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
445 case ISD::RegisterMask:
446 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
449 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
451 case ISD::FrameIndex:
452 case ISD::TargetFrameIndex:
453 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
456 case ISD::TargetJumpTable:
457 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
458 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
460 case ISD::ConstantPool:
461 case ISD::TargetConstantPool: {
462 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
463 ID.AddInteger(CP->getAlignment());
464 ID.AddInteger(CP->getOffset());
465 if (CP->isMachineConstantPoolEntry())
466 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
468 ID.AddPointer(CP->getConstVal());
469 ID.AddInteger(CP->getTargetFlags());
472 case ISD::TargetIndex: {
473 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
474 ID.AddInteger(TI->getIndex());
475 ID.AddInteger(TI->getOffset());
476 ID.AddInteger(TI->getTargetFlags());
480 const LoadSDNode *LD = cast<LoadSDNode>(N);
481 ID.AddInteger(LD->getMemoryVT().getRawBits());
482 ID.AddInteger(LD->getRawSubclassData());
483 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
487 const StoreSDNode *ST = cast<StoreSDNode>(N);
488 ID.AddInteger(ST->getMemoryVT().getRawBits());
489 ID.AddInteger(ST->getRawSubclassData());
490 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
501 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
502 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
503 BinNode->hasNoSignedWrap(), BinNode->isExact());
506 case ISD::ATOMIC_CMP_SWAP:
507 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
508 case ISD::ATOMIC_SWAP:
509 case ISD::ATOMIC_LOAD_ADD:
510 case ISD::ATOMIC_LOAD_SUB:
511 case ISD::ATOMIC_LOAD_AND:
512 case ISD::ATOMIC_LOAD_OR:
513 case ISD::ATOMIC_LOAD_XOR:
514 case ISD::ATOMIC_LOAD_NAND:
515 case ISD::ATOMIC_LOAD_MIN:
516 case ISD::ATOMIC_LOAD_MAX:
517 case ISD::ATOMIC_LOAD_UMIN:
518 case ISD::ATOMIC_LOAD_UMAX:
519 case ISD::ATOMIC_LOAD:
520 case ISD::ATOMIC_STORE: {
521 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
522 ID.AddInteger(AT->getMemoryVT().getRawBits());
523 ID.AddInteger(AT->getRawSubclassData());
524 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
527 case ISD::PREFETCH: {
528 const MemSDNode *PF = cast<MemSDNode>(N);
529 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
532 case ISD::VECTOR_SHUFFLE: {
533 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
534 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
536 ID.AddInteger(SVN->getMaskElt(i));
539 case ISD::TargetBlockAddress:
540 case ISD::BlockAddress: {
541 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
542 ID.AddPointer(BA->getBlockAddress());
543 ID.AddInteger(BA->getOffset());
544 ID.AddInteger(BA->getTargetFlags());
547 } // end switch (N->getOpcode())
549 // Target specific memory nodes could also have address spaces to check.
550 if (N->isTargetMemoryOpcode())
551 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
554 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
556 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
557 AddNodeIDOpcode(ID, N->getOpcode());
558 // Add the return value info.
559 AddNodeIDValueTypes(ID, N->getVTList());
560 // Add the operand info.
561 AddNodeIDOperands(ID, N->ops());
563 // Handle SDNode leafs with special info.
564 AddNodeIDCustom(ID, N);
567 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
568 /// the CSE map that carries volatility, temporalness, indexing mode, and
569 /// extension/truncation information.
571 static inline unsigned
572 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
573 bool isNonTemporal, bool isInvariant) {
574 assert((ConvType & 3) == ConvType &&
575 "ConvType may not require more than 2 bits!");
576 assert((AM & 7) == AM &&
577 "AM may not require more than 3 bits!");
581 (isNonTemporal << 6) |
585 //===----------------------------------------------------------------------===//
586 // SelectionDAG Class
587 //===----------------------------------------------------------------------===//
589 /// doNotCSE - Return true if CSE should not be performed for this node.
590 static bool doNotCSE(SDNode *N) {
591 if (N->getValueType(0) == MVT::Glue)
592 return true; // Never CSE anything that produces a flag.
594 switch (N->getOpcode()) {
596 case ISD::HANDLENODE:
598 return true; // Never CSE these nodes.
601 // Check that remaining values produced are not flags.
602 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
603 if (N->getValueType(i) == MVT::Glue)
604 return true; // Never CSE anything that produces a flag.
609 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
611 void SelectionDAG::RemoveDeadNodes() {
612 // Create a dummy node (which is not added to allnodes), that adds a reference
613 // to the root node, preventing it from being deleted.
614 HandleSDNode Dummy(getRoot());
616 SmallVector<SDNode*, 128> DeadNodes;
618 // Add all obviously-dead nodes to the DeadNodes worklist.
619 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
621 DeadNodes.push_back(I);
623 RemoveDeadNodes(DeadNodes);
625 // If the root changed (e.g. it was a dead load, update the root).
626 setRoot(Dummy.getValue());
629 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
630 /// given list, and any nodes that become unreachable as a result.
631 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
633 // Process the worklist, deleting the nodes and adding their uses to the
635 while (!DeadNodes.empty()) {
636 SDNode *N = DeadNodes.pop_back_val();
638 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
639 DUL->NodeDeleted(N, nullptr);
641 // Take the node out of the appropriate CSE map.
642 RemoveNodeFromCSEMaps(N);
644 // Next, brutally remove the operand list. This is safe to do, as there are
645 // no cycles in the graph.
646 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
648 SDNode *Operand = Use.getNode();
651 // Now that we removed this operand, see if there are no uses of it left.
652 if (Operand->use_empty())
653 DeadNodes.push_back(Operand);
660 void SelectionDAG::RemoveDeadNode(SDNode *N){
661 SmallVector<SDNode*, 16> DeadNodes(1, N);
663 // Create a dummy node that adds a reference to the root node, preventing
664 // it from being deleted. (This matters if the root is an operand of the
666 HandleSDNode Dummy(getRoot());
668 RemoveDeadNodes(DeadNodes);
671 void SelectionDAG::DeleteNode(SDNode *N) {
672 // First take this out of the appropriate CSE map.
673 RemoveNodeFromCSEMaps(N);
675 // Finally, remove uses due to operands of this node, remove from the
676 // AllNodes list, and delete the node.
677 DeleteNodeNotInCSEMaps(N);
680 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
681 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
682 assert(N->use_empty() && "Cannot delete a node that is not dead!");
684 // Drop all of the operands and decrement used node's use counts.
690 void SDDbgInfo::erase(const SDNode *Node) {
691 DbgValMapType::iterator I = DbgValMap.find(Node);
692 if (I == DbgValMap.end())
694 for (auto &Val: I->second)
695 Val->setIsInvalidated();
699 void SelectionDAG::DeallocateNode(SDNode *N) {
700 if (N->OperandsNeedDelete)
701 delete[] N->OperandList;
703 // Set the opcode to DELETED_NODE to help catch bugs when node
704 // memory is reallocated.
705 N->NodeType = ISD::DELETED_NODE;
707 NodeAllocator.Deallocate(AllNodes.remove(N));
709 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
710 // them and forget about that node.
715 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
716 static void VerifySDNode(SDNode *N) {
717 switch (N->getOpcode()) {
720 case ISD::BUILD_PAIR: {
721 EVT VT = N->getValueType(0);
722 assert(N->getNumValues() == 1 && "Too many results!");
723 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
724 "Wrong return type!");
725 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
726 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
727 "Mismatched operand types!");
728 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
729 "Wrong operand type!");
730 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
731 "Wrong return type size");
734 case ISD::BUILD_VECTOR: {
735 assert(N->getNumValues() == 1 && "Too many results!");
736 assert(N->getValueType(0).isVector() && "Wrong return type!");
737 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
738 "Wrong number of operands!");
739 EVT EltVT = N->getValueType(0).getVectorElementType();
740 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
741 assert((I->getValueType() == EltVT ||
742 (EltVT.isInteger() && I->getValueType().isInteger() &&
743 EltVT.bitsLE(I->getValueType()))) &&
744 "Wrong operand type!");
745 assert(I->getValueType() == N->getOperand(0).getValueType() &&
746 "Operands must all have the same type");
754 /// \brief Insert a newly allocated node into the DAG.
756 /// Handles insertion into the all nodes list and CSE map, as well as
757 /// verification and other common operations when a new node is allocated.
758 void SelectionDAG::InsertNode(SDNode *N) {
759 AllNodes.push_back(N);
765 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
766 /// correspond to it. This is useful when we're about to delete or repurpose
767 /// the node. We don't want future request for structurally identical nodes
768 /// to return N anymore.
769 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
771 switch (N->getOpcode()) {
772 case ISD::HANDLENODE: return false; // noop.
774 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
775 "Cond code doesn't exist!");
776 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
777 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
779 case ISD::ExternalSymbol:
780 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
782 case ISD::TargetExternalSymbol: {
783 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
784 Erased = TargetExternalSymbols.erase(
785 std::pair<std::string,unsigned char>(ESN->getSymbol(),
786 ESN->getTargetFlags()));
789 case ISD::VALUETYPE: {
790 EVT VT = cast<VTSDNode>(N)->getVT();
791 if (VT.isExtended()) {
792 Erased = ExtendedValueTypeNodes.erase(VT);
794 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
795 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
800 // Remove it from the CSE Map.
801 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
802 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
803 Erased = CSEMap.RemoveNode(N);
807 // Verify that the node was actually in one of the CSE maps, unless it has a
808 // flag result (which cannot be CSE'd) or is one of the special cases that are
809 // not subject to CSE.
810 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
811 !N->isMachineOpcode() && !doNotCSE(N)) {
814 llvm_unreachable("Node is not in map!");
820 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
821 /// maps and modified in place. Add it back to the CSE maps, unless an identical
822 /// node already exists, in which case transfer all its users to the existing
823 /// node. This transfer can potentially trigger recursive merging.
826 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
827 // For node types that aren't CSE'd, just act as if no identical node
830 SDNode *Existing = CSEMap.GetOrInsertNode(N);
832 // If there was already an existing matching node, use ReplaceAllUsesWith
833 // to replace the dead one with the existing one. This can cause
834 // recursive merging of other unrelated nodes down the line.
835 ReplaceAllUsesWith(N, Existing);
837 // N is now dead. Inform the listeners and delete it.
838 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
839 DUL->NodeDeleted(N, Existing);
840 DeleteNodeNotInCSEMaps(N);
845 // If the node doesn't already exist, we updated it. Inform listeners.
846 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
850 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
851 /// were replaced with those specified. If this node is never memoized,
852 /// return null, otherwise return a pointer to the slot it would take. If a
853 /// node already exists with these operands, the slot will be non-null.
854 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
859 SDValue Ops[] = { Op };
861 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
862 AddNodeIDCustom(ID, N);
863 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
867 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
868 /// were replaced with those specified. If this node is never memoized,
869 /// return null, otherwise return a pointer to the slot it would take. If a
870 /// node already exists with these operands, the slot will be non-null.
871 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
872 SDValue Op1, SDValue Op2,
877 SDValue Ops[] = { Op1, Op2 };
879 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
880 AddNodeIDCustom(ID, N);
881 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
886 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
887 /// were replaced with those specified. If this node is never memoized,
888 /// return null, otherwise return a pointer to the slot it would take. If a
889 /// node already exists with these operands, the slot will be non-null.
890 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
896 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
897 AddNodeIDCustom(ID, N);
898 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// getEVTAlignment - Compute the default alignment value for the
905 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
906 Type *Ty = VT == MVT::iPTR ?
907 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
908 VT.getTypeForEVT(*getContext());
910 return TLI->getDataLayout()->getABITypeAlignment(Ty);
913 // EntryNode could meaningfully have debug info if we can find it...
914 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
915 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
916 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
917 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
918 UpdateListeners(nullptr) {
919 AllNodes.push_back(&EntryNode);
920 DbgInfo = new SDDbgInfo();
923 void SelectionDAG::init(MachineFunction &mf) {
925 TLI = getSubtarget().getTargetLowering();
926 TSI = getSubtarget().getSelectionDAGInfo();
927 Context = &mf.getFunction()->getContext();
930 SelectionDAG::~SelectionDAG() {
931 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
936 void SelectionDAG::allnodes_clear() {
937 assert(&*AllNodes.begin() == &EntryNode);
938 AllNodes.remove(AllNodes.begin());
939 while (!AllNodes.empty())
940 DeallocateNode(AllNodes.begin());
943 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
944 SDVTList VTs, SDValue N1,
945 SDValue N2, bool nuw, bool nsw,
947 if (isBinOpWithFlags(Opcode)) {
948 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
949 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
950 FN->setHasNoUnsignedWrap(nuw);
951 FN->setHasNoSignedWrap(nsw);
952 FN->setIsExact(exact);
957 BinarySDNode *N = new (NodeAllocator)
958 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
962 void SelectionDAG::clear() {
964 OperandAllocator.Reset();
967 ExtendedValueTypeNodes.clear();
968 ExternalSymbols.clear();
969 TargetExternalSymbols.clear();
970 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
971 static_cast<CondCodeSDNode*>(nullptr));
972 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
973 static_cast<SDNode*>(nullptr));
975 EntryNode.UseList = nullptr;
976 AllNodes.push_back(&EntryNode);
977 Root = getEntryNode();
981 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
982 return VT.bitsGT(Op.getValueType()) ?
983 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
984 getNode(ISD::TRUNCATE, DL, VT, Op);
987 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
988 return VT.bitsGT(Op.getValueType()) ?
989 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
990 getNode(ISD::TRUNCATE, DL, VT, Op);
993 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
994 return VT.bitsGT(Op.getValueType()) ?
995 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
996 getNode(ISD::TRUNCATE, DL, VT, Op);
999 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1001 if (VT.bitsLE(Op.getValueType()))
1002 return getNode(ISD::TRUNCATE, SL, VT, Op);
1004 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1005 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1008 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1009 assert(!VT.isVector() &&
1010 "getZeroExtendInReg should use the vector element type instead of "
1011 "the vector type!");
1012 if (Op.getValueType() == VT) return Op;
1013 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1014 APInt Imm = APInt::getLowBitsSet(BitWidth,
1015 VT.getSizeInBits());
1016 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1017 getConstant(Imm, Op.getValueType()));
1020 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1021 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1022 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1023 "The sizes of the input and result must match in order to perform the "
1024 "extend in-register.");
1025 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1026 "The destination vector type must have fewer lanes than the input.");
1027 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1030 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1031 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1032 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1033 "The sizes of the input and result must match in order to perform the "
1034 "extend in-register.");
1035 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1036 "The destination vector type must have fewer lanes than the input.");
1037 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1040 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1041 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1042 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1043 "The sizes of the input and result must match in order to perform the "
1044 "extend in-register.");
1045 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1046 "The destination vector type must have fewer lanes than the input.");
1047 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1050 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1052 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1053 EVT EltVT = VT.getScalarType();
1055 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1056 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1059 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1060 EVT EltVT = VT.getScalarType();
1062 switch (TLI->getBooleanContents(VT)) {
1063 case TargetLowering::ZeroOrOneBooleanContent:
1064 case TargetLowering::UndefinedBooleanContent:
1065 TrueValue = getConstant(1, VT);
1067 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1068 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1072 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1075 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1076 EVT EltVT = VT.getScalarType();
1077 assert((EltVT.getSizeInBits() >= 64 ||
1078 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1079 "getConstant with a uint64_t value that doesn't fit in the type!");
1080 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1083 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1085 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1088 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1090 assert(VT.isInteger() && "Cannot create FP integer constant!");
1092 EVT EltVT = VT.getScalarType();
1093 const ConstantInt *Elt = &Val;
1095 // In some cases the vector type is legal but the element type is illegal and
1096 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1097 // inserted value (the type does not need to match the vector element type).
1098 // Any extra bits introduced will be truncated away.
1099 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1100 TargetLowering::TypePromoteInteger) {
1101 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1102 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1103 Elt = ConstantInt::get(*getContext(), NewVal);
1105 // In other cases the element type is illegal and needs to be expanded, for
1106 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1107 // the value into n parts and use a vector type with n-times the elements.
1108 // Then bitcast to the type requested.
1109 // Legalizing constants too early makes the DAGCombiner's job harder so we
1110 // only legalize if the DAG tells us we must produce legal types.
1111 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1112 TLI->getTypeAction(*getContext(), EltVT) ==
1113 TargetLowering::TypeExpandInteger) {
1114 APInt NewVal = Elt->getValue();
1115 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1116 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1117 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1118 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1120 // Check the temporary vector is the correct size. If this fails then
1121 // getTypeToTransformTo() probably returned a type whose size (in bits)
1122 // isn't a power-of-2 factor of the requested type size.
1123 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1125 SmallVector<SDValue, 2> EltParts;
1126 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1127 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1128 .trunc(ViaEltSizeInBits),
1129 ViaEltVT, isT, isO));
1132 // EltParts is currently in little endian order. If we actually want
1133 // big-endian order then reverse it now.
1134 if (TLI->isBigEndian())
1135 std::reverse(EltParts.begin(), EltParts.end());
1137 // The elements must be reversed when the element order is different
1138 // to the endianness of the elements (because the BITCAST is itself a
1139 // vector shuffle in this situation). However, we do not need any code to
1140 // perform this reversal because getConstant() is producing a vector
1142 // This situation occurs in MIPS MSA.
1144 SmallVector<SDValue, 8> Ops;
1145 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1146 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1148 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1149 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1154 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1155 "APInt size does not match type size!");
1156 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1157 FoldingSetNodeID ID;
1158 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1162 SDNode *N = nullptr;
1163 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1165 return SDValue(N, 0);
1168 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1169 CSEMap.InsertNode(N, IP);
1173 SDValue Result(N, 0);
1174 if (VT.isVector()) {
1175 SmallVector<SDValue, 8> Ops;
1176 Ops.assign(VT.getVectorNumElements(), Result);
1177 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1182 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1183 return getConstant(Val, TLI->getPointerTy(), isTarget);
1187 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1188 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1191 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1192 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1194 EVT EltVT = VT.getScalarType();
1196 // Do the map lookup using the actual bit pattern for the floating point
1197 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1198 // we don't have issues with SNANs.
1199 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1200 FoldingSetNodeID ID;
1201 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1204 SDNode *N = nullptr;
1205 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1207 return SDValue(N, 0);
1210 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1211 CSEMap.InsertNode(N, IP);
1215 SDValue Result(N, 0);
1216 if (VT.isVector()) {
1217 SmallVector<SDValue, 8> Ops;
1218 Ops.assign(VT.getVectorNumElements(), Result);
1219 // FIXME SDLoc info might be appropriate here
1220 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1225 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1226 EVT EltVT = VT.getScalarType();
1227 if (EltVT==MVT::f32)
1228 return getConstantFP(APFloat((float)Val), VT, isTarget);
1229 else if (EltVT==MVT::f64)
1230 return getConstantFP(APFloat(Val), VT, isTarget);
1231 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1234 APFloat apf = APFloat(Val);
1235 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1237 return getConstantFP(apf, VT, isTarget);
1239 llvm_unreachable("Unsupported type in getConstantFP");
1242 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1243 EVT VT, int64_t Offset,
1245 unsigned char TargetFlags) {
1246 assert((TargetFlags == 0 || isTargetGA) &&
1247 "Cannot set target flags on target-independent globals");
1249 // Truncate (with sign-extension) the offset value to the pointer size.
1250 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1252 Offset = SignExtend64(Offset, BitWidth);
1255 if (GV->isThreadLocal())
1256 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1258 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1260 FoldingSetNodeID ID;
1261 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1263 ID.AddInteger(Offset);
1264 ID.AddInteger(TargetFlags);
1265 ID.AddInteger(GV->getType()->getAddressSpace());
1267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1268 return SDValue(E, 0);
1270 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1271 DL.getDebugLoc(), GV, VT,
1272 Offset, TargetFlags);
1273 CSEMap.InsertNode(N, IP);
1275 return SDValue(N, 0);
1278 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1279 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1280 FoldingSetNodeID ID;
1281 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1284 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1285 return SDValue(E, 0);
1287 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1288 CSEMap.InsertNode(N, IP);
1290 return SDValue(N, 0);
1293 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1294 unsigned char TargetFlags) {
1295 assert((TargetFlags == 0 || isTarget) &&
1296 "Cannot set target flags on target-independent jump tables");
1297 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1298 FoldingSetNodeID ID;
1299 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1301 ID.AddInteger(TargetFlags);
1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1304 return SDValue(E, 0);
1306 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1308 CSEMap.InsertNode(N, IP);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1314 unsigned Alignment, int Offset,
1316 unsigned char TargetFlags) {
1317 assert((TargetFlags == 0 || isTarget) &&
1318 "Cannot set target flags on target-independent globals");
1320 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1321 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1322 FoldingSetNodeID ID;
1323 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1324 ID.AddInteger(Alignment);
1325 ID.AddInteger(Offset);
1327 ID.AddInteger(TargetFlags);
1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1330 return SDValue(E, 0);
1332 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1333 Alignment, TargetFlags);
1334 CSEMap.InsertNode(N, IP);
1336 return SDValue(N, 0);
1340 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1341 unsigned Alignment, int Offset,
1343 unsigned char TargetFlags) {
1344 assert((TargetFlags == 0 || isTarget) &&
1345 "Cannot set target flags on target-independent globals");
1347 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1348 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1349 FoldingSetNodeID ID;
1350 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1351 ID.AddInteger(Alignment);
1352 ID.AddInteger(Offset);
1353 C->addSelectionDAGCSEId(ID);
1354 ID.AddInteger(TargetFlags);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1360 Alignment, TargetFlags);
1361 CSEMap.InsertNode(N, IP);
1363 return SDValue(N, 0);
1366 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1367 unsigned char TargetFlags) {
1368 FoldingSetNodeID ID;
1369 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1370 ID.AddInteger(Index);
1371 ID.AddInteger(Offset);
1372 ID.AddInteger(TargetFlags);
1374 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1375 return SDValue(E, 0);
1377 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1379 CSEMap.InsertNode(N, IP);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1385 FoldingSetNodeID ID;
1386 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1390 return SDValue(E, 0);
1392 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1393 CSEMap.InsertNode(N, IP);
1395 return SDValue(N, 0);
1398 SDValue SelectionDAG::getValueType(EVT VT) {
1399 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1400 ValueTypeNodes.size())
1401 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1403 SDNode *&N = VT.isExtended() ?
1404 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1406 if (N) return SDValue(N, 0);
1407 N = new (NodeAllocator) VTSDNode(VT);
1409 return SDValue(N, 0);
1412 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1413 SDNode *&N = ExternalSymbols[Sym];
1414 if (N) return SDValue(N, 0);
1415 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1417 return SDValue(N, 0);
1420 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1421 unsigned char TargetFlags) {
1423 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1425 if (N) return SDValue(N, 0);
1426 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1428 return SDValue(N, 0);
1431 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1432 if ((unsigned)Cond >= CondCodeNodes.size())
1433 CondCodeNodes.resize(Cond+1);
1435 if (!CondCodeNodes[Cond]) {
1436 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1437 CondCodeNodes[Cond] = N;
1441 return SDValue(CondCodeNodes[Cond], 0);
1444 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1445 // the shuffle mask M that point at N1 to point at N2, and indices that point
1446 // N2 to point at N1.
1447 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1449 int NElts = M.size();
1450 for (int i = 0; i != NElts; ++i) {
1458 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1459 SDValue N2, const int *Mask) {
1460 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1461 "Invalid VECTOR_SHUFFLE");
1463 // Canonicalize shuffle undef, undef -> undef
1464 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1465 return getUNDEF(VT);
1467 // Validate that all indices in Mask are within the range of the elements
1468 // input to the shuffle.
1469 unsigned NElts = VT.getVectorNumElements();
1470 SmallVector<int, 8> MaskVec;
1471 for (unsigned i = 0; i != NElts; ++i) {
1472 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1473 MaskVec.push_back(Mask[i]);
1476 // Canonicalize shuffle v, v -> v, undef
1479 for (unsigned i = 0; i != NElts; ++i)
1480 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1483 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1484 if (N1.getOpcode() == ISD::UNDEF)
1485 commuteShuffle(N1, N2, MaskVec);
1487 // Canonicalize all index into lhs, -> shuffle lhs, undef
1488 // Canonicalize all index into rhs, -> shuffle rhs, undef
1489 bool AllLHS = true, AllRHS = true;
1490 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1491 for (unsigned i = 0; i != NElts; ++i) {
1492 if (MaskVec[i] >= (int)NElts) {
1497 } else if (MaskVec[i] >= 0) {
1501 if (AllLHS && AllRHS)
1502 return getUNDEF(VT);
1503 if (AllLHS && !N2Undef)
1507 commuteShuffle(N1, N2, MaskVec);
1509 // Reset our undef status after accounting for the mask.
1510 N2Undef = N2.getOpcode() == ISD::UNDEF;
1511 // Re-check whether both sides ended up undef.
1512 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1513 return getUNDEF(VT);
1515 // If Identity shuffle return that node.
1516 bool Identity = true;
1517 for (unsigned i = 0; i != NElts; ++i) {
1518 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1520 if (Identity && NElts)
1523 // Shuffling a constant splat doesn't change the result.
1527 // Look through any bitcasts. We check that these don't change the number
1528 // (and size) of elements and just changes their types.
1529 while (V.getOpcode() == ISD::BITCAST)
1530 V = V->getOperand(0);
1532 // A splat should always show up as a build vector node.
1533 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1534 BitVector UndefElements;
1535 SDValue Splat = BV->getSplatValue(&UndefElements);
1536 // If this is a splat of an undef, shuffling it is also undef.
1537 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1538 return getUNDEF(VT);
1540 // We only have a splat which can skip shuffles if there is a splatted
1541 // value and no undef lanes rearranged by the shuffle.
1542 if (Splat && UndefElements.none()) {
1543 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1544 // number of elements match or the value splatted is a zero constant.
1545 if (V.getValueType().getVectorNumElements() ==
1546 VT.getVectorNumElements())
1548 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1549 if (C->isNullValue())
1555 FoldingSetNodeID ID;
1556 SDValue Ops[2] = { N1, N2 };
1557 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1558 for (unsigned i = 0; i != NElts; ++i)
1559 ID.AddInteger(MaskVec[i]);
1562 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1563 return SDValue(E, 0);
1565 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1566 // SDNode doesn't have access to it. This memory will be "leaked" when
1567 // the node is deallocated, but recovered when the NodeAllocator is released.
1568 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1569 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1571 ShuffleVectorSDNode *N =
1572 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1573 dl.getDebugLoc(), N1, N2,
1575 CSEMap.InsertNode(N, IP);
1577 return SDValue(N, 0);
1580 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1581 MVT VT = SV.getSimpleValueType(0);
1582 unsigned NumElems = VT.getVectorNumElements();
1583 SmallVector<int, 8> MaskVec;
1585 for (unsigned i = 0; i != NumElems; ++i) {
1586 int Idx = SV.getMaskElt(i);
1588 if (Idx < (int)NumElems)
1593 MaskVec.push_back(Idx);
1596 SDValue Op0 = SV.getOperand(0);
1597 SDValue Op1 = SV.getOperand(1);
1598 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1601 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1602 SDValue Val, SDValue DTy,
1603 SDValue STy, SDValue Rnd, SDValue Sat,
1604 ISD::CvtCode Code) {
1605 // If the src and dest types are the same and the conversion is between
1606 // integer types of the same sign or two floats, no conversion is necessary.
1608 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1611 FoldingSetNodeID ID;
1612 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1613 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1615 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1616 return SDValue(E, 0);
1618 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1621 CSEMap.InsertNode(N, IP);
1623 return SDValue(N, 0);
1626 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1627 FoldingSetNodeID ID;
1628 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1629 ID.AddInteger(RegNo);
1631 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1632 return SDValue(E, 0);
1634 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1635 CSEMap.InsertNode(N, IP);
1637 return SDValue(N, 0);
1640 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1641 FoldingSetNodeID ID;
1642 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1643 ID.AddPointer(RegMask);
1645 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1646 return SDValue(E, 0);
1648 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1649 CSEMap.InsertNode(N, IP);
1651 return SDValue(N, 0);
1654 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1655 FoldingSetNodeID ID;
1656 SDValue Ops[] = { Root };
1657 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1658 ID.AddPointer(Label);
1660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1661 return SDValue(E, 0);
1663 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1664 dl.getDebugLoc(), Root, Label);
1665 CSEMap.InsertNode(N, IP);
1667 return SDValue(N, 0);
1671 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1674 unsigned char TargetFlags) {
1675 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1677 FoldingSetNodeID ID;
1678 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1680 ID.AddInteger(Offset);
1681 ID.AddInteger(TargetFlags);
1683 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1684 return SDValue(E, 0);
1686 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1688 CSEMap.InsertNode(N, IP);
1690 return SDValue(N, 0);
1693 SDValue SelectionDAG::getSrcValue(const Value *V) {
1694 assert((!V || V->getType()->isPointerTy()) &&
1695 "SrcValue is not a pointer?");
1697 FoldingSetNodeID ID;
1698 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1702 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1703 return SDValue(E, 0);
1705 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1706 CSEMap.InsertNode(N, IP);
1708 return SDValue(N, 0);
1711 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1712 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1713 FoldingSetNodeID ID;
1714 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1718 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1719 return SDValue(E, 0);
1721 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1722 CSEMap.InsertNode(N, IP);
1724 return SDValue(N, 0);
1727 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1728 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1729 unsigned SrcAS, unsigned DestAS) {
1730 SDValue Ops[] = {Ptr};
1731 FoldingSetNodeID ID;
1732 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1733 ID.AddInteger(SrcAS);
1734 ID.AddInteger(DestAS);
1737 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1738 return SDValue(E, 0);
1740 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1742 VT, Ptr, SrcAS, DestAS);
1743 CSEMap.InsertNode(N, IP);
1745 return SDValue(N, 0);
1748 /// getShiftAmountOperand - Return the specified value casted to
1749 /// the target's desired shift amount type.
1750 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1751 EVT OpTy = Op.getValueType();
1752 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1753 if (OpTy == ShTy || OpTy.isVector()) return Op;
1755 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1756 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1759 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1760 /// specified value type.
1761 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1762 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1763 unsigned ByteSize = VT.getStoreSize();
1764 Type *Ty = VT.getTypeForEVT(*getContext());
1765 unsigned StackAlign =
1766 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1768 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1769 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1772 /// CreateStackTemporary - Create a stack temporary suitable for holding
1773 /// either of the specified value types.
1774 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1775 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1776 VT2.getStoreSizeInBits())/8;
1777 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1778 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1779 const DataLayout *TD = TLI->getDataLayout();
1780 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1781 TD->getPrefTypeAlignment(Ty2));
1783 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1784 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1785 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1788 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1789 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1790 // These setcc operations always fold.
1794 case ISD::SETFALSE2: return getConstant(0, VT);
1796 case ISD::SETTRUE2: {
1797 TargetLowering::BooleanContent Cnt =
1798 TLI->getBooleanContents(N1->getValueType(0));
1800 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1813 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1817 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1818 const APInt &C2 = N2C->getAPIntValue();
1819 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1820 const APInt &C1 = N1C->getAPIntValue();
1823 default: llvm_unreachable("Unknown integer setcc!");
1824 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1825 case ISD::SETNE: return getConstant(C1 != C2, VT);
1826 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1827 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1828 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1829 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1830 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1831 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1832 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1833 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1837 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1838 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1839 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1842 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1843 return getUNDEF(VT);
1845 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1846 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1847 return getUNDEF(VT);
1849 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1850 R==APFloat::cmpLessThan, VT);
1851 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1852 return getUNDEF(VT);
1854 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1855 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1856 return getUNDEF(VT);
1858 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1859 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1860 return getUNDEF(VT);
1862 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1863 R==APFloat::cmpEqual, VT);
1864 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1865 return getUNDEF(VT);
1867 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1868 R==APFloat::cmpEqual, VT);
1869 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1870 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1871 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1872 R==APFloat::cmpEqual, VT);
1873 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1874 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1875 R==APFloat::cmpLessThan, VT);
1876 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1877 R==APFloat::cmpUnordered, VT);
1878 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1879 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1882 // Ensure that the constant occurs on the RHS.
1883 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1884 MVT CompVT = N1.getValueType().getSimpleVT();
1885 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1888 return getSetCC(dl, VT, N2, N1, SwappedCond);
1892 // Could not fold it.
1896 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1897 /// use this predicate to simplify operations downstream.
1898 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1899 // This predicate is not safe for vector operations.
1900 if (Op.getValueType().isVector())
1903 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1904 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1907 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1908 /// this predicate to simplify operations downstream. Mask is known to be zero
1909 /// for bits that V cannot have.
1910 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1911 unsigned Depth) const {
1912 APInt KnownZero, KnownOne;
1913 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1914 return (KnownZero & Mask) == Mask;
1917 /// Determine which bits of Op are known to be either zero or one and return
1918 /// them in the KnownZero/KnownOne bitsets.
1919 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1920 APInt &KnownOne, unsigned Depth) const {
1921 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1923 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1925 return; // Limit search depth.
1927 APInt KnownZero2, KnownOne2;
1929 switch (Op.getOpcode()) {
1931 // We know all of the bits for a constant!
1932 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1933 KnownZero = ~KnownOne;
1936 // If either the LHS or the RHS are Zero, the result is zero.
1937 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1938 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1940 // Output known-1 bits are only known if set in both the LHS & RHS.
1941 KnownOne &= KnownOne2;
1942 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1943 KnownZero |= KnownZero2;
1946 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1947 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1949 // Output known-0 bits are only known if clear in both the LHS & RHS.
1950 KnownZero &= KnownZero2;
1951 // Output known-1 are known to be set if set in either the LHS | RHS.
1952 KnownOne |= KnownOne2;
1955 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1956 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1958 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1959 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1960 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1961 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1962 KnownZero = KnownZeroOut;
1966 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1967 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1969 // If low bits are zero in either operand, output low known-0 bits.
1970 // Also compute a conserative estimate for high known-0 bits.
1971 // More trickiness is possible, but this is sufficient for the
1972 // interesting case of alignment computation.
1973 KnownOne.clearAllBits();
1974 unsigned TrailZ = KnownZero.countTrailingOnes() +
1975 KnownZero2.countTrailingOnes();
1976 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1977 KnownZero2.countLeadingOnes(),
1978 BitWidth) - BitWidth;
1980 TrailZ = std::min(TrailZ, BitWidth);
1981 LeadZ = std::min(LeadZ, BitWidth);
1982 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1983 APInt::getHighBitsSet(BitWidth, LeadZ);
1987 // For the purposes of computing leading zeros we can conservatively
1988 // treat a udiv as a logical right shift by the power of 2 known to
1989 // be less than the denominator.
1990 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1991 unsigned LeadZ = KnownZero2.countLeadingOnes();
1993 KnownOne2.clearAllBits();
1994 KnownZero2.clearAllBits();
1995 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1996 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1997 if (RHSUnknownLeadingOnes != BitWidth)
1998 LeadZ = std::min(BitWidth,
1999 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2001 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2005 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2006 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2008 // Only known if known in both the LHS and RHS.
2009 KnownOne &= KnownOne2;
2010 KnownZero &= KnownZero2;
2012 case ISD::SELECT_CC:
2013 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2014 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2016 // Only known if known in both the LHS and RHS.
2017 KnownOne &= KnownOne2;
2018 KnownZero &= KnownZero2;
2026 if (Op.getResNo() != 1)
2028 // The boolean result conforms to getBooleanContents.
2029 // If we know the result of a setcc has the top bits zero, use this info.
2030 // We know that we have an integer-based boolean since these operations
2031 // are only available for integer.
2032 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2033 TargetLowering::ZeroOrOneBooleanContent &&
2035 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2038 // If we know the result of a setcc has the top bits zero, use this info.
2039 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2040 TargetLowering::ZeroOrOneBooleanContent &&
2042 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2045 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2046 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2047 unsigned ShAmt = SA->getZExtValue();
2049 // If the shift count is an invalid immediate, don't do anything.
2050 if (ShAmt >= BitWidth)
2053 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2054 KnownZero <<= ShAmt;
2056 // low bits known zero.
2057 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2061 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2062 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2063 unsigned ShAmt = SA->getZExtValue();
2065 // If the shift count is an invalid immediate, don't do anything.
2066 if (ShAmt >= BitWidth)
2069 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2070 KnownZero = KnownZero.lshr(ShAmt);
2071 KnownOne = KnownOne.lshr(ShAmt);
2073 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2074 KnownZero |= HighBits; // High bits known zero.
2078 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2079 unsigned ShAmt = SA->getZExtValue();
2081 // If the shift count is an invalid immediate, don't do anything.
2082 if (ShAmt >= BitWidth)
2085 // If any of the demanded bits are produced by the sign extension, we also
2086 // demand the input sign bit.
2087 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2089 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2090 KnownZero = KnownZero.lshr(ShAmt);
2091 KnownOne = KnownOne.lshr(ShAmt);
2093 // Handle the sign bits.
2094 APInt SignBit = APInt::getSignBit(BitWidth);
2095 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2097 if (KnownZero.intersects(SignBit)) {
2098 KnownZero |= HighBits; // New bits are known zero.
2099 } else if (KnownOne.intersects(SignBit)) {
2100 KnownOne |= HighBits; // New bits are known one.
2104 case ISD::SIGN_EXTEND_INREG: {
2105 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2106 unsigned EBits = EVT.getScalarType().getSizeInBits();
2108 // Sign extension. Compute the demanded bits in the result that are not
2109 // present in the input.
2110 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2112 APInt InSignBit = APInt::getSignBit(EBits);
2113 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2115 // If the sign extended bits are demanded, we know that the sign
2117 InSignBit = InSignBit.zext(BitWidth);
2118 if (NewBits.getBoolValue())
2119 InputDemandedBits |= InSignBit;
2121 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2122 KnownOne &= InputDemandedBits;
2123 KnownZero &= InputDemandedBits;
2125 // If the sign bit of the input is known set or clear, then we know the
2126 // top bits of the result.
2127 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2128 KnownZero |= NewBits;
2129 KnownOne &= ~NewBits;
2130 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2131 KnownOne |= NewBits;
2132 KnownZero &= ~NewBits;
2133 } else { // Input sign bit unknown
2134 KnownZero &= ~NewBits;
2135 KnownOne &= ~NewBits;
2140 case ISD::CTTZ_ZERO_UNDEF:
2142 case ISD::CTLZ_ZERO_UNDEF:
2144 unsigned LowBits = Log2_32(BitWidth)+1;
2145 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2146 KnownOne.clearAllBits();
2150 LoadSDNode *LD = cast<LoadSDNode>(Op);
2151 // If this is a ZEXTLoad and we are looking at the loaded value.
2152 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2153 EVT VT = LD->getMemoryVT();
2154 unsigned MemBits = VT.getScalarType().getSizeInBits();
2155 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2156 } else if (const MDNode *Ranges = LD->getRanges()) {
2157 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2161 case ISD::ZERO_EXTEND: {
2162 EVT InVT = Op.getOperand(0).getValueType();
2163 unsigned InBits = InVT.getScalarType().getSizeInBits();
2164 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2165 KnownZero = KnownZero.trunc(InBits);
2166 KnownOne = KnownOne.trunc(InBits);
2167 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2168 KnownZero = KnownZero.zext(BitWidth);
2169 KnownOne = KnownOne.zext(BitWidth);
2170 KnownZero |= NewBits;
2173 case ISD::SIGN_EXTEND: {
2174 EVT InVT = Op.getOperand(0).getValueType();
2175 unsigned InBits = InVT.getScalarType().getSizeInBits();
2176 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2178 KnownZero = KnownZero.trunc(InBits);
2179 KnownOne = KnownOne.trunc(InBits);
2180 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2182 // Note if the sign bit is known to be zero or one.
2183 bool SignBitKnownZero = KnownZero.isNegative();
2184 bool SignBitKnownOne = KnownOne.isNegative();
2186 KnownZero = KnownZero.zext(BitWidth);
2187 KnownOne = KnownOne.zext(BitWidth);
2189 // If the sign bit is known zero or one, the top bits match.
2190 if (SignBitKnownZero)
2191 KnownZero |= NewBits;
2192 else if (SignBitKnownOne)
2193 KnownOne |= NewBits;
2196 case ISD::ANY_EXTEND: {
2197 EVT InVT = Op.getOperand(0).getValueType();
2198 unsigned InBits = InVT.getScalarType().getSizeInBits();
2199 KnownZero = KnownZero.trunc(InBits);
2200 KnownOne = KnownOne.trunc(InBits);
2201 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2202 KnownZero = KnownZero.zext(BitWidth);
2203 KnownOne = KnownOne.zext(BitWidth);
2206 case ISD::TRUNCATE: {
2207 EVT InVT = Op.getOperand(0).getValueType();
2208 unsigned InBits = InVT.getScalarType().getSizeInBits();
2209 KnownZero = KnownZero.zext(InBits);
2210 KnownOne = KnownOne.zext(InBits);
2211 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2212 KnownZero = KnownZero.trunc(BitWidth);
2213 KnownOne = KnownOne.trunc(BitWidth);
2216 case ISD::AssertZext: {
2217 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2218 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2219 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2220 KnownZero |= (~InMask);
2221 KnownOne &= (~KnownZero);
2225 // All bits are zero except the low bit.
2226 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2230 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2231 // We know that the top bits of C-X are clear if X contains less bits
2232 // than C (i.e. no wrap-around can happen). For example, 20-X is
2233 // positive if we can prove that X is >= 0 and < 16.
2234 if (CLHS->getAPIntValue().isNonNegative()) {
2235 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2236 // NLZ can't be BitWidth with no sign bit
2237 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2238 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2240 // If all of the MaskV bits are known to be zero, then we know the
2241 // output top bits are zero, because we now know that the output is
2243 if ((KnownZero2 & MaskV) == MaskV) {
2244 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2245 // Top bits known zero.
2246 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2254 // Output known-0 bits are known if clear or set in both the low clear bits
2255 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2256 // low 3 bits clear.
2257 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2258 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2260 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2261 KnownZeroOut = std::min(KnownZeroOut,
2262 KnownZero2.countTrailingOnes());
2264 if (Op.getOpcode() == ISD::ADD) {
2265 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2269 // With ADDE, a carry bit may be added in, so we can only use this
2270 // information if we know (at least) that the low two bits are clear. We
2271 // then return to the caller that the low bit is unknown but that other bits
2273 if (KnownZeroOut >= 2) // ADDE
2274 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2278 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2279 const APInt &RA = Rem->getAPIntValue().abs();
2280 if (RA.isPowerOf2()) {
2281 APInt LowBits = RA - 1;
2282 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2284 // The low bits of the first operand are unchanged by the srem.
2285 KnownZero = KnownZero2 & LowBits;
2286 KnownOne = KnownOne2 & LowBits;
2288 // If the first operand is non-negative or has all low bits zero, then
2289 // the upper bits are all zero.
2290 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2291 KnownZero |= ~LowBits;
2293 // If the first operand is negative and not all low bits are zero, then
2294 // the upper bits are all one.
2295 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2296 KnownOne |= ~LowBits;
2297 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2302 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2303 const APInt &RA = Rem->getAPIntValue();
2304 if (RA.isPowerOf2()) {
2305 APInt LowBits = (RA - 1);
2306 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2308 // The upper bits are all zero, the lower ones are unchanged.
2309 KnownZero = KnownZero2 | ~LowBits;
2310 KnownOne = KnownOne2 & LowBits;
2315 // Since the result is less than or equal to either operand, any leading
2316 // zero bits in either operand must also exist in the result.
2317 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2318 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2320 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2321 KnownZero2.countLeadingOnes());
2322 KnownOne.clearAllBits();
2323 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2326 case ISD::FrameIndex:
2327 case ISD::TargetFrameIndex:
2328 if (unsigned Align = InferPtrAlignment(Op)) {
2329 // The low bits are known zero if the pointer is aligned.
2330 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2336 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2339 case ISD::INTRINSIC_WO_CHAIN:
2340 case ISD::INTRINSIC_W_CHAIN:
2341 case ISD::INTRINSIC_VOID:
2342 // Allow the target to implement this method for its nodes.
2343 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2347 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2350 /// ComputeNumSignBits - Return the number of times the sign bit of the
2351 /// register is replicated into the other bits. We know that at least 1 bit
2352 /// is always equal to the sign bit (itself), but other cases can give us
2353 /// information. For example, immediately after an "SRA X, 2", we know that
2354 /// the top 3 bits are all equal to each other, so we return 3.
2355 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2356 EVT VT = Op.getValueType();
2357 assert(VT.isInteger() && "Invalid VT!");
2358 unsigned VTBits = VT.getScalarType().getSizeInBits();
2360 unsigned FirstAnswer = 1;
2363 return 1; // Limit search depth.
2365 switch (Op.getOpcode()) {
2367 case ISD::AssertSext:
2368 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2369 return VTBits-Tmp+1;
2370 case ISD::AssertZext:
2371 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2374 case ISD::Constant: {
2375 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2376 return Val.getNumSignBits();
2379 case ISD::SIGN_EXTEND:
2381 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2382 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2384 case ISD::SIGN_EXTEND_INREG:
2385 // Max of the input and what this extends.
2387 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2390 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2391 return std::max(Tmp, Tmp2);
2394 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2395 // SRA X, C -> adds C sign bits.
2396 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2397 Tmp += C->getZExtValue();
2398 if (Tmp > VTBits) Tmp = VTBits;
2402 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2403 // shl destroys sign bits.
2404 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2405 if (C->getZExtValue() >= VTBits || // Bad shift.
2406 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2407 return Tmp - C->getZExtValue();
2412 case ISD::XOR: // NOT is handled here.
2413 // Logical binary ops preserve the number of sign bits at the worst.
2414 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2416 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2417 FirstAnswer = std::min(Tmp, Tmp2);
2418 // We computed what we know about the sign bits as our first
2419 // answer. Now proceed to the generic code that uses
2420 // computeKnownBits, and pick whichever answer is better.
2425 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2426 if (Tmp == 1) return 1; // Early out.
2427 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2428 return std::min(Tmp, Tmp2);
2436 if (Op.getResNo() != 1)
2438 // The boolean result conforms to getBooleanContents. Fall through.
2439 // If setcc returns 0/-1, all bits are sign bits.
2440 // We know that we have an integer-based boolean since these operations
2441 // are only available for integer.
2442 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2443 TargetLowering::ZeroOrNegativeOneBooleanContent)
2447 // If setcc returns 0/-1, all bits are sign bits.
2448 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2449 TargetLowering::ZeroOrNegativeOneBooleanContent)
2454 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2455 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2457 // Handle rotate right by N like a rotate left by 32-N.
2458 if (Op.getOpcode() == ISD::ROTR)
2459 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2461 // If we aren't rotating out all of the known-in sign bits, return the
2462 // number that are left. This handles rotl(sext(x), 1) for example.
2463 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2464 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2468 // Add can have at most one carry bit. Thus we know that the output
2469 // is, at worst, one more bit than the inputs.
2470 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2471 if (Tmp == 1) return 1; // Early out.
2473 // Special case decrementing a value (ADD X, -1):
2474 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2475 if (CRHS->isAllOnesValue()) {
2476 APInt KnownZero, KnownOne;
2477 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2479 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2481 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2484 // If we are subtracting one from a positive number, there is no carry
2485 // out of the result.
2486 if (KnownZero.isNegative())
2490 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2491 if (Tmp2 == 1) return 1;
2492 return std::min(Tmp, Tmp2)-1;
2495 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2496 if (Tmp2 == 1) return 1;
2499 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2500 if (CLHS->isNullValue()) {
2501 APInt KnownZero, KnownOne;
2502 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2503 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2505 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2508 // If the input is known to be positive (the sign bit is known clear),
2509 // the output of the NEG has the same number of sign bits as the input.
2510 if (KnownZero.isNegative())
2513 // Otherwise, we treat this like a SUB.
2516 // Sub can have at most one carry bit. Thus we know that the output
2517 // is, at worst, one more bit than the inputs.
2518 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2519 if (Tmp == 1) return 1; // Early out.
2520 return std::min(Tmp, Tmp2)-1;
2522 // FIXME: it's tricky to do anything useful for this, but it is an important
2523 // case for targets like X86.
2527 // If we are looking at the loaded value of the SDNode.
2528 if (Op.getResNo() == 0) {
2529 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2530 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2531 unsigned ExtType = LD->getExtensionType();
2534 case ISD::SEXTLOAD: // '17' bits known
2535 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2536 return VTBits-Tmp+1;
2537 case ISD::ZEXTLOAD: // '16' bits known
2538 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2544 // Allow the target to implement this method for its nodes.
2545 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2546 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2547 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2548 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2549 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2550 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2553 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2554 // use this information.
2555 APInt KnownZero, KnownOne;
2556 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2559 if (KnownZero.isNegative()) { // sign bit is 0
2561 } else if (KnownOne.isNegative()) { // sign bit is 1;
2568 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2569 // the number of identical bits in the top of the input value.
2571 Mask <<= Mask.getBitWidth()-VTBits;
2572 // Return # leading zeros. We use 'min' here in case Val was zero before
2573 // shifting. We don't want to return '64' as for an i32 "0".
2574 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2577 /// isBaseWithConstantOffset - Return true if the specified operand is an
2578 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2579 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2580 /// semantics as an ADD. This handles the equivalence:
2581 /// X|Cst == X+Cst iff X&Cst = 0.
2582 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2583 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2584 !isa<ConstantSDNode>(Op.getOperand(1)))
2587 if (Op.getOpcode() == ISD::OR &&
2588 !MaskedValueIsZero(Op.getOperand(0),
2589 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2596 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2597 // If we're told that NaNs won't happen, assume they won't.
2598 if (getTarget().Options.NoNaNsFPMath)
2601 // If the value is a constant, we can obviously see if it is a NaN or not.
2602 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2603 return !C->getValueAPF().isNaN();
2605 // TODO: Recognize more cases here.
2610 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2611 // If the value is a constant, we can obviously see if it is a zero or not.
2612 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2613 return !C->isZero();
2615 // TODO: Recognize more cases here.
2616 switch (Op.getOpcode()) {
2619 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2620 return !C->isNullValue();
2627 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2628 // Check the obvious case.
2629 if (A == B) return true;
2631 // For for negative and positive zero.
2632 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2633 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2634 if (CA->isZero() && CB->isZero()) return true;
2636 // Otherwise they may not be equal.
2640 /// getNode - Gets or creates the specified node.
2642 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2643 FoldingSetNodeID ID;
2644 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2646 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2647 return SDValue(E, 0);
2649 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2650 DL.getDebugLoc(), getVTList(VT));
2651 CSEMap.InsertNode(N, IP);
2654 return SDValue(N, 0);
2657 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2658 EVT VT, SDValue Operand) {
2659 // Constant fold unary operations with an integer constant operand. Even
2660 // opaque constant will be folded, because the folding of unary operations
2661 // doesn't create new constants with different values. Nevertheless, the
2662 // opaque flag is preserved during folding to prevent future folding with
2664 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2665 const APInt &Val = C->getAPIntValue();
2668 case ISD::SIGN_EXTEND:
2669 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2670 C->isTargetOpcode(), C->isOpaque());
2671 case ISD::ANY_EXTEND:
2672 case ISD::ZERO_EXTEND:
2674 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2675 C->isTargetOpcode(), C->isOpaque());
2676 case ISD::UINT_TO_FP:
2677 case ISD::SINT_TO_FP: {
2678 APFloat apf(EVTToAPFloatSemantics(VT),
2679 APInt::getNullValue(VT.getSizeInBits()));
2680 (void)apf.convertFromAPInt(Val,
2681 Opcode==ISD::SINT_TO_FP,
2682 APFloat::rmNearestTiesToEven);
2683 return getConstantFP(apf, VT);
2686 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2687 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), VT);
2688 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2689 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2690 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2691 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2694 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2697 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2700 case ISD::CTLZ_ZERO_UNDEF:
2701 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2704 case ISD::CTTZ_ZERO_UNDEF:
2705 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2710 // Constant fold unary operations with a floating point constant operand.
2711 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2712 APFloat V = C->getValueAPF(); // make copy
2716 return getConstantFP(V, VT);
2719 return getConstantFP(V, VT);
2721 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2722 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2723 return getConstantFP(V, VT);
2727 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2728 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2729 return getConstantFP(V, VT);
2733 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2734 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2735 return getConstantFP(V, VT);
2738 case ISD::FP_EXTEND: {
2740 // This can return overflow, underflow, or inexact; we don't care.
2741 // FIXME need to be more flexible about rounding mode.
2742 (void)V.convert(EVTToAPFloatSemantics(VT),
2743 APFloat::rmNearestTiesToEven, &ignored);
2744 return getConstantFP(V, VT);
2746 case ISD::FP_TO_SINT:
2747 case ISD::FP_TO_UINT: {
2750 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2751 // FIXME need to be more flexible about rounding mode.
2752 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2753 Opcode==ISD::FP_TO_SINT,
2754 APFloat::rmTowardZero, &ignored);
2755 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2757 APInt api(VT.getSizeInBits(), x);
2758 return getConstant(api, VT);
2761 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2762 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), VT);
2763 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2764 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2765 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2766 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2771 // Constant fold unary operations with a vector integer operand.
2772 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2773 if (BV->isConstant()) {
2776 // FIXME: Entirely reasonable to perform folding of other unary
2777 // operations here as the need arises.
2779 case ISD::UINT_TO_FP:
2780 case ISD::SINT_TO_FP: {
2781 SmallVector<SDValue, 8> Ops;
2782 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2783 SDValue OpN = BV->getOperand(i);
2784 // Let the above scalar folding handle the conversion of each
2786 OpN = getNode(ISD::SINT_TO_FP, DL, VT.getVectorElementType(),
2790 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2796 unsigned OpOpcode = Operand.getNode()->getOpcode();
2798 case ISD::TokenFactor:
2799 case ISD::MERGE_VALUES:
2800 case ISD::CONCAT_VECTORS:
2801 return Operand; // Factor, merge or concat of one node? No need.
2802 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2803 case ISD::FP_EXTEND:
2804 assert(VT.isFloatingPoint() &&
2805 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2806 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2807 assert((!VT.isVector() ||
2808 VT.getVectorNumElements() ==
2809 Operand.getValueType().getVectorNumElements()) &&
2810 "Vector element count mismatch!");
2811 if (Operand.getOpcode() == ISD::UNDEF)
2812 return getUNDEF(VT);
2814 case ISD::SIGN_EXTEND:
2815 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2816 "Invalid SIGN_EXTEND!");
2817 if (Operand.getValueType() == VT) return Operand; // noop extension
2818 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2819 "Invalid sext node, dst < src!");
2820 assert((!VT.isVector() ||
2821 VT.getVectorNumElements() ==
2822 Operand.getValueType().getVectorNumElements()) &&
2823 "Vector element count mismatch!");
2824 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2825 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2826 else if (OpOpcode == ISD::UNDEF)
2827 // sext(undef) = 0, because the top bits will all be the same.
2828 return getConstant(0, VT);
2830 case ISD::ZERO_EXTEND:
2831 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2832 "Invalid ZERO_EXTEND!");
2833 if (Operand.getValueType() == VT) return Operand; // noop extension
2834 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2835 "Invalid zext node, dst < src!");
2836 assert((!VT.isVector() ||
2837 VT.getVectorNumElements() ==
2838 Operand.getValueType().getVectorNumElements()) &&
2839 "Vector element count mismatch!");
2840 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2841 return getNode(ISD::ZERO_EXTEND, DL, VT,
2842 Operand.getNode()->getOperand(0));
2843 else if (OpOpcode == ISD::UNDEF)
2844 // zext(undef) = 0, because the top bits will be zero.
2845 return getConstant(0, VT);
2847 case ISD::ANY_EXTEND:
2848 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2849 "Invalid ANY_EXTEND!");
2850 if (Operand.getValueType() == VT) return Operand; // noop extension
2851 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2852 "Invalid anyext node, dst < src!");
2853 assert((!VT.isVector() ||
2854 VT.getVectorNumElements() ==
2855 Operand.getValueType().getVectorNumElements()) &&
2856 "Vector element count mismatch!");
2858 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2859 OpOpcode == ISD::ANY_EXTEND)
2860 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2861 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2862 else if (OpOpcode == ISD::UNDEF)
2863 return getUNDEF(VT);
2865 // (ext (trunx x)) -> x
2866 if (OpOpcode == ISD::TRUNCATE) {
2867 SDValue OpOp = Operand.getNode()->getOperand(0);
2868 if (OpOp.getValueType() == VT)
2873 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2874 "Invalid TRUNCATE!");
2875 if (Operand.getValueType() == VT) return Operand; // noop truncate
2876 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2877 "Invalid truncate node, src < dst!");
2878 assert((!VT.isVector() ||
2879 VT.getVectorNumElements() ==
2880 Operand.getValueType().getVectorNumElements()) &&
2881 "Vector element count mismatch!");
2882 if (OpOpcode == ISD::TRUNCATE)
2883 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2884 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2885 OpOpcode == ISD::ANY_EXTEND) {
2886 // If the source is smaller than the dest, we still need an extend.
2887 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2888 .bitsLT(VT.getScalarType()))
2889 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2890 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2891 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2892 return Operand.getNode()->getOperand(0);
2894 if (OpOpcode == ISD::UNDEF)
2895 return getUNDEF(VT);
2898 // Basic sanity checking.
2899 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2900 && "Cannot BITCAST between types of different sizes!");
2901 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2902 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2903 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2904 if (OpOpcode == ISD::UNDEF)
2905 return getUNDEF(VT);
2907 case ISD::SCALAR_TO_VECTOR:
2908 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2909 (VT.getVectorElementType() == Operand.getValueType() ||
2910 (VT.getVectorElementType().isInteger() &&
2911 Operand.getValueType().isInteger() &&
2912 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2913 "Illegal SCALAR_TO_VECTOR node!");
2914 if (OpOpcode == ISD::UNDEF)
2915 return getUNDEF(VT);
2916 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2917 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2918 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2919 Operand.getConstantOperandVal(1) == 0 &&
2920 Operand.getOperand(0).getValueType() == VT)
2921 return Operand.getOperand(0);
2924 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2925 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2926 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2927 Operand.getNode()->getOperand(0));
2928 if (OpOpcode == ISD::FNEG) // --X -> X
2929 return Operand.getNode()->getOperand(0);
2932 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2933 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2938 SDVTList VTs = getVTList(VT);
2939 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2940 FoldingSetNodeID ID;
2941 SDValue Ops[1] = { Operand };
2942 AddNodeIDNode(ID, Opcode, VTs, Ops);
2944 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2945 return SDValue(E, 0);
2947 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2948 DL.getDebugLoc(), VTs, Operand);
2949 CSEMap.InsertNode(N, IP);
2951 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2952 DL.getDebugLoc(), VTs, Operand);
2956 return SDValue(N, 0);
2959 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2960 SDNode *Cst1, SDNode *Cst2) {
2961 // If the opcode is a target-specific ISD node, there's nothing we can
2962 // do here and the operand rules may not line up with the below, so
2964 if (Opcode >= ISD::BUILTIN_OP_END)
2967 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2968 SmallVector<SDValue, 4> Outputs;
2969 EVT SVT = VT.getScalarType();
2971 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2972 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2973 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
2976 if (Scalar1 && Scalar2)
2977 // Scalar instruction.
2978 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2980 // For vectors extract each constant element into Inputs so we can constant
2981 // fold them individually.
2982 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2983 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2987 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2989 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2990 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2991 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2992 if (!V1 || !V2) // Not a constant, bail.
2995 if (V1->isOpaque() || V2->isOpaque())
2998 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2999 // FIXME: This is valid and could be handled by truncating the APInts.
3000 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3003 Inputs.push_back(std::make_pair(V1, V2));
3007 // We have a number of constant values, constant fold them element by element.
3008 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3009 const APInt &C1 = Inputs[I].first->getAPIntValue();
3010 const APInt &C2 = Inputs[I].second->getAPIntValue();
3014 Outputs.push_back(getConstant(C1 + C2, SVT));
3017 Outputs.push_back(getConstant(C1 - C2, SVT));
3020 Outputs.push_back(getConstant(C1 * C2, SVT));
3023 if (!C2.getBoolValue())
3025 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3028 if (!C2.getBoolValue())
3030 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3033 if (!C2.getBoolValue())
3035 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3038 if (!C2.getBoolValue())
3040 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3043 Outputs.push_back(getConstant(C1 & C2, SVT));
3046 Outputs.push_back(getConstant(C1 | C2, SVT));
3049 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3052 Outputs.push_back(getConstant(C1 << C2, SVT));
3055 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3058 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3061 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3064 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3071 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3072 "Expected a scalar or vector!"));
3074 // Handle the scalar case first.
3076 return Outputs.back();
3078 // We may have a vector type but a scalar result. Create a splat.
3079 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3081 // Build a big vector out of the scalar elements we generated.
3082 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3085 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3086 SDValue N2, bool nuw, bool nsw, bool exact) {
3087 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3088 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3091 case ISD::TokenFactor:
3092 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3093 N2.getValueType() == MVT::Other && "Invalid token factor!");
3094 // Fold trivial token factors.
3095 if (N1.getOpcode() == ISD::EntryToken) return N2;
3096 if (N2.getOpcode() == ISD::EntryToken) return N1;
3097 if (N1 == N2) return N1;
3099 case ISD::CONCAT_VECTORS:
3100 // Concat of UNDEFs is UNDEF.
3101 if (N1.getOpcode() == ISD::UNDEF &&
3102 N2.getOpcode() == ISD::UNDEF)
3103 return getUNDEF(VT);
3105 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3106 // one big BUILD_VECTOR.
3107 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3108 N2.getOpcode() == ISD::BUILD_VECTOR) {
3109 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3110 N1.getNode()->op_end());
3111 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3112 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3116 assert(VT.isInteger() && "This operator does not apply to FP types!");
3117 assert(N1.getValueType() == N2.getValueType() &&
3118 N1.getValueType() == VT && "Binary operator types must match!");
3119 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3120 // worth handling here.
3121 if (N2C && N2C->isNullValue())
3123 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3130 assert(VT.isInteger() && "This operator does not apply to FP types!");
3131 assert(N1.getValueType() == N2.getValueType() &&
3132 N1.getValueType() == VT && "Binary operator types must match!");
3133 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3134 // it's worth handling here.
3135 if (N2C && N2C->isNullValue())
3145 assert(VT.isInteger() && "This operator does not apply to FP types!");
3146 assert(N1.getValueType() == N2.getValueType() &&
3147 N1.getValueType() == VT && "Binary operator types must match!");
3154 if (getTarget().Options.UnsafeFPMath) {
3155 if (Opcode == ISD::FADD) {
3157 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3158 if (CFP->getValueAPF().isZero())
3161 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3162 if (CFP->getValueAPF().isZero())
3164 } else if (Opcode == ISD::FSUB) {
3166 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3167 if (CFP->getValueAPF().isZero())
3169 } else if (Opcode == ISD::FMUL) {
3170 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3173 // If the first operand isn't the constant, try the second
3175 CFP = dyn_cast<ConstantFPSDNode>(N2);
3182 return SDValue(CFP,0);
3184 if (CFP->isExactlyValue(1.0))
3189 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3190 assert(N1.getValueType() == N2.getValueType() &&
3191 N1.getValueType() == VT && "Binary operator types must match!");
3193 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3194 assert(N1.getValueType() == VT &&
3195 N1.getValueType().isFloatingPoint() &&
3196 N2.getValueType().isFloatingPoint() &&
3197 "Invalid FCOPYSIGN!");
3204 assert(VT == N1.getValueType() &&
3205 "Shift operators return type must be the same as their first arg");
3206 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3207 "Shifts only work on integers");
3208 assert((!VT.isVector() || VT == N2.getValueType()) &&
3209 "Vector shift amounts must be in the same as their first arg");
3210 // Verify that the shift amount VT is bit enough to hold valid shift
3211 // amounts. This catches things like trying to shift an i1024 value by an
3212 // i8, which is easy to fall into in generic code that uses
3213 // TLI.getShiftAmount().
3214 assert(N2.getValueType().getSizeInBits() >=
3215 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3216 "Invalid use of small shift amount with oversized value!");
3218 // Always fold shifts of i1 values so the code generator doesn't need to
3219 // handle them. Since we know the size of the shift has to be less than the
3220 // size of the value, the shift/rotate count is guaranteed to be zero.
3223 if (N2C && N2C->isNullValue())
3226 case ISD::FP_ROUND_INREG: {
3227 EVT EVT = cast<VTSDNode>(N2)->getVT();
3228 assert(VT == N1.getValueType() && "Not an inreg round!");
3229 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3230 "Cannot FP_ROUND_INREG integer types");
3231 assert(EVT.isVector() == VT.isVector() &&
3232 "FP_ROUND_INREG type should be vector iff the operand "
3234 assert((!EVT.isVector() ||
3235 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3236 "Vector element counts must match in FP_ROUND_INREG");
3237 assert(EVT.bitsLE(VT) && "Not rounding down!");
3239 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3243 assert(VT.isFloatingPoint() &&
3244 N1.getValueType().isFloatingPoint() &&
3245 VT.bitsLE(N1.getValueType()) &&
3246 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3247 if (N1.getValueType() == VT) return N1; // noop conversion.
3249 case ISD::AssertSext:
3250 case ISD::AssertZext: {
3251 EVT EVT = cast<VTSDNode>(N2)->getVT();
3252 assert(VT == N1.getValueType() && "Not an inreg extend!");
3253 assert(VT.isInteger() && EVT.isInteger() &&
3254 "Cannot *_EXTEND_INREG FP types");
3255 assert(!EVT.isVector() &&
3256 "AssertSExt/AssertZExt type should be the vector element type "
3257 "rather than the vector type!");
3258 assert(EVT.bitsLE(VT) && "Not extending!");
3259 if (VT == EVT) return N1; // noop assertion.
3262 case ISD::SIGN_EXTEND_INREG: {
3263 EVT EVT = cast<VTSDNode>(N2)->getVT();
3264 assert(VT == N1.getValueType() && "Not an inreg extend!");
3265 assert(VT.isInteger() && EVT.isInteger() &&
3266 "Cannot *_EXTEND_INREG FP types");
3267 assert(EVT.isVector() == VT.isVector() &&
3268 "SIGN_EXTEND_INREG type should be vector iff the operand "
3270 assert((!EVT.isVector() ||
3271 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3272 "Vector element counts must match in SIGN_EXTEND_INREG");
3273 assert(EVT.bitsLE(VT) && "Not extending!");
3274 if (EVT == VT) return N1; // Not actually extending
3277 APInt Val = N1C->getAPIntValue();
3278 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3279 Val <<= Val.getBitWidth()-FromBits;
3280 Val = Val.ashr(Val.getBitWidth()-FromBits);
3281 return getConstant(Val, VT);
3285 case ISD::EXTRACT_VECTOR_ELT:
3286 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3287 if (N1.getOpcode() == ISD::UNDEF)
3288 return getUNDEF(VT);
3290 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3291 // expanding copies of large vectors from registers.
3293 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3294 N1.getNumOperands() > 0) {
3296 N1.getOperand(0).getValueType().getVectorNumElements();
3297 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3298 N1.getOperand(N2C->getZExtValue() / Factor),
3299 getConstant(N2C->getZExtValue() % Factor,
3300 N2.getValueType()));
3303 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3304 // expanding large vector constants.
3305 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3306 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3308 if (VT != Elt.getValueType())
3309 // If the vector element type is not legal, the BUILD_VECTOR operands
3310 // are promoted and implicitly truncated, and the result implicitly
3311 // extended. Make that explicit here.
3312 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3317 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3318 // operations are lowered to scalars.
3319 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3320 // If the indices are the same, return the inserted element else
3321 // if the indices are known different, extract the element from
3322 // the original vector.
3323 SDValue N1Op2 = N1.getOperand(2);
3324 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3326 if (N1Op2C && N2C) {
3327 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3328 if (VT == N1.getOperand(1).getValueType())
3329 return N1.getOperand(1);
3331 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3334 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3338 case ISD::EXTRACT_ELEMENT:
3339 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3340 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3341 (N1.getValueType().isInteger() == VT.isInteger()) &&
3342 N1.getValueType() != VT &&
3343 "Wrong types for EXTRACT_ELEMENT!");
3345 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3346 // 64-bit integers into 32-bit parts. Instead of building the extract of
3347 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3348 if (N1.getOpcode() == ISD::BUILD_PAIR)
3349 return N1.getOperand(N2C->getZExtValue());
3351 // EXTRACT_ELEMENT of a constant int is also very common.
3352 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3353 unsigned ElementSize = VT.getSizeInBits();
3354 unsigned Shift = ElementSize * N2C->getZExtValue();
3355 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3356 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3359 case ISD::EXTRACT_SUBVECTOR: {
3361 if (VT.isSimple() && N1.getValueType().isSimple()) {
3362 assert(VT.isVector() && N1.getValueType().isVector() &&
3363 "Extract subvector VTs must be a vectors!");
3364 assert(VT.getVectorElementType() ==
3365 N1.getValueType().getVectorElementType() &&
3366 "Extract subvector VTs must have the same element type!");
3367 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3368 "Extract subvector must be from larger vector to smaller vector!");
3370 if (isa<ConstantSDNode>(Index.getNode())) {
3371 assert((VT.getVectorNumElements() +
3372 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3373 <= N1.getValueType().getVectorNumElements())
3374 && "Extract subvector overflow!");
3377 // Trivial extraction.
3378 if (VT.getSimpleVT() == N1.getSimpleValueType())
3385 // Perform trivial constant folding.
3387 FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()))
3390 // Canonicalize constant to RHS if commutative.
3391 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3392 std::swap(N1C, N2C);
3396 // Constant fold FP operations.
3397 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3398 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3399 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3401 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3402 // Canonicalize constant to RHS if commutative.
3403 std::swap(N1CFP, N2CFP);
3406 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3407 APFloat::opStatus s;
3410 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3411 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3412 return getConstantFP(V1, VT);
3415 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3416 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3417 return getConstantFP(V1, VT);
3420 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3421 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3422 return getConstantFP(V1, VT);
3425 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3426 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3427 s!=APFloat::opDivByZero)) {
3428 return getConstantFP(V1, VT);
3432 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3433 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3434 s!=APFloat::opDivByZero)) {
3435 return getConstantFP(V1, VT);
3438 case ISD::FCOPYSIGN:
3440 return getConstantFP(V1, VT);
3445 if (Opcode == ISD::FP_ROUND) {
3446 APFloat V = N1CFP->getValueAPF(); // make copy
3448 // This can return overflow, underflow, or inexact; we don't care.
3449 // FIXME need to be more flexible about rounding mode.
3450 (void)V.convert(EVTToAPFloatSemantics(VT),
3451 APFloat::rmNearestTiesToEven, &ignored);
3452 return getConstantFP(V, VT);
3456 // Canonicalize an UNDEF to the RHS, even over a constant.
3457 if (N1.getOpcode() == ISD::UNDEF) {
3458 if (isCommutativeBinOp(Opcode)) {
3462 case ISD::FP_ROUND_INREG:
3463 case ISD::SIGN_EXTEND_INREG:
3469 return N1; // fold op(undef, arg2) -> undef
3477 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3478 // For vectors, we can't easily build an all zero vector, just return
3485 // Fold a bunch of operators when the RHS is undef.
3486 if (N2.getOpcode() == ISD::UNDEF) {
3489 if (N1.getOpcode() == ISD::UNDEF)
3490 // Handle undef ^ undef -> 0 special case. This is a common
3492 return getConstant(0, VT);
3502 return N2; // fold op(arg1, undef) -> undef
3508 if (getTarget().Options.UnsafeFPMath)
3516 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3517 // For vectors, we can't easily build an all zero vector, just return
3522 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3523 // For vectors, we can't easily build an all one vector, just return
3531 // Memoize this node if possible.
3533 SDVTList VTs = getVTList(VT);
3534 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3535 if (VT != MVT::Glue) {
3536 SDValue Ops[] = {N1, N2};
3537 FoldingSetNodeID ID;
3538 AddNodeIDNode(ID, Opcode, VTs, Ops);
3540 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3542 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3543 return SDValue(E, 0);
3545 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3547 CSEMap.InsertNode(N, IP);
3550 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3554 return SDValue(N, 0);
3557 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3558 SDValue N1, SDValue N2, SDValue N3) {
3559 // Perform various simplifications.
3560 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3563 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3564 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3565 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3566 if (N1CFP && N2CFP && N3CFP) {
3567 APFloat V1 = N1CFP->getValueAPF();
3568 const APFloat &V2 = N2CFP->getValueAPF();
3569 const APFloat &V3 = N3CFP->getValueAPF();
3570 APFloat::opStatus s =
3571 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3572 if (s != APFloat::opInvalidOp)
3573 return getConstantFP(V1, VT);
3577 case ISD::CONCAT_VECTORS:
3578 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3579 // one big BUILD_VECTOR.
3580 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3581 N2.getOpcode() == ISD::BUILD_VECTOR &&
3582 N3.getOpcode() == ISD::BUILD_VECTOR) {
3583 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3584 N1.getNode()->op_end());
3585 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3586 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3587 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3591 // Use FoldSetCC to simplify SETCC's.
3592 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3593 if (Simp.getNode()) return Simp;
3598 if (N1C->getZExtValue())
3599 return N2; // select true, X, Y -> X
3600 return N3; // select false, X, Y -> Y
3603 if (N2 == N3) return N2; // select C, X, X -> X
3605 case ISD::VECTOR_SHUFFLE:
3606 llvm_unreachable("should use getVectorShuffle constructor!");
3607 case ISD::INSERT_SUBVECTOR: {
3609 if (VT.isSimple() && N1.getValueType().isSimple()
3610 && N2.getValueType().isSimple()) {
3611 assert(VT.isVector() && N1.getValueType().isVector() &&
3612 N2.getValueType().isVector() &&
3613 "Insert subvector VTs must be a vectors");
3614 assert(VT == N1.getValueType() &&
3615 "Dest and insert subvector source types must match!");
3616 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3617 "Insert subvector must be from smaller vector to larger vector!");
3618 if (isa<ConstantSDNode>(Index.getNode())) {
3619 assert((N2.getValueType().getVectorNumElements() +
3620 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3621 <= VT.getVectorNumElements())
3622 && "Insert subvector overflow!");
3625 // Trivial insertion.
3626 if (VT.getSimpleVT() == N2.getSimpleValueType())
3632 // Fold bit_convert nodes from a type to themselves.
3633 if (N1.getValueType() == VT)
3638 // Memoize node if it doesn't produce a flag.
3640 SDVTList VTs = getVTList(VT);
3641 if (VT != MVT::Glue) {
3642 SDValue Ops[] = { N1, N2, N3 };
3643 FoldingSetNodeID ID;
3644 AddNodeIDNode(ID, Opcode, VTs, Ops);
3646 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3647 return SDValue(E, 0);
3649 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3650 DL.getDebugLoc(), VTs, N1, N2, N3);
3651 CSEMap.InsertNode(N, IP);
3653 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3654 DL.getDebugLoc(), VTs, N1, N2, N3);
3658 return SDValue(N, 0);
3661 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3662 SDValue N1, SDValue N2, SDValue N3,
3664 SDValue Ops[] = { N1, N2, N3, N4 };
3665 return getNode(Opcode, DL, VT, Ops);
3668 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3669 SDValue N1, SDValue N2, SDValue N3,
3670 SDValue N4, SDValue N5) {
3671 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3672 return getNode(Opcode, DL, VT, Ops);
3675 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3676 /// the incoming stack arguments to be loaded from the stack.
3677 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3678 SmallVector<SDValue, 8> ArgChains;
3680 // Include the original chain at the beginning of the list. When this is
3681 // used by target LowerCall hooks, this helps legalize find the
3682 // CALLSEQ_BEGIN node.
3683 ArgChains.push_back(Chain);
3685 // Add a chain value for each stack argument.
3686 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3687 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3688 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3689 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3690 if (FI->getIndex() < 0)
3691 ArgChains.push_back(SDValue(L, 1));
3693 // Build a tokenfactor for all the chains.
3694 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3697 /// getMemsetValue - Vectorized representation of the memset value
3699 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3701 assert(Value.getOpcode() != ISD::UNDEF);
3703 unsigned NumBits = VT.getScalarType().getSizeInBits();
3704 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3705 assert(C->getAPIntValue().getBitWidth() == 8);
3706 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3708 return DAG.getConstant(Val, VT);
3709 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3712 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3714 // Use a multiplication with 0x010101... to extend the input to the
3716 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3717 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3723 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3724 /// used when a memcpy is turned into a memset when the source is a constant
3726 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3727 const TargetLowering &TLI, StringRef Str) {
3728 // Handle vector with all elements zero.
3731 return DAG.getConstant(0, VT);
3732 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3733 return DAG.getConstantFP(0.0, VT);
3734 else if (VT.isVector()) {
3735 unsigned NumElts = VT.getVectorNumElements();
3736 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3737 return DAG.getNode(ISD::BITCAST, dl, VT,
3738 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3741 llvm_unreachable("Expected type!");
3744 assert(!VT.isVector() && "Can't handle vector type here!");
3745 unsigned NumVTBits = VT.getSizeInBits();
3746 unsigned NumVTBytes = NumVTBits / 8;
3747 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3749 APInt Val(NumVTBits, 0);
3750 if (TLI.isLittleEndian()) {
3751 for (unsigned i = 0; i != NumBytes; ++i)
3752 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3754 for (unsigned i = 0; i != NumBytes; ++i)
3755 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3758 // If the "cost" of materializing the integer immediate is less than the cost
3759 // of a load, then it is cost effective to turn the load into the immediate.
3760 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3761 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3762 return DAG.getConstant(Val, VT);
3763 return SDValue(nullptr, 0);
3766 /// getMemBasePlusOffset - Returns base and offset node for the
3768 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3769 SelectionDAG &DAG) {
3770 EVT VT = Base.getValueType();
3771 return DAG.getNode(ISD::ADD, dl,
3772 VT, Base, DAG.getConstant(Offset, VT));
3775 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3777 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3778 unsigned SrcDelta = 0;
3779 GlobalAddressSDNode *G = nullptr;
3780 if (Src.getOpcode() == ISD::GlobalAddress)
3781 G = cast<GlobalAddressSDNode>(Src);
3782 else if (Src.getOpcode() == ISD::ADD &&
3783 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3784 Src.getOperand(1).getOpcode() == ISD::Constant) {
3785 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3786 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3791 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3794 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3795 /// to replace the memset / memcpy. Return true if the number of memory ops
3796 /// is below the threshold. It returns the types of the sequence of
3797 /// memory ops to perform memset / memcpy by reference.
3798 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3799 unsigned Limit, uint64_t Size,
3800 unsigned DstAlign, unsigned SrcAlign,
3806 const TargetLowering &TLI) {
3807 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3808 "Expecting memcpy / memset source to meet alignment requirement!");
3809 // If 'SrcAlign' is zero, that means the memory operation does not need to
3810 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3811 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3812 // is the specified alignment of the memory operation. If it is zero, that
3813 // means it's possible to change the alignment of the destination.
3814 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3815 // not need to be loaded.
3816 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3817 IsMemset, ZeroMemset, MemcpyStrSrc,
3818 DAG.getMachineFunction());
3820 if (VT == MVT::Other) {
3822 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3823 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3824 VT = TLI.getPointerTy();
3826 switch (DstAlign & 7) {
3827 case 0: VT = MVT::i64; break;
3828 case 4: VT = MVT::i32; break;
3829 case 2: VT = MVT::i16; break;
3830 default: VT = MVT::i8; break;
3835 while (!TLI.isTypeLegal(LVT))
3836 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3837 assert(LVT.isInteger());
3843 unsigned NumMemOps = 0;
3845 unsigned VTSize = VT.getSizeInBits() / 8;
3846 while (VTSize > Size) {
3847 // For now, only use non-vector load / store's for the left-over pieces.
3852 if (VT.isVector() || VT.isFloatingPoint()) {
3853 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3854 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3855 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3857 else if (NewVT == MVT::i64 &&
3858 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3859 TLI.isSafeMemOpType(MVT::f64)) {
3860 // i64 is usually not legal on 32-bit targets, but f64 may be.
3868 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3869 if (NewVT == MVT::i8)
3871 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3873 NewVTSize = NewVT.getSizeInBits() / 8;
3875 // If the new VT cannot cover all of the remaining bits, then consider
3876 // issuing a (or a pair of) unaligned and overlapping load / store.
3877 // FIXME: Only does this for 64-bit or more since we don't have proper
3878 // cost model for unaligned load / store.
3881 if (NumMemOps && AllowOverlap &&
3882 VTSize >= 8 && NewVTSize < Size &&
3883 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3891 if (++NumMemOps > Limit)
3894 MemOps.push_back(VT);
3901 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3902 SDValue Chain, SDValue Dst,
3903 SDValue Src, uint64_t Size,
3904 unsigned Align, bool isVol,
3906 MachinePointerInfo DstPtrInfo,
3907 MachinePointerInfo SrcPtrInfo) {
3908 // Turn a memcpy of undef to nop.
3909 if (Src.getOpcode() == ISD::UNDEF)
3912 // Expand memcpy to a series of load and store ops if the size operand falls
3913 // below a certain threshold.
3914 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3915 // rather than maybe a humongous number of loads and stores.
3916 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3917 std::vector<EVT> MemOps;
3918 bool DstAlignCanChange = false;
3919 MachineFunction &MF = DAG.getMachineFunction();
3920 MachineFrameInfo *MFI = MF.getFrameInfo();
3922 MF.getFunction()->getAttributes().
3923 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3924 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3925 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3926 DstAlignCanChange = true;
3927 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3928 if (Align > SrcAlign)
3931 bool CopyFromStr = isMemSrcFromString(Src, Str);
3932 bool isZeroStr = CopyFromStr && Str.empty();
3933 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3935 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3936 (DstAlignCanChange ? 0 : Align),
3937 (isZeroStr ? 0 : SrcAlign),
3938 false, false, CopyFromStr, true, DAG, TLI))
3941 if (DstAlignCanChange) {
3942 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3943 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3945 // Don't promote to an alignment that would require dynamic stack
3947 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
3948 if (!TRI->needsStackRealignment(MF))
3949 while (NewAlign > Align &&
3950 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3953 if (NewAlign > Align) {
3954 // Give the stack frame object a larger alignment if needed.
3955 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3956 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3961 SmallVector<SDValue, 8> OutChains;
3962 unsigned NumMemOps = MemOps.size();
3963 uint64_t SrcOff = 0, DstOff = 0;
3964 for (unsigned i = 0; i != NumMemOps; ++i) {
3966 unsigned VTSize = VT.getSizeInBits() / 8;
3967 SDValue Value, Store;
3969 if (VTSize > Size) {
3970 // Issuing an unaligned load / store pair that overlaps with the previous
3971 // pair. Adjust the offset accordingly.
3972 assert(i == NumMemOps-1 && i != 0);
3973 SrcOff -= VTSize - Size;
3974 DstOff -= VTSize - Size;
3978 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3979 // It's unlikely a store of a vector immediate can be done in a single
3980 // instruction. It would require a load from a constantpool first.
3981 // We only handle zero vectors here.
3982 // FIXME: Handle other cases where store of vector immediate is done in
3983 // a single instruction.
3984 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3985 if (Value.getNode())
3986 Store = DAG.getStore(Chain, dl, Value,
3987 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3988 DstPtrInfo.getWithOffset(DstOff), isVol,
3992 if (!Store.getNode()) {
3993 // The type might not be legal for the target. This should only happen
3994 // if the type is smaller than a legal type, as on PPC, so the right
3995 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3996 // to Load/Store if NVT==VT.
3997 // FIXME does the case above also need this?
3998 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3999 assert(NVT.bitsGE(VT));
4000 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4001 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4002 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4003 false, MinAlign(SrcAlign, SrcOff));
4004 Store = DAG.getTruncStore(Chain, dl, Value,
4005 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4006 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4009 OutChains.push_back(Store);
4015 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4018 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4019 SDValue Chain, SDValue Dst,
4020 SDValue Src, uint64_t Size,
4021 unsigned Align, bool isVol,
4023 MachinePointerInfo DstPtrInfo,
4024 MachinePointerInfo SrcPtrInfo) {
4025 // Turn a memmove of undef to nop.
4026 if (Src.getOpcode() == ISD::UNDEF)
4029 // Expand memmove to a series of load and store ops if the size operand falls
4030 // below a certain threshold.
4031 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4032 std::vector<EVT> MemOps;
4033 bool DstAlignCanChange = false;
4034 MachineFunction &MF = DAG.getMachineFunction();
4035 MachineFrameInfo *MFI = MF.getFrameInfo();
4036 bool OptSize = MF.getFunction()->getAttributes().
4037 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4038 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4039 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4040 DstAlignCanChange = true;
4041 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4042 if (Align > SrcAlign)
4044 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4046 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4047 (DstAlignCanChange ? 0 : Align), SrcAlign,
4048 false, false, false, false, DAG, TLI))
4051 if (DstAlignCanChange) {
4052 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4053 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4054 if (NewAlign > Align) {
4055 // Give the stack frame object a larger alignment if needed.
4056 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4057 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4062 uint64_t SrcOff = 0, DstOff = 0;
4063 SmallVector<SDValue, 8> LoadValues;
4064 SmallVector<SDValue, 8> LoadChains;
4065 SmallVector<SDValue, 8> OutChains;
4066 unsigned NumMemOps = MemOps.size();
4067 for (unsigned i = 0; i < NumMemOps; i++) {
4069 unsigned VTSize = VT.getSizeInBits() / 8;
4072 Value = DAG.getLoad(VT, dl, Chain,
4073 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4074 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4075 false, false, SrcAlign);
4076 LoadValues.push_back(Value);
4077 LoadChains.push_back(Value.getValue(1));
4080 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4082 for (unsigned i = 0; i < NumMemOps; i++) {
4084 unsigned VTSize = VT.getSizeInBits() / 8;
4087 Store = DAG.getStore(Chain, dl, LoadValues[i],
4088 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4089 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4090 OutChains.push_back(Store);
4094 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4097 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4100 /// \param DAG Selection DAG where lowered code is placed.
4101 /// \param dl Link to corresponding IR location.
4102 /// \param Chain Control flow dependency.
4103 /// \param Dst Pointer to destination memory location.
4104 /// \param Src Value of byte to write into the memory.
4105 /// \param Size Number of bytes to write.
4106 /// \param Align Alignment of the destination in bytes.
4107 /// \param isVol True if destination is volatile.
4108 /// \param DstPtrInfo IR information on the memory pointer.
4109 /// \returns New head in the control flow, if lowering was successful, empty
4110 /// SDValue otherwise.
4112 /// The function tries to replace 'llvm.memset' intrinsic with several store
4113 /// operations and value calculation code. This is usually profitable for small
4115 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4116 SDValue Chain, SDValue Dst,
4117 SDValue Src, uint64_t Size,
4118 unsigned Align, bool isVol,
4119 MachinePointerInfo DstPtrInfo) {
4120 // Turn a memset of undef to nop.
4121 if (Src.getOpcode() == ISD::UNDEF)
4124 // Expand memset to a series of load/store ops if the size operand
4125 // falls below a certain threshold.
4126 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4127 std::vector<EVT> MemOps;
4128 bool DstAlignCanChange = false;
4129 MachineFunction &MF = DAG.getMachineFunction();
4130 MachineFrameInfo *MFI = MF.getFrameInfo();
4131 bool OptSize = MF.getFunction()->getAttributes().
4132 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
4133 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4134 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4135 DstAlignCanChange = true;
4137 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4138 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4139 Size, (DstAlignCanChange ? 0 : Align), 0,
4140 true, IsZeroVal, false, true, DAG, TLI))
4143 if (DstAlignCanChange) {
4144 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4145 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4146 if (NewAlign > Align) {
4147 // Give the stack frame object a larger alignment if needed.
4148 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4149 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4154 SmallVector<SDValue, 8> OutChains;
4155 uint64_t DstOff = 0;
4156 unsigned NumMemOps = MemOps.size();
4158 // Find the largest store and generate the bit pattern for it.
4159 EVT LargestVT = MemOps[0];
4160 for (unsigned i = 1; i < NumMemOps; i++)
4161 if (MemOps[i].bitsGT(LargestVT))
4162 LargestVT = MemOps[i];
4163 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4165 for (unsigned i = 0; i < NumMemOps; i++) {
4167 unsigned VTSize = VT.getSizeInBits() / 8;
4168 if (VTSize > Size) {
4169 // Issuing an unaligned load / store pair that overlaps with the previous
4170 // pair. Adjust the offset accordingly.
4171 assert(i == NumMemOps-1 && i != 0);
4172 DstOff -= VTSize - Size;
4175 // If this store is smaller than the largest store see whether we can get
4176 // the smaller value for free with a truncate.
4177 SDValue Value = MemSetValue;
4178 if (VT.bitsLT(LargestVT)) {
4179 if (!LargestVT.isVector() && !VT.isVector() &&
4180 TLI.isTruncateFree(LargestVT, VT))
4181 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4183 Value = getMemsetValue(Src, VT, DAG, dl);
4185 assert(Value.getValueType() == VT && "Value with wrong type.");
4186 SDValue Store = DAG.getStore(Chain, dl, Value,
4187 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4188 DstPtrInfo.getWithOffset(DstOff),
4189 isVol, false, Align);
4190 OutChains.push_back(Store);
4191 DstOff += VT.getSizeInBits() / 8;
4195 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4198 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4199 SDValue Src, SDValue Size,
4200 unsigned Align, bool isVol, bool AlwaysInline,
4201 MachinePointerInfo DstPtrInfo,
4202 MachinePointerInfo SrcPtrInfo) {
4203 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4205 // Check to see if we should lower the memcpy to loads and stores first.
4206 // For cases within the target-specified limits, this is the best choice.
4207 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4209 // Memcpy with size zero? Just return the original chain.
4210 if (ConstantSize->isNullValue())
4213 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4214 ConstantSize->getZExtValue(),Align,
4215 isVol, false, DstPtrInfo, SrcPtrInfo);
4216 if (Result.getNode())
4220 // Then check to see if we should lower the memcpy with target-specific
4221 // code. If the target chooses to do this, this is the next best.
4223 TSI->EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
4224 isVol, AlwaysInline, DstPtrInfo, SrcPtrInfo);
4225 if (Result.getNode())
4228 // If we really need inline code and the target declined to provide it,
4229 // use a (potentially long) sequence of loads and stores.
4231 assert(ConstantSize && "AlwaysInline requires a constant size!");
4232 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4233 ConstantSize->getZExtValue(), Align, isVol,
4234 true, DstPtrInfo, SrcPtrInfo);
4237 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4238 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4239 // respect volatile, so they may do things like read or write memory
4240 // beyond the given memory regions. But fixing this isn't easy, and most
4241 // people don't care.
4243 // Emit a library call.
4244 TargetLowering::ArgListTy Args;
4245 TargetLowering::ArgListEntry Entry;
4246 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4247 Entry.Node = Dst; Args.push_back(Entry);
4248 Entry.Node = Src; Args.push_back(Entry);
4249 Entry.Node = Size; Args.push_back(Entry);
4250 // FIXME: pass in SDLoc
4251 TargetLowering::CallLoweringInfo CLI(*this);
4252 CLI.setDebugLoc(dl).setChain(Chain)
4253 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4254 Type::getVoidTy(*getContext()),
4255 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4256 TLI->getPointerTy()), std::move(Args), 0)
4257 .setDiscardResult();
4258 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4260 return CallResult.second;
4263 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4264 SDValue Src, SDValue Size,
4265 unsigned Align, bool isVol,
4266 MachinePointerInfo DstPtrInfo,
4267 MachinePointerInfo SrcPtrInfo) {
4268 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4270 // Check to see if we should lower the memmove to loads and stores first.
4271 // For cases within the target-specified limits, this is the best choice.
4272 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4274 // Memmove with size zero? Just return the original chain.
4275 if (ConstantSize->isNullValue())
4279 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4280 ConstantSize->getZExtValue(), Align, isVol,
4281 false, DstPtrInfo, SrcPtrInfo);
4282 if (Result.getNode())
4286 // Then check to see if we should lower the memmove with target-specific
4287 // code. If the target chooses to do this, this is the next best.
4288 SDValue Result = TSI->EmitTargetCodeForMemmove(
4289 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4290 if (Result.getNode())
4293 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4294 // not be safe. See memcpy above for more details.
4296 // Emit a library call.
4297 TargetLowering::ArgListTy Args;
4298 TargetLowering::ArgListEntry Entry;
4299 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4300 Entry.Node = Dst; Args.push_back(Entry);
4301 Entry.Node = Src; Args.push_back(Entry);
4302 Entry.Node = Size; Args.push_back(Entry);
4303 // FIXME: pass in SDLoc
4304 TargetLowering::CallLoweringInfo CLI(*this);
4305 CLI.setDebugLoc(dl).setChain(Chain)
4306 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4307 Type::getVoidTy(*getContext()),
4308 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4309 TLI->getPointerTy()), std::move(Args), 0)
4310 .setDiscardResult();
4311 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4313 return CallResult.second;
4316 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4317 SDValue Src, SDValue Size,
4318 unsigned Align, bool isVol,
4319 MachinePointerInfo DstPtrInfo) {
4320 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4322 // Check to see if we should lower the memset to stores first.
4323 // For cases within the target-specified limits, this is the best choice.
4324 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4326 // Memset with size zero? Just return the original chain.
4327 if (ConstantSize->isNullValue())
4331 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4332 Align, isVol, DstPtrInfo);
4334 if (Result.getNode())
4338 // Then check to see if we should lower the memset with target-specific
4339 // code. If the target chooses to do this, this is the next best.
4340 SDValue Result = TSI->EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src,
4341 Size, Align, isVol, DstPtrInfo);
4342 if (Result.getNode())
4345 // Emit a library call.
4346 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4347 TargetLowering::ArgListTy Args;
4348 TargetLowering::ArgListEntry Entry;
4349 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4350 Args.push_back(Entry);
4352 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4353 Args.push_back(Entry);
4355 Entry.Ty = IntPtrTy;
4356 Args.push_back(Entry);
4358 // FIXME: pass in SDLoc
4359 TargetLowering::CallLoweringInfo CLI(*this);
4360 CLI.setDebugLoc(dl).setChain(Chain)
4361 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4362 Type::getVoidTy(*getContext()),
4363 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4364 TLI->getPointerTy()), std::move(Args), 0)
4365 .setDiscardResult();
4367 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4368 return CallResult.second;
4371 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4372 SDVTList VTList, ArrayRef<SDValue> Ops,
4373 MachineMemOperand *MMO,
4374 AtomicOrdering SuccessOrdering,
4375 AtomicOrdering FailureOrdering,
4376 SynchronizationScope SynchScope) {
4377 FoldingSetNodeID ID;
4378 ID.AddInteger(MemVT.getRawBits());
4379 AddNodeIDNode(ID, Opcode, VTList, Ops);
4380 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4382 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4383 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4384 return SDValue(E, 0);
4387 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4388 // SDNode doesn't have access to it. This memory will be "leaked" when
4389 // the node is deallocated, but recovered when the allocator is released.
4390 // If the number of operands is less than 5 we use AtomicSDNode's internal
4392 unsigned NumOps = Ops.size();
4393 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4396 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4397 dl.getDebugLoc(), VTList, MemVT,
4398 Ops.data(), DynOps, NumOps, MMO,
4399 SuccessOrdering, FailureOrdering,
4401 CSEMap.InsertNode(N, IP);
4403 return SDValue(N, 0);
4406 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4407 SDVTList VTList, ArrayRef<SDValue> Ops,
4408 MachineMemOperand *MMO,
4409 AtomicOrdering Ordering,
4410 SynchronizationScope SynchScope) {
4411 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4412 Ordering, SynchScope);
4415 SDValue SelectionDAG::getAtomicCmpSwap(
4416 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4417 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4418 unsigned Alignment, AtomicOrdering SuccessOrdering,
4419 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4420 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4421 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4422 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4424 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4425 Alignment = getEVTAlignment(MemVT);
4427 MachineFunction &MF = getMachineFunction();
4429 // FIXME: Volatile isn't really correct; we should keep track of atomic
4430 // orderings in the memoperand.
4431 unsigned Flags = MachineMemOperand::MOVolatile;
4432 Flags |= MachineMemOperand::MOLoad;
4433 Flags |= MachineMemOperand::MOStore;
4435 MachineMemOperand *MMO =
4436 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4438 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4439 SuccessOrdering, FailureOrdering, SynchScope);
4442 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4443 SDVTList VTs, SDValue Chain, SDValue Ptr,
4444 SDValue Cmp, SDValue Swp,
4445 MachineMemOperand *MMO,
4446 AtomicOrdering SuccessOrdering,
4447 AtomicOrdering FailureOrdering,
4448 SynchronizationScope SynchScope) {
4449 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4450 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4451 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4453 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4454 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4455 SuccessOrdering, FailureOrdering, SynchScope);
4458 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4460 SDValue Ptr, SDValue Val,
4461 const Value* PtrVal,
4463 AtomicOrdering Ordering,
4464 SynchronizationScope SynchScope) {
4465 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4466 Alignment = getEVTAlignment(MemVT);
4468 MachineFunction &MF = getMachineFunction();
4469 // An atomic store does not load. An atomic load does not store.
4470 // (An atomicrmw obviously both loads and stores.)
4471 // For now, atomics are considered to be volatile always, and they are
4473 // FIXME: Volatile isn't really correct; we should keep track of atomic
4474 // orderings in the memoperand.
4475 unsigned Flags = MachineMemOperand::MOVolatile;
4476 if (Opcode != ISD::ATOMIC_STORE)
4477 Flags |= MachineMemOperand::MOLoad;
4478 if (Opcode != ISD::ATOMIC_LOAD)
4479 Flags |= MachineMemOperand::MOStore;
4481 MachineMemOperand *MMO =
4482 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4483 MemVT.getStoreSize(), Alignment);
4485 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4486 Ordering, SynchScope);
4489 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4491 SDValue Ptr, SDValue Val,
4492 MachineMemOperand *MMO,
4493 AtomicOrdering Ordering,
4494 SynchronizationScope SynchScope) {
4495 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4496 Opcode == ISD::ATOMIC_LOAD_SUB ||
4497 Opcode == ISD::ATOMIC_LOAD_AND ||
4498 Opcode == ISD::ATOMIC_LOAD_OR ||
4499 Opcode == ISD::ATOMIC_LOAD_XOR ||
4500 Opcode == ISD::ATOMIC_LOAD_NAND ||
4501 Opcode == ISD::ATOMIC_LOAD_MIN ||
4502 Opcode == ISD::ATOMIC_LOAD_MAX ||
4503 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4504 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4505 Opcode == ISD::ATOMIC_SWAP ||
4506 Opcode == ISD::ATOMIC_STORE) &&
4507 "Invalid Atomic Op");
4509 EVT VT = Val.getValueType();
4511 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4512 getVTList(VT, MVT::Other);
4513 SDValue Ops[] = {Chain, Ptr, Val};
4514 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4517 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4518 EVT VT, SDValue Chain,
4520 MachineMemOperand *MMO,
4521 AtomicOrdering Ordering,
4522 SynchronizationScope SynchScope) {
4523 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4525 SDVTList VTs = getVTList(VT, MVT::Other);
4526 SDValue Ops[] = {Chain, Ptr};
4527 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4530 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4531 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4532 if (Ops.size() == 1)
4535 SmallVector<EVT, 4> VTs;
4536 VTs.reserve(Ops.size());
4537 for (unsigned i = 0; i < Ops.size(); ++i)
4538 VTs.push_back(Ops[i].getValueType());
4539 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4543 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4544 ArrayRef<SDValue> Ops,
4545 EVT MemVT, MachinePointerInfo PtrInfo,
4546 unsigned Align, bool Vol,
4547 bool ReadMem, bool WriteMem, unsigned Size) {
4548 if (Align == 0) // Ensure that codegen never sees alignment 0
4549 Align = getEVTAlignment(MemVT);
4551 MachineFunction &MF = getMachineFunction();
4554 Flags |= MachineMemOperand::MOStore;
4556 Flags |= MachineMemOperand::MOLoad;
4558 Flags |= MachineMemOperand::MOVolatile;
4560 Size = MemVT.getStoreSize();
4561 MachineMemOperand *MMO =
4562 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4564 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4568 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4569 ArrayRef<SDValue> Ops, EVT MemVT,
4570 MachineMemOperand *MMO) {
4571 assert((Opcode == ISD::INTRINSIC_VOID ||
4572 Opcode == ISD::INTRINSIC_W_CHAIN ||
4573 Opcode == ISD::PREFETCH ||
4574 Opcode == ISD::LIFETIME_START ||
4575 Opcode == ISD::LIFETIME_END ||
4576 (Opcode <= INT_MAX &&
4577 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4578 "Opcode is not a memory-accessing opcode!");
4580 // Memoize the node unless it returns a flag.
4581 MemIntrinsicSDNode *N;
4582 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4583 FoldingSetNodeID ID;
4584 AddNodeIDNode(ID, Opcode, VTList, Ops);
4585 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4587 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4588 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4589 return SDValue(E, 0);
4592 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4593 dl.getDebugLoc(), VTList, Ops,
4595 CSEMap.InsertNode(N, IP);
4597 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4598 dl.getDebugLoc(), VTList, Ops,
4602 return SDValue(N, 0);
4605 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4606 /// MachinePointerInfo record from it. This is particularly useful because the
4607 /// code generator has many cases where it doesn't bother passing in a
4608 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4609 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4610 // If this is FI+Offset, we can model it.
4611 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4612 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4614 // If this is (FI+Offset1)+Offset2, we can model it.
4615 if (Ptr.getOpcode() != ISD::ADD ||
4616 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4617 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4618 return MachinePointerInfo();
4620 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4621 return MachinePointerInfo::getFixedStack(FI, Offset+
4622 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4625 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4626 /// MachinePointerInfo record from it. This is particularly useful because the
4627 /// code generator has many cases where it doesn't bother passing in a
4628 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4629 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4630 // If the 'Offset' value isn't a constant, we can't handle this.
4631 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4632 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4633 if (OffsetOp.getOpcode() == ISD::UNDEF)
4634 return InferPointerInfo(Ptr);
4635 return MachinePointerInfo();
4640 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4641 EVT VT, SDLoc dl, SDValue Chain,
4642 SDValue Ptr, SDValue Offset,
4643 MachinePointerInfo PtrInfo, EVT MemVT,
4644 bool isVolatile, bool isNonTemporal, bool isInvariant,
4645 unsigned Alignment, const AAMDNodes &AAInfo,
4646 const MDNode *Ranges) {
4647 assert(Chain.getValueType() == MVT::Other &&
4648 "Invalid chain type");
4649 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4650 Alignment = getEVTAlignment(VT);
4652 unsigned Flags = MachineMemOperand::MOLoad;
4654 Flags |= MachineMemOperand::MOVolatile;
4656 Flags |= MachineMemOperand::MONonTemporal;
4658 Flags |= MachineMemOperand::MOInvariant;
4660 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4662 if (PtrInfo.V.isNull())
4663 PtrInfo = InferPointerInfo(Ptr, Offset);
4665 MachineFunction &MF = getMachineFunction();
4666 MachineMemOperand *MMO =
4667 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4669 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4673 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4674 EVT VT, SDLoc dl, SDValue Chain,
4675 SDValue Ptr, SDValue Offset, EVT MemVT,
4676 MachineMemOperand *MMO) {
4678 ExtType = ISD::NON_EXTLOAD;
4679 } else if (ExtType == ISD::NON_EXTLOAD) {
4680 assert(VT == MemVT && "Non-extending load from different memory type!");
4683 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4684 "Should only be an extending load, not truncating!");
4685 assert(VT.isInteger() == MemVT.isInteger() &&
4686 "Cannot convert from FP to Int or Int -> FP!");
4687 assert(VT.isVector() == MemVT.isVector() &&
4688 "Cannot use trunc store to convert to or from a vector!");
4689 assert((!VT.isVector() ||
4690 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4691 "Cannot use trunc store to change the number of vector elements!");
4694 bool Indexed = AM != ISD::UNINDEXED;
4695 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4696 "Unindexed load with an offset!");
4698 SDVTList VTs = Indexed ?
4699 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4700 SDValue Ops[] = { Chain, Ptr, Offset };
4701 FoldingSetNodeID ID;
4702 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4703 ID.AddInteger(MemVT.getRawBits());
4704 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4705 MMO->isNonTemporal(),
4706 MMO->isInvariant()));
4707 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4709 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4710 cast<LoadSDNode>(E)->refineAlignment(MMO);
4711 return SDValue(E, 0);
4713 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4714 dl.getDebugLoc(), VTs, AM, ExtType,
4716 CSEMap.InsertNode(N, IP);
4718 return SDValue(N, 0);
4721 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4722 SDValue Chain, SDValue Ptr,
4723 MachinePointerInfo PtrInfo,
4724 bool isVolatile, bool isNonTemporal,
4725 bool isInvariant, unsigned Alignment,
4726 const AAMDNodes &AAInfo,
4727 const MDNode *Ranges) {
4728 SDValue Undef = getUNDEF(Ptr.getValueType());
4729 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4730 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4734 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4735 SDValue Chain, SDValue Ptr,
4736 MachineMemOperand *MMO) {
4737 SDValue Undef = getUNDEF(Ptr.getValueType());
4738 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4742 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4743 SDValue Chain, SDValue Ptr,
4744 MachinePointerInfo PtrInfo, EVT MemVT,
4745 bool isVolatile, bool isNonTemporal,
4746 bool isInvariant, unsigned Alignment,
4747 const AAMDNodes &AAInfo) {
4748 SDValue Undef = getUNDEF(Ptr.getValueType());
4749 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4750 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4755 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4756 SDValue Chain, SDValue Ptr, EVT MemVT,
4757 MachineMemOperand *MMO) {
4758 SDValue Undef = getUNDEF(Ptr.getValueType());
4759 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4764 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4765 SDValue Offset, ISD::MemIndexedMode AM) {
4766 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4767 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4768 "Load is already a indexed load!");
4769 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4770 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4771 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4772 false, LD->getAlignment());
4775 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4776 SDValue Ptr, MachinePointerInfo PtrInfo,
4777 bool isVolatile, bool isNonTemporal,
4778 unsigned Alignment, const AAMDNodes &AAInfo) {
4779 assert(Chain.getValueType() == MVT::Other &&
4780 "Invalid chain type");
4781 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4782 Alignment = getEVTAlignment(Val.getValueType());
4784 unsigned Flags = MachineMemOperand::MOStore;
4786 Flags |= MachineMemOperand::MOVolatile;
4788 Flags |= MachineMemOperand::MONonTemporal;
4790 if (PtrInfo.V.isNull())
4791 PtrInfo = InferPointerInfo(Ptr);
4793 MachineFunction &MF = getMachineFunction();
4794 MachineMemOperand *MMO =
4795 MF.getMachineMemOperand(PtrInfo, Flags,
4796 Val.getValueType().getStoreSize(), Alignment,
4799 return getStore(Chain, dl, Val, Ptr, MMO);
4802 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4803 SDValue Ptr, MachineMemOperand *MMO) {
4804 assert(Chain.getValueType() == MVT::Other &&
4805 "Invalid chain type");
4806 EVT VT = Val.getValueType();
4807 SDVTList VTs = getVTList(MVT::Other);
4808 SDValue Undef = getUNDEF(Ptr.getValueType());
4809 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4810 FoldingSetNodeID ID;
4811 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4812 ID.AddInteger(VT.getRawBits());
4813 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4814 MMO->isNonTemporal(), MMO->isInvariant()));
4815 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4817 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4818 cast<StoreSDNode>(E)->refineAlignment(MMO);
4819 return SDValue(E, 0);
4821 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4822 dl.getDebugLoc(), VTs,
4823 ISD::UNINDEXED, false, VT, MMO);
4824 CSEMap.InsertNode(N, IP);
4826 return SDValue(N, 0);
4829 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4830 SDValue Ptr, MachinePointerInfo PtrInfo,
4831 EVT SVT,bool isVolatile, bool isNonTemporal,
4833 const AAMDNodes &AAInfo) {
4834 assert(Chain.getValueType() == MVT::Other &&
4835 "Invalid chain type");
4836 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4837 Alignment = getEVTAlignment(SVT);
4839 unsigned Flags = MachineMemOperand::MOStore;
4841 Flags |= MachineMemOperand::MOVolatile;
4843 Flags |= MachineMemOperand::MONonTemporal;
4845 if (PtrInfo.V.isNull())
4846 PtrInfo = InferPointerInfo(Ptr);
4848 MachineFunction &MF = getMachineFunction();
4849 MachineMemOperand *MMO =
4850 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4853 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4856 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4857 SDValue Ptr, EVT SVT,
4858 MachineMemOperand *MMO) {
4859 EVT VT = Val.getValueType();
4861 assert(Chain.getValueType() == MVT::Other &&
4862 "Invalid chain type");
4864 return getStore(Chain, dl, Val, Ptr, MMO);
4866 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4867 "Should only be a truncating store, not extending!");
4868 assert(VT.isInteger() == SVT.isInteger() &&
4869 "Can't do FP-INT conversion!");
4870 assert(VT.isVector() == SVT.isVector() &&
4871 "Cannot use trunc store to convert to or from a vector!");
4872 assert((!VT.isVector() ||
4873 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4874 "Cannot use trunc store to change the number of vector elements!");
4876 SDVTList VTs = getVTList(MVT::Other);
4877 SDValue Undef = getUNDEF(Ptr.getValueType());
4878 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4879 FoldingSetNodeID ID;
4880 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4881 ID.AddInteger(SVT.getRawBits());
4882 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4883 MMO->isNonTemporal(), MMO->isInvariant()));
4884 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4887 cast<StoreSDNode>(E)->refineAlignment(MMO);
4888 return SDValue(E, 0);
4890 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4891 dl.getDebugLoc(), VTs,
4892 ISD::UNINDEXED, true, SVT, MMO);
4893 CSEMap.InsertNode(N, IP);
4895 return SDValue(N, 0);
4899 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4900 SDValue Offset, ISD::MemIndexedMode AM) {
4901 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4902 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4903 "Store is already a indexed store!");
4904 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4905 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4906 FoldingSetNodeID ID;
4907 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4908 ID.AddInteger(ST->getMemoryVT().getRawBits());
4909 ID.AddInteger(ST->getRawSubclassData());
4910 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4912 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4913 return SDValue(E, 0);
4915 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4916 dl.getDebugLoc(), VTs, AM,
4917 ST->isTruncatingStore(),
4919 ST->getMemOperand());
4920 CSEMap.InsertNode(N, IP);
4922 return SDValue(N, 0);
4926 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
4927 SDValue Ptr, SDValue Mask, SDValue Src0,
4928 MachineMemOperand *MMO) {
4930 SDVTList VTs = getVTList(VT, MVT::Other);
4931 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
4932 FoldingSetNodeID ID;
4933 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
4934 ID.AddInteger(VT.getRawBits());
4935 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
4937 MMO->isNonTemporal(),
4938 MMO->isInvariant()));
4939 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4941 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4942 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
4943 return SDValue(E, 0);
4945 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
4946 dl.getDebugLoc(), Ops, 4, VTs,
4948 CSEMap.InsertNode(N, IP);
4950 return SDValue(N, 0);
4953 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
4954 SDValue Ptr, SDValue Mask, MachineMemOperand *MMO) {
4955 assert(Chain.getValueType() == MVT::Other &&
4956 "Invalid chain type");
4957 EVT VT = Val.getValueType();
4958 SDVTList VTs = getVTList(MVT::Other);
4959 SDValue Ops[] = { Chain, Ptr, Mask, Val };
4960 FoldingSetNodeID ID;
4961 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
4962 ID.AddInteger(VT.getRawBits());
4963 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4964 MMO->isNonTemporal(), MMO->isInvariant()));
4965 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4967 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4968 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
4969 return SDValue(E, 0);
4971 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
4972 dl.getDebugLoc(), Ops, 4,
4974 CSEMap.InsertNode(N, IP);
4976 return SDValue(N, 0);
4979 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
4980 SDValue Chain, SDValue Ptr,
4983 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4984 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
4987 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4988 ArrayRef<SDUse> Ops) {
4989 switch (Ops.size()) {
4990 case 0: return getNode(Opcode, DL, VT);
4991 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
4992 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4993 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4997 // Copy from an SDUse array into an SDValue array for use with
4998 // the regular getNode logic.
4999 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5000 return getNode(Opcode, DL, VT, NewOps);
5003 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5004 ArrayRef<SDValue> Ops) {
5005 unsigned NumOps = Ops.size();
5007 case 0: return getNode(Opcode, DL, VT);
5008 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5009 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5010 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5016 case ISD::SELECT_CC: {
5017 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5018 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5019 "LHS and RHS of condition must have same type!");
5020 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5021 "True and False arms of SelectCC must have same type!");
5022 assert(Ops[2].getValueType() == VT &&
5023 "select_cc node must be of same type as true and false value!");
5027 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5028 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5029 "LHS/RHS of comparison should match types!");
5036 SDVTList VTs = getVTList(VT);
5038 if (VT != MVT::Glue) {
5039 FoldingSetNodeID ID;
5040 AddNodeIDNode(ID, Opcode, VTs, Ops);
5043 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5044 return SDValue(E, 0);
5046 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5048 CSEMap.InsertNode(N, IP);
5050 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5055 return SDValue(N, 0);
5058 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5059 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5060 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5063 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5064 ArrayRef<SDValue> Ops) {
5065 if (VTList.NumVTs == 1)
5066 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5070 // FIXME: figure out how to safely handle things like
5071 // int foo(int x) { return 1 << (x & 255); }
5072 // int bar() { return foo(256); }
5073 case ISD::SRA_PARTS:
5074 case ISD::SRL_PARTS:
5075 case ISD::SHL_PARTS:
5076 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5077 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5078 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5079 else if (N3.getOpcode() == ISD::AND)
5080 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5081 // If the and is only masking out bits that cannot effect the shift,
5082 // eliminate the and.
5083 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5084 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5085 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5091 // Memoize the node unless it returns a flag.
5093 unsigned NumOps = Ops.size();
5094 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5095 FoldingSetNodeID ID;
5096 AddNodeIDNode(ID, Opcode, VTList, Ops);
5098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5099 return SDValue(E, 0);
5102 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5103 DL.getDebugLoc(), VTList, Ops[0]);
5104 } else if (NumOps == 2) {
5105 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5106 DL.getDebugLoc(), VTList, Ops[0],
5108 } else if (NumOps == 3) {
5109 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5110 DL.getDebugLoc(), VTList, Ops[0],
5113 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5116 CSEMap.InsertNode(N, IP);
5119 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5120 DL.getDebugLoc(), VTList, Ops[0]);
5121 } else if (NumOps == 2) {
5122 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5123 DL.getDebugLoc(), VTList, Ops[0],
5125 } else if (NumOps == 3) {
5126 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5127 DL.getDebugLoc(), VTList, Ops[0],
5130 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5135 return SDValue(N, 0);
5138 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5139 return getNode(Opcode, DL, VTList, None);
5142 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5144 SDValue Ops[] = { N1 };
5145 return getNode(Opcode, DL, VTList, Ops);
5148 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5149 SDValue N1, SDValue N2) {
5150 SDValue Ops[] = { N1, N2 };
5151 return getNode(Opcode, DL, VTList, Ops);
5154 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5155 SDValue N1, SDValue N2, SDValue N3) {
5156 SDValue Ops[] = { N1, N2, N3 };
5157 return getNode(Opcode, DL, VTList, Ops);
5160 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5161 SDValue N1, SDValue N2, SDValue N3,
5163 SDValue Ops[] = { N1, N2, N3, N4 };
5164 return getNode(Opcode, DL, VTList, Ops);
5167 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5168 SDValue N1, SDValue N2, SDValue N3,
5169 SDValue N4, SDValue N5) {
5170 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5171 return getNode(Opcode, DL, VTList, Ops);
5174 SDVTList SelectionDAG::getVTList(EVT VT) {
5175 return makeVTList(SDNode::getValueTypeList(VT), 1);
5178 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5179 FoldingSetNodeID ID;
5181 ID.AddInteger(VT1.getRawBits());
5182 ID.AddInteger(VT2.getRawBits());
5185 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5187 EVT *Array = Allocator.Allocate<EVT>(2);
5190 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5191 VTListMap.InsertNode(Result, IP);
5193 return Result->getSDVTList();
5196 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5197 FoldingSetNodeID ID;
5199 ID.AddInteger(VT1.getRawBits());
5200 ID.AddInteger(VT2.getRawBits());
5201 ID.AddInteger(VT3.getRawBits());
5204 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5206 EVT *Array = Allocator.Allocate<EVT>(3);
5210 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5211 VTListMap.InsertNode(Result, IP);
5213 return Result->getSDVTList();
5216 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5217 FoldingSetNodeID ID;
5219 ID.AddInteger(VT1.getRawBits());
5220 ID.AddInteger(VT2.getRawBits());
5221 ID.AddInteger(VT3.getRawBits());
5222 ID.AddInteger(VT4.getRawBits());
5225 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5227 EVT *Array = Allocator.Allocate<EVT>(4);
5232 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5233 VTListMap.InsertNode(Result, IP);
5235 return Result->getSDVTList();
5238 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5239 unsigned NumVTs = VTs.size();
5240 FoldingSetNodeID ID;
5241 ID.AddInteger(NumVTs);
5242 for (unsigned index = 0; index < NumVTs; index++) {
5243 ID.AddInteger(VTs[index].getRawBits());
5247 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5249 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5250 std::copy(VTs.begin(), VTs.end(), Array);
5251 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5252 VTListMap.InsertNode(Result, IP);
5254 return Result->getSDVTList();
5258 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5259 /// specified operands. If the resultant node already exists in the DAG,
5260 /// this does not modify the specified node, instead it returns the node that
5261 /// already exists. If the resultant node does not exist in the DAG, the
5262 /// input node is returned. As a degenerate case, if you specify the same
5263 /// input operands as the node already has, the input node is returned.
5264 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5265 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5267 // Check to see if there is no change.
5268 if (Op == N->getOperand(0)) return N;
5270 // See if the modified node already exists.
5271 void *InsertPos = nullptr;
5272 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5275 // Nope it doesn't. Remove the node from its current place in the maps.
5277 if (!RemoveNodeFromCSEMaps(N))
5278 InsertPos = nullptr;
5280 // Now we update the operands.
5281 N->OperandList[0].set(Op);
5283 // If this gets put into a CSE map, add it.
5284 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5288 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5289 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5291 // Check to see if there is no change.
5292 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5293 return N; // No operands changed, just return the input node.
5295 // See if the modified node already exists.
5296 void *InsertPos = nullptr;
5297 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5300 // Nope it doesn't. Remove the node from its current place in the maps.
5302 if (!RemoveNodeFromCSEMaps(N))
5303 InsertPos = nullptr;
5305 // Now we update the operands.
5306 if (N->OperandList[0] != Op1)
5307 N->OperandList[0].set(Op1);
5308 if (N->OperandList[1] != Op2)
5309 N->OperandList[1].set(Op2);
5311 // If this gets put into a CSE map, add it.
5312 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5316 SDNode *SelectionDAG::
5317 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5318 SDValue Ops[] = { Op1, Op2, Op3 };
5319 return UpdateNodeOperands(N, Ops);
5322 SDNode *SelectionDAG::
5323 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5324 SDValue Op3, SDValue Op4) {
5325 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5326 return UpdateNodeOperands(N, Ops);
5329 SDNode *SelectionDAG::
5330 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5331 SDValue Op3, SDValue Op4, SDValue Op5) {
5332 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5333 return UpdateNodeOperands(N, Ops);
5336 SDNode *SelectionDAG::
5337 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5338 unsigned NumOps = Ops.size();
5339 assert(N->getNumOperands() == NumOps &&
5340 "Update with wrong number of operands");
5342 // Check to see if there is no change.
5343 bool AnyChange = false;
5344 for (unsigned i = 0; i != NumOps; ++i) {
5345 if (Ops[i] != N->getOperand(i)) {
5351 // No operands changed, just return the input node.
5352 if (!AnyChange) return N;
5354 // See if the modified node already exists.
5355 void *InsertPos = nullptr;
5356 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5359 // Nope it doesn't. Remove the node from its current place in the maps.
5361 if (!RemoveNodeFromCSEMaps(N))
5362 InsertPos = nullptr;
5364 // Now we update the operands.
5365 for (unsigned i = 0; i != NumOps; ++i)
5366 if (N->OperandList[i] != Ops[i])
5367 N->OperandList[i].set(Ops[i]);
5369 // If this gets put into a CSE map, add it.
5370 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5374 /// DropOperands - Release the operands and set this node to have
5376 void SDNode::DropOperands() {
5377 // Unlike the code in MorphNodeTo that does this, we don't need to
5378 // watch for dead nodes here.
5379 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5385 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5388 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5390 SDVTList VTs = getVTList(VT);
5391 return SelectNodeTo(N, MachineOpc, VTs, None);
5394 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5395 EVT VT, SDValue Op1) {
5396 SDVTList VTs = getVTList(VT);
5397 SDValue Ops[] = { Op1 };
5398 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5401 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5402 EVT VT, SDValue Op1,
5404 SDVTList VTs = getVTList(VT);
5405 SDValue Ops[] = { Op1, Op2 };
5406 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5409 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5410 EVT VT, SDValue Op1,
5411 SDValue Op2, SDValue Op3) {
5412 SDVTList VTs = getVTList(VT);
5413 SDValue Ops[] = { Op1, Op2, Op3 };
5414 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5417 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5418 EVT VT, ArrayRef<SDValue> Ops) {
5419 SDVTList VTs = getVTList(VT);
5420 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5423 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5424 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5425 SDVTList VTs = getVTList(VT1, VT2);
5426 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5429 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5431 SDVTList VTs = getVTList(VT1, VT2);
5432 return SelectNodeTo(N, MachineOpc, VTs, None);
5435 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5436 EVT VT1, EVT VT2, EVT VT3,
5437 ArrayRef<SDValue> Ops) {
5438 SDVTList VTs = getVTList(VT1, VT2, VT3);
5439 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5442 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5443 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5444 ArrayRef<SDValue> Ops) {
5445 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5446 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5449 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5452 SDVTList VTs = getVTList(VT1, VT2);
5453 SDValue Ops[] = { Op1 };
5454 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5457 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5459 SDValue Op1, SDValue Op2) {
5460 SDVTList VTs = getVTList(VT1, VT2);
5461 SDValue Ops[] = { Op1, Op2 };
5462 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5465 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5467 SDValue Op1, SDValue Op2,
5469 SDVTList VTs = getVTList(VT1, VT2);
5470 SDValue Ops[] = { Op1, Op2, Op3 };
5471 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5474 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5475 EVT VT1, EVT VT2, EVT VT3,
5476 SDValue Op1, SDValue Op2,
5478 SDVTList VTs = getVTList(VT1, VT2, VT3);
5479 SDValue Ops[] = { Op1, Op2, Op3 };
5480 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5483 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5484 SDVTList VTs,ArrayRef<SDValue> Ops) {
5485 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5486 // Reset the NodeID to -1.
5491 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5492 /// the line number information on the merged node since it is not possible to
5493 /// preserve the information that operation is associated with multiple lines.
5494 /// This will make the debugger working better at -O0, were there is a higher
5495 /// probability having other instructions associated with that line.
5497 /// For IROrder, we keep the smaller of the two
5498 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5499 DebugLoc NLoc = N->getDebugLoc();
5500 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5501 (OLoc.getDebugLoc() != NLoc)) {
5502 N->setDebugLoc(DebugLoc());
5504 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5505 N->setIROrder(Order);
5509 /// MorphNodeTo - This *mutates* the specified node to have the specified
5510 /// return type, opcode, and operands.
5512 /// Note that MorphNodeTo returns the resultant node. If there is already a
5513 /// node of the specified opcode and operands, it returns that node instead of
5514 /// the current one. Note that the SDLoc need not be the same.
5516 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5517 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5518 /// node, and because it doesn't require CSE recalculation for any of
5519 /// the node's users.
5521 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5522 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5523 /// the legalizer which maintain worklists that would need to be updated when
5524 /// deleting things.
5525 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5526 SDVTList VTs, ArrayRef<SDValue> Ops) {
5527 unsigned NumOps = Ops.size();
5528 // If an identical node already exists, use it.
5530 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5531 FoldingSetNodeID ID;
5532 AddNodeIDNode(ID, Opc, VTs, Ops);
5533 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5534 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5537 if (!RemoveNodeFromCSEMaps(N))
5540 // Start the morphing.
5542 N->ValueList = VTs.VTs;
5543 N->NumValues = VTs.NumVTs;
5545 // Clear the operands list, updating used nodes to remove this from their
5546 // use list. Keep track of any operands that become dead as a result.
5547 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5550 SDNode *Used = Use.getNode();
5552 if (Used->use_empty())
5553 DeadNodeSet.insert(Used);
5556 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5557 // Initialize the memory references information.
5558 MN->setMemRefs(nullptr, nullptr);
5559 // If NumOps is larger than the # of operands we can have in a
5560 // MachineSDNode, reallocate the operand list.
5561 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5562 if (MN->OperandsNeedDelete)
5563 delete[] MN->OperandList;
5564 if (NumOps > array_lengthof(MN->LocalOperands))
5565 // We're creating a final node that will live unmorphed for the
5566 // remainder of the current SelectionDAG iteration, so we can allocate
5567 // the operands directly out of a pool with no recycling metadata.
5568 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5569 Ops.data(), NumOps);
5571 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5572 MN->OperandsNeedDelete = false;
5574 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5576 // If NumOps is larger than the # of operands we currently have, reallocate
5577 // the operand list.
5578 if (NumOps > N->NumOperands) {
5579 if (N->OperandsNeedDelete)
5580 delete[] N->OperandList;
5581 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5582 N->OperandsNeedDelete = true;
5584 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5587 // Delete any nodes that are still dead after adding the uses for the
5589 if (!DeadNodeSet.empty()) {
5590 SmallVector<SDNode *, 16> DeadNodes;
5591 for (SDNode *N : DeadNodeSet)
5593 DeadNodes.push_back(N);
5594 RemoveDeadNodes(DeadNodes);
5598 CSEMap.InsertNode(N, IP); // Memoize the new node.
5603 /// getMachineNode - These are used for target selectors to create a new node
5604 /// with specified return type(s), MachineInstr opcode, and operands.
5606 /// Note that getMachineNode returns the resultant node. If there is already a
5607 /// node of the specified opcode and operands, it returns that node instead of
5608 /// the current one.
5610 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5611 SDVTList VTs = getVTList(VT);
5612 return getMachineNode(Opcode, dl, VTs, None);
5616 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5617 SDVTList VTs = getVTList(VT);
5618 SDValue Ops[] = { Op1 };
5619 return getMachineNode(Opcode, dl, VTs, Ops);
5623 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5624 SDValue Op1, SDValue Op2) {
5625 SDVTList VTs = getVTList(VT);
5626 SDValue Ops[] = { Op1, Op2 };
5627 return getMachineNode(Opcode, dl, VTs, Ops);
5631 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5632 SDValue Op1, SDValue Op2, SDValue Op3) {
5633 SDVTList VTs = getVTList(VT);
5634 SDValue Ops[] = { Op1, Op2, Op3 };
5635 return getMachineNode(Opcode, dl, VTs, Ops);
5639 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5640 ArrayRef<SDValue> Ops) {
5641 SDVTList VTs = getVTList(VT);
5642 return getMachineNode(Opcode, dl, VTs, Ops);
5646 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5647 SDVTList VTs = getVTList(VT1, VT2);
5648 return getMachineNode(Opcode, dl, VTs, None);
5652 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5653 EVT VT1, EVT VT2, SDValue Op1) {
5654 SDVTList VTs = getVTList(VT1, VT2);
5655 SDValue Ops[] = { Op1 };
5656 return getMachineNode(Opcode, dl, VTs, Ops);
5660 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5661 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5662 SDVTList VTs = getVTList(VT1, VT2);
5663 SDValue Ops[] = { Op1, Op2 };
5664 return getMachineNode(Opcode, dl, VTs, Ops);
5668 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5669 EVT VT1, EVT VT2, SDValue Op1,
5670 SDValue Op2, SDValue Op3) {
5671 SDVTList VTs = getVTList(VT1, VT2);
5672 SDValue Ops[] = { Op1, Op2, Op3 };
5673 return getMachineNode(Opcode, dl, VTs, Ops);
5677 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5679 ArrayRef<SDValue> Ops) {
5680 SDVTList VTs = getVTList(VT1, VT2);
5681 return getMachineNode(Opcode, dl, VTs, Ops);
5685 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5686 EVT VT1, EVT VT2, EVT VT3,
5687 SDValue Op1, SDValue Op2) {
5688 SDVTList VTs = getVTList(VT1, VT2, VT3);
5689 SDValue Ops[] = { Op1, Op2 };
5690 return getMachineNode(Opcode, dl, VTs, Ops);
5694 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5695 EVT VT1, EVT VT2, EVT VT3,
5696 SDValue Op1, SDValue Op2, SDValue Op3) {
5697 SDVTList VTs = getVTList(VT1, VT2, VT3);
5698 SDValue Ops[] = { Op1, Op2, Op3 };
5699 return getMachineNode(Opcode, dl, VTs, Ops);
5703 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5704 EVT VT1, EVT VT2, EVT VT3,
5705 ArrayRef<SDValue> Ops) {
5706 SDVTList VTs = getVTList(VT1, VT2, VT3);
5707 return getMachineNode(Opcode, dl, VTs, Ops);
5711 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5712 EVT VT2, EVT VT3, EVT VT4,
5713 ArrayRef<SDValue> Ops) {
5714 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5715 return getMachineNode(Opcode, dl, VTs, Ops);
5719 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5720 ArrayRef<EVT> ResultTys,
5721 ArrayRef<SDValue> Ops) {
5722 SDVTList VTs = getVTList(ResultTys);
5723 return getMachineNode(Opcode, dl, VTs, Ops);
5727 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5728 ArrayRef<SDValue> OpsArray) {
5729 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5732 const SDValue *Ops = OpsArray.data();
5733 unsigned NumOps = OpsArray.size();
5736 FoldingSetNodeID ID;
5737 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5739 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5740 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5744 // Allocate a new MachineSDNode.
5745 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5746 DL.getDebugLoc(), VTs);
5748 // Initialize the operands list.
5749 if (NumOps > array_lengthof(N->LocalOperands))
5750 // We're creating a final node that will live unmorphed for the
5751 // remainder of the current SelectionDAG iteration, so we can allocate
5752 // the operands directly out of a pool with no recycling metadata.
5753 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5756 N->InitOperands(N->LocalOperands, Ops, NumOps);
5757 N->OperandsNeedDelete = false;
5760 CSEMap.InsertNode(N, IP);
5766 /// getTargetExtractSubreg - A convenience function for creating
5767 /// TargetOpcode::EXTRACT_SUBREG nodes.
5769 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5771 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5772 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5773 VT, Operand, SRIdxVal);
5774 return SDValue(Subreg, 0);
5777 /// getTargetInsertSubreg - A convenience function for creating
5778 /// TargetOpcode::INSERT_SUBREG nodes.
5780 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5781 SDValue Operand, SDValue Subreg) {
5782 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5783 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5784 VT, Operand, Subreg, SRIdxVal);
5785 return SDValue(Result, 0);
5788 /// getNodeIfExists - Get the specified node if it's already available, or
5789 /// else return NULL.
5790 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5791 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5793 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5794 FoldingSetNodeID ID;
5795 AddNodeIDNode(ID, Opcode, VTList, Ops);
5796 if (isBinOpWithFlags(Opcode))
5797 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5799 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5805 /// getDbgValue - Creates a SDDbgValue node.
5808 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5809 unsigned R, bool IsIndirect, uint64_t Off,
5810 DebugLoc DL, unsigned O) {
5811 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5815 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5816 const Value *C, uint64_t Off,
5817 DebugLoc DL, unsigned O) {
5818 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5822 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5823 unsigned FI, uint64_t Off,
5824 DebugLoc DL, unsigned O) {
5825 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5830 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5831 /// pointed to by a use iterator is deleted, increment the use iterator
5832 /// so that it doesn't dangle.
5834 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5835 SDNode::use_iterator &UI;
5836 SDNode::use_iterator &UE;
5838 void NodeDeleted(SDNode *N, SDNode *E) override {
5839 // Increment the iterator as needed.
5840 while (UI != UE && N == *UI)
5845 RAUWUpdateListener(SelectionDAG &d,
5846 SDNode::use_iterator &ui,
5847 SDNode::use_iterator &ue)
5848 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5853 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5854 /// This can cause recursive merging of nodes in the DAG.
5856 /// This version assumes From has a single result value.
5858 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5859 SDNode *From = FromN.getNode();
5860 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5861 "Cannot replace with this method!");
5862 assert(From != To.getNode() && "Cannot replace uses of with self");
5864 // Iterate over all the existing uses of From. New uses will be added
5865 // to the beginning of the use list, which we avoid visiting.
5866 // This specifically avoids visiting uses of From that arise while the
5867 // replacement is happening, because any such uses would be the result
5868 // of CSE: If an existing node looks like From after one of its operands
5869 // is replaced by To, we don't want to replace of all its users with To
5870 // too. See PR3018 for more info.
5871 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5872 RAUWUpdateListener Listener(*this, UI, UE);
5876 // This node is about to morph, remove its old self from the CSE maps.
5877 RemoveNodeFromCSEMaps(User);
5879 // A user can appear in a use list multiple times, and when this
5880 // happens the uses are usually next to each other in the list.
5881 // To help reduce the number of CSE recomputations, process all
5882 // the uses of this user that we can find this way.
5884 SDUse &Use = UI.getUse();
5887 } while (UI != UE && *UI == User);
5889 // Now that we have modified User, add it back to the CSE maps. If it
5890 // already exists there, recursively merge the results together.
5891 AddModifiedNodeToCSEMaps(User);
5894 // If we just RAUW'd the root, take note.
5895 if (FromN == getRoot())
5899 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5900 /// This can cause recursive merging of nodes in the DAG.
5902 /// This version assumes that for each value of From, there is a
5903 /// corresponding value in To in the same position with the same type.
5905 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5907 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5908 assert((!From->hasAnyUseOfValue(i) ||
5909 From->getValueType(i) == To->getValueType(i)) &&
5910 "Cannot use this version of ReplaceAllUsesWith!");
5913 // Handle the trivial case.
5917 // Iterate over just the existing users of From. See the comments in
5918 // the ReplaceAllUsesWith above.
5919 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5920 RAUWUpdateListener Listener(*this, UI, UE);
5924 // This node is about to morph, remove its old self from the CSE maps.
5925 RemoveNodeFromCSEMaps(User);
5927 // A user can appear in a use list multiple times, and when this
5928 // happens the uses are usually next to each other in the list.
5929 // To help reduce the number of CSE recomputations, process all
5930 // the uses of this user that we can find this way.
5932 SDUse &Use = UI.getUse();
5935 } while (UI != UE && *UI == User);
5937 // Now that we have modified User, add it back to the CSE maps. If it
5938 // already exists there, recursively merge the results together.
5939 AddModifiedNodeToCSEMaps(User);
5942 // If we just RAUW'd the root, take note.
5943 if (From == getRoot().getNode())
5944 setRoot(SDValue(To, getRoot().getResNo()));
5947 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5948 /// This can cause recursive merging of nodes in the DAG.
5950 /// This version can replace From with any result values. To must match the
5951 /// number and types of values returned by From.
5952 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5953 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5954 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5956 // Iterate over just the existing users of From. See the comments in
5957 // the ReplaceAllUsesWith above.
5958 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5959 RAUWUpdateListener Listener(*this, UI, UE);
5963 // This node is about to morph, remove its old self from the CSE maps.
5964 RemoveNodeFromCSEMaps(User);
5966 // A user can appear in a use list multiple times, and when this
5967 // happens the uses are usually next to each other in the list.
5968 // To help reduce the number of CSE recomputations, process all
5969 // the uses of this user that we can find this way.
5971 SDUse &Use = UI.getUse();
5972 const SDValue &ToOp = To[Use.getResNo()];
5975 } while (UI != UE && *UI == User);
5977 // Now that we have modified User, add it back to the CSE maps. If it
5978 // already exists there, recursively merge the results together.
5979 AddModifiedNodeToCSEMaps(User);
5982 // If we just RAUW'd the root, take note.
5983 if (From == getRoot().getNode())
5984 setRoot(SDValue(To[getRoot().getResNo()]));
5987 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5988 /// uses of other values produced by From.getNode() alone. The Deleted
5989 /// vector is handled the same way as for ReplaceAllUsesWith.
5990 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5991 // Handle the really simple, really trivial case efficiently.
5992 if (From == To) return;
5994 // Handle the simple, trivial, case efficiently.
5995 if (From.getNode()->getNumValues() == 1) {
5996 ReplaceAllUsesWith(From, To);
6000 // Iterate over just the existing users of From. See the comments in
6001 // the ReplaceAllUsesWith above.
6002 SDNode::use_iterator UI = From.getNode()->use_begin(),
6003 UE = From.getNode()->use_end();
6004 RAUWUpdateListener Listener(*this, UI, UE);
6007 bool UserRemovedFromCSEMaps = false;
6009 // A user can appear in a use list multiple times, and when this
6010 // happens the uses are usually next to each other in the list.
6011 // To help reduce the number of CSE recomputations, process all
6012 // the uses of this user that we can find this way.
6014 SDUse &Use = UI.getUse();
6016 // Skip uses of different values from the same node.
6017 if (Use.getResNo() != From.getResNo()) {
6022 // If this node hasn't been modified yet, it's still in the CSE maps,
6023 // so remove its old self from the CSE maps.
6024 if (!UserRemovedFromCSEMaps) {
6025 RemoveNodeFromCSEMaps(User);
6026 UserRemovedFromCSEMaps = true;
6031 } while (UI != UE && *UI == User);
6033 // We are iterating over all uses of the From node, so if a use
6034 // doesn't use the specific value, no changes are made.
6035 if (!UserRemovedFromCSEMaps)
6038 // Now that we have modified User, add it back to the CSE maps. If it
6039 // already exists there, recursively merge the results together.
6040 AddModifiedNodeToCSEMaps(User);
6043 // If we just RAUW'd the root, take note.
6044 if (From == getRoot())
6049 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6050 /// to record information about a use.
6057 /// operator< - Sort Memos by User.
6058 bool operator<(const UseMemo &L, const UseMemo &R) {
6059 return (intptr_t)L.User < (intptr_t)R.User;
6063 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6064 /// uses of other values produced by From.getNode() alone. The same value
6065 /// may appear in both the From and To list. The Deleted vector is
6066 /// handled the same way as for ReplaceAllUsesWith.
6067 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6070 // Handle the simple, trivial case efficiently.
6072 return ReplaceAllUsesOfValueWith(*From, *To);
6074 // Read up all the uses and make records of them. This helps
6075 // processing new uses that are introduced during the
6076 // replacement process.
6077 SmallVector<UseMemo, 4> Uses;
6078 for (unsigned i = 0; i != Num; ++i) {
6079 unsigned FromResNo = From[i].getResNo();
6080 SDNode *FromNode = From[i].getNode();
6081 for (SDNode::use_iterator UI = FromNode->use_begin(),
6082 E = FromNode->use_end(); UI != E; ++UI) {
6083 SDUse &Use = UI.getUse();
6084 if (Use.getResNo() == FromResNo) {
6085 UseMemo Memo = { *UI, i, &Use };
6086 Uses.push_back(Memo);
6091 // Sort the uses, so that all the uses from a given User are together.
6092 std::sort(Uses.begin(), Uses.end());
6094 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6095 UseIndex != UseIndexEnd; ) {
6096 // We know that this user uses some value of From. If it is the right
6097 // value, update it.
6098 SDNode *User = Uses[UseIndex].User;
6100 // This node is about to morph, remove its old self from the CSE maps.
6101 RemoveNodeFromCSEMaps(User);
6103 // The Uses array is sorted, so all the uses for a given User
6104 // are next to each other in the list.
6105 // To help reduce the number of CSE recomputations, process all
6106 // the uses of this user that we can find this way.
6108 unsigned i = Uses[UseIndex].Index;
6109 SDUse &Use = *Uses[UseIndex].Use;
6113 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6115 // Now that we have modified User, add it back to the CSE maps. If it
6116 // already exists there, recursively merge the results together.
6117 AddModifiedNodeToCSEMaps(User);
6121 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6122 /// based on their topological order. It returns the maximum id and a vector
6123 /// of the SDNodes* in assigned order by reference.
6124 unsigned SelectionDAG::AssignTopologicalOrder() {
6126 unsigned DAGSize = 0;
6128 // SortedPos tracks the progress of the algorithm. Nodes before it are
6129 // sorted, nodes after it are unsorted. When the algorithm completes
6130 // it is at the end of the list.
6131 allnodes_iterator SortedPos = allnodes_begin();
6133 // Visit all the nodes. Move nodes with no operands to the front of
6134 // the list immediately. Annotate nodes that do have operands with their
6135 // operand count. Before we do this, the Node Id fields of the nodes
6136 // may contain arbitrary values. After, the Node Id fields for nodes
6137 // before SortedPos will contain the topological sort index, and the
6138 // Node Id fields for nodes At SortedPos and after will contain the
6139 // count of outstanding operands.
6140 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6142 checkForCycles(N, this);
6143 unsigned Degree = N->getNumOperands();
6145 // A node with no uses, add it to the result array immediately.
6146 N->setNodeId(DAGSize++);
6147 allnodes_iterator Q = N;
6149 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6150 assert(SortedPos != AllNodes.end() && "Overran node list");
6153 // Temporarily use the Node Id as scratch space for the degree count.
6154 N->setNodeId(Degree);
6158 // Visit all the nodes. As we iterate, move nodes into sorted order,
6159 // such that by the time the end is reached all nodes will be sorted.
6160 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6162 checkForCycles(N, this);
6163 // N is in sorted position, so all its uses have one less operand
6164 // that needs to be sorted.
6165 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6168 unsigned Degree = P->getNodeId();
6169 assert(Degree != 0 && "Invalid node degree");
6172 // All of P's operands are sorted, so P may sorted now.
6173 P->setNodeId(DAGSize++);
6175 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6176 assert(SortedPos != AllNodes.end() && "Overran node list");
6179 // Update P's outstanding operand count.
6180 P->setNodeId(Degree);
6183 if (I == SortedPos) {
6186 dbgs() << "Overran sorted position:\n";
6187 S->dumprFull(this); dbgs() << "\n";
6188 dbgs() << "Checking if this is due to cycles\n";
6189 checkForCycles(this, true);
6191 llvm_unreachable(nullptr);
6195 assert(SortedPos == AllNodes.end() &&
6196 "Topological sort incomplete!");
6197 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6198 "First node in topological sort is not the entry token!");
6199 assert(AllNodes.front().getNodeId() == 0 &&
6200 "First node in topological sort has non-zero id!");
6201 assert(AllNodes.front().getNumOperands() == 0 &&
6202 "First node in topological sort has operands!");
6203 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6204 "Last node in topologic sort has unexpected id!");
6205 assert(AllNodes.back().use_empty() &&
6206 "Last node in topologic sort has users!");
6207 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6211 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6212 /// value is produced by SD.
6213 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6215 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6216 SD->setHasDebugValue(true);
6218 DbgInfo->add(DB, SD, isParameter);
6221 /// TransferDbgValues - Transfer SDDbgValues.
6222 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6223 if (From == To || !From.getNode()->getHasDebugValue())
6225 SDNode *FromNode = From.getNode();
6226 SDNode *ToNode = To.getNode();
6227 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6228 SmallVector<SDDbgValue *, 2> ClonedDVs;
6229 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6231 SDDbgValue *Dbg = *I;
6232 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6234 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6235 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6236 Dbg->getDebugLoc(), Dbg->getOrder());
6237 ClonedDVs.push_back(Clone);
6240 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6241 E = ClonedDVs.end(); I != E; ++I)
6242 AddDbgValue(*I, ToNode, false);
6245 //===----------------------------------------------------------------------===//
6247 //===----------------------------------------------------------------------===//
6249 HandleSDNode::~HandleSDNode() {
6253 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6254 DebugLoc DL, const GlobalValue *GA,
6255 EVT VT, int64_t o, unsigned char TF)
6256 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6260 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6261 SDValue X, unsigned SrcAS,
6263 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6264 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6266 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6267 EVT memvt, MachineMemOperand *mmo)
6268 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6269 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6270 MMO->isNonTemporal(), MMO->isInvariant());
6271 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6272 assert(isNonTemporal() == MMO->isNonTemporal() &&
6273 "Non-temporal encoding error!");
6274 // We check here that the size of the memory operand fits within the size of
6275 // the MMO. This is because the MMO might indicate only a possible address
6276 // range instead of specifying the affected memory addresses precisely.
6277 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6280 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6281 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6282 : SDNode(Opc, Order, dl, VTs, Ops),
6283 MemoryVT(memvt), MMO(mmo) {
6284 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6285 MMO->isNonTemporal(), MMO->isInvariant());
6286 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6287 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6290 /// Profile - Gather unique data for the node.
6292 void SDNode::Profile(FoldingSetNodeID &ID) const {
6293 AddNodeIDNode(ID, this);
6298 std::vector<EVT> VTs;
6301 VTs.reserve(MVT::LAST_VALUETYPE);
6302 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6303 VTs.push_back(MVT((MVT::SimpleValueType)i));
6308 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6309 static ManagedStatic<EVTArray> SimpleVTArray;
6310 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6312 /// getValueTypeList - Return a pointer to the specified value type.
6314 const EVT *SDNode::getValueTypeList(EVT VT) {
6315 if (VT.isExtended()) {
6316 sys::SmartScopedLock<true> Lock(*VTMutex);
6317 return &(*EVTs->insert(VT).first);
6319 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6320 "Value type out of range!");
6321 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6325 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6326 /// indicated value. This method ignores uses of other values defined by this
6328 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6329 assert(Value < getNumValues() && "Bad value!");
6331 // TODO: Only iterate over uses of a given value of the node
6332 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6333 if (UI.getUse().getResNo() == Value) {
6340 // Found exactly the right number of uses?
6345 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6346 /// value. This method ignores uses of other values defined by this operation.
6347 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6348 assert(Value < getNumValues() && "Bad value!");
6350 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6351 if (UI.getUse().getResNo() == Value)
6358 /// isOnlyUserOf - Return true if this node is the only use of N.
6360 bool SDNode::isOnlyUserOf(SDNode *N) const {
6362 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6373 /// isOperand - Return true if this node is an operand of N.
6375 bool SDValue::isOperandOf(SDNode *N) const {
6376 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6377 if (*this == N->getOperand(i))
6382 bool SDNode::isOperandOf(SDNode *N) const {
6383 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6384 if (this == N->OperandList[i].getNode())
6389 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6390 /// be a chain) reaches the specified operand without crossing any
6391 /// side-effecting instructions on any chain path. In practice, this looks
6392 /// through token factors and non-volatile loads. In order to remain efficient,
6393 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6394 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6395 unsigned Depth) const {
6396 if (*this == Dest) return true;
6398 // Don't search too deeply, we just want to be able to see through
6399 // TokenFactor's etc.
6400 if (Depth == 0) return false;
6402 // If this is a token factor, all inputs to the TF happen in parallel. If any
6403 // of the operands of the TF does not reach dest, then we cannot do the xform.
6404 if (getOpcode() == ISD::TokenFactor) {
6405 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6406 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6411 // Loads don't have side effects, look through them.
6412 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6413 if (!Ld->isVolatile())
6414 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6419 /// hasPredecessor - Return true if N is a predecessor of this node.
6420 /// N is either an operand of this node, or can be reached by recursively
6421 /// traversing up the operands.
6422 /// NOTE: This is an expensive method. Use it carefully.
6423 bool SDNode::hasPredecessor(const SDNode *N) const {
6424 SmallPtrSet<const SDNode *, 32> Visited;
6425 SmallVector<const SDNode *, 16> Worklist;
6426 return hasPredecessorHelper(N, Visited, Worklist);
6430 SDNode::hasPredecessorHelper(const SDNode *N,
6431 SmallPtrSetImpl<const SDNode *> &Visited,
6432 SmallVectorImpl<const SDNode *> &Worklist) const {
6433 if (Visited.empty()) {
6434 Worklist.push_back(this);
6436 // Take a look in the visited set. If we've already encountered this node
6437 // we needn't search further.
6438 if (Visited.count(N))
6442 // Haven't visited N yet. Continue the search.
6443 while (!Worklist.empty()) {
6444 const SDNode *M = Worklist.pop_back_val();
6445 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6446 SDNode *Op = M->getOperand(i).getNode();
6447 if (Visited.insert(Op).second)
6448 Worklist.push_back(Op);
6457 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6458 assert(Num < NumOperands && "Invalid child # of SDNode!");
6459 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6462 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6463 assert(N->getNumValues() == 1 &&
6464 "Can't unroll a vector with multiple results!");
6466 EVT VT = N->getValueType(0);
6467 unsigned NE = VT.getVectorNumElements();
6468 EVT EltVT = VT.getVectorElementType();
6471 SmallVector<SDValue, 8> Scalars;
6472 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6474 // If ResNE is 0, fully unroll the vector op.
6477 else if (NE > ResNE)
6481 for (i= 0; i != NE; ++i) {
6482 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6483 SDValue Operand = N->getOperand(j);
6484 EVT OperandVT = Operand.getValueType();
6485 if (OperandVT.isVector()) {
6486 // A vector operand; extract a single element.
6487 EVT OperandEltVT = OperandVT.getVectorElementType();
6488 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6491 getConstant(i, TLI->getVectorIdxTy()));
6493 // A scalar operand; just use it as is.
6494 Operands[j] = Operand;
6498 switch (N->getOpcode()) {
6500 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6503 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6510 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6511 getShiftAmountOperand(Operands[0].getValueType(),
6514 case ISD::SIGN_EXTEND_INREG:
6515 case ISD::FP_ROUND_INREG: {
6516 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6517 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6519 getValueType(ExtVT)));
6524 for (; i < ResNE; ++i)
6525 Scalars.push_back(getUNDEF(EltVT));
6527 return getNode(ISD::BUILD_VECTOR, dl,
6528 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6532 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6533 /// location that is 'Dist' units away from the location that the 'Base' load
6534 /// is loading from.
6535 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6536 unsigned Bytes, int Dist) const {
6537 if (LD->getChain() != Base->getChain())
6539 EVT VT = LD->getValueType(0);
6540 if (VT.getSizeInBits() / 8 != Bytes)
6543 SDValue Loc = LD->getOperand(1);
6544 SDValue BaseLoc = Base->getOperand(1);
6545 if (Loc.getOpcode() == ISD::FrameIndex) {
6546 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6548 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6549 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6550 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6551 int FS = MFI->getObjectSize(FI);
6552 int BFS = MFI->getObjectSize(BFI);
6553 if (FS != BFS || FS != (int)Bytes) return false;
6554 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6558 if (isBaseWithConstantOffset(Loc)) {
6559 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6560 if (Loc.getOperand(0) == BaseLoc) {
6561 // If the base location is a simple address with no offset itself, then
6562 // the second load's first add operand should be the base address.
6563 if (LocOffset == Dist * (int)Bytes)
6565 } else if (isBaseWithConstantOffset(BaseLoc)) {
6566 // The base location itself has an offset, so subtract that value from the
6567 // second load's offset before comparing to distance * size.
6569 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6570 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6571 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6576 const GlobalValue *GV1 = nullptr;
6577 const GlobalValue *GV2 = nullptr;
6578 int64_t Offset1 = 0;
6579 int64_t Offset2 = 0;
6580 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6581 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6582 if (isGA1 && isGA2 && GV1 == GV2)
6583 return Offset1 == (Offset2 + Dist*Bytes);
6588 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6589 /// it cannot be inferred.
6590 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6591 // If this is a GlobalAddress + cst, return the alignment.
6592 const GlobalValue *GV;
6593 int64_t GVOffset = 0;
6594 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6595 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6596 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6597 llvm::computeKnownBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6598 TLI->getDataLayout());
6599 unsigned AlignBits = KnownZero.countTrailingOnes();
6600 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6602 return MinAlign(Align, GVOffset);
6605 // If this is a direct reference to a stack slot, use information about the
6606 // stack slot's alignment.
6607 int FrameIdx = 1 << 31;
6608 int64_t FrameOffset = 0;
6609 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6610 FrameIdx = FI->getIndex();
6611 } else if (isBaseWithConstantOffset(Ptr) &&
6612 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6614 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6615 FrameOffset = Ptr.getConstantOperandVal(1);
6618 if (FrameIdx != (1 << 31)) {
6619 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6620 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6628 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6629 /// which is split (or expanded) into two not necessarily identical pieces.
6630 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6631 // Currently all types are split in half.
6633 if (!VT.isVector()) {
6634 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6636 unsigned NumElements = VT.getVectorNumElements();
6637 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6638 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6641 return std::make_pair(LoVT, HiVT);
6644 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6646 std::pair<SDValue, SDValue>
6647 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6649 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6650 N.getValueType().getVectorNumElements() &&
6651 "More vector elements requested than available!");
6653 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6654 getConstant(0, TLI->getVectorIdxTy()));
6655 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6656 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6657 return std::make_pair(Lo, Hi);
6660 void SelectionDAG::ExtractVectorElements(SDValue Op,
6661 SmallVectorImpl<SDValue> &Args,
6662 unsigned Start, unsigned Count) {
6663 EVT VT = Op.getValueType();
6665 Count = VT.getVectorNumElements();
6667 EVT EltVT = VT.getVectorElementType();
6668 EVT IdxTy = TLI->getVectorIdxTy();
6670 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6671 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6672 Op, getConstant(i, IdxTy)));
6676 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6677 unsigned GlobalAddressSDNode::getAddressSpace() const {
6678 return getGlobal()->getType()->getAddressSpace();
6682 Type *ConstantPoolSDNode::getType() const {
6683 if (isMachineConstantPoolEntry())
6684 return Val.MachineCPVal->getType();
6685 return Val.ConstVal->getType();
6688 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6690 unsigned &SplatBitSize,
6692 unsigned MinSplatBits,
6693 bool isBigEndian) const {
6694 EVT VT = getValueType(0);
6695 assert(VT.isVector() && "Expected a vector type");
6696 unsigned sz = VT.getSizeInBits();
6697 if (MinSplatBits > sz)
6700 SplatValue = APInt(sz, 0);
6701 SplatUndef = APInt(sz, 0);
6703 // Get the bits. Bits with undefined values (when the corresponding element
6704 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6705 // in SplatValue. If any of the values are not constant, give up and return
6707 unsigned int nOps = getNumOperands();
6708 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6709 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6711 for (unsigned j = 0; j < nOps; ++j) {
6712 unsigned i = isBigEndian ? nOps-1-j : j;
6713 SDValue OpVal = getOperand(i);
6714 unsigned BitPos = j * EltBitSize;
6716 if (OpVal.getOpcode() == ISD::UNDEF)
6717 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6718 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6719 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6720 zextOrTrunc(sz) << BitPos;
6721 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6722 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6727 // The build_vector is all constants or undefs. Find the smallest element
6728 // size that splats the vector.
6730 HasAnyUndefs = (SplatUndef != 0);
6733 unsigned HalfSize = sz / 2;
6734 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6735 APInt LowValue = SplatValue.trunc(HalfSize);
6736 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6737 APInt LowUndef = SplatUndef.trunc(HalfSize);
6739 // If the two halves do not match (ignoring undef bits), stop here.
6740 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6741 MinSplatBits > HalfSize)
6744 SplatValue = HighValue | LowValue;
6745 SplatUndef = HighUndef & LowUndef;
6754 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6755 if (UndefElements) {
6756 UndefElements->clear();
6757 UndefElements->resize(getNumOperands());
6760 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6761 SDValue Op = getOperand(i);
6762 if (Op.getOpcode() == ISD::UNDEF) {
6764 (*UndefElements)[i] = true;
6765 } else if (!Splatted) {
6767 } else if (Splatted != Op) {
6773 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6774 "Can only have a splat without a constant for all undefs.");
6775 return getOperand(0);
6782 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6783 return dyn_cast_or_null<ConstantSDNode>(
6784 getSplatValue(UndefElements).getNode());
6788 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6789 return dyn_cast_or_null<ConstantFPSDNode>(
6790 getSplatValue(UndefElements).getNode());
6793 bool BuildVectorSDNode::isConstant() const {
6794 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6795 unsigned Opc = getOperand(i).getOpcode();
6796 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6802 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6803 // Find the first non-undef value in the shuffle mask.
6805 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6808 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6810 // Make sure all remaining elements are either undef or the same as the first
6812 for (int Idx = Mask[i]; i != e; ++i)
6813 if (Mask[i] >= 0 && Mask[i] != Idx)
6819 static void checkForCyclesHelper(const SDNode *N,
6820 SmallPtrSetImpl<const SDNode*> &Visited,
6821 SmallPtrSetImpl<const SDNode*> &Checked,
6822 const llvm::SelectionDAG *DAG) {
6823 // If this node has already been checked, don't check it again.
6824 if (Checked.count(N))
6827 // If a node has already been visited on this depth-first walk, reject it as
6829 if (!Visited.insert(N).second) {
6830 errs() << "Detected cycle in SelectionDAG\n";
6831 dbgs() << "Offending node:\n";
6832 N->dumprFull(DAG); dbgs() << "\n";
6836 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6837 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6844 void llvm::checkForCycles(const llvm::SDNode *N,
6845 const llvm::SelectionDAG *DAG,
6853 assert(N && "Checking nonexistent SDNode");
6854 SmallPtrSet<const SDNode*, 32> visited;
6855 SmallPtrSet<const SDNode*, 32> checked;
6856 checkForCyclesHelper(N, visited, checked, DAG);
6861 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6862 checkForCycles(DAG->getRoot().getNode(), DAG, force);