1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetLowering.h"
35 #include "llvm/Target/TargetSelectionDAGInfo.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetIntrinsicInfo.h"
39 #include "llvm/Target/TargetMachine.h"
40 #include "llvm/Support/CommandLine.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/ManagedStatic.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Support/Mutex.h"
47 #include "llvm/ADT/SetVector.h"
48 #include "llvm/ADT/SmallPtrSet.h"
49 #include "llvm/ADT/SmallSet.h"
50 #include "llvm/ADT/SmallVector.h"
51 #include "llvm/ADT/StringExtras.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
64 switch (VT.getSimpleVT().SimpleTy) {
65 default: llvm_unreachable("Unknown FP format");
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
76 //===----------------------------------------------------------------------===//
77 // ConstantFPSDNode Class
78 //===----------------------------------------------------------------------===//
80 /// isExactlyValue - We don't rely on operator== working on double values, as
81 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
82 /// As such, this method can be used to do an exact bit-for-bit comparison of
83 /// two floating point values.
84 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
85 return getValueAPF().bitwiseIsEqual(V);
88 bool ConstantFPSDNode::isValueValidForType(EVT VT,
90 assert(VT.isFloatingPoint() && "Can only convert between FP types");
92 // PPC long double cannot be converted to any other type.
93 if (VT == MVT::ppcf128 ||
94 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
97 // convert modifies in place, so make a copy.
98 APFloat Val2 = APFloat(Val);
100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
109 /// isBuildVectorAllOnes - Return true if the specified node is a
110 /// BUILD_VECTOR where all of the elements are ~0 or undef.
111 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
112 // Look through a bit convert.
113 if (N->getOpcode() == ISD::BITCAST)
114 N = N->getOperand(0).getNode();
116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
118 unsigned i = 0, e = N->getNumOperands();
120 // Skip over all of the undef values.
121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
124 // Do not accept an all-undef vector.
125 if (i == e) return false;
127 // Do not accept build_vectors that aren't all constants or which have non-~0
129 SDValue NotZero = N->getOperand(i);
130 if (isa<ConstantSDNode>(NotZero)) {
131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
133 } else if (isa<ConstantFPSDNode>(NotZero)) {
134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
135 bitcastToAPInt().isAllOnesValue())
140 // Okay, we have at least one ~0 value, check to see if the rest match or are
142 for (++i; i != e; ++i)
143 if (N->getOperand(i) != NotZero &&
144 N->getOperand(i).getOpcode() != ISD::UNDEF)
150 /// isBuildVectorAllZeros - Return true if the specified node is a
151 /// BUILD_VECTOR where all of the elements are 0 or undef.
152 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
153 // Look through a bit convert.
154 if (N->getOpcode() == ISD::BITCAST)
155 N = N->getOperand(0).getNode();
157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
159 unsigned i = 0, e = N->getNumOperands();
161 // Skip over all of the undef values.
162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
165 // Do not accept an all-undef vector.
166 if (i == e) return false;
168 // Do not accept build_vectors that aren't all constants or which have non-0
170 SDValue Zero = N->getOperand(i);
171 if (isa<ConstantSDNode>(Zero)) {
172 if (!cast<ConstantSDNode>(Zero)->isNullValue())
174 } else if (isa<ConstantFPSDNode>(Zero)) {
175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
180 // Okay, we have at least one 0 value, check to see if the rest match or are
182 for (++i; i != e; ++i)
183 if (N->getOperand(i) != Zero &&
184 N->getOperand(i).getOpcode() != ISD::UNDEF)
189 /// isScalarToVector - Return true if the specified node is a
190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
191 /// element is not an undef.
192 bool ISD::isScalarToVector(const SDNode *N) {
193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
196 if (N->getOpcode() != ISD::BUILD_VECTOR)
198 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
200 unsigned NumElems = N->getNumOperands();
203 for (unsigned i = 1; i < NumElems; ++i) {
204 SDValue V = N->getOperand(i);
205 if (V.getOpcode() != ISD::UNDEF)
211 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
212 /// when given the operation for (X op Y).
213 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
214 // To perform this operation, we just need to swap the L and G bits of the
216 unsigned OldL = (Operation >> 2) & 1;
217 unsigned OldG = (Operation >> 1) & 1;
218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
219 (OldL << 1) | // New G bit
220 (OldG << 2)); // New L bit.
223 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
224 /// 'op' is a valid SetCC operation.
225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
226 unsigned Operation = Op;
228 Operation ^= 7; // Flip L, G, E bits, but not U.
230 Operation ^= 15; // Flip all of the condition bits.
232 if (Operation > ISD::SETTRUE2)
233 Operation &= ~8; // Don't let N and U bits get set.
235 return ISD::CondCode(Operation);
239 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
241 /// if the operation does not depend on the sign of the input (setne and seteq).
242 static int isSignedOp(ISD::CondCode Opcode) {
244 default: llvm_unreachable("Illegal integer setcc operation!");
246 case ISD::SETNE: return 0;
250 case ISD::SETGE: return 1;
254 case ISD::SETUGE: return 2;
258 /// getSetCCOrOperation - Return the result of a logical OR between different
259 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
260 /// returns SETCC_INVALID if it is not possible to represent the resultant
262 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
265 // Cannot fold a signed integer setcc with an unsigned integer setcc.
266 return ISD::SETCC_INVALID;
268 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
270 // If the N and U bits get set then the resultant comparison DOES suddenly
271 // care about orderedness, and is true when ordered.
272 if (Op > ISD::SETTRUE2)
273 Op &= ~16; // Clear the U bit if the N bit is set.
275 // Canonicalize illegal integer setcc's.
276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
279 return ISD::CondCode(Op);
282 /// getSetCCAndOperation - Return the result of a logical AND between different
283 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
284 /// function returns zero if it is not possible to represent the resultant
286 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
289 // Cannot fold a signed setcc with an unsigned setcc.
290 return ISD::SETCC_INVALID;
292 // Combine all of the condition bits.
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
295 // Canonicalize illegal integer setcc's.
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
300 case ISD::SETOEQ: // SETEQ & SETU[LG]E
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
310 //===----------------------------------------------------------------------===//
311 // SDNode Profile Support
312 //===----------------------------------------------------------------------===//
314 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
320 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
321 /// solely with their pointer.
322 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
323 ID.AddPointer(VTList.VTs);
326 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328 static void AddNodeIDOperands(FoldingSetNodeID &ID,
329 const SDValue *Ops, unsigned NumOps) {
330 for (; NumOps; --NumOps, ++Ops) {
331 ID.AddPointer(Ops->getNode());
332 ID.AddInteger(Ops->getResNo());
336 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
338 static void AddNodeIDOperands(FoldingSetNodeID &ID,
339 const SDUse *Ops, unsigned NumOps) {
340 for (; NumOps; --NumOps, ++Ops) {
341 ID.AddPointer(Ops->getNode());
342 ID.AddInteger(Ops->getResNo());
346 static void AddNodeIDNode(FoldingSetNodeID &ID,
347 unsigned short OpC, SDVTList VTList,
348 const SDValue *OpList, unsigned N) {
349 AddNodeIDOpcode(ID, OpC);
350 AddNodeIDValueTypes(ID, VTList);
351 AddNodeIDOperands(ID, OpList, N);
354 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
356 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
357 switch (N->getOpcode()) {
358 case ISD::TargetExternalSymbol:
359 case ISD::ExternalSymbol:
360 llvm_unreachable("Should only be used on nodes with operands");
361 default: break; // Normal nodes don't need extra info.
362 case ISD::TargetConstant:
364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
366 case ISD::TargetConstantFP:
367 case ISD::ConstantFP: {
368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
371 case ISD::TargetGlobalAddress:
372 case ISD::GlobalAddress:
373 case ISD::TargetGlobalTLSAddress:
374 case ISD::GlobalTLSAddress: {
375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
376 ID.AddPointer(GA->getGlobal());
377 ID.AddInteger(GA->getOffset());
378 ID.AddInteger(GA->getTargetFlags());
381 case ISD::BasicBlock:
382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
391 case ISD::FrameIndex:
392 case ISD::TargetFrameIndex:
393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
396 case ISD::TargetJumpTable:
397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
400 case ISD::ConstantPool:
401 case ISD::TargetConstantPool: {
402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
403 ID.AddInteger(CP->getAlignment());
404 ID.AddInteger(CP->getOffset());
405 if (CP->isMachineConstantPoolEntry())
406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
408 ID.AddPointer(CP->getConstVal());
409 ID.AddInteger(CP->getTargetFlags());
413 const LoadSDNode *LD = cast<LoadSDNode>(N);
414 ID.AddInteger(LD->getMemoryVT().getRawBits());
415 ID.AddInteger(LD->getRawSubclassData());
419 const StoreSDNode *ST = cast<StoreSDNode>(N);
420 ID.AddInteger(ST->getMemoryVT().getRawBits());
421 ID.AddInteger(ST->getRawSubclassData());
424 case ISD::ATOMIC_CMP_SWAP:
425 case ISD::ATOMIC_SWAP:
426 case ISD::ATOMIC_LOAD_ADD:
427 case ISD::ATOMIC_LOAD_SUB:
428 case ISD::ATOMIC_LOAD_AND:
429 case ISD::ATOMIC_LOAD_OR:
430 case ISD::ATOMIC_LOAD_XOR:
431 case ISD::ATOMIC_LOAD_NAND:
432 case ISD::ATOMIC_LOAD_MIN:
433 case ISD::ATOMIC_LOAD_MAX:
434 case ISD::ATOMIC_LOAD_UMIN:
435 case ISD::ATOMIC_LOAD_UMAX: {
436 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
437 ID.AddInteger(AT->getMemoryVT().getRawBits());
438 ID.AddInteger(AT->getRawSubclassData());
441 case ISD::VECTOR_SHUFFLE: {
442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
445 ID.AddInteger(SVN->getMaskElt(i));
448 case ISD::TargetBlockAddress:
449 case ISD::BlockAddress: {
450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
454 } // end switch (N->getOpcode())
457 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
459 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
460 AddNodeIDOpcode(ID, N->getOpcode());
461 // Add the return value info.
462 AddNodeIDValueTypes(ID, N->getVTList());
463 // Add the operand info.
464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
466 // Handle SDNode leafs with special info.
467 AddNodeIDCustom(ID, N);
470 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
471 /// the CSE map that carries volatility, temporalness, indexing mode, and
472 /// extension/truncation information.
474 static inline unsigned
475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
476 bool isNonTemporal) {
477 assert((ConvType & 3) == ConvType &&
478 "ConvType may not require more than 2 bits!");
479 assert((AM & 7) == AM &&
480 "AM may not require more than 3 bits!");
484 (isNonTemporal << 6);
487 //===----------------------------------------------------------------------===//
488 // SelectionDAG Class
489 //===----------------------------------------------------------------------===//
491 /// doNotCSE - Return true if CSE should not be performed for this node.
492 static bool doNotCSE(SDNode *N) {
493 if (N->getValueType(0) == MVT::Glue)
494 return true; // Never CSE anything that produces a flag.
496 switch (N->getOpcode()) {
498 case ISD::HANDLENODE:
500 return true; // Never CSE these nodes.
503 // Check that remaining values produced are not flags.
504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
505 if (N->getValueType(i) == MVT::Glue)
506 return true; // Never CSE anything that produces a flag.
511 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
513 void SelectionDAG::RemoveDeadNodes() {
514 // Create a dummy node (which is not added to allnodes), that adds a reference
515 // to the root node, preventing it from being deleted.
516 HandleSDNode Dummy(getRoot());
518 SmallVector<SDNode*, 128> DeadNodes;
520 // Add all obviously-dead nodes to the DeadNodes worklist.
521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
523 DeadNodes.push_back(I);
525 RemoveDeadNodes(DeadNodes);
527 // If the root changed (e.g. it was a dead load, update the root).
528 setRoot(Dummy.getValue());
531 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
532 /// given list, and any nodes that become unreachable as a result.
533 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
534 DAGUpdateListener *UpdateListener) {
536 // Process the worklist, deleting the nodes and adding their uses to the
538 while (!DeadNodes.empty()) {
539 SDNode *N = DeadNodes.pop_back_val();
542 UpdateListener->NodeDeleted(N, 0);
544 // Take the node out of the appropriate CSE map.
545 RemoveNodeFromCSEMaps(N);
547 // Next, brutally remove the operand list. This is safe to do, as there are
548 // no cycles in the graph.
549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
551 SDNode *Operand = Use.getNode();
554 // Now that we removed this operand, see if there are no uses of it left.
555 if (Operand->use_empty())
556 DeadNodes.push_back(Operand);
563 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
564 SmallVector<SDNode*, 16> DeadNodes(1, N);
565 RemoveDeadNodes(DeadNodes, UpdateListener);
568 void SelectionDAG::DeleteNode(SDNode *N) {
569 // First take this out of the appropriate CSE map.
570 RemoveNodeFromCSEMaps(N);
572 // Finally, remove uses due to operands of this node, remove from the
573 // AllNodes list, and delete the node.
574 DeleteNodeNotInCSEMaps(N);
577 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
578 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
579 assert(N->use_empty() && "Cannot delete a node that is not dead!");
581 // Drop all of the operands and decrement used node's use counts.
587 void SelectionDAG::DeallocateNode(SDNode *N) {
588 if (N->OperandsNeedDelete)
589 delete[] N->OperandList;
591 // Set the opcode to DELETED_NODE to help catch bugs when node
592 // memory is reallocated.
593 N->NodeType = ISD::DELETED_NODE;
595 NodeAllocator.Deallocate(AllNodes.remove(N));
597 // Remove the ordering of this node.
600 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
601 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
602 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
603 DbgVals[i]->setIsInvalidated();
606 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
607 /// correspond to it. This is useful when we're about to delete or repurpose
608 /// the node. We don't want future request for structurally identical nodes
609 /// to return N anymore.
610 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
612 switch (N->getOpcode()) {
613 case ISD::HANDLENODE: return false; // noop.
615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
616 "Cond code doesn't exist!");
617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
620 case ISD::ExternalSymbol:
621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
623 case ISD::TargetExternalSymbol: {
624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
625 Erased = TargetExternalSymbols.erase(
626 std::pair<std::string,unsigned char>(ESN->getSymbol(),
627 ESN->getTargetFlags()));
630 case ISD::VALUETYPE: {
631 EVT VT = cast<VTSDNode>(N)->getVT();
632 if (VT.isExtended()) {
633 Erased = ExtendedValueTypeNodes.erase(VT);
635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
641 // Remove it from the CSE Map.
642 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
643 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
644 Erased = CSEMap.RemoveNode(N);
648 // Verify that the node was actually in one of the CSE maps, unless it has a
649 // flag result (which cannot be CSE'd) or is one of the special cases that are
650 // not subject to CSE.
651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
652 !N->isMachineOpcode() && !doNotCSE(N)) {
655 llvm_unreachable("Node is not in map!");
661 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
662 /// maps and modified in place. Add it back to the CSE maps, unless an identical
663 /// node already exists, in which case transfer all its users to the existing
664 /// node. This transfer can potentially trigger recursive merging.
667 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
668 DAGUpdateListener *UpdateListener) {
669 // For node types that aren't CSE'd, just act as if no identical node
672 SDNode *Existing = CSEMap.GetOrInsertNode(N);
674 // If there was already an existing matching node, use ReplaceAllUsesWith
675 // to replace the dead one with the existing one. This can cause
676 // recursive merging of other unrelated nodes down the line.
677 ReplaceAllUsesWith(N, Existing, UpdateListener);
679 // N is now dead. Inform the listener if it exists and delete it.
681 UpdateListener->NodeDeleted(N, Existing);
682 DeleteNodeNotInCSEMaps(N);
687 // If the node doesn't already exist, we updated it. Inform a listener if
690 UpdateListener->NodeUpdated(N);
693 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
694 /// were replaced with those specified. If this node is never memoized,
695 /// return null, otherwise return a pointer to the slot it would take. If a
696 /// node already exists with these operands, the slot will be non-null.
697 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
702 SDValue Ops[] = { Op };
704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
705 AddNodeIDCustom(ID, N);
706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
710 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
711 /// were replaced with those specified. If this node is never memoized,
712 /// return null, otherwise return a pointer to the slot it would take. If a
713 /// node already exists with these operands, the slot will be non-null.
714 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
715 SDValue Op1, SDValue Op2,
720 SDValue Ops[] = { Op1, Op2 };
722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
723 AddNodeIDCustom(ID, N);
724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 const SDValue *Ops,unsigned NumOps,
740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
741 AddNodeIDCustom(ID, N);
742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
747 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
748 static void VerifyNodeCommon(SDNode *N) {
749 switch (N->getOpcode()) {
752 case ISD::BUILD_PAIR: {
753 EVT VT = N->getValueType(0);
754 assert(N->getNumValues() == 1 && "Too many results!");
755 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
756 "Wrong return type!");
757 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
758 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
759 "Mismatched operand types!");
760 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
761 "Wrong operand type!");
762 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
763 "Wrong return type size");
766 case ISD::BUILD_VECTOR: {
767 assert(N->getNumValues() == 1 && "Too many results!");
768 assert(N->getValueType(0).isVector() && "Wrong return type!");
769 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
770 "Wrong number of operands!");
771 EVT EltVT = N->getValueType(0).getVectorElementType();
772 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
773 assert((I->getValueType() == EltVT ||
774 (EltVT.isInteger() && I->getValueType().isInteger() &&
775 EltVT.bitsLE(I->getValueType()))) &&
776 "Wrong operand type!");
782 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
783 static void VerifySDNode(SDNode *N) {
784 // The SDNode allocators cannot be used to allocate nodes with fields that are
785 // not present in an SDNode!
786 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
787 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
788 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
789 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
790 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
791 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
792 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
793 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
794 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
795 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
796 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
797 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
798 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
799 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
800 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
801 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
802 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
803 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
804 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
809 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
811 static void VerifyMachineNode(SDNode *N) {
812 // The MachineNode allocators cannot be used to allocate nodes with fields
813 // that are not present in a MachineNode!
814 // Currently there are no such nodes.
820 /// getEVTAlignment - Compute the default alignment value for the
823 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
824 const Type *Ty = VT == MVT::iPTR ?
825 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
826 VT.getTypeForEVT(*getContext());
828 return TLI.getTargetData()->getABITypeAlignment(Ty);
831 // EntryNode could meaningfully have debug info if we can find it...
832 SelectionDAG::SelectionDAG(const TargetMachine &tm)
833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
835 Root(getEntryNode()), Ordering(0) {
836 AllNodes.push_back(&EntryNode);
837 Ordering = new SDNodeOrdering();
838 DbgInfo = new SDDbgInfo();
841 void SelectionDAG::init(MachineFunction &mf) {
843 Context = &mf.getFunction()->getContext();
846 SelectionDAG::~SelectionDAG() {
852 void SelectionDAG::allnodes_clear() {
853 assert(&*AllNodes.begin() == &EntryNode);
854 AllNodes.remove(AllNodes.begin());
855 while (!AllNodes.empty())
856 DeallocateNode(AllNodes.begin());
859 void SelectionDAG::clear() {
861 OperandAllocator.Reset();
864 ExtendedValueTypeNodes.clear();
865 ExternalSymbols.clear();
866 TargetExternalSymbols.clear();
867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
868 static_cast<CondCodeSDNode*>(0));
869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
870 static_cast<SDNode*>(0));
872 EntryNode.UseList = 0;
873 AllNodes.push_back(&EntryNode);
874 Root = getEntryNode();
879 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
880 return VT.bitsGT(Op.getValueType()) ?
881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
882 getNode(ISD::TRUNCATE, DL, VT, Op);
885 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
886 return VT.bitsGT(Op.getValueType()) ?
887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
888 getNode(ISD::TRUNCATE, DL, VT, Op);
891 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
892 assert(!VT.isVector() &&
893 "getZeroExtendInReg should use the vector element type instead of "
895 if (Op.getValueType() == VT) return Op;
896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
897 APInt Imm = APInt::getLowBitsSet(BitWidth,
899 return getNode(ISD::AND, DL, Op.getValueType(), Op,
900 getConstant(Imm, Op.getValueType()));
903 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
905 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
906 EVT EltVT = VT.getScalarType();
908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
909 return getNode(ISD::XOR, DL, VT, Val, NegOne);
912 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
913 EVT EltVT = VT.getScalarType();
914 assert((EltVT.getSizeInBits() >= 64 ||
915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
916 "getConstant with a uint64_t value that doesn't fit in the type!");
917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
920 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
924 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
925 assert(VT.isInteger() && "Cannot create FP integer constant!");
927 EVT EltVT = VT.getScalarType();
928 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
929 "APInt size does not match type size!");
931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
939 return SDValue(N, 0);
942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
943 CSEMap.InsertNode(N, IP);
944 AllNodes.push_back(N);
947 SDValue Result(N, 0);
949 SmallVector<SDValue, 8> Ops;
950 Ops.assign(VT.getVectorNumElements(), Result);
951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
956 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
957 return getConstant(Val, TLI.getPointerTy(), isTarget);
961 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
965 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
968 EVT EltVT = VT.getScalarType();
970 // Do the map lookup using the actual bit pattern for the floating point
971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
972 // we don't have issues with SNANs.
973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
981 return SDValue(N, 0);
984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
985 CSEMap.InsertNode(N, IP);
986 AllNodes.push_back(N);
989 SDValue Result(N, 0);
991 SmallVector<SDValue, 8> Ops;
992 Ops.assign(VT.getVectorNumElements(), Result);
993 // FIXME DebugLoc info might be appropriate here
994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
999 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1000 EVT EltVT = VT.getScalarType();
1001 if (EltVT==MVT::f32)
1002 return getConstantFP(APFloat((float)Val), VT, isTarget);
1003 else if (EltVT==MVT::f64)
1004 return getConstantFP(APFloat(Val), VT, isTarget);
1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1007 APFloat apf = APFloat(Val);
1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1010 return getConstantFP(apf, VT, isTarget);
1012 assert(0 && "Unsupported type in getConstantFP");
1017 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1018 EVT VT, int64_t Offset,
1020 unsigned char TargetFlags) {
1021 assert((TargetFlags == 0 || isTargetGA) &&
1022 "Cannot set target flags on target-independent globals");
1024 // Truncate (with sign-extension) the offset value to the pointer size.
1025 EVT PTy = TLI.getPointerTy();
1026 unsigned BitWidth = PTy.getSizeInBits();
1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1032 // If GV is an alias then use the aliasee for determining thread-localness.
1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1038 if (GVar && GVar->isThreadLocal())
1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1043 FoldingSetNodeID ID;
1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1046 ID.AddInteger(Offset);
1047 ID.AddInteger(TargetFlags);
1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1050 return SDValue(E, 0);
1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1053 Offset, TargetFlags);
1054 CSEMap.InsertNode(N, IP);
1055 AllNodes.push_back(N);
1056 return SDValue(N, 0);
1059 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1061 FoldingSetNodeID ID;
1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1066 return SDValue(E, 0);
1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1069 CSEMap.InsertNode(N, IP);
1070 AllNodes.push_back(N);
1071 return SDValue(N, 0);
1074 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1075 unsigned char TargetFlags) {
1076 assert((TargetFlags == 0 || isTarget) &&
1077 "Cannot set target flags on target-independent jump tables");
1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1079 FoldingSetNodeID ID;
1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1082 ID.AddInteger(TargetFlags);
1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1085 return SDValue(E, 0);
1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1089 CSEMap.InsertNode(N, IP);
1090 AllNodes.push_back(N);
1091 return SDValue(N, 0);
1094 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1095 unsigned Alignment, int Offset,
1097 unsigned char TargetFlags) {
1098 assert((TargetFlags == 0 || isTarget) &&
1099 "Cannot set target flags on target-independent globals");
1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1103 FoldingSetNodeID ID;
1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1105 ID.AddInteger(Alignment);
1106 ID.AddInteger(Offset);
1108 ID.AddInteger(TargetFlags);
1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1111 return SDValue(E, 0);
1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1114 Alignment, TargetFlags);
1115 CSEMap.InsertNode(N, IP);
1116 AllNodes.push_back(N);
1117 return SDValue(N, 0);
1121 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1122 unsigned Alignment, int Offset,
1124 unsigned char TargetFlags) {
1125 assert((TargetFlags == 0 || isTarget) &&
1126 "Cannot set target flags on target-independent globals");
1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1130 FoldingSetNodeID ID;
1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1132 ID.AddInteger(Alignment);
1133 ID.AddInteger(Offset);
1134 C->AddSelectionDAGCSEId(ID);
1135 ID.AddInteger(TargetFlags);
1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1138 return SDValue(E, 0);
1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1141 Alignment, TargetFlags);
1142 CSEMap.InsertNode(N, IP);
1143 AllNodes.push_back(N);
1144 return SDValue(N, 0);
1147 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1148 FoldingSetNodeID ID;
1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1153 return SDValue(E, 0);
1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1156 CSEMap.InsertNode(N, IP);
1157 AllNodes.push_back(N);
1158 return SDValue(N, 0);
1161 SDValue SelectionDAG::getValueType(EVT VT) {
1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1163 ValueTypeNodes.size())
1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1166 SDNode *&N = VT.isExtended() ?
1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1169 if (N) return SDValue(N, 0);
1170 N = new (NodeAllocator) VTSDNode(VT);
1171 AllNodes.push_back(N);
1172 return SDValue(N, 0);
1175 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1176 SDNode *&N = ExternalSymbols[Sym];
1177 if (N) return SDValue(N, 0);
1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1179 AllNodes.push_back(N);
1180 return SDValue(N, 0);
1183 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1184 unsigned char TargetFlags) {
1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1188 if (N) return SDValue(N, 0);
1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1190 AllNodes.push_back(N);
1191 return SDValue(N, 0);
1194 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1195 if ((unsigned)Cond >= CondCodeNodes.size())
1196 CondCodeNodes.resize(Cond+1);
1198 if (CondCodeNodes[Cond] == 0) {
1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1200 CondCodeNodes[Cond] = N;
1201 AllNodes.push_back(N);
1204 return SDValue(CondCodeNodes[Cond], 0);
1207 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1208 // the shuffle mask M that point at N1 to point at N2, and indices that point
1209 // N2 to point at N1.
1210 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1212 int NElts = M.size();
1213 for (int i = 0; i != NElts; ++i) {
1221 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1222 SDValue N2, const int *Mask) {
1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1224 assert(VT.isVector() && N1.getValueType().isVector() &&
1225 "Vector Shuffle VTs must be a vectors");
1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1227 && "Vector Shuffle VTs must have same element type");
1229 // Canonicalize shuffle undef, undef -> undef
1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1231 return getUNDEF(VT);
1233 // Validate that all indices in Mask are within the range of the elements
1234 // input to the shuffle.
1235 unsigned NElts = VT.getVectorNumElements();
1236 SmallVector<int, 8> MaskVec;
1237 for (unsigned i = 0; i != NElts; ++i) {
1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1239 MaskVec.push_back(Mask[i]);
1242 // Canonicalize shuffle v, v -> v, undef
1245 for (unsigned i = 0; i != NElts; ++i)
1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1250 if (N1.getOpcode() == ISD::UNDEF)
1251 commuteShuffle(N1, N2, MaskVec);
1253 // Canonicalize all index into lhs, -> shuffle lhs, undef
1254 // Canonicalize all index into rhs, -> shuffle rhs, undef
1255 bool AllLHS = true, AllRHS = true;
1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1257 for (unsigned i = 0; i != NElts; ++i) {
1258 if (MaskVec[i] >= (int)NElts) {
1263 } else if (MaskVec[i] >= 0) {
1267 if (AllLHS && AllRHS)
1268 return getUNDEF(VT);
1269 if (AllLHS && !N2Undef)
1273 commuteShuffle(N1, N2, MaskVec);
1276 // If Identity shuffle, or all shuffle in to undef, return that node.
1277 bool AllUndef = true;
1278 bool Identity = true;
1279 for (unsigned i = 0; i != NElts; ++i) {
1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1281 if (MaskVec[i] >= 0) AllUndef = false;
1283 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1286 return getUNDEF(VT);
1288 FoldingSetNodeID ID;
1289 SDValue Ops[2] = { N1, N2 };
1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1291 for (unsigned i = 0; i != NElts; ++i)
1292 ID.AddInteger(MaskVec[i]);
1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1296 return SDValue(E, 0);
1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1299 // SDNode doesn't have access to it. This memory will be "leaked" when
1300 // the node is deallocated, but recovered when the NodeAllocator is released.
1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1304 ShuffleVectorSDNode *N =
1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1306 CSEMap.InsertNode(N, IP);
1307 AllNodes.push_back(N);
1308 return SDValue(N, 0);
1311 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1312 SDValue Val, SDValue DTy,
1313 SDValue STy, SDValue Rnd, SDValue Sat,
1314 ISD::CvtCode Code) {
1315 // If the src and dest types are the same and the conversion is between
1316 // integer types of the same sign or two floats, no conversion is necessary.
1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1321 FoldingSetNodeID ID;
1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1326 return SDValue(E, 0);
1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1330 CSEMap.InsertNode(N, IP);
1331 AllNodes.push_back(N);
1332 return SDValue(N, 0);
1335 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1336 FoldingSetNodeID ID;
1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1338 ID.AddInteger(RegNo);
1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1341 return SDValue(E, 0);
1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1350 FoldingSetNodeID ID;
1351 SDValue Ops[] = { Root };
1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1353 ID.AddPointer(Label);
1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1356 return SDValue(E, 0);
1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1359 CSEMap.InsertNode(N, IP);
1360 AllNodes.push_back(N);
1361 return SDValue(N, 0);
1365 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1367 unsigned char TargetFlags) {
1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1370 FoldingSetNodeID ID;
1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1373 ID.AddInteger(TargetFlags);
1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1376 return SDValue(E, 0);
1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1379 CSEMap.InsertNode(N, IP);
1380 AllNodes.push_back(N);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getSrcValue(const Value *V) {
1385 assert((!V || V->getType()->isPointerTy()) &&
1386 "SrcValue is not a pointer?");
1388 FoldingSetNodeID ID;
1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1394 return SDValue(E, 0);
1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1397 CSEMap.InsertNode(N, IP);
1398 AllNodes.push_back(N);
1399 return SDValue(N, 0);
1402 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1403 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1404 FoldingSetNodeID ID;
1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1410 return SDValue(E, 0);
1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1413 CSEMap.InsertNode(N, IP);
1414 AllNodes.push_back(N);
1415 return SDValue(N, 0);
1419 /// getShiftAmountOperand - Return the specified value casted to
1420 /// the target's desired shift amount type.
1421 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1422 EVT OpTy = Op.getValueType();
1423 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1424 if (OpTy == ShTy || OpTy.isVector()) return Op;
1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1430 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1431 /// specified value type.
1432 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1434 unsigned ByteSize = VT.getStoreSize();
1435 const Type *Ty = VT.getTypeForEVT(*getContext());
1436 unsigned StackAlign =
1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1440 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1443 /// CreateStackTemporary - Create a stack temporary suitable for holding
1444 /// either of the specified value types.
1445 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1447 VT2.getStoreSizeInBits())/8;
1448 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1449 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1450 const TargetData *TD = TLI.getTargetData();
1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1452 TD->getPrefTypeAlignment(Ty2));
1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1456 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1459 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1461 // These setcc operations always fold.
1465 case ISD::SETFALSE2: return getConstant(0, VT);
1467 case ISD::SETTRUE2: return getConstant(1, VT);
1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1484 const APInt &C2 = N2C->getAPIntValue();
1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1486 const APInt &C1 = N1C->getAPIntValue();
1489 default: llvm_unreachable("Unknown integer setcc!");
1490 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1491 case ISD::SETNE: return getConstant(C1 != C2, VT);
1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1505 // No compile time operations on this type yet.
1506 if (N1C->getValueType(0) == MVT::ppcf128)
1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1513 return getUNDEF(VT);
1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1516 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1517 return getUNDEF(VT);
1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1520 R==APFloat::cmpLessThan, VT);
1521 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1522 return getUNDEF(VT);
1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1525 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1526 return getUNDEF(VT);
1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1529 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1530 return getUNDEF(VT);
1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1533 R==APFloat::cmpEqual, VT);
1534 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1535 return getUNDEF(VT);
1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1538 R==APFloat::cmpEqual, VT);
1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1542 R==APFloat::cmpEqual, VT);
1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1545 R==APFloat::cmpLessThan, VT);
1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1547 R==APFloat::cmpUnordered, VT);
1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1552 // Ensure that the constant occurs on the RHS.
1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1557 // Could not fold it.
1561 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1562 /// use this predicate to simplify operations downstream.
1563 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1564 // This predicate is not safe for vector operations.
1565 if (Op.getValueType().isVector())
1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1572 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1573 /// this predicate to simplify operations downstream. Mask is known to be zero
1574 /// for bits that V cannot have.
1575 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1576 unsigned Depth) const {
1577 APInt KnownZero, KnownOne;
1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1580 return (KnownZero & Mask) == Mask;
1583 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1584 /// known to be either zero or one and return them in the KnownZero/KnownOne
1585 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1587 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1588 APInt &KnownZero, APInt &KnownOne,
1589 unsigned Depth) const {
1590 unsigned BitWidth = Mask.getBitWidth();
1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1592 "Mask size mismatches value type size!");
1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1595 if (Depth == 6 || Mask == 0)
1596 return; // Limit search depth.
1598 APInt KnownZero2, KnownOne2;
1600 switch (Op.getOpcode()) {
1602 // We know all of the bits for a constant!
1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1604 KnownZero = ~KnownOne & Mask;
1607 // If either the LHS or the RHS are Zero, the result is zero.
1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1610 KnownZero2, KnownOne2, Depth+1);
1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1614 // Output known-1 bits are only known if set in both the LHS & RHS.
1615 KnownOne &= KnownOne2;
1616 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1617 KnownZero |= KnownZero2;
1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1622 KnownZero2, KnownOne2, Depth+1);
1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1626 // Output known-0 bits are only known if clear in both the LHS & RHS.
1627 KnownZero &= KnownZero2;
1628 // Output known-1 are known to be set if set in either the LHS | RHS.
1629 KnownOne |= KnownOne2;
1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1637 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1639 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1641 KnownZero = KnownZeroOut;
1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1651 // If low bits are zero in either operand, output low known-0 bits.
1652 // Also compute a conserative estimate for high known-0 bits.
1653 // More trickiness is possible, but this is sufficient for the
1654 // interesting case of alignment computation.
1655 KnownOne.clearAllBits();
1656 unsigned TrailZ = KnownZero.countTrailingOnes() +
1657 KnownZero2.countTrailingOnes();
1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1659 KnownZero2.countLeadingOnes(),
1660 BitWidth) - BitWidth;
1662 TrailZ = std::min(TrailZ, BitWidth);
1663 LeadZ = std::min(LeadZ, BitWidth);
1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1665 APInt::getHighBitsSet(BitWidth, LeadZ);
1670 // For the purposes of computing leading zeros we can conservatively
1671 // treat a udiv as a logical right shift by the power of 2 known to
1672 // be less than the denominator.
1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1674 ComputeMaskedBits(Op.getOperand(0),
1675 AllOnes, KnownZero2, KnownOne2, Depth+1);
1676 unsigned LeadZ = KnownZero2.countLeadingOnes();
1678 KnownOne2.clearAllBits();
1679 KnownZero2.clearAllBits();
1680 ComputeMaskedBits(Op.getOperand(1),
1681 AllOnes, KnownZero2, KnownOne2, Depth+1);
1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1683 if (RHSUnknownLeadingOnes != BitWidth)
1684 LeadZ = std::min(BitWidth,
1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1696 // Only known if known in both the LHS and RHS.
1697 KnownOne &= KnownOne2;
1698 KnownZero &= KnownZero2;
1700 case ISD::SELECT_CC:
1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1706 // Only known if known in both the LHS and RHS.
1707 KnownOne &= KnownOne2;
1708 KnownZero &= KnownZero2;
1716 if (Op.getResNo() != 1)
1718 // The boolean result conforms to getBooleanContents. Fall through.
1720 // If we know the result of a setcc has the top bits zero, use this info.
1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1728 unsigned ShAmt = SA->getZExtValue();
1730 // If the shift count is an invalid immediate, don't do anything.
1731 if (ShAmt >= BitWidth)
1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1735 KnownZero, KnownOne, Depth+1);
1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1737 KnownZero <<= ShAmt;
1739 // low bits known zero.
1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1746 unsigned ShAmt = SA->getZExtValue();
1748 // If the shift count is an invalid immediate, don't do anything.
1749 if (ShAmt >= BitWidth)
1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1753 KnownZero, KnownOne, Depth+1);
1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1755 KnownZero = KnownZero.lshr(ShAmt);
1756 KnownOne = KnownOne.lshr(ShAmt);
1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1759 KnownZero |= HighBits; // High bits known zero.
1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1764 unsigned ShAmt = SA->getZExtValue();
1766 // If the shift count is an invalid immediate, don't do anything.
1767 if (ShAmt >= BitWidth)
1770 APInt InDemandedMask = (Mask << ShAmt);
1771 // If any of the demanded bits are produced by the sign extension, we also
1772 // demand the input sign bit.
1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1774 if (HighBits.getBoolValue())
1775 InDemandedMask |= APInt::getSignBit(BitWidth);
1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1780 KnownZero = KnownZero.lshr(ShAmt);
1781 KnownOne = KnownOne.lshr(ShAmt);
1783 // Handle the sign bits.
1784 APInt SignBit = APInt::getSignBit(BitWidth);
1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1787 if (KnownZero.intersects(SignBit)) {
1788 KnownZero |= HighBits; // New bits are known zero.
1789 } else if (KnownOne.intersects(SignBit)) {
1790 KnownOne |= HighBits; // New bits are known one.
1794 case ISD::SIGN_EXTEND_INREG: {
1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1796 unsigned EBits = EVT.getScalarType().getSizeInBits();
1798 // Sign extension. Compute the demanded bits in the result that are not
1799 // present in the input.
1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1802 APInt InSignBit = APInt::getSignBit(EBits);
1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1805 // If the sign extended bits are demanded, we know that the sign
1807 InSignBit = InSignBit.zext(BitWidth);
1808 if (NewBits.getBoolValue())
1809 InputDemandedBits |= InSignBit;
1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1812 KnownZero, KnownOne, Depth+1);
1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1815 // If the sign bit of the input is known set or clear, then we know the
1816 // top bits of the result.
1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1818 KnownZero |= NewBits;
1819 KnownOne &= ~NewBits;
1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1821 KnownOne |= NewBits;
1822 KnownZero &= ~NewBits;
1823 } else { // Input sign bit unknown
1824 KnownZero &= ~NewBits;
1825 KnownOne &= ~NewBits;
1832 unsigned LowBits = Log2_32(BitWidth)+1;
1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1834 KnownOne.clearAllBits();
1838 if (ISD::isZEXTLoad(Op.getNode())) {
1839 LoadSDNode *LD = cast<LoadSDNode>(Op);
1840 EVT VT = LD->getMemoryVT();
1841 unsigned MemBits = VT.getScalarType().getSizeInBits();
1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1846 case ISD::ZERO_EXTEND: {
1847 EVT InVT = Op.getOperand(0).getValueType();
1848 unsigned InBits = InVT.getScalarType().getSizeInBits();
1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1850 APInt InMask = Mask.trunc(InBits);
1851 KnownZero = KnownZero.trunc(InBits);
1852 KnownOne = KnownOne.trunc(InBits);
1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1854 KnownZero = KnownZero.zext(BitWidth);
1855 KnownOne = KnownOne.zext(BitWidth);
1856 KnownZero |= NewBits;
1859 case ISD::SIGN_EXTEND: {
1860 EVT InVT = Op.getOperand(0).getValueType();
1861 unsigned InBits = InVT.getScalarType().getSizeInBits();
1862 APInt InSignBit = APInt::getSignBit(InBits);
1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1864 APInt InMask = Mask.trunc(InBits);
1866 // If any of the sign extended bits are demanded, we know that the sign
1867 // bit is demanded. Temporarily set this bit in the mask for our callee.
1868 if (NewBits.getBoolValue())
1869 InMask |= InSignBit;
1871 KnownZero = KnownZero.trunc(InBits);
1872 KnownOne = KnownOne.trunc(InBits);
1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1875 // Note if the sign bit is known to be zero or one.
1876 bool SignBitKnownZero = KnownZero.isNegative();
1877 bool SignBitKnownOne = KnownOne.isNegative();
1878 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1879 "Sign bit can't be known to be both zero and one!");
1881 // If the sign bit wasn't actually demanded by our caller, we don't
1882 // want it set in the KnownZero and KnownOne result values. Reset the
1883 // mask and reapply it to the result values.
1884 InMask = Mask.trunc(InBits);
1885 KnownZero &= InMask;
1888 KnownZero = KnownZero.zext(BitWidth);
1889 KnownOne = KnownOne.zext(BitWidth);
1891 // If the sign bit is known zero or one, the top bits match.
1892 if (SignBitKnownZero)
1893 KnownZero |= NewBits;
1894 else if (SignBitKnownOne)
1895 KnownOne |= NewBits;
1898 case ISD::ANY_EXTEND: {
1899 EVT InVT = Op.getOperand(0).getValueType();
1900 unsigned InBits = InVT.getScalarType().getSizeInBits();
1901 APInt InMask = Mask.trunc(InBits);
1902 KnownZero = KnownZero.trunc(InBits);
1903 KnownOne = KnownOne.trunc(InBits);
1904 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1905 KnownZero = KnownZero.zext(BitWidth);
1906 KnownOne = KnownOne.zext(BitWidth);
1909 case ISD::TRUNCATE: {
1910 EVT InVT = Op.getOperand(0).getValueType();
1911 unsigned InBits = InVT.getScalarType().getSizeInBits();
1912 APInt InMask = Mask.zext(InBits);
1913 KnownZero = KnownZero.zext(InBits);
1914 KnownOne = KnownOne.zext(InBits);
1915 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1916 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1917 KnownZero = KnownZero.trunc(BitWidth);
1918 KnownOne = KnownOne.trunc(BitWidth);
1921 case ISD::AssertZext: {
1922 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1923 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1924 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1926 KnownZero |= (~InMask) & Mask;
1930 // All bits are zero except the low bit.
1931 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1935 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1936 // We know that the top bits of C-X are clear if X contains less bits
1937 // than C (i.e. no wrap-around can happen). For example, 20-X is
1938 // positive if we can prove that X is >= 0 and < 16.
1939 if (CLHS->getAPIntValue().isNonNegative()) {
1940 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1941 // NLZ can't be BitWidth with no sign bit
1942 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1943 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1946 // If all of the MaskV bits are known to be zero, then we know the
1947 // output top bits are zero, because we now know that the output is
1949 if ((KnownZero2 & MaskV) == MaskV) {
1950 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1951 // Top bits known zero.
1952 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1960 // Output known-0 bits are known if clear or set in both the low clear bits
1961 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1962 // low 3 bits clear.
1963 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1964 BitWidth - Mask.countLeadingZeros());
1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1966 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1967 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1969 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1971 KnownZeroOut = std::min(KnownZeroOut,
1972 KnownZero2.countTrailingOnes());
1974 if (Op.getOpcode() == ISD::ADD) {
1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1979 // With ADDE, a carry bit may be added in, so we can only use this
1980 // information if we know (at least) that the low two bits are clear. We
1981 // then return to the caller that the low bit is unknown but that other bits
1983 if (KnownZeroOut >= 2) // ADDE
1984 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
1988 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1989 const APInt &RA = Rem->getAPIntValue().abs();
1990 if (RA.isPowerOf2()) {
1991 APInt LowBits = RA - 1;
1992 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1993 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1995 // The low bits of the first operand are unchanged by the srem.
1996 KnownZero = KnownZero2 & LowBits;
1997 KnownOne = KnownOne2 & LowBits;
1999 // If the first operand is non-negative or has all low bits zero, then
2000 // the upper bits are all zero.
2001 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2002 KnownZero |= ~LowBits;
2004 // If the first operand is negative and not all low bits are zero, then
2005 // the upper bits are all one.
2006 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2007 KnownOne |= ~LowBits;
2012 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2018 const APInt &RA = Rem->getAPIntValue();
2019 if (RA.isPowerOf2()) {
2020 APInt LowBits = (RA - 1);
2021 APInt Mask2 = LowBits & Mask;
2022 KnownZero |= ~LowBits & Mask;
2023 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
2024 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2029 // Since the result is less than or equal to either operand, any leading
2030 // zero bits in either operand must also exist in the result.
2031 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
2032 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
2034 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
2037 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2038 KnownZero2.countLeadingOnes());
2039 KnownOne.clearAllBits();
2040 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2043 case ISD::FrameIndex:
2044 case ISD::TargetFrameIndex:
2045 if (unsigned Align = InferPtrAlignment(Op)) {
2046 // The low bits are known zero if the pointer is aligned.
2047 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2053 // Allow the target to implement this method for its nodes.
2054 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2055 case ISD::INTRINSIC_WO_CHAIN:
2056 case ISD::INTRINSIC_W_CHAIN:
2057 case ISD::INTRINSIC_VOID:
2058 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2065 /// ComputeNumSignBits - Return the number of times the sign bit of the
2066 /// register is replicated into the other bits. We know that at least 1 bit
2067 /// is always equal to the sign bit (itself), but other cases can give us
2068 /// information. For example, immediately after an "SRA X, 2", we know that
2069 /// the top 3 bits are all equal to each other, so we return 3.
2070 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2071 EVT VT = Op.getValueType();
2072 assert(VT.isInteger() && "Invalid VT!");
2073 unsigned VTBits = VT.getScalarType().getSizeInBits();
2075 unsigned FirstAnswer = 1;
2078 return 1; // Limit search depth.
2080 switch (Op.getOpcode()) {
2082 case ISD::AssertSext:
2083 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2084 return VTBits-Tmp+1;
2085 case ISD::AssertZext:
2086 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2089 case ISD::Constant: {
2090 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2091 return Val.getNumSignBits();
2094 case ISD::SIGN_EXTEND:
2095 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2096 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2098 case ISD::SIGN_EXTEND_INREG:
2099 // Max of the input and what this extends.
2101 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2104 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2105 return std::max(Tmp, Tmp2);
2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2109 // SRA X, C -> adds C sign bits.
2110 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2111 Tmp += C->getZExtValue();
2112 if (Tmp > VTBits) Tmp = VTBits;
2116 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2117 // shl destroys sign bits.
2118 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2119 if (C->getZExtValue() >= VTBits || // Bad shift.
2120 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2121 return Tmp - C->getZExtValue();
2126 case ISD::XOR: // NOT is handled here.
2127 // Logical binary ops preserve the number of sign bits at the worst.
2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2130 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2131 FirstAnswer = std::min(Tmp, Tmp2);
2132 // We computed what we know about the sign bits as our first
2133 // answer. Now proceed to the generic code that uses
2134 // ComputeMaskedBits, and pick whichever answer is better.
2139 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2140 if (Tmp == 1) return 1; // Early out.
2141 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2142 return std::min(Tmp, Tmp2);
2150 if (Op.getResNo() != 1)
2152 // The boolean result conforms to getBooleanContents. Fall through.
2154 // If setcc returns 0/-1, all bits are sign bits.
2155 if (TLI.getBooleanContents() ==
2156 TargetLowering::ZeroOrNegativeOneBooleanContent)
2161 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2162 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2164 // Handle rotate right by N like a rotate left by 32-N.
2165 if (Op.getOpcode() == ISD::ROTR)
2166 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2168 // If we aren't rotating out all of the known-in sign bits, return the
2169 // number that are left. This handles rotl(sext(x), 1) for example.
2170 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2171 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2175 // Add can have at most one carry bit. Thus we know that the output
2176 // is, at worst, one more bit than the inputs.
2177 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2178 if (Tmp == 1) return 1; // Early out.
2180 // Special case decrementing a value (ADD X, -1):
2181 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2182 if (CRHS->isAllOnesValue()) {
2183 APInt KnownZero, KnownOne;
2184 APInt Mask = APInt::getAllOnesValue(VTBits);
2185 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2187 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2189 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2192 // If we are subtracting one from a positive number, there is no carry
2193 // out of the result.
2194 if (KnownZero.isNegative())
2198 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2199 if (Tmp2 == 1) return 1;
2200 return std::min(Tmp, Tmp2)-1;
2204 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2205 if (Tmp2 == 1) return 1;
2208 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2209 if (CLHS->isNullValue()) {
2210 APInt KnownZero, KnownOne;
2211 APInt Mask = APInt::getAllOnesValue(VTBits);
2212 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2213 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2215 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2218 // If the input is known to be positive (the sign bit is known clear),
2219 // the output of the NEG has the same number of sign bits as the input.
2220 if (KnownZero.isNegative())
2223 // Otherwise, we treat this like a SUB.
2226 // Sub can have at most one carry bit. Thus we know that the output
2227 // is, at worst, one more bit than the inputs.
2228 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2229 if (Tmp == 1) return 1; // Early out.
2230 return std::min(Tmp, Tmp2)-1;
2233 // FIXME: it's tricky to do anything useful for this, but it is an important
2234 // case for targets like X86.
2238 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2239 if (Op.getOpcode() == ISD::LOAD) {
2240 LoadSDNode *LD = cast<LoadSDNode>(Op);
2241 unsigned ExtType = LD->getExtensionType();
2244 case ISD::SEXTLOAD: // '17' bits known
2245 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2246 return VTBits-Tmp+1;
2247 case ISD::ZEXTLOAD: // '16' bits known
2248 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2253 // Allow the target to implement this method for its nodes.
2254 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2255 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2256 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2257 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2258 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2259 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2262 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2263 // use this information.
2264 APInt KnownZero, KnownOne;
2265 APInt Mask = APInt::getAllOnesValue(VTBits);
2266 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2268 if (KnownZero.isNegative()) { // sign bit is 0
2270 } else if (KnownOne.isNegative()) { // sign bit is 1;
2277 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2278 // the number of identical bits in the top of the input value.
2280 Mask <<= Mask.getBitWidth()-VTBits;
2281 // Return # leading zeros. We use 'min' here in case Val was zero before
2282 // shifting. We don't want to return '64' as for an i32 "0".
2283 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2286 /// isBaseWithConstantOffset - Return true if the specified operand is an
2287 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2288 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2289 /// semantics as an ADD. This handles the equivalence:
2290 /// X|Cst == X+Cst iff X&Cst = 0.
2291 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2292 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2293 !isa<ConstantSDNode>(Op.getOperand(1)))
2296 if (Op.getOpcode() == ISD::OR &&
2297 !MaskedValueIsZero(Op.getOperand(0),
2298 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2305 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2306 // If we're told that NaNs won't happen, assume they won't.
2310 // If the value is a constant, we can obviously see if it is a NaN or not.
2311 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2312 return !C->getValueAPF().isNaN();
2314 // TODO: Recognize more cases here.
2319 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2320 // If the value is a constant, we can obviously see if it is a zero or not.
2321 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2322 return !C->isZero();
2324 // TODO: Recognize more cases here.
2329 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2330 // Check the obvious case.
2331 if (A == B) return true;
2333 // For for negative and positive zero.
2334 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2335 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2336 if (CA->isZero() && CB->isZero()) return true;
2338 // Otherwise they may not be equal.
2342 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2343 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2344 if (!GA) return false;
2345 if (GA->getOffset() != 0) return false;
2346 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2347 if (!GV) return false;
2348 return MF->getMMI().hasDebugInfo();
2352 /// getNode - Gets or creates the specified node.
2354 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2355 FoldingSetNodeID ID;
2356 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2359 return SDValue(E, 0);
2361 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2362 CSEMap.InsertNode(N, IP);
2364 AllNodes.push_back(N);
2368 return SDValue(N, 0);
2371 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2372 EVT VT, SDValue Operand) {
2373 // Constant fold unary operations with an integer constant operand.
2374 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2375 const APInt &Val = C->getAPIntValue();
2378 case ISD::SIGN_EXTEND:
2379 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2380 case ISD::ANY_EXTEND:
2381 case ISD::ZERO_EXTEND:
2383 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2384 case ISD::UINT_TO_FP:
2385 case ISD::SINT_TO_FP: {
2386 // No compile time operations on ppcf128.
2387 if (VT == MVT::ppcf128) break;
2388 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2389 (void)apf.convertFromAPInt(Val,
2390 Opcode==ISD::SINT_TO_FP,
2391 APFloat::rmNearestTiesToEven);
2392 return getConstantFP(apf, VT);
2395 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2396 return getConstantFP(Val.bitsToFloat(), VT);
2397 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2398 return getConstantFP(Val.bitsToDouble(), VT);
2401 return getConstant(Val.byteSwap(), VT);
2403 return getConstant(Val.countPopulation(), VT);
2405 return getConstant(Val.countLeadingZeros(), VT);
2407 return getConstant(Val.countTrailingZeros(), VT);
2411 // Constant fold unary operations with a floating point constant operand.
2412 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2413 APFloat V = C->getValueAPF(); // make copy
2414 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2418 return getConstantFP(V, VT);
2421 return getConstantFP(V, VT);
2423 case ISD::FP_EXTEND: {
2425 // This can return overflow, underflow, or inexact; we don't care.
2426 // FIXME need to be more flexible about rounding mode.
2427 (void)V.convert(*EVTToAPFloatSemantics(VT),
2428 APFloat::rmNearestTiesToEven, &ignored);
2429 return getConstantFP(V, VT);
2431 case ISD::FP_TO_SINT:
2432 case ISD::FP_TO_UINT: {
2435 assert(integerPartWidth >= 64);
2436 // FIXME need to be more flexible about rounding mode.
2437 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2438 Opcode==ISD::FP_TO_SINT,
2439 APFloat::rmTowardZero, &ignored);
2440 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2442 APInt api(VT.getSizeInBits(), 2, x);
2443 return getConstant(api, VT);
2446 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2447 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2448 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2449 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2455 unsigned OpOpcode = Operand.getNode()->getOpcode();
2457 case ISD::TokenFactor:
2458 case ISD::MERGE_VALUES:
2459 case ISD::CONCAT_VECTORS:
2460 return Operand; // Factor, merge or concat of one node? No need.
2461 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2462 case ISD::FP_EXTEND:
2463 assert(VT.isFloatingPoint() &&
2464 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2465 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2466 assert((!VT.isVector() ||
2467 VT.getVectorNumElements() ==
2468 Operand.getValueType().getVectorNumElements()) &&
2469 "Vector element count mismatch!");
2470 if (Operand.getOpcode() == ISD::UNDEF)
2471 return getUNDEF(VT);
2473 case ISD::SIGN_EXTEND:
2474 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2475 "Invalid SIGN_EXTEND!");
2476 if (Operand.getValueType() == VT) return Operand; // noop extension
2477 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2478 "Invalid sext node, dst < src!");
2479 assert((!VT.isVector() ||
2480 VT.getVectorNumElements() ==
2481 Operand.getValueType().getVectorNumElements()) &&
2482 "Vector element count mismatch!");
2483 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2484 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2485 else if (OpOpcode == ISD::UNDEF)
2486 return getUNDEF(VT);
2488 case ISD::ZERO_EXTEND:
2489 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2490 "Invalid ZERO_EXTEND!");
2491 if (Operand.getValueType() == VT) return Operand; // noop extension
2492 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2493 "Invalid zext node, dst < src!");
2494 assert((!VT.isVector() ||
2495 VT.getVectorNumElements() ==
2496 Operand.getValueType().getVectorNumElements()) &&
2497 "Vector element count mismatch!");
2498 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2499 return getNode(ISD::ZERO_EXTEND, DL, VT,
2500 Operand.getNode()->getOperand(0));
2502 case ISD::ANY_EXTEND:
2503 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2504 "Invalid ANY_EXTEND!");
2505 if (Operand.getValueType() == VT) return Operand; // noop extension
2506 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2507 "Invalid anyext node, dst < src!");
2508 assert((!VT.isVector() ||
2509 VT.getVectorNumElements() ==
2510 Operand.getValueType().getVectorNumElements()) &&
2511 "Vector element count mismatch!");
2513 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2514 OpOpcode == ISD::ANY_EXTEND)
2515 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2516 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2517 else if (OpOpcode == ISD::UNDEF)
2518 return getUNDEF(VT);
2520 // (ext (trunx x)) -> x
2521 if (OpOpcode == ISD::TRUNCATE) {
2522 SDValue OpOp = Operand.getNode()->getOperand(0);
2523 if (OpOp.getValueType() == VT)
2528 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2529 "Invalid TRUNCATE!");
2530 if (Operand.getValueType() == VT) return Operand; // noop truncate
2531 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2532 "Invalid truncate node, src < dst!");
2533 assert((!VT.isVector() ||
2534 VT.getVectorNumElements() ==
2535 Operand.getValueType().getVectorNumElements()) &&
2536 "Vector element count mismatch!");
2537 if (OpOpcode == ISD::TRUNCATE)
2538 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2539 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2540 OpOpcode == ISD::ANY_EXTEND) {
2541 // If the source is smaller than the dest, we still need an extend.
2542 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2543 .bitsLT(VT.getScalarType()))
2544 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2545 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2546 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2548 return Operand.getNode()->getOperand(0);
2552 // Basic sanity checking.
2553 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2554 && "Cannot BITCAST between types of different sizes!");
2555 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2556 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2557 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2558 if (OpOpcode == ISD::UNDEF)
2559 return getUNDEF(VT);
2561 case ISD::SCALAR_TO_VECTOR:
2562 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2563 (VT.getVectorElementType() == Operand.getValueType() ||
2564 (VT.getVectorElementType().isInteger() &&
2565 Operand.getValueType().isInteger() &&
2566 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2567 "Illegal SCALAR_TO_VECTOR node!");
2568 if (OpOpcode == ISD::UNDEF)
2569 return getUNDEF(VT);
2570 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2571 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2572 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2573 Operand.getConstantOperandVal(1) == 0 &&
2574 Operand.getOperand(0).getValueType() == VT)
2575 return Operand.getOperand(0);
2578 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2579 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2580 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2581 Operand.getNode()->getOperand(0));
2582 if (OpOpcode == ISD::FNEG) // --X -> X
2583 return Operand.getNode()->getOperand(0);
2586 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2587 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2592 SDVTList VTs = getVTList(VT);
2593 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2594 FoldingSetNodeID ID;
2595 SDValue Ops[1] = { Operand };
2596 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2598 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2599 return SDValue(E, 0);
2601 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2602 CSEMap.InsertNode(N, IP);
2604 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2607 AllNodes.push_back(N);
2611 return SDValue(N, 0);
2614 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2616 ConstantSDNode *Cst1,
2617 ConstantSDNode *Cst2) {
2618 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2621 case ISD::ADD: return getConstant(C1 + C2, VT);
2622 case ISD::SUB: return getConstant(C1 - C2, VT);
2623 case ISD::MUL: return getConstant(C1 * C2, VT);
2625 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2628 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2631 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2634 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2636 case ISD::AND: return getConstant(C1 & C2, VT);
2637 case ISD::OR: return getConstant(C1 | C2, VT);
2638 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2639 case ISD::SHL: return getConstant(C1 << C2, VT);
2640 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2641 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2642 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2643 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2650 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2651 SDValue N1, SDValue N2) {
2652 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2653 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2656 case ISD::TokenFactor:
2657 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2658 N2.getValueType() == MVT::Other && "Invalid token factor!");
2659 // Fold trivial token factors.
2660 if (N1.getOpcode() == ISD::EntryToken) return N2;
2661 if (N2.getOpcode() == ISD::EntryToken) return N1;
2662 if (N1 == N2) return N1;
2664 case ISD::CONCAT_VECTORS:
2665 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2666 // one big BUILD_VECTOR.
2667 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2668 N2.getOpcode() == ISD::BUILD_VECTOR) {
2669 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2670 N1.getNode()->op_end());
2671 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2672 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2676 assert(VT.isInteger() && "This operator does not apply to FP types!");
2677 assert(N1.getValueType() == N2.getValueType() &&
2678 N1.getValueType() == VT && "Binary operator types must match!");
2679 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2680 // worth handling here.
2681 if (N2C && N2C->isNullValue())
2683 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2690 assert(VT.isInteger() && "This operator does not apply to FP types!");
2691 assert(N1.getValueType() == N2.getValueType() &&
2692 N1.getValueType() == VT && "Binary operator types must match!");
2693 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2694 // it's worth handling here.
2695 if (N2C && N2C->isNullValue())
2705 assert(VT.isInteger() && "This operator does not apply to FP types!");
2706 assert(N1.getValueType() == N2.getValueType() &&
2707 N1.getValueType() == VT && "Binary operator types must match!");
2715 if (Opcode == ISD::FADD) {
2717 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2718 if (CFP->getValueAPF().isZero())
2721 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2722 if (CFP->getValueAPF().isZero())
2724 } else if (Opcode == ISD::FSUB) {
2726 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2727 if (CFP->getValueAPF().isZero())
2731 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2732 assert(N1.getValueType() == N2.getValueType() &&
2733 N1.getValueType() == VT && "Binary operator types must match!");
2735 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2736 assert(N1.getValueType() == VT &&
2737 N1.getValueType().isFloatingPoint() &&
2738 N2.getValueType().isFloatingPoint() &&
2739 "Invalid FCOPYSIGN!");
2746 assert(VT == N1.getValueType() &&
2747 "Shift operators return type must be the same as their first arg");
2748 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2749 "Shifts only work on integers");
2750 // Verify that the shift amount VT is bit enough to hold valid shift
2751 // amounts. This catches things like trying to shift an i1024 value by an
2752 // i8, which is easy to fall into in generic code that uses
2753 // TLI.getShiftAmount().
2754 assert(N2.getValueType().getSizeInBits() >=
2755 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2756 "Invalid use of small shift amount with oversized value!");
2758 // Always fold shifts of i1 values so the code generator doesn't need to
2759 // handle them. Since we know the size of the shift has to be less than the
2760 // size of the value, the shift/rotate count is guaranteed to be zero.
2763 if (N2C && N2C->isNullValue())
2766 case ISD::FP_ROUND_INREG: {
2767 EVT EVT = cast<VTSDNode>(N2)->getVT();
2768 assert(VT == N1.getValueType() && "Not an inreg round!");
2769 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2770 "Cannot FP_ROUND_INREG integer types");
2771 assert(EVT.isVector() == VT.isVector() &&
2772 "FP_ROUND_INREG type should be vector iff the operand "
2774 assert((!EVT.isVector() ||
2775 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2776 "Vector element counts must match in FP_ROUND_INREG");
2777 assert(EVT.bitsLE(VT) && "Not rounding down!");
2778 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2782 assert(VT.isFloatingPoint() &&
2783 N1.getValueType().isFloatingPoint() &&
2784 VT.bitsLE(N1.getValueType()) &&
2785 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2786 if (N1.getValueType() == VT) return N1; // noop conversion.
2788 case ISD::AssertSext:
2789 case ISD::AssertZext: {
2790 EVT EVT = cast<VTSDNode>(N2)->getVT();
2791 assert(VT == N1.getValueType() && "Not an inreg extend!");
2792 assert(VT.isInteger() && EVT.isInteger() &&
2793 "Cannot *_EXTEND_INREG FP types");
2794 assert(!EVT.isVector() &&
2795 "AssertSExt/AssertZExt type should be the vector element type "
2796 "rather than the vector type!");
2797 assert(EVT.bitsLE(VT) && "Not extending!");
2798 if (VT == EVT) return N1; // noop assertion.
2801 case ISD::SIGN_EXTEND_INREG: {
2802 EVT EVT = cast<VTSDNode>(N2)->getVT();
2803 assert(VT == N1.getValueType() && "Not an inreg extend!");
2804 assert(VT.isInteger() && EVT.isInteger() &&
2805 "Cannot *_EXTEND_INREG FP types");
2806 assert(EVT.isVector() == VT.isVector() &&
2807 "SIGN_EXTEND_INREG type should be vector iff the operand "
2809 assert((!EVT.isVector() ||
2810 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2811 "Vector element counts must match in SIGN_EXTEND_INREG");
2812 assert(EVT.bitsLE(VT) && "Not extending!");
2813 if (EVT == VT) return N1; // Not actually extending
2816 APInt Val = N1C->getAPIntValue();
2817 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2818 Val <<= Val.getBitWidth()-FromBits;
2819 Val = Val.ashr(Val.getBitWidth()-FromBits);
2820 return getConstant(Val, VT);
2824 case ISD::EXTRACT_VECTOR_ELT:
2825 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2826 if (N1.getOpcode() == ISD::UNDEF)
2827 return getUNDEF(VT);
2829 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2830 // expanding copies of large vectors from registers.
2832 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2833 N1.getNumOperands() > 0) {
2835 N1.getOperand(0).getValueType().getVectorNumElements();
2836 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2837 N1.getOperand(N2C->getZExtValue() / Factor),
2838 getConstant(N2C->getZExtValue() % Factor,
2839 N2.getValueType()));
2842 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2843 // expanding large vector constants.
2844 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2845 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2846 EVT VEltTy = N1.getValueType().getVectorElementType();
2847 if (Elt.getValueType() != VEltTy) {
2848 // If the vector element type is not legal, the BUILD_VECTOR operands
2849 // are promoted and implicitly truncated. Make that explicit here.
2850 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2853 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2854 // result is implicitly extended.
2855 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2860 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2861 // operations are lowered to scalars.
2862 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2863 // If the indices are the same, return the inserted element else
2864 // if the indices are known different, extract the element from
2865 // the original vector.
2866 SDValue N1Op2 = N1.getOperand(2);
2867 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2869 if (N1Op2C && N2C) {
2870 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2871 if (VT == N1.getOperand(1).getValueType())
2872 return N1.getOperand(1);
2874 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2877 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2881 case ISD::EXTRACT_ELEMENT:
2882 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2883 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2884 (N1.getValueType().isInteger() == VT.isInteger()) &&
2885 "Wrong types for EXTRACT_ELEMENT!");
2887 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2888 // 64-bit integers into 32-bit parts. Instead of building the extract of
2889 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2890 if (N1.getOpcode() == ISD::BUILD_PAIR)
2891 return N1.getOperand(N2C->getZExtValue());
2893 // EXTRACT_ELEMENT of a constant int is also very common.
2894 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2895 unsigned ElementSize = VT.getSizeInBits();
2896 unsigned Shift = ElementSize * N2C->getZExtValue();
2897 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2898 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2901 case ISD::EXTRACT_SUBVECTOR: {
2903 if (VT.isSimple() && N1.getValueType().isSimple()) {
2904 assert(VT.isVector() && N1.getValueType().isVector() &&
2905 "Extract subvector VTs must be a vectors!");
2906 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2907 "Extract subvector VTs must have the same element type!");
2908 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2909 "Extract subvector must be from larger vector to smaller vector!");
2911 if (isa<ConstantSDNode>(Index.getNode())) {
2912 assert((VT.getVectorNumElements() +
2913 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2914 <= N1.getValueType().getVectorNumElements())
2915 && "Extract subvector overflow!");
2918 // Trivial extraction.
2919 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2928 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2929 if (SV.getNode()) return SV;
2930 } else { // Cannonicalize constant to RHS if commutative
2931 if (isCommutativeBinOp(Opcode)) {
2932 std::swap(N1C, N2C);
2938 // Constant fold FP operations.
2939 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2940 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2942 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2943 // Cannonicalize constant to RHS if commutative
2944 std::swap(N1CFP, N2CFP);
2946 } else if (N2CFP && VT != MVT::ppcf128) {
2947 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2948 APFloat::opStatus s;
2951 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2952 if (s != APFloat::opInvalidOp)
2953 return getConstantFP(V1, VT);
2956 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2957 if (s!=APFloat::opInvalidOp)
2958 return getConstantFP(V1, VT);
2961 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2962 if (s!=APFloat::opInvalidOp)
2963 return getConstantFP(V1, VT);
2966 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2967 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2968 return getConstantFP(V1, VT);
2971 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2972 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2973 return getConstantFP(V1, VT);
2975 case ISD::FCOPYSIGN:
2977 return getConstantFP(V1, VT);
2983 // Canonicalize an UNDEF to the RHS, even over a constant.
2984 if (N1.getOpcode() == ISD::UNDEF) {
2985 if (isCommutativeBinOp(Opcode)) {
2989 case ISD::FP_ROUND_INREG:
2990 case ISD::SIGN_EXTEND_INREG:
2996 return N1; // fold op(undef, arg2) -> undef
3004 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3005 // For vectors, we can't easily build an all zero vector, just return
3012 // Fold a bunch of operators when the RHS is undef.
3013 if (N2.getOpcode() == ISD::UNDEF) {
3016 if (N1.getOpcode() == ISD::UNDEF)
3017 // Handle undef ^ undef -> 0 special case. This is a common
3019 return getConstant(0, VT);
3029 return N2; // fold op(arg1, undef) -> undef
3043 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3044 // For vectors, we can't easily build an all zero vector, just return
3049 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3050 // For vectors, we can't easily build an all one vector, just return
3058 // Memoize this node if possible.
3060 SDVTList VTs = getVTList(VT);
3061 if (VT != MVT::Glue) {
3062 SDValue Ops[] = { N1, N2 };
3063 FoldingSetNodeID ID;
3064 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3066 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3067 return SDValue(E, 0);
3069 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3070 CSEMap.InsertNode(N, IP);
3072 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3075 AllNodes.push_back(N);
3079 return SDValue(N, 0);
3082 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3083 SDValue N1, SDValue N2, SDValue N3) {
3084 // Perform various simplifications.
3085 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3087 case ISD::CONCAT_VECTORS:
3088 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3089 // one big BUILD_VECTOR.
3090 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3091 N2.getOpcode() == ISD::BUILD_VECTOR &&
3092 N3.getOpcode() == ISD::BUILD_VECTOR) {
3093 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3094 N1.getNode()->op_end());
3095 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3096 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3097 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3101 // Use FoldSetCC to simplify SETCC's.
3102 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3103 if (Simp.getNode()) return Simp;
3108 if (N1C->getZExtValue())
3109 return N2; // select true, X, Y -> X
3111 return N3; // select false, X, Y -> Y
3114 if (N2 == N3) return N2; // select C, X, X -> X
3116 case ISD::VECTOR_SHUFFLE:
3117 llvm_unreachable("should use getVectorShuffle constructor!");
3119 case ISD::INSERT_SUBVECTOR: {
3121 if (VT.isSimple() && N1.getValueType().isSimple()
3122 && N2.getValueType().isSimple()) {
3123 assert(VT.isVector() && N1.getValueType().isVector() &&
3124 N2.getValueType().isVector() &&
3125 "Insert subvector VTs must be a vectors");
3126 assert(VT == N1.getValueType() &&
3127 "Dest and insert subvector source types must match!");
3128 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3129 "Insert subvector must be from smaller vector to larger vector!");
3130 if (isa<ConstantSDNode>(Index.getNode())) {
3131 assert((N2.getValueType().getVectorNumElements() +
3132 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3133 <= VT.getVectorNumElements())
3134 && "Insert subvector overflow!");
3137 // Trivial insertion.
3138 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3144 // Fold bit_convert nodes from a type to themselves.
3145 if (N1.getValueType() == VT)
3150 // Memoize node if it doesn't produce a flag.
3152 SDVTList VTs = getVTList(VT);
3153 if (VT != MVT::Glue) {
3154 SDValue Ops[] = { N1, N2, N3 };
3155 FoldingSetNodeID ID;
3156 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3158 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3159 return SDValue(E, 0);
3161 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3162 CSEMap.InsertNode(N, IP);
3164 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3167 AllNodes.push_back(N);
3171 return SDValue(N, 0);
3174 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3175 SDValue N1, SDValue N2, SDValue N3,
3177 SDValue Ops[] = { N1, N2, N3, N4 };
3178 return getNode(Opcode, DL, VT, Ops, 4);
3181 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3182 SDValue N1, SDValue N2, SDValue N3,
3183 SDValue N4, SDValue N5) {
3184 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3185 return getNode(Opcode, DL, VT, Ops, 5);
3188 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3189 /// the incoming stack arguments to be loaded from the stack.
3190 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3191 SmallVector<SDValue, 8> ArgChains;
3193 // Include the original chain at the beginning of the list. When this is
3194 // used by target LowerCall hooks, this helps legalize find the
3195 // CALLSEQ_BEGIN node.
3196 ArgChains.push_back(Chain);
3198 // Add a chain value for each stack argument.
3199 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3200 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3201 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3202 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3203 if (FI->getIndex() < 0)
3204 ArgChains.push_back(SDValue(L, 1));
3206 // Build a tokenfactor for all the chains.
3207 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3208 &ArgChains[0], ArgChains.size());
3211 /// SplatByte - Distribute ByteVal over NumBits bits.
3212 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3213 APInt Val = APInt(NumBits, ByteVal);
3215 for (unsigned i = NumBits; i > 8; i >>= 1) {
3216 Val = (Val << Shift) | Val;
3222 /// getMemsetValue - Vectorized representation of the memset value
3224 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3226 assert(Value.getOpcode() != ISD::UNDEF);
3228 unsigned NumBits = VT.getScalarType().getSizeInBits();
3229 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3230 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3232 return DAG.getConstant(Val, VT);
3233 return DAG.getConstantFP(APFloat(Val), VT);
3236 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3238 // Use a multiplication with 0x010101... to extend the input to the
3240 APInt Magic = SplatByte(NumBits, 0x01);
3241 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3247 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3248 /// used when a memcpy is turned into a memset when the source is a constant
3250 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3251 const TargetLowering &TLI,
3252 std::string &Str, unsigned Offset) {
3253 // Handle vector with all elements zero.
3256 return DAG.getConstant(0, VT);
3257 else if (VT == MVT::f32 || VT == MVT::f64)
3258 return DAG.getConstantFP(0.0, VT);
3259 else if (VT.isVector()) {
3260 unsigned NumElts = VT.getVectorNumElements();
3261 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3262 return DAG.getNode(ISD::BITCAST, dl, VT,
3263 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3266 llvm_unreachable("Expected type!");
3269 assert(!VT.isVector() && "Can't handle vector type here!");
3270 unsigned NumBits = VT.getSizeInBits();
3271 unsigned MSB = NumBits / 8;
3273 if (TLI.isLittleEndian())
3274 Offset = Offset + MSB - 1;
3275 for (unsigned i = 0; i != MSB; ++i) {
3276 Val = (Val << 8) | (unsigned char)Str[Offset];
3277 Offset += TLI.isLittleEndian() ? -1 : 1;
3279 return DAG.getConstant(Val, VT);
3282 /// getMemBasePlusOffset - Returns base and offset node for the
3284 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3285 SelectionDAG &DAG) {
3286 EVT VT = Base.getValueType();
3287 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3288 VT, Base, DAG.getConstant(Offset, VT));
3291 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3293 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3294 unsigned SrcDelta = 0;
3295 GlobalAddressSDNode *G = NULL;
3296 if (Src.getOpcode() == ISD::GlobalAddress)
3297 G = cast<GlobalAddressSDNode>(Src);
3298 else if (Src.getOpcode() == ISD::ADD &&
3299 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3300 Src.getOperand(1).getOpcode() == ISD::Constant) {
3301 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3302 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3307 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3308 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3314 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3315 /// to replace the memset / memcpy. Return true if the number of memory ops
3316 /// is below the threshold. It returns the types of the sequence of
3317 /// memory ops to perform memset / memcpy by reference.
3318 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3319 unsigned Limit, uint64_t Size,
3320 unsigned DstAlign, unsigned SrcAlign,
3321 bool NonScalarIntSafe,
3324 const TargetLowering &TLI) {
3325 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3326 "Expecting memcpy / memset source to meet alignment requirement!");
3327 // If 'SrcAlign' is zero, that means the memory operation does not need load
3328 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3329 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3330 // specified alignment of the memory operation. If it is zero, that means
3331 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3332 // indicates whether the memcpy source is constant so it does not need to be
3334 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3335 NonScalarIntSafe, MemcpyStrSrc,
3336 DAG.getMachineFunction());
3338 if (VT == MVT::Other) {
3339 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3340 TLI.allowsUnalignedMemoryAccesses(VT)) {
3341 VT = TLI.getPointerTy();
3343 switch (DstAlign & 7) {
3344 case 0: VT = MVT::i64; break;
3345 case 4: VT = MVT::i32; break;
3346 case 2: VT = MVT::i16; break;
3347 default: VT = MVT::i8; break;
3352 while (!TLI.isTypeLegal(LVT))
3353 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3354 assert(LVT.isInteger());
3360 unsigned NumMemOps = 0;
3362 unsigned VTSize = VT.getSizeInBits() / 8;
3363 while (VTSize > Size) {
3364 // For now, only use non-vector load / store's for the left-over pieces.
3365 if (VT.isVector() || VT.isFloatingPoint()) {
3367 while (!TLI.isTypeLegal(VT))
3368 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3369 VTSize = VT.getSizeInBits() / 8;
3371 // This can result in a type that is not legal on the target, e.g.
3372 // 1 or 2 bytes on PPC.
3373 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3378 if (++NumMemOps > Limit)
3380 MemOps.push_back(VT);
3387 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3388 SDValue Chain, SDValue Dst,
3389 SDValue Src, uint64_t Size,
3390 unsigned Align, bool isVol,
3392 MachinePointerInfo DstPtrInfo,
3393 MachinePointerInfo SrcPtrInfo) {
3394 // Turn a memcpy of undef to nop.
3395 if (Src.getOpcode() == ISD::UNDEF)
3398 // Expand memcpy to a series of load and store ops if the size operand falls
3399 // below a certain threshold.
3400 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3401 // rather than maybe a humongous number of loads and stores.
3402 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3403 std::vector<EVT> MemOps;
3404 bool DstAlignCanChange = false;
3405 MachineFunction &MF = DAG.getMachineFunction();
3406 MachineFrameInfo *MFI = MF.getFrameInfo();
3407 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3408 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3409 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3410 DstAlignCanChange = true;
3411 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3412 if (Align > SrcAlign)
3415 bool CopyFromStr = isMemSrcFromString(Src, Str);
3416 bool isZeroStr = CopyFromStr && Str.empty();
3417 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3419 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3420 (DstAlignCanChange ? 0 : Align),
3421 (isZeroStr ? 0 : SrcAlign),
3422 true, CopyFromStr, DAG, TLI))
3425 if (DstAlignCanChange) {
3426 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3427 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3428 if (NewAlign > Align) {
3429 // Give the stack frame object a larger alignment if needed.
3430 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3431 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3436 SmallVector<SDValue, 8> OutChains;
3437 unsigned NumMemOps = MemOps.size();
3438 uint64_t SrcOff = 0, DstOff = 0;
3439 for (unsigned i = 0; i != NumMemOps; ++i) {
3441 unsigned VTSize = VT.getSizeInBits() / 8;
3442 SDValue Value, Store;
3445 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3446 // It's unlikely a store of a vector immediate can be done in a single
3447 // instruction. It would require a load from a constantpool first.
3448 // We only handle zero vectors here.
3449 // FIXME: Handle other cases where store of vector immediate is done in
3450 // a single instruction.
3451 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3452 Store = DAG.getStore(Chain, dl, Value,
3453 getMemBasePlusOffset(Dst, DstOff, DAG),
3454 DstPtrInfo.getWithOffset(DstOff), isVol,
3457 // The type might not be legal for the target. This should only happen
3458 // if the type is smaller than a legal type, as on PPC, so the right
3459 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3460 // to Load/Store if NVT==VT.
3461 // FIXME does the case above also need this?
3462 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3463 assert(NVT.bitsGE(VT));
3464 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3465 getMemBasePlusOffset(Src, SrcOff, DAG),
3466 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3467 MinAlign(SrcAlign, SrcOff));
3468 Store = DAG.getTruncStore(Chain, dl, Value,
3469 getMemBasePlusOffset(Dst, DstOff, DAG),
3470 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3473 OutChains.push_back(Store);
3478 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3479 &OutChains[0], OutChains.size());
3482 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3483 SDValue Chain, SDValue Dst,
3484 SDValue Src, uint64_t Size,
3485 unsigned Align, bool isVol,
3487 MachinePointerInfo DstPtrInfo,
3488 MachinePointerInfo SrcPtrInfo) {
3489 // Turn a memmove of undef to nop.
3490 if (Src.getOpcode() == ISD::UNDEF)
3493 // Expand memmove to a series of load and store ops if the size operand falls
3494 // below a certain threshold.
3495 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3496 std::vector<EVT> MemOps;
3497 bool DstAlignCanChange = false;
3498 MachineFunction &MF = DAG.getMachineFunction();
3499 MachineFrameInfo *MFI = MF.getFrameInfo();
3500 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3501 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3502 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3503 DstAlignCanChange = true;
3504 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3505 if (Align > SrcAlign)
3507 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3509 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3510 (DstAlignCanChange ? 0 : Align),
3511 SrcAlign, true, false, DAG, TLI))
3514 if (DstAlignCanChange) {
3515 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3516 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3517 if (NewAlign > Align) {
3518 // Give the stack frame object a larger alignment if needed.
3519 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3520 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3525 uint64_t SrcOff = 0, DstOff = 0;
3526 SmallVector<SDValue, 8> LoadValues;
3527 SmallVector<SDValue, 8> LoadChains;
3528 SmallVector<SDValue, 8> OutChains;
3529 unsigned NumMemOps = MemOps.size();
3530 for (unsigned i = 0; i < NumMemOps; i++) {
3532 unsigned VTSize = VT.getSizeInBits() / 8;
3533 SDValue Value, Store;
3535 Value = DAG.getLoad(VT, dl, Chain,
3536 getMemBasePlusOffset(Src, SrcOff, DAG),
3537 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3539 LoadValues.push_back(Value);
3540 LoadChains.push_back(Value.getValue(1));
3543 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3544 &LoadChains[0], LoadChains.size());
3546 for (unsigned i = 0; i < NumMemOps; i++) {
3548 unsigned VTSize = VT.getSizeInBits() / 8;
3549 SDValue Value, Store;
3551 Store = DAG.getStore(Chain, dl, LoadValues[i],
3552 getMemBasePlusOffset(Dst, DstOff, DAG),
3553 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3554 OutChains.push_back(Store);
3558 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3559 &OutChains[0], OutChains.size());
3562 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3563 SDValue Chain, SDValue Dst,
3564 SDValue Src, uint64_t Size,
3565 unsigned Align, bool isVol,
3566 MachinePointerInfo DstPtrInfo) {
3567 // Turn a memset of undef to nop.
3568 if (Src.getOpcode() == ISD::UNDEF)
3571 // Expand memset to a series of load/store ops if the size operand
3572 // falls below a certain threshold.
3573 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3574 std::vector<EVT> MemOps;
3575 bool DstAlignCanChange = false;
3576 MachineFunction &MF = DAG.getMachineFunction();
3577 MachineFrameInfo *MFI = MF.getFrameInfo();
3578 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3579 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3580 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3581 DstAlignCanChange = true;
3582 bool NonScalarIntSafe =
3583 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3584 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3585 Size, (DstAlignCanChange ? 0 : Align), 0,
3586 NonScalarIntSafe, false, DAG, TLI))
3589 if (DstAlignCanChange) {
3590 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3591 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3592 if (NewAlign > Align) {
3593 // Give the stack frame object a larger alignment if needed.
3594 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3595 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3600 SmallVector<SDValue, 8> OutChains;
3601 uint64_t DstOff = 0;
3602 unsigned NumMemOps = MemOps.size();
3604 // Find the largest store and generate the bit pattern for it.
3605 EVT LargestVT = MemOps[0];
3606 for (unsigned i = 1; i < NumMemOps; i++)
3607 if (MemOps[i].bitsGT(LargestVT))
3608 LargestVT = MemOps[i];
3609 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3611 for (unsigned i = 0; i < NumMemOps; i++) {
3614 // If this store is smaller than the largest store see whether we can get
3615 // the smaller value for free with a truncate.
3616 SDValue Value = MemSetValue;
3617 if (VT.bitsLT(LargestVT)) {
3618 if (!LargestVT.isVector() && !VT.isVector() &&
3619 TLI.isTruncateFree(LargestVT, VT))
3620 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3622 Value = getMemsetValue(Src, VT, DAG, dl);
3624 assert(Value.getValueType() == VT && "Value with wrong type.");
3625 SDValue Store = DAG.getStore(Chain, dl, Value,
3626 getMemBasePlusOffset(Dst, DstOff, DAG),
3627 DstPtrInfo.getWithOffset(DstOff),
3628 isVol, false, Align);
3629 OutChains.push_back(Store);
3630 DstOff += VT.getSizeInBits() / 8;
3633 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3634 &OutChains[0], OutChains.size());
3637 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3638 SDValue Src, SDValue Size,
3639 unsigned Align, bool isVol, bool AlwaysInline,
3640 MachinePointerInfo DstPtrInfo,
3641 MachinePointerInfo SrcPtrInfo) {
3643 // Check to see if we should lower the memcpy to loads and stores first.
3644 // For cases within the target-specified limits, this is the best choice.
3645 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3647 // Memcpy with size zero? Just return the original chain.
3648 if (ConstantSize->isNullValue())
3651 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3652 ConstantSize->getZExtValue(),Align,
3653 isVol, false, DstPtrInfo, SrcPtrInfo);
3654 if (Result.getNode())
3658 // Then check to see if we should lower the memcpy with target-specific
3659 // code. If the target chooses to do this, this is the next best.
3661 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3662 isVol, AlwaysInline,
3663 DstPtrInfo, SrcPtrInfo);
3664 if (Result.getNode())
3667 // If we really need inline code and the target declined to provide it,
3668 // use a (potentially long) sequence of loads and stores.
3670 assert(ConstantSize && "AlwaysInline requires a constant size!");
3671 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3672 ConstantSize->getZExtValue(), Align, isVol,
3673 true, DstPtrInfo, SrcPtrInfo);
3676 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3677 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3678 // respect volatile, so they may do things like read or write memory
3679 // beyond the given memory regions. But fixing this isn't easy, and most
3680 // people don't care.
3682 // Emit a library call.
3683 TargetLowering::ArgListTy Args;
3684 TargetLowering::ArgListEntry Entry;
3685 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3686 Entry.Node = Dst; Args.push_back(Entry);
3687 Entry.Node = Src; Args.push_back(Entry);
3688 Entry.Node = Size; Args.push_back(Entry);
3689 // FIXME: pass in DebugLoc
3690 std::pair<SDValue,SDValue> CallResult =
3691 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3692 false, false, false, false, 0,
3693 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3694 /*isReturnValueUsed=*/false,
3695 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3696 TLI.getPointerTy()),
3698 return CallResult.second;
3701 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3702 SDValue Src, SDValue Size,
3703 unsigned Align, bool isVol,
3704 MachinePointerInfo DstPtrInfo,
3705 MachinePointerInfo SrcPtrInfo) {
3707 // Check to see if we should lower the memmove to loads and stores first.
3708 // For cases within the target-specified limits, this is the best choice.
3709 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3711 // Memmove with size zero? Just return the original chain.
3712 if (ConstantSize->isNullValue())
3716 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3717 ConstantSize->getZExtValue(), Align, isVol,
3718 false, DstPtrInfo, SrcPtrInfo);
3719 if (Result.getNode())
3723 // Then check to see if we should lower the memmove with target-specific
3724 // code. If the target chooses to do this, this is the next best.
3726 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3727 DstPtrInfo, SrcPtrInfo);
3728 if (Result.getNode())
3731 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3732 // not be safe. See memcpy above for more details.
3734 // Emit a library call.
3735 TargetLowering::ArgListTy Args;
3736 TargetLowering::ArgListEntry Entry;
3737 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3738 Entry.Node = Dst; Args.push_back(Entry);
3739 Entry.Node = Src; Args.push_back(Entry);
3740 Entry.Node = Size; Args.push_back(Entry);
3741 // FIXME: pass in DebugLoc
3742 std::pair<SDValue,SDValue> CallResult =
3743 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3744 false, false, false, false, 0,
3745 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3746 /*isReturnValueUsed=*/false,
3747 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3748 TLI.getPointerTy()),
3750 return CallResult.second;
3753 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3754 SDValue Src, SDValue Size,
3755 unsigned Align, bool isVol,
3756 MachinePointerInfo DstPtrInfo) {
3758 // Check to see if we should lower the memset to stores first.
3759 // For cases within the target-specified limits, this is the best choice.
3760 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3762 // Memset with size zero? Just return the original chain.
3763 if (ConstantSize->isNullValue())
3767 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3768 Align, isVol, DstPtrInfo);
3770 if (Result.getNode())
3774 // Then check to see if we should lower the memset with target-specific
3775 // code. If the target chooses to do this, this is the next best.
3777 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3779 if (Result.getNode())
3782 // Emit a library call.
3783 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3784 TargetLowering::ArgListTy Args;
3785 TargetLowering::ArgListEntry Entry;
3786 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3787 Args.push_back(Entry);
3788 // Extend or truncate the argument to be an i32 value for the call.
3789 if (Src.getValueType().bitsGT(MVT::i32))
3790 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3792 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3794 Entry.Ty = Type::getInt32Ty(*getContext());
3795 Entry.isSExt = true;
3796 Args.push_back(Entry);
3798 Entry.Ty = IntPtrTy;
3799 Entry.isSExt = false;
3800 Args.push_back(Entry);
3801 // FIXME: pass in DebugLoc
3802 std::pair<SDValue,SDValue> CallResult =
3803 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3804 false, false, false, false, 0,
3805 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3806 /*isReturnValueUsed=*/false,
3807 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3808 TLI.getPointerTy()),
3810 return CallResult.second;
3813 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3814 SDValue Chain, SDValue Ptr, SDValue Cmp,
3815 SDValue Swp, MachinePointerInfo PtrInfo,
3816 unsigned Alignment) {
3817 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3818 Alignment = getEVTAlignment(MemVT);
3820 MachineFunction &MF = getMachineFunction();
3821 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3823 // For now, atomics are considered to be volatile always.
3824 Flags |= MachineMemOperand::MOVolatile;
3826 MachineMemOperand *MMO =
3827 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3829 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3832 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3834 SDValue Ptr, SDValue Cmp,
3835 SDValue Swp, MachineMemOperand *MMO) {
3836 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3837 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3839 EVT VT = Cmp.getValueType();
3841 SDVTList VTs = getVTList(VT, MVT::Other);
3842 FoldingSetNodeID ID;
3843 ID.AddInteger(MemVT.getRawBits());
3844 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3845 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3847 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3848 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3849 return SDValue(E, 0);
3851 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3852 Ptr, Cmp, Swp, MMO);
3853 CSEMap.InsertNode(N, IP);
3854 AllNodes.push_back(N);
3855 return SDValue(N, 0);
3858 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3860 SDValue Ptr, SDValue Val,
3861 const Value* PtrVal,
3862 unsigned Alignment) {
3863 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3864 Alignment = getEVTAlignment(MemVT);
3866 MachineFunction &MF = getMachineFunction();
3867 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3869 // For now, atomics are considered to be volatile always.
3870 Flags |= MachineMemOperand::MOVolatile;
3872 MachineMemOperand *MMO =
3873 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3874 MemVT.getStoreSize(), Alignment);
3876 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3879 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3881 SDValue Ptr, SDValue Val,
3882 MachineMemOperand *MMO) {
3883 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3884 Opcode == ISD::ATOMIC_LOAD_SUB ||
3885 Opcode == ISD::ATOMIC_LOAD_AND ||
3886 Opcode == ISD::ATOMIC_LOAD_OR ||
3887 Opcode == ISD::ATOMIC_LOAD_XOR ||
3888 Opcode == ISD::ATOMIC_LOAD_NAND ||
3889 Opcode == ISD::ATOMIC_LOAD_MIN ||
3890 Opcode == ISD::ATOMIC_LOAD_MAX ||
3891 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3892 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3893 Opcode == ISD::ATOMIC_SWAP) &&
3894 "Invalid Atomic Op");
3896 EVT VT = Val.getValueType();
3898 SDVTList VTs = getVTList(VT, MVT::Other);
3899 FoldingSetNodeID ID;
3900 ID.AddInteger(MemVT.getRawBits());
3901 SDValue Ops[] = {Chain, Ptr, Val};
3902 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3905 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3906 return SDValue(E, 0);
3908 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3910 CSEMap.InsertNode(N, IP);
3911 AllNodes.push_back(N);
3912 return SDValue(N, 0);
3915 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3916 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3921 SmallVector<EVT, 4> VTs;
3922 VTs.reserve(NumOps);
3923 for (unsigned i = 0; i < NumOps; ++i)
3924 VTs.push_back(Ops[i].getValueType());
3925 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3930 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3931 const EVT *VTs, unsigned NumVTs,
3932 const SDValue *Ops, unsigned NumOps,
3933 EVT MemVT, MachinePointerInfo PtrInfo,
3934 unsigned Align, bool Vol,
3935 bool ReadMem, bool WriteMem) {
3936 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3937 MemVT, PtrInfo, Align, Vol,
3942 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3943 const SDValue *Ops, unsigned NumOps,
3944 EVT MemVT, MachinePointerInfo PtrInfo,
3945 unsigned Align, bool Vol,
3946 bool ReadMem, bool WriteMem) {
3947 if (Align == 0) // Ensure that codegen never sees alignment 0
3948 Align = getEVTAlignment(MemVT);
3950 MachineFunction &MF = getMachineFunction();
3953 Flags |= MachineMemOperand::MOStore;
3955 Flags |= MachineMemOperand::MOLoad;
3957 Flags |= MachineMemOperand::MOVolatile;
3958 MachineMemOperand *MMO =
3959 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3961 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3965 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3966 const SDValue *Ops, unsigned NumOps,
3967 EVT MemVT, MachineMemOperand *MMO) {
3968 assert((Opcode == ISD::INTRINSIC_VOID ||
3969 Opcode == ISD::INTRINSIC_W_CHAIN ||
3970 Opcode == ISD::PREFETCH ||
3971 (Opcode <= INT_MAX &&
3972 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3973 "Opcode is not a memory-accessing opcode!");
3975 // Memoize the node unless it returns a flag.
3976 MemIntrinsicSDNode *N;
3977 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
3978 FoldingSetNodeID ID;
3979 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3981 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3982 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3983 return SDValue(E, 0);
3986 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3988 CSEMap.InsertNode(N, IP);
3990 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3993 AllNodes.push_back(N);
3994 return SDValue(N, 0);
3997 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3998 /// MachinePointerInfo record from it. This is particularly useful because the
3999 /// code generator has many cases where it doesn't bother passing in a
4000 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4001 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4002 // If this is FI+Offset, we can model it.
4003 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4004 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4006 // If this is (FI+Offset1)+Offset2, we can model it.
4007 if (Ptr.getOpcode() != ISD::ADD ||
4008 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4009 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4010 return MachinePointerInfo();
4012 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4013 return MachinePointerInfo::getFixedStack(FI, Offset+
4014 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4017 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4018 /// MachinePointerInfo record from it. This is particularly useful because the
4019 /// code generator has many cases where it doesn't bother passing in a
4020 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4021 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4022 // If the 'Offset' value isn't a constant, we can't handle this.
4023 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4024 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4025 if (OffsetOp.getOpcode() == ISD::UNDEF)
4026 return InferPointerInfo(Ptr);
4027 return MachinePointerInfo();
4032 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4033 EVT VT, DebugLoc dl, SDValue Chain,
4034 SDValue Ptr, SDValue Offset,
4035 MachinePointerInfo PtrInfo, EVT MemVT,
4036 bool isVolatile, bool isNonTemporal,
4037 unsigned Alignment, const MDNode *TBAAInfo) {
4038 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4039 Alignment = getEVTAlignment(VT);
4041 unsigned Flags = MachineMemOperand::MOLoad;
4043 Flags |= MachineMemOperand::MOVolatile;
4045 Flags |= MachineMemOperand::MONonTemporal;
4047 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4050 PtrInfo = InferPointerInfo(Ptr, Offset);
4052 MachineFunction &MF = getMachineFunction();
4053 MachineMemOperand *MMO =
4054 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4056 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4060 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4061 EVT VT, DebugLoc dl, SDValue Chain,
4062 SDValue Ptr, SDValue Offset, EVT MemVT,
4063 MachineMemOperand *MMO) {
4065 ExtType = ISD::NON_EXTLOAD;
4066 } else if (ExtType == ISD::NON_EXTLOAD) {
4067 assert(VT == MemVT && "Non-extending load from different memory type!");
4070 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4071 "Should only be an extending load, not truncating!");
4072 assert(VT.isInteger() == MemVT.isInteger() &&
4073 "Cannot convert from FP to Int or Int -> FP!");
4074 assert(VT.isVector() == MemVT.isVector() &&
4075 "Cannot use trunc store to convert to or from a vector!");
4076 assert((!VT.isVector() ||
4077 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4078 "Cannot use trunc store to change the number of vector elements!");
4081 bool Indexed = AM != ISD::UNINDEXED;
4082 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4083 "Unindexed load with an offset!");
4085 SDVTList VTs = Indexed ?
4086 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4087 SDValue Ops[] = { Chain, Ptr, Offset };
4088 FoldingSetNodeID ID;
4089 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4090 ID.AddInteger(MemVT.getRawBits());
4091 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4092 MMO->isNonTemporal()));
4094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4095 cast<LoadSDNode>(E)->refineAlignment(MMO);
4096 return SDValue(E, 0);
4098 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4100 CSEMap.InsertNode(N, IP);
4101 AllNodes.push_back(N);
4102 return SDValue(N, 0);
4105 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4106 SDValue Chain, SDValue Ptr,
4107 MachinePointerInfo PtrInfo,
4108 bool isVolatile, bool isNonTemporal,
4109 unsigned Alignment, const MDNode *TBAAInfo) {
4110 SDValue Undef = getUNDEF(Ptr.getValueType());
4111 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4112 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
4115 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4116 SDValue Chain, SDValue Ptr,
4117 MachinePointerInfo PtrInfo, EVT MemVT,
4118 bool isVolatile, bool isNonTemporal,
4119 unsigned Alignment, const MDNode *TBAAInfo) {
4120 SDValue Undef = getUNDEF(Ptr.getValueType());
4121 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4122 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
4128 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4129 SDValue Offset, ISD::MemIndexedMode AM) {
4130 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4131 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4132 "Load is already a indexed load!");
4133 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4134 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4136 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4139 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4140 SDValue Ptr, MachinePointerInfo PtrInfo,
4141 bool isVolatile, bool isNonTemporal,
4142 unsigned Alignment, const MDNode *TBAAInfo) {
4143 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4144 Alignment = getEVTAlignment(Val.getValueType());
4146 unsigned Flags = MachineMemOperand::MOStore;
4148 Flags |= MachineMemOperand::MOVolatile;
4150 Flags |= MachineMemOperand::MONonTemporal;
4153 PtrInfo = InferPointerInfo(Ptr);
4155 MachineFunction &MF = getMachineFunction();
4156 MachineMemOperand *MMO =
4157 MF.getMachineMemOperand(PtrInfo, Flags,
4158 Val.getValueType().getStoreSize(), Alignment,
4161 return getStore(Chain, dl, Val, Ptr, MMO);
4164 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4165 SDValue Ptr, MachineMemOperand *MMO) {
4166 EVT VT = Val.getValueType();
4167 SDVTList VTs = getVTList(MVT::Other);
4168 SDValue Undef = getUNDEF(Ptr.getValueType());
4169 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4170 FoldingSetNodeID ID;
4171 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4172 ID.AddInteger(VT.getRawBits());
4173 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4174 MMO->isNonTemporal()));
4176 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4177 cast<StoreSDNode>(E)->refineAlignment(MMO);
4178 return SDValue(E, 0);
4180 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4182 CSEMap.InsertNode(N, IP);
4183 AllNodes.push_back(N);
4184 return SDValue(N, 0);
4187 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4188 SDValue Ptr, MachinePointerInfo PtrInfo,
4189 EVT SVT,bool isVolatile, bool isNonTemporal,
4191 const MDNode *TBAAInfo) {
4192 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4193 Alignment = getEVTAlignment(SVT);
4195 unsigned Flags = MachineMemOperand::MOStore;
4197 Flags |= MachineMemOperand::MOVolatile;
4199 Flags |= MachineMemOperand::MONonTemporal;
4202 PtrInfo = InferPointerInfo(Ptr);
4204 MachineFunction &MF = getMachineFunction();
4205 MachineMemOperand *MMO =
4206 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4209 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4212 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4213 SDValue Ptr, EVT SVT,
4214 MachineMemOperand *MMO) {
4215 EVT VT = Val.getValueType();
4218 return getStore(Chain, dl, Val, Ptr, MMO);
4220 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4221 "Should only be a truncating store, not extending!");
4222 assert(VT.isInteger() == SVT.isInteger() &&
4223 "Can't do FP-INT conversion!");
4224 assert(VT.isVector() == SVT.isVector() &&
4225 "Cannot use trunc store to convert to or from a vector!");
4226 assert((!VT.isVector() ||
4227 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4228 "Cannot use trunc store to change the number of vector elements!");
4230 SDVTList VTs = getVTList(MVT::Other);
4231 SDValue Undef = getUNDEF(Ptr.getValueType());
4232 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4233 FoldingSetNodeID ID;
4234 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4235 ID.AddInteger(SVT.getRawBits());
4236 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4237 MMO->isNonTemporal()));
4239 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4240 cast<StoreSDNode>(E)->refineAlignment(MMO);
4241 return SDValue(E, 0);
4243 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4245 CSEMap.InsertNode(N, IP);
4246 AllNodes.push_back(N);
4247 return SDValue(N, 0);
4251 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4252 SDValue Offset, ISD::MemIndexedMode AM) {
4253 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4254 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4255 "Store is already a indexed store!");
4256 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4257 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4258 FoldingSetNodeID ID;
4259 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4260 ID.AddInteger(ST->getMemoryVT().getRawBits());
4261 ID.AddInteger(ST->getRawSubclassData());
4263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4264 return SDValue(E, 0);
4266 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4267 ST->isTruncatingStore(),
4269 ST->getMemOperand());
4270 CSEMap.InsertNode(N, IP);
4271 AllNodes.push_back(N);
4272 return SDValue(N, 0);
4275 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4276 SDValue Chain, SDValue Ptr,
4279 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4280 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4283 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4284 const SDUse *Ops, unsigned NumOps) {
4286 case 0: return getNode(Opcode, DL, VT);
4287 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4288 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4289 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4293 // Copy from an SDUse array into an SDValue array for use with
4294 // the regular getNode logic.
4295 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4296 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4299 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4300 const SDValue *Ops, unsigned NumOps) {
4302 case 0: return getNode(Opcode, DL, VT);
4303 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4304 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4305 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4311 case ISD::SELECT_CC: {
4312 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4313 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4314 "LHS and RHS of condition must have same type!");
4315 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4316 "True and False arms of SelectCC must have same type!");
4317 assert(Ops[2].getValueType() == VT &&
4318 "select_cc node must be of same type as true and false value!");
4322 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4323 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4324 "LHS/RHS of comparison should match types!");
4331 SDVTList VTs = getVTList(VT);
4333 if (VT != MVT::Glue) {
4334 FoldingSetNodeID ID;
4335 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4339 return SDValue(E, 0);
4341 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4342 CSEMap.InsertNode(N, IP);
4344 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4347 AllNodes.push_back(N);
4351 return SDValue(N, 0);
4354 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4355 const std::vector<EVT> &ResultTys,
4356 const SDValue *Ops, unsigned NumOps) {
4357 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4361 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4362 const EVT *VTs, unsigned NumVTs,
4363 const SDValue *Ops, unsigned NumOps) {
4365 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4366 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4369 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4370 const SDValue *Ops, unsigned NumOps) {
4371 if (VTList.NumVTs == 1)
4372 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4376 // FIXME: figure out how to safely handle things like
4377 // int foo(int x) { return 1 << (x & 255); }
4378 // int bar() { return foo(256); }
4379 case ISD::SRA_PARTS:
4380 case ISD::SRL_PARTS:
4381 case ISD::SHL_PARTS:
4382 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4383 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4384 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4385 else if (N3.getOpcode() == ISD::AND)
4386 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4387 // If the and is only masking out bits that cannot effect the shift,
4388 // eliminate the and.
4389 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4390 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4391 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4397 // Memoize the node unless it returns a flag.
4399 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4400 FoldingSetNodeID ID;
4401 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4403 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4404 return SDValue(E, 0);
4407 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4408 } else if (NumOps == 2) {
4409 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4410 } else if (NumOps == 3) {
4411 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4414 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4416 CSEMap.InsertNode(N, IP);
4419 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4420 } else if (NumOps == 2) {
4421 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4422 } else if (NumOps == 3) {
4423 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4426 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4429 AllNodes.push_back(N);
4433 return SDValue(N, 0);
4436 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4437 return getNode(Opcode, DL, VTList, 0, 0);
4440 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4442 SDValue Ops[] = { N1 };
4443 return getNode(Opcode, DL, VTList, Ops, 1);
4446 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4447 SDValue N1, SDValue N2) {
4448 SDValue Ops[] = { N1, N2 };
4449 return getNode(Opcode, DL, VTList, Ops, 2);
4452 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4453 SDValue N1, SDValue N2, SDValue N3) {
4454 SDValue Ops[] = { N1, N2, N3 };
4455 return getNode(Opcode, DL, VTList, Ops, 3);
4458 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4459 SDValue N1, SDValue N2, SDValue N3,
4461 SDValue Ops[] = { N1, N2, N3, N4 };
4462 return getNode(Opcode, DL, VTList, Ops, 4);
4465 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4466 SDValue N1, SDValue N2, SDValue N3,
4467 SDValue N4, SDValue N5) {
4468 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4469 return getNode(Opcode, DL, VTList, Ops, 5);
4472 SDVTList SelectionDAG::getVTList(EVT VT) {
4473 return makeVTList(SDNode::getValueTypeList(VT), 1);
4476 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4477 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4478 E = VTList.rend(); I != E; ++I)
4479 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4482 EVT *Array = Allocator.Allocate<EVT>(2);
4485 SDVTList Result = makeVTList(Array, 2);
4486 VTList.push_back(Result);
4490 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4491 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4492 E = VTList.rend(); I != E; ++I)
4493 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4497 EVT *Array = Allocator.Allocate<EVT>(3);
4501 SDVTList Result = makeVTList(Array, 3);
4502 VTList.push_back(Result);
4506 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4507 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4508 E = VTList.rend(); I != E; ++I)
4509 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4510 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4513 EVT *Array = Allocator.Allocate<EVT>(4);
4518 SDVTList Result = makeVTList(Array, 4);
4519 VTList.push_back(Result);
4523 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4525 case 0: llvm_unreachable("Cannot have nodes without results!");
4526 case 1: return getVTList(VTs[0]);
4527 case 2: return getVTList(VTs[0], VTs[1]);
4528 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4529 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4533 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4534 E = VTList.rend(); I != E; ++I) {
4535 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4538 bool NoMatch = false;
4539 for (unsigned i = 2; i != NumVTs; ++i)
4540 if (VTs[i] != I->VTs[i]) {
4548 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4549 std::copy(VTs, VTs+NumVTs, Array);
4550 SDVTList Result = makeVTList(Array, NumVTs);
4551 VTList.push_back(Result);
4556 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4557 /// specified operands. If the resultant node already exists in the DAG,
4558 /// this does not modify the specified node, instead it returns the node that
4559 /// already exists. If the resultant node does not exist in the DAG, the
4560 /// input node is returned. As a degenerate case, if you specify the same
4561 /// input operands as the node already has, the input node is returned.
4562 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4563 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4565 // Check to see if there is no change.
4566 if (Op == N->getOperand(0)) return N;
4568 // See if the modified node already exists.
4569 void *InsertPos = 0;
4570 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4573 // Nope it doesn't. Remove the node from its current place in the maps.
4575 if (!RemoveNodeFromCSEMaps(N))
4578 // Now we update the operands.
4579 N->OperandList[0].set(Op);
4581 // If this gets put into a CSE map, add it.
4582 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4586 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4587 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4589 // Check to see if there is no change.
4590 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4591 return N; // No operands changed, just return the input node.
4593 // See if the modified node already exists.
4594 void *InsertPos = 0;
4595 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4598 // Nope it doesn't. Remove the node from its current place in the maps.
4600 if (!RemoveNodeFromCSEMaps(N))
4603 // Now we update the operands.
4604 if (N->OperandList[0] != Op1)
4605 N->OperandList[0].set(Op1);
4606 if (N->OperandList[1] != Op2)
4607 N->OperandList[1].set(Op2);
4609 // If this gets put into a CSE map, add it.
4610 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4614 SDNode *SelectionDAG::
4615 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4616 SDValue Ops[] = { Op1, Op2, Op3 };
4617 return UpdateNodeOperands(N, Ops, 3);
4620 SDNode *SelectionDAG::
4621 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4622 SDValue Op3, SDValue Op4) {
4623 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4624 return UpdateNodeOperands(N, Ops, 4);
4627 SDNode *SelectionDAG::
4628 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4629 SDValue Op3, SDValue Op4, SDValue Op5) {
4630 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4631 return UpdateNodeOperands(N, Ops, 5);
4634 SDNode *SelectionDAG::
4635 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4636 assert(N->getNumOperands() == NumOps &&
4637 "Update with wrong number of operands");
4639 // Check to see if there is no change.
4640 bool AnyChange = false;
4641 for (unsigned i = 0; i != NumOps; ++i) {
4642 if (Ops[i] != N->getOperand(i)) {
4648 // No operands changed, just return the input node.
4649 if (!AnyChange) return N;
4651 // See if the modified node already exists.
4652 void *InsertPos = 0;
4653 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4656 // Nope it doesn't. Remove the node from its current place in the maps.
4658 if (!RemoveNodeFromCSEMaps(N))
4661 // Now we update the operands.
4662 for (unsigned i = 0; i != NumOps; ++i)
4663 if (N->OperandList[i] != Ops[i])
4664 N->OperandList[i].set(Ops[i]);
4666 // If this gets put into a CSE map, add it.
4667 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4671 /// DropOperands - Release the operands and set this node to have
4673 void SDNode::DropOperands() {
4674 // Unlike the code in MorphNodeTo that does this, we don't need to
4675 // watch for dead nodes here.
4676 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4682 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4685 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4687 SDVTList VTs = getVTList(VT);
4688 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4691 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4692 EVT VT, SDValue Op1) {
4693 SDVTList VTs = getVTList(VT);
4694 SDValue Ops[] = { Op1 };
4695 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4698 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4699 EVT VT, SDValue Op1,
4701 SDVTList VTs = getVTList(VT);
4702 SDValue Ops[] = { Op1, Op2 };
4703 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4706 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4707 EVT VT, SDValue Op1,
4708 SDValue Op2, SDValue Op3) {
4709 SDVTList VTs = getVTList(VT);
4710 SDValue Ops[] = { Op1, Op2, Op3 };
4711 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4714 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4715 EVT VT, const SDValue *Ops,
4717 SDVTList VTs = getVTList(VT);
4718 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4721 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4722 EVT VT1, EVT VT2, const SDValue *Ops,
4724 SDVTList VTs = getVTList(VT1, VT2);
4725 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4728 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4730 SDVTList VTs = getVTList(VT1, VT2);
4731 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4734 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4735 EVT VT1, EVT VT2, EVT VT3,
4736 const SDValue *Ops, unsigned NumOps) {
4737 SDVTList VTs = getVTList(VT1, VT2, VT3);
4738 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4741 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4742 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4743 const SDValue *Ops, unsigned NumOps) {
4744 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4745 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4748 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4751 SDVTList VTs = getVTList(VT1, VT2);
4752 SDValue Ops[] = { Op1 };
4753 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4756 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4758 SDValue Op1, SDValue Op2) {
4759 SDVTList VTs = getVTList(VT1, VT2);
4760 SDValue Ops[] = { Op1, Op2 };
4761 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4764 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4766 SDValue Op1, SDValue Op2,
4768 SDVTList VTs = getVTList(VT1, VT2);
4769 SDValue Ops[] = { Op1, Op2, Op3 };
4770 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4773 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4774 EVT VT1, EVT VT2, EVT VT3,
4775 SDValue Op1, SDValue Op2,
4777 SDVTList VTs = getVTList(VT1, VT2, VT3);
4778 SDValue Ops[] = { Op1, Op2, Op3 };
4779 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4782 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4783 SDVTList VTs, const SDValue *Ops,
4785 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4786 // Reset the NodeID to -1.
4791 /// MorphNodeTo - This *mutates* the specified node to have the specified
4792 /// return type, opcode, and operands.
4794 /// Note that MorphNodeTo returns the resultant node. If there is already a
4795 /// node of the specified opcode and operands, it returns that node instead of
4796 /// the current one. Note that the DebugLoc need not be the same.
4798 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4799 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4800 /// node, and because it doesn't require CSE recalculation for any of
4801 /// the node's users.
4803 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4804 SDVTList VTs, const SDValue *Ops,
4806 // If an identical node already exists, use it.
4808 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4809 FoldingSetNodeID ID;
4810 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4811 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4815 if (!RemoveNodeFromCSEMaps(N))
4818 // Start the morphing.
4820 N->ValueList = VTs.VTs;
4821 N->NumValues = VTs.NumVTs;
4823 // Clear the operands list, updating used nodes to remove this from their
4824 // use list. Keep track of any operands that become dead as a result.
4825 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4826 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4828 SDNode *Used = Use.getNode();
4830 if (Used->use_empty())
4831 DeadNodeSet.insert(Used);
4834 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4835 // Initialize the memory references information.
4836 MN->setMemRefs(0, 0);
4837 // If NumOps is larger than the # of operands we can have in a
4838 // MachineSDNode, reallocate the operand list.
4839 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4840 if (MN->OperandsNeedDelete)
4841 delete[] MN->OperandList;
4842 if (NumOps > array_lengthof(MN->LocalOperands))
4843 // We're creating a final node that will live unmorphed for the
4844 // remainder of the current SelectionDAG iteration, so we can allocate
4845 // the operands directly out of a pool with no recycling metadata.
4846 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4849 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4850 MN->OperandsNeedDelete = false;
4852 MN->InitOperands(MN->OperandList, Ops, NumOps);
4854 // If NumOps is larger than the # of operands we currently have, reallocate
4855 // the operand list.
4856 if (NumOps > N->NumOperands) {
4857 if (N->OperandsNeedDelete)
4858 delete[] N->OperandList;
4859 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4860 N->OperandsNeedDelete = true;
4862 N->InitOperands(N->OperandList, Ops, NumOps);
4865 // Delete any nodes that are still dead after adding the uses for the
4867 if (!DeadNodeSet.empty()) {
4868 SmallVector<SDNode *, 16> DeadNodes;
4869 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4870 E = DeadNodeSet.end(); I != E; ++I)
4871 if ((*I)->use_empty())
4872 DeadNodes.push_back(*I);
4873 RemoveDeadNodes(DeadNodes);
4877 CSEMap.InsertNode(N, IP); // Memoize the new node.
4882 /// getMachineNode - These are used for target selectors to create a new node
4883 /// with specified return type(s), MachineInstr opcode, and operands.
4885 /// Note that getMachineNode returns the resultant node. If there is already a
4886 /// node of the specified opcode and operands, it returns that node instead of
4887 /// the current one.
4889 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4890 SDVTList VTs = getVTList(VT);
4891 return getMachineNode(Opcode, dl, VTs, 0, 0);
4895 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4896 SDVTList VTs = getVTList(VT);
4897 SDValue Ops[] = { Op1 };
4898 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4902 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4903 SDValue Op1, SDValue Op2) {
4904 SDVTList VTs = getVTList(VT);
4905 SDValue Ops[] = { Op1, Op2 };
4906 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4910 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4911 SDValue Op1, SDValue Op2, SDValue Op3) {
4912 SDVTList VTs = getVTList(VT);
4913 SDValue Ops[] = { Op1, Op2, Op3 };
4914 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4918 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4919 const SDValue *Ops, unsigned NumOps) {
4920 SDVTList VTs = getVTList(VT);
4921 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4925 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4926 SDVTList VTs = getVTList(VT1, VT2);
4927 return getMachineNode(Opcode, dl, VTs, 0, 0);
4931 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4932 EVT VT1, EVT VT2, SDValue Op1) {
4933 SDVTList VTs = getVTList(VT1, VT2);
4934 SDValue Ops[] = { Op1 };
4935 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4939 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4940 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4941 SDVTList VTs = getVTList(VT1, VT2);
4942 SDValue Ops[] = { Op1, Op2 };
4943 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4947 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4948 EVT VT1, EVT VT2, SDValue Op1,
4949 SDValue Op2, SDValue Op3) {
4950 SDVTList VTs = getVTList(VT1, VT2);
4951 SDValue Ops[] = { Op1, Op2, Op3 };
4952 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4956 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4958 const SDValue *Ops, unsigned NumOps) {
4959 SDVTList VTs = getVTList(VT1, VT2);
4960 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4964 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4965 EVT VT1, EVT VT2, EVT VT3,
4966 SDValue Op1, SDValue Op2) {
4967 SDVTList VTs = getVTList(VT1, VT2, VT3);
4968 SDValue Ops[] = { Op1, Op2 };
4969 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4973 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4974 EVT VT1, EVT VT2, EVT VT3,
4975 SDValue Op1, SDValue Op2, SDValue Op3) {
4976 SDVTList VTs = getVTList(VT1, VT2, VT3);
4977 SDValue Ops[] = { Op1, Op2, Op3 };
4978 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4982 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4983 EVT VT1, EVT VT2, EVT VT3,
4984 const SDValue *Ops, unsigned NumOps) {
4985 SDVTList VTs = getVTList(VT1, VT2, VT3);
4986 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4990 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4991 EVT VT2, EVT VT3, EVT VT4,
4992 const SDValue *Ops, unsigned NumOps) {
4993 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4994 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4998 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4999 const std::vector<EVT> &ResultTys,
5000 const SDValue *Ops, unsigned NumOps) {
5001 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5002 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5006 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5007 const SDValue *Ops, unsigned NumOps) {
5008 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5013 FoldingSetNodeID ID;
5014 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5016 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5017 return cast<MachineSDNode>(E);
5020 // Allocate a new MachineSDNode.
5021 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5023 // Initialize the operands list.
5024 if (NumOps > array_lengthof(N->LocalOperands))
5025 // We're creating a final node that will live unmorphed for the
5026 // remainder of the current SelectionDAG iteration, so we can allocate
5027 // the operands directly out of a pool with no recycling metadata.
5028 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5031 N->InitOperands(N->LocalOperands, Ops, NumOps);
5032 N->OperandsNeedDelete = false;
5035 CSEMap.InsertNode(N, IP);
5037 AllNodes.push_back(N);
5039 VerifyMachineNode(N);
5044 /// getTargetExtractSubreg - A convenience function for creating
5045 /// TargetOpcode::EXTRACT_SUBREG nodes.
5047 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5049 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5050 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5051 VT, Operand, SRIdxVal);
5052 return SDValue(Subreg, 0);
5055 /// getTargetInsertSubreg - A convenience function for creating
5056 /// TargetOpcode::INSERT_SUBREG nodes.
5058 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5059 SDValue Operand, SDValue Subreg) {
5060 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5061 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5062 VT, Operand, Subreg, SRIdxVal);
5063 return SDValue(Result, 0);
5066 /// getNodeIfExists - Get the specified node if it's already available, or
5067 /// else return NULL.
5068 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5069 const SDValue *Ops, unsigned NumOps) {
5070 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5071 FoldingSetNodeID ID;
5072 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5074 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5080 /// getDbgValue - Creates a SDDbgValue node.
5083 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5084 DebugLoc DL, unsigned O) {
5085 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5089 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5090 DebugLoc DL, unsigned O) {
5091 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5095 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5096 DebugLoc DL, unsigned O) {
5097 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5102 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5103 /// pointed to by a use iterator is deleted, increment the use iterator
5104 /// so that it doesn't dangle.
5106 /// This class also manages a "downlink" DAGUpdateListener, to forward
5107 /// messages to ReplaceAllUsesWith's callers.
5109 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5110 SelectionDAG::DAGUpdateListener *DownLink;
5111 SDNode::use_iterator &UI;
5112 SDNode::use_iterator &UE;
5114 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5115 // Increment the iterator as needed.
5116 while (UI != UE && N == *UI)
5119 // Then forward the message.
5120 if (DownLink) DownLink->NodeDeleted(N, E);
5123 virtual void NodeUpdated(SDNode *N) {
5124 // Just forward the message.
5125 if (DownLink) DownLink->NodeUpdated(N);
5129 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5130 SDNode::use_iterator &ui,
5131 SDNode::use_iterator &ue)
5132 : DownLink(dl), UI(ui), UE(ue) {}
5137 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5138 /// This can cause recursive merging of nodes in the DAG.
5140 /// This version assumes From has a single result value.
5142 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5143 DAGUpdateListener *UpdateListener) {
5144 SDNode *From = FromN.getNode();
5145 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5146 "Cannot replace with this method!");
5147 assert(From != To.getNode() && "Cannot replace uses of with self");
5149 // Iterate over all the existing uses of From. New uses will be added
5150 // to the beginning of the use list, which we avoid visiting.
5151 // This specifically avoids visiting uses of From that arise while the
5152 // replacement is happening, because any such uses would be the result
5153 // of CSE: If an existing node looks like From after one of its operands
5154 // is replaced by To, we don't want to replace of all its users with To
5155 // too. See PR3018 for more info.
5156 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5157 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5161 // This node is about to morph, remove its old self from the CSE maps.
5162 RemoveNodeFromCSEMaps(User);
5164 // A user can appear in a use list multiple times, and when this
5165 // happens the uses are usually next to each other in the list.
5166 // To help reduce the number of CSE recomputations, process all
5167 // the uses of this user that we can find this way.
5169 SDUse &Use = UI.getUse();
5172 } while (UI != UE && *UI == User);
5174 // Now that we have modified User, add it back to the CSE maps. If it
5175 // already exists there, recursively merge the results together.
5176 AddModifiedNodeToCSEMaps(User, &Listener);
5180 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5181 /// This can cause recursive merging of nodes in the DAG.
5183 /// This version assumes that for each value of From, there is a
5184 /// corresponding value in To in the same position with the same type.
5186 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5187 DAGUpdateListener *UpdateListener) {
5189 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5190 assert((!From->hasAnyUseOfValue(i) ||
5191 From->getValueType(i) == To->getValueType(i)) &&
5192 "Cannot use this version of ReplaceAllUsesWith!");
5195 // Handle the trivial case.
5199 // Iterate over just the existing users of From. See the comments in
5200 // the ReplaceAllUsesWith above.
5201 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5202 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5206 // This node is about to morph, remove its old self from the CSE maps.
5207 RemoveNodeFromCSEMaps(User);
5209 // A user can appear in a use list multiple times, and when this
5210 // happens the uses are usually next to each other in the list.
5211 // To help reduce the number of CSE recomputations, process all
5212 // the uses of this user that we can find this way.
5214 SDUse &Use = UI.getUse();
5217 } while (UI != UE && *UI == User);
5219 // Now that we have modified User, add it back to the CSE maps. If it
5220 // already exists there, recursively merge the results together.
5221 AddModifiedNodeToCSEMaps(User, &Listener);
5225 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5226 /// This can cause recursive merging of nodes in the DAG.
5228 /// This version can replace From with any result values. To must match the
5229 /// number and types of values returned by From.
5230 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5232 DAGUpdateListener *UpdateListener) {
5233 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5234 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5236 // Iterate over just the existing users of From. See the comments in
5237 // the ReplaceAllUsesWith above.
5238 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5239 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5243 // This node is about to morph, remove its old self from the CSE maps.
5244 RemoveNodeFromCSEMaps(User);
5246 // A user can appear in a use list multiple times, and when this
5247 // happens the uses are usually next to each other in the list.
5248 // To help reduce the number of CSE recomputations, process all
5249 // the uses of this user that we can find this way.
5251 SDUse &Use = UI.getUse();
5252 const SDValue &ToOp = To[Use.getResNo()];
5255 } while (UI != UE && *UI == User);
5257 // Now that we have modified User, add it back to the CSE maps. If it
5258 // already exists there, recursively merge the results together.
5259 AddModifiedNodeToCSEMaps(User, &Listener);
5263 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5264 /// uses of other values produced by From.getNode() alone. The Deleted
5265 /// vector is handled the same way as for ReplaceAllUsesWith.
5266 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5267 DAGUpdateListener *UpdateListener){
5268 // Handle the really simple, really trivial case efficiently.
5269 if (From == To) return;
5271 // Handle the simple, trivial, case efficiently.
5272 if (From.getNode()->getNumValues() == 1) {
5273 ReplaceAllUsesWith(From, To, UpdateListener);
5277 // Iterate over just the existing users of From. See the comments in
5278 // the ReplaceAllUsesWith above.
5279 SDNode::use_iterator UI = From.getNode()->use_begin(),
5280 UE = From.getNode()->use_end();
5281 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5284 bool UserRemovedFromCSEMaps = false;
5286 // A user can appear in a use list multiple times, and when this
5287 // happens the uses are usually next to each other in the list.
5288 // To help reduce the number of CSE recomputations, process all
5289 // the uses of this user that we can find this way.
5291 SDUse &Use = UI.getUse();
5293 // Skip uses of different values from the same node.
5294 if (Use.getResNo() != From.getResNo()) {
5299 // If this node hasn't been modified yet, it's still in the CSE maps,
5300 // so remove its old self from the CSE maps.
5301 if (!UserRemovedFromCSEMaps) {
5302 RemoveNodeFromCSEMaps(User);
5303 UserRemovedFromCSEMaps = true;
5308 } while (UI != UE && *UI == User);
5310 // We are iterating over all uses of the From node, so if a use
5311 // doesn't use the specific value, no changes are made.
5312 if (!UserRemovedFromCSEMaps)
5315 // Now that we have modified User, add it back to the CSE maps. If it
5316 // already exists there, recursively merge the results together.
5317 AddModifiedNodeToCSEMaps(User, &Listener);
5322 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5323 /// to record information about a use.
5330 /// operator< - Sort Memos by User.
5331 bool operator<(const UseMemo &L, const UseMemo &R) {
5332 return (intptr_t)L.User < (intptr_t)R.User;
5336 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5337 /// uses of other values produced by From.getNode() alone. The same value
5338 /// may appear in both the From and To list. The Deleted vector is
5339 /// handled the same way as for ReplaceAllUsesWith.
5340 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5343 DAGUpdateListener *UpdateListener){
5344 // Handle the simple, trivial case efficiently.
5346 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5348 // Read up all the uses and make records of them. This helps
5349 // processing new uses that are introduced during the
5350 // replacement process.
5351 SmallVector<UseMemo, 4> Uses;
5352 for (unsigned i = 0; i != Num; ++i) {
5353 unsigned FromResNo = From[i].getResNo();
5354 SDNode *FromNode = From[i].getNode();
5355 for (SDNode::use_iterator UI = FromNode->use_begin(),
5356 E = FromNode->use_end(); UI != E; ++UI) {
5357 SDUse &Use = UI.getUse();
5358 if (Use.getResNo() == FromResNo) {
5359 UseMemo Memo = { *UI, i, &Use };
5360 Uses.push_back(Memo);
5365 // Sort the uses, so that all the uses from a given User are together.
5366 std::sort(Uses.begin(), Uses.end());
5368 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5369 UseIndex != UseIndexEnd; ) {
5370 // We know that this user uses some value of From. If it is the right
5371 // value, update it.
5372 SDNode *User = Uses[UseIndex].User;
5374 // This node is about to morph, remove its old self from the CSE maps.
5375 RemoveNodeFromCSEMaps(User);
5377 // The Uses array is sorted, so all the uses for a given User
5378 // are next to each other in the list.
5379 // To help reduce the number of CSE recomputations, process all
5380 // the uses of this user that we can find this way.
5382 unsigned i = Uses[UseIndex].Index;
5383 SDUse &Use = *Uses[UseIndex].Use;
5387 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5389 // Now that we have modified User, add it back to the CSE maps. If it
5390 // already exists there, recursively merge the results together.
5391 AddModifiedNodeToCSEMaps(User, UpdateListener);
5395 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5396 /// based on their topological order. It returns the maximum id and a vector
5397 /// of the SDNodes* in assigned order by reference.
5398 unsigned SelectionDAG::AssignTopologicalOrder() {
5400 unsigned DAGSize = 0;
5402 // SortedPos tracks the progress of the algorithm. Nodes before it are
5403 // sorted, nodes after it are unsorted. When the algorithm completes
5404 // it is at the end of the list.
5405 allnodes_iterator SortedPos = allnodes_begin();
5407 // Visit all the nodes. Move nodes with no operands to the front of
5408 // the list immediately. Annotate nodes that do have operands with their
5409 // operand count. Before we do this, the Node Id fields of the nodes
5410 // may contain arbitrary values. After, the Node Id fields for nodes
5411 // before SortedPos will contain the topological sort index, and the
5412 // Node Id fields for nodes At SortedPos and after will contain the
5413 // count of outstanding operands.
5414 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5417 unsigned Degree = N->getNumOperands();
5419 // A node with no uses, add it to the result array immediately.
5420 N->setNodeId(DAGSize++);
5421 allnodes_iterator Q = N;
5423 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5424 assert(SortedPos != AllNodes.end() && "Overran node list");
5427 // Temporarily use the Node Id as scratch space for the degree count.
5428 N->setNodeId(Degree);
5432 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5433 // such that by the time the end is reached all nodes will be sorted.
5434 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5437 // N is in sorted position, so all its uses have one less operand
5438 // that needs to be sorted.
5439 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5442 unsigned Degree = P->getNodeId();
5443 assert(Degree != 0 && "Invalid node degree");
5446 // All of P's operands are sorted, so P may sorted now.
5447 P->setNodeId(DAGSize++);
5449 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5450 assert(SortedPos != AllNodes.end() && "Overran node list");
5453 // Update P's outstanding operand count.
5454 P->setNodeId(Degree);
5457 if (I == SortedPos) {
5460 dbgs() << "Overran sorted position:\n";
5463 llvm_unreachable(0);
5467 assert(SortedPos == AllNodes.end() &&
5468 "Topological sort incomplete!");
5469 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5470 "First node in topological sort is not the entry token!");
5471 assert(AllNodes.front().getNodeId() == 0 &&
5472 "First node in topological sort has non-zero id!");
5473 assert(AllNodes.front().getNumOperands() == 0 &&
5474 "First node in topological sort has operands!");
5475 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5476 "Last node in topologic sort has unexpected id!");
5477 assert(AllNodes.back().use_empty() &&
5478 "Last node in topologic sort has users!");
5479 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5483 /// AssignOrdering - Assign an order to the SDNode.
5484 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5485 assert(SD && "Trying to assign an order to a null node!");
5486 Ordering->add(SD, Order);
5489 /// GetOrdering - Get the order for the SDNode.
5490 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5491 assert(SD && "Trying to get the order of a null node!");
5492 return Ordering->getOrder(SD);
5495 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5496 /// value is produced by SD.
5497 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5498 DbgInfo->add(DB, SD, isParameter);
5500 SD->setHasDebugValue(true);
5503 /// TransferDbgValues - Transfer SDDbgValues.
5504 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5505 if (From == To || !From.getNode()->getHasDebugValue())
5507 SDNode *FromNode = From.getNode();
5508 SDNode *ToNode = To.getNode();
5509 SmallVector<SDDbgValue *, 2> &DVs = GetDbgValues(FromNode);
5510 SmallVector<SDDbgValue *, 2> ClonedDVs;
5511 for (SmallVector<SDDbgValue *, 2>::iterator I = DVs.begin(), E = DVs.end();
5513 SDDbgValue *Dbg = *I;
5514 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5515 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5516 Dbg->getOffset(), Dbg->getDebugLoc(),
5518 ClonedDVs.push_back(Clone);
5521 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5522 E = ClonedDVs.end(); I != E; ++I)
5523 AddDbgValue(*I, ToNode, false);
5526 //===----------------------------------------------------------------------===//
5528 //===----------------------------------------------------------------------===//
5530 HandleSDNode::~HandleSDNode() {
5534 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5535 const GlobalValue *GA,
5536 EVT VT, int64_t o, unsigned char TF)
5537 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5541 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5542 MachineMemOperand *mmo)
5543 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5544 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5545 MMO->isNonTemporal());
5546 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5547 assert(isNonTemporal() == MMO->isNonTemporal() &&
5548 "Non-temporal encoding error!");
5549 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5552 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5553 const SDValue *Ops, unsigned NumOps, EVT memvt,
5554 MachineMemOperand *mmo)
5555 : SDNode(Opc, dl, VTs, Ops, NumOps),
5556 MemoryVT(memvt), MMO(mmo) {
5557 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5558 MMO->isNonTemporal());
5559 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5560 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5563 /// Profile - Gather unique data for the node.
5565 void SDNode::Profile(FoldingSetNodeID &ID) const {
5566 AddNodeIDNode(ID, this);
5571 std::vector<EVT> VTs;
5574 VTs.reserve(MVT::LAST_VALUETYPE);
5575 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5576 VTs.push_back(MVT((MVT::SimpleValueType)i));
5581 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5582 static ManagedStatic<EVTArray> SimpleVTArray;
5583 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5585 /// getValueTypeList - Return a pointer to the specified value type.
5587 const EVT *SDNode::getValueTypeList(EVT VT) {
5588 if (VT.isExtended()) {
5589 sys::SmartScopedLock<true> Lock(*VTMutex);
5590 return &(*EVTs->insert(VT).first);
5592 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5593 "Value type out of range!");
5594 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5598 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5599 /// indicated value. This method ignores uses of other values defined by this
5601 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5602 assert(Value < getNumValues() && "Bad value!");
5604 // TODO: Only iterate over uses of a given value of the node
5605 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5606 if (UI.getUse().getResNo() == Value) {
5613 // Found exactly the right number of uses?
5618 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5619 /// value. This method ignores uses of other values defined by this operation.
5620 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5621 assert(Value < getNumValues() && "Bad value!");
5623 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5624 if (UI.getUse().getResNo() == Value)
5631 /// isOnlyUserOf - Return true if this node is the only use of N.
5633 bool SDNode::isOnlyUserOf(SDNode *N) const {
5635 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5646 /// isOperand - Return true if this node is an operand of N.
5648 bool SDValue::isOperandOf(SDNode *N) const {
5649 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5650 if (*this == N->getOperand(i))
5655 bool SDNode::isOperandOf(SDNode *N) const {
5656 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5657 if (this == N->OperandList[i].getNode())
5662 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5663 /// be a chain) reaches the specified operand without crossing any
5664 /// side-effecting instructions on any chain path. In practice, this looks
5665 /// through token factors and non-volatile loads. In order to remain efficient,
5666 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5667 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5668 unsigned Depth) const {
5669 if (*this == Dest) return true;
5671 // Don't search too deeply, we just want to be able to see through
5672 // TokenFactor's etc.
5673 if (Depth == 0) return false;
5675 // If this is a token factor, all inputs to the TF happen in parallel. If any
5676 // of the operands of the TF does not reach dest, then we cannot do the xform.
5677 if (getOpcode() == ISD::TokenFactor) {
5678 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5679 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5684 // Loads don't have side effects, look through them.
5685 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5686 if (!Ld->isVolatile())
5687 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5692 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5693 /// is either an operand of N or it can be reached by traversing up the operands.
5694 /// NOTE: this is an expensive method. Use it carefully.
5695 bool SDNode::isPredecessorOf(SDNode *N) const {
5696 SmallPtrSet<SDNode *, 32> Visited;
5697 SmallVector<SDNode *, 16> Worklist;
5698 Worklist.push_back(N);
5701 N = Worklist.pop_back_val();
5702 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5703 SDNode *Op = N->getOperand(i).getNode();
5706 if (Visited.insert(Op))
5707 Worklist.push_back(Op);
5709 } while (!Worklist.empty());
5714 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5715 assert(Num < NumOperands && "Invalid child # of SDNode!");
5716 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5719 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5720 switch (getOpcode()) {
5722 if (getOpcode() < ISD::BUILTIN_OP_END)
5723 return "<<Unknown DAG Node>>";
5724 if (isMachineOpcode()) {
5726 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5727 if (getMachineOpcode() < TII->getNumOpcodes())
5728 return TII->get(getMachineOpcode()).getName();
5729 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5732 const TargetLowering &TLI = G->getTargetLoweringInfo();
5733 const char *Name = TLI.getTargetNodeName(getOpcode());
5734 if (Name) return Name;
5735 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5737 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5740 case ISD::DELETED_NODE:
5741 return "<<Deleted Node!>>";
5743 case ISD::PREFETCH: return "Prefetch";
5744 case ISD::MEMBARRIER: return "MemBarrier";
5745 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5746 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5747 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5748 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5749 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5750 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5751 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5752 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5753 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5754 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5755 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5756 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5757 case ISD::PCMARKER: return "PCMarker";
5758 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5759 case ISD::SRCVALUE: return "SrcValue";
5760 case ISD::MDNODE_SDNODE: return "MDNode";
5761 case ISD::EntryToken: return "EntryToken";
5762 case ISD::TokenFactor: return "TokenFactor";
5763 case ISD::AssertSext: return "AssertSext";
5764 case ISD::AssertZext: return "AssertZext";
5766 case ISD::BasicBlock: return "BasicBlock";
5767 case ISD::VALUETYPE: return "ValueType";
5768 case ISD::Register: return "Register";
5770 case ISD::Constant: return "Constant";
5771 case ISD::ConstantFP: return "ConstantFP";
5772 case ISD::GlobalAddress: return "GlobalAddress";
5773 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5774 case ISD::FrameIndex: return "FrameIndex";
5775 case ISD::JumpTable: return "JumpTable";
5776 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5777 case ISD::RETURNADDR: return "RETURNADDR";
5778 case ISD::FRAMEADDR: return "FRAMEADDR";
5779 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5780 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5781 case ISD::LSDAADDR: return "LSDAADDR";
5782 case ISD::EHSELECTION: return "EHSELECTION";
5783 case ISD::EH_RETURN: return "EH_RETURN";
5784 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5785 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5786 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5787 case ISD::ConstantPool: return "ConstantPool";
5788 case ISD::ExternalSymbol: return "ExternalSymbol";
5789 case ISD::BlockAddress: return "BlockAddress";
5790 case ISD::INTRINSIC_WO_CHAIN:
5791 case ISD::INTRINSIC_VOID:
5792 case ISD::INTRINSIC_W_CHAIN: {
5793 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5794 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5795 if (IID < Intrinsic::num_intrinsics)
5796 return Intrinsic::getName((Intrinsic::ID)IID);
5797 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5798 return TII->getName(IID);
5799 llvm_unreachable("Invalid intrinsic ID");
5802 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5803 case ISD::TargetConstant: return "TargetConstant";
5804 case ISD::TargetConstantFP:return "TargetConstantFP";
5805 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5806 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5807 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5808 case ISD::TargetJumpTable: return "TargetJumpTable";
5809 case ISD::TargetConstantPool: return "TargetConstantPool";
5810 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5811 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5813 case ISD::CopyToReg: return "CopyToReg";
5814 case ISD::CopyFromReg: return "CopyFromReg";
5815 case ISD::UNDEF: return "undef";
5816 case ISD::MERGE_VALUES: return "merge_values";
5817 case ISD::INLINEASM: return "inlineasm";
5818 case ISD::EH_LABEL: return "eh_label";
5819 case ISD::HANDLENODE: return "handlenode";
5822 case ISD::FABS: return "fabs";
5823 case ISD::FNEG: return "fneg";
5824 case ISD::FSQRT: return "fsqrt";
5825 case ISD::FSIN: return "fsin";
5826 case ISD::FCOS: return "fcos";
5827 case ISD::FTRUNC: return "ftrunc";
5828 case ISD::FFLOOR: return "ffloor";
5829 case ISD::FCEIL: return "fceil";
5830 case ISD::FRINT: return "frint";
5831 case ISD::FNEARBYINT: return "fnearbyint";
5832 case ISD::FEXP: return "fexp";
5833 case ISD::FEXP2: return "fexp2";
5834 case ISD::FLOG: return "flog";
5835 case ISD::FLOG2: return "flog2";
5836 case ISD::FLOG10: return "flog10";
5839 case ISD::ADD: return "add";
5840 case ISD::SUB: return "sub";
5841 case ISD::MUL: return "mul";
5842 case ISD::MULHU: return "mulhu";
5843 case ISD::MULHS: return "mulhs";
5844 case ISD::SDIV: return "sdiv";
5845 case ISD::UDIV: return "udiv";
5846 case ISD::SREM: return "srem";
5847 case ISD::UREM: return "urem";
5848 case ISD::SMUL_LOHI: return "smul_lohi";
5849 case ISD::UMUL_LOHI: return "umul_lohi";
5850 case ISD::SDIVREM: return "sdivrem";
5851 case ISD::UDIVREM: return "udivrem";
5852 case ISD::AND: return "and";
5853 case ISD::OR: return "or";
5854 case ISD::XOR: return "xor";
5855 case ISD::SHL: return "shl";
5856 case ISD::SRA: return "sra";
5857 case ISD::SRL: return "srl";
5858 case ISD::ROTL: return "rotl";
5859 case ISD::ROTR: return "rotr";
5860 case ISD::FADD: return "fadd";
5861 case ISD::FSUB: return "fsub";
5862 case ISD::FMUL: return "fmul";
5863 case ISD::FDIV: return "fdiv";
5864 case ISD::FREM: return "frem";
5865 case ISD::FCOPYSIGN: return "fcopysign";
5866 case ISD::FGETSIGN: return "fgetsign";
5867 case ISD::FPOW: return "fpow";
5869 case ISD::FPOWI: return "fpowi";
5870 case ISD::SETCC: return "setcc";
5871 case ISD::VSETCC: return "vsetcc";
5872 case ISD::SELECT: return "select";
5873 case ISD::SELECT_CC: return "select_cc";
5874 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5875 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5876 case ISD::CONCAT_VECTORS: return "concat_vectors";
5877 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
5878 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5879 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5880 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5881 case ISD::CARRY_FALSE: return "carry_false";
5882 case ISD::ADDC: return "addc";
5883 case ISD::ADDE: return "adde";
5884 case ISD::SADDO: return "saddo";
5885 case ISD::UADDO: return "uaddo";
5886 case ISD::SSUBO: return "ssubo";
5887 case ISD::USUBO: return "usubo";
5888 case ISD::SMULO: return "smulo";
5889 case ISD::UMULO: return "umulo";
5890 case ISD::SUBC: return "subc";
5891 case ISD::SUBE: return "sube";
5892 case ISD::SHL_PARTS: return "shl_parts";
5893 case ISD::SRA_PARTS: return "sra_parts";
5894 case ISD::SRL_PARTS: return "srl_parts";
5896 // Conversion operators.
5897 case ISD::SIGN_EXTEND: return "sign_extend";
5898 case ISD::ZERO_EXTEND: return "zero_extend";
5899 case ISD::ANY_EXTEND: return "any_extend";
5900 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5901 case ISD::TRUNCATE: return "truncate";
5902 case ISD::FP_ROUND: return "fp_round";
5903 case ISD::FLT_ROUNDS_: return "flt_rounds";
5904 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5905 case ISD::FP_EXTEND: return "fp_extend";
5907 case ISD::SINT_TO_FP: return "sint_to_fp";
5908 case ISD::UINT_TO_FP: return "uint_to_fp";
5909 case ISD::FP_TO_SINT: return "fp_to_sint";
5910 case ISD::FP_TO_UINT: return "fp_to_uint";
5911 case ISD::BITCAST: return "bitcast";
5912 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5913 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5915 case ISD::CONVERT_RNDSAT: {
5916 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5917 default: llvm_unreachable("Unknown cvt code!");
5918 case ISD::CVT_FF: return "cvt_ff";
5919 case ISD::CVT_FS: return "cvt_fs";
5920 case ISD::CVT_FU: return "cvt_fu";
5921 case ISD::CVT_SF: return "cvt_sf";
5922 case ISD::CVT_UF: return "cvt_uf";
5923 case ISD::CVT_SS: return "cvt_ss";
5924 case ISD::CVT_SU: return "cvt_su";
5925 case ISD::CVT_US: return "cvt_us";
5926 case ISD::CVT_UU: return "cvt_uu";
5930 // Control flow instructions
5931 case ISD::BR: return "br";
5932 case ISD::BRIND: return "brind";
5933 case ISD::BR_JT: return "br_jt";
5934 case ISD::BRCOND: return "brcond";
5935 case ISD::BR_CC: return "br_cc";
5936 case ISD::CALLSEQ_START: return "callseq_start";
5937 case ISD::CALLSEQ_END: return "callseq_end";
5940 case ISD::LOAD: return "load";
5941 case ISD::STORE: return "store";
5942 case ISD::VAARG: return "vaarg";
5943 case ISD::VACOPY: return "vacopy";
5944 case ISD::VAEND: return "vaend";
5945 case ISD::VASTART: return "vastart";
5946 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5947 case ISD::EXTRACT_ELEMENT: return "extract_element";
5948 case ISD::BUILD_PAIR: return "build_pair";
5949 case ISD::STACKSAVE: return "stacksave";
5950 case ISD::STACKRESTORE: return "stackrestore";
5951 case ISD::TRAP: return "trap";
5954 case ISD::BSWAP: return "bswap";
5955 case ISD::CTPOP: return "ctpop";
5956 case ISD::CTTZ: return "cttz";
5957 case ISD::CTLZ: return "ctlz";
5960 case ISD::TRAMPOLINE: return "trampoline";
5963 switch (cast<CondCodeSDNode>(this)->get()) {
5964 default: llvm_unreachable("Unknown setcc condition!");
5965 case ISD::SETOEQ: return "setoeq";
5966 case ISD::SETOGT: return "setogt";
5967 case ISD::SETOGE: return "setoge";
5968 case ISD::SETOLT: return "setolt";
5969 case ISD::SETOLE: return "setole";
5970 case ISD::SETONE: return "setone";
5972 case ISD::SETO: return "seto";
5973 case ISD::SETUO: return "setuo";
5974 case ISD::SETUEQ: return "setue";
5975 case ISD::SETUGT: return "setugt";
5976 case ISD::SETUGE: return "setuge";
5977 case ISD::SETULT: return "setult";
5978 case ISD::SETULE: return "setule";
5979 case ISD::SETUNE: return "setune";
5981 case ISD::SETEQ: return "seteq";
5982 case ISD::SETGT: return "setgt";
5983 case ISD::SETGE: return "setge";
5984 case ISD::SETLT: return "setlt";
5985 case ISD::SETLE: return "setle";
5986 case ISD::SETNE: return "setne";
5991 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
6000 return "<post-inc>";
6002 return "<post-dec>";
6006 std::string ISD::ArgFlagsTy::getArgFlagsString() {
6007 std::string S = "< ";
6021 if (getByValAlign())
6022 S += "byval-align:" + utostr(getByValAlign()) + " ";
6024 S += "orig-align:" + utostr(getOrigAlign()) + " ";
6026 S += "byval-size:" + utostr(getByValSize()) + " ";
6030 void SDNode::dump() const { dump(0); }
6031 void SDNode::dump(const SelectionDAG *G) const {
6036 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
6037 OS << (void*)this << ": ";
6039 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
6041 if (getValueType(i) == MVT::Other)
6044 OS << getValueType(i).getEVTString();
6046 OS << " = " << getOperationName(G);
6049 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
6050 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
6051 if (!MN->memoperands_empty()) {
6054 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
6055 e = MN->memoperands_end(); i != e; ++i) {
6057 if (llvm::next(i) != e)
6062 } else if (const ShuffleVectorSDNode *SVN =
6063 dyn_cast<ShuffleVectorSDNode>(this)) {
6065 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
6066 int Idx = SVN->getMaskElt(i);
6074 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
6075 OS << '<' << CSDN->getAPIntValue() << '>';
6076 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
6077 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
6078 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
6079 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
6080 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
6083 CSDN->getValueAPF().bitcastToAPInt().dump();
6086 } else if (const GlobalAddressSDNode *GADN =
6087 dyn_cast<GlobalAddressSDNode>(this)) {
6088 int64_t offset = GADN->getOffset();
6090 WriteAsOperand(OS, GADN->getGlobal());
6093 OS << " + " << offset;
6095 OS << " " << offset;
6096 if (unsigned int TF = GADN->getTargetFlags())
6097 OS << " [TF=" << TF << ']';
6098 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
6099 OS << "<" << FIDN->getIndex() << ">";
6100 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
6101 OS << "<" << JTDN->getIndex() << ">";
6102 if (unsigned int TF = JTDN->getTargetFlags())
6103 OS << " [TF=" << TF << ']';
6104 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
6105 int offset = CP->getOffset();
6106 if (CP->isMachineConstantPoolEntry())
6107 OS << "<" << *CP->getMachineCPVal() << ">";
6109 OS << "<" << *CP->getConstVal() << ">";
6111 OS << " + " << offset;
6113 OS << " " << offset;
6114 if (unsigned int TF = CP->getTargetFlags())
6115 OS << " [TF=" << TF << ']';
6116 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
6118 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
6120 OS << LBB->getName() << " ";
6121 OS << (const void*)BBDN->getBasicBlock() << ">";
6122 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
6123 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0);
6124 } else if (const ExternalSymbolSDNode *ES =
6125 dyn_cast<ExternalSymbolSDNode>(this)) {
6126 OS << "'" << ES->getSymbol() << "'";
6127 if (unsigned int TF = ES->getTargetFlags())
6128 OS << " [TF=" << TF << ']';
6129 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
6131 OS << "<" << M->getValue() << ">";
6134 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
6136 OS << "<" << MD->getMD() << ">";
6139 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
6140 OS << ":" << N->getVT().getEVTString();
6142 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
6143 OS << "<" << *LD->getMemOperand();
6146 switch (LD->getExtensionType()) {
6147 default: doExt = false; break;
6148 case ISD::EXTLOAD: OS << ", anyext"; break;
6149 case ISD::SEXTLOAD: OS << ", sext"; break;
6150 case ISD::ZEXTLOAD: OS << ", zext"; break;
6153 OS << " from " << LD->getMemoryVT().getEVTString();
6155 const char *AM = getIndexedModeName(LD->getAddressingMode());
6160 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6161 OS << "<" << *ST->getMemOperand();
6163 if (ST->isTruncatingStore())
6164 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6166 const char *AM = getIndexedModeName(ST->getAddressingMode());
6171 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6172 OS << "<" << *M->getMemOperand() << ">";
6173 } else if (const BlockAddressSDNode *BA =
6174 dyn_cast<BlockAddressSDNode>(this)) {
6176 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6178 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6180 if (unsigned int TF = BA->getTargetFlags())
6181 OS << " [TF=" << TF << ']';
6185 if (unsigned Order = G->GetOrdering(this))
6186 OS << " [ORD=" << Order << ']';
6188 if (getNodeId() != -1)
6189 OS << " [ID=" << getNodeId() << ']';
6191 DebugLoc dl = getDebugLoc();
6192 if (G && !dl.isUnknown()) {
6194 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6196 // Omit the directory, since it's usually long and uninteresting.
6198 OS << Scope.getFilename();
6201 OS << ':' << dl.getLine();
6202 if (dl.getCol() != 0)
6203 OS << ':' << dl.getCol();
6207 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6209 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6210 if (i) OS << ", "; else OS << " ";
6211 OS << (void*)getOperand(i).getNode();
6212 if (unsigned RN = getOperand(i).getResNo())
6215 print_details(OS, G);
6218 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6219 const SelectionDAG *G, unsigned depth,
6232 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6233 // Don't follow chain operands.
6234 if (N->getOperand(i).getValueType() == MVT::Other)
6237 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6241 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6242 unsigned depth) const {
6243 printrWithDepthHelper(OS, this, G, depth, 0);
6246 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6247 // Don't print impossibly deep things.
6248 printrWithDepth(OS, G, 10);
6251 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6252 printrWithDepth(dbgs(), G, depth);
6255 void SDNode::dumprFull(const SelectionDAG *G) const {
6256 // Don't print impossibly deep things.
6257 dumprWithDepth(G, 10);
6260 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6261 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6262 if (N->getOperand(i).getNode()->hasOneUse())
6263 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6265 dbgs() << "\n" << std::string(indent+2, ' ')
6266 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6270 dbgs().indent(indent);
6274 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6275 assert(N->getNumValues() == 1 &&
6276 "Can't unroll a vector with multiple results!");
6278 EVT VT = N->getValueType(0);
6279 unsigned NE = VT.getVectorNumElements();
6280 EVT EltVT = VT.getVectorElementType();
6281 DebugLoc dl = N->getDebugLoc();
6283 SmallVector<SDValue, 8> Scalars;
6284 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6286 // If ResNE is 0, fully unroll the vector op.
6289 else if (NE > ResNE)
6293 for (i= 0; i != NE; ++i) {
6294 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6295 SDValue Operand = N->getOperand(j);
6296 EVT OperandVT = Operand.getValueType();
6297 if (OperandVT.isVector()) {
6298 // A vector operand; extract a single element.
6299 EVT OperandEltVT = OperandVT.getVectorElementType();
6300 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6303 getConstant(i, MVT::i32));
6305 // A scalar operand; just use it as is.
6306 Operands[j] = Operand;
6310 switch (N->getOpcode()) {
6312 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6313 &Operands[0], Operands.size()));
6320 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6321 getShiftAmountOperand(Operands[0].getValueType(),
6324 case ISD::SIGN_EXTEND_INREG:
6325 case ISD::FP_ROUND_INREG: {
6326 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6327 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6329 getValueType(ExtVT)));
6334 for (; i < ResNE; ++i)
6335 Scalars.push_back(getUNDEF(EltVT));
6337 return getNode(ISD::BUILD_VECTOR, dl,
6338 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6339 &Scalars[0], Scalars.size());
6343 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6344 /// location that is 'Dist' units away from the location that the 'Base' load
6345 /// is loading from.
6346 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6347 unsigned Bytes, int Dist) const {
6348 if (LD->getChain() != Base->getChain())
6350 EVT VT = LD->getValueType(0);
6351 if (VT.getSizeInBits() / 8 != Bytes)
6354 SDValue Loc = LD->getOperand(1);
6355 SDValue BaseLoc = Base->getOperand(1);
6356 if (Loc.getOpcode() == ISD::FrameIndex) {
6357 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6359 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6360 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6361 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6362 int FS = MFI->getObjectSize(FI);
6363 int BFS = MFI->getObjectSize(BFI);
6364 if (FS != BFS || FS != (int)Bytes) return false;
6365 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6369 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6370 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6373 const GlobalValue *GV1 = NULL;
6374 const GlobalValue *GV2 = NULL;
6375 int64_t Offset1 = 0;
6376 int64_t Offset2 = 0;
6377 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6378 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6379 if (isGA1 && isGA2 && GV1 == GV2)
6380 return Offset1 == (Offset2 + Dist*Bytes);
6385 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6386 /// it cannot be inferred.
6387 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6388 // If this is a GlobalAddress + cst, return the alignment.
6389 const GlobalValue *GV;
6390 int64_t GVOffset = 0;
6391 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6392 // If GV has specified alignment, then use it. Otherwise, use the preferred
6394 unsigned Align = GV->getAlignment();
6396 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6397 if (GVar->hasInitializer()) {
6398 const TargetData *TD = TLI.getTargetData();
6399 Align = TD->getPreferredAlignment(GVar);
6403 return MinAlign(Align, GVOffset);
6406 // If this is a direct reference to a stack slot, use information about the
6407 // stack slot's alignment.
6408 int FrameIdx = 1 << 31;
6409 int64_t FrameOffset = 0;
6410 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6411 FrameIdx = FI->getIndex();
6412 } else if (isBaseWithConstantOffset(Ptr) &&
6413 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6415 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6416 FrameOffset = Ptr.getConstantOperandVal(1);
6419 if (FrameIdx != (1 << 31)) {
6420 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6421 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6429 void SelectionDAG::dump() const {
6430 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6432 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6434 const SDNode *N = I;
6435 if (!N->hasOneUse() && N != getRoot().getNode())
6436 DumpNodes(N, 2, this);
6439 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6444 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6446 print_details(OS, G);
6449 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6450 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6451 const SelectionDAG *G, VisitedSDNodeSet &once) {
6452 if (!once.insert(N)) // If we've been here before, return now.
6455 // Dump the current SDNode, but don't end the line yet.
6456 OS << std::string(indent, ' ');
6459 // Having printed this SDNode, walk the children:
6460 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6461 const SDNode *child = N->getOperand(i).getNode();
6466 if (child->getNumOperands() == 0) {
6467 // This child has no grandchildren; print it inline right here.
6468 child->printr(OS, G);
6470 } else { // Just the address. FIXME: also print the child's opcode.
6472 if (unsigned RN = N->getOperand(i).getResNo())
6479 // Dump children that have grandchildren on their own line(s).
6480 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6481 const SDNode *child = N->getOperand(i).getNode();
6482 DumpNodesr(OS, child, indent+2, G, once);
6486 void SDNode::dumpr() const {
6487 VisitedSDNodeSet once;
6488 DumpNodesr(dbgs(), this, 0, 0, once);
6491 void SDNode::dumpr(const SelectionDAG *G) const {
6492 VisitedSDNodeSet once;
6493 DumpNodesr(dbgs(), this, 0, G, once);
6497 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6498 unsigned GlobalAddressSDNode::getAddressSpace() const {
6499 return getGlobal()->getType()->getAddressSpace();
6503 const Type *ConstantPoolSDNode::getType() const {
6504 if (isMachineConstantPoolEntry())
6505 return Val.MachineCPVal->getType();
6506 return Val.ConstVal->getType();
6509 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6511 unsigned &SplatBitSize,
6513 unsigned MinSplatBits,
6515 EVT VT = getValueType(0);
6516 assert(VT.isVector() && "Expected a vector type");
6517 unsigned sz = VT.getSizeInBits();
6518 if (MinSplatBits > sz)
6521 SplatValue = APInt(sz, 0);
6522 SplatUndef = APInt(sz, 0);
6524 // Get the bits. Bits with undefined values (when the corresponding element
6525 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6526 // in SplatValue. If any of the values are not constant, give up and return
6528 unsigned int nOps = getNumOperands();
6529 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6530 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6532 for (unsigned j = 0; j < nOps; ++j) {
6533 unsigned i = isBigEndian ? nOps-1-j : j;
6534 SDValue OpVal = getOperand(i);
6535 unsigned BitPos = j * EltBitSize;
6537 if (OpVal.getOpcode() == ISD::UNDEF)
6538 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6539 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6540 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6541 zextOrTrunc(sz) << BitPos;
6542 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6543 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6548 // The build_vector is all constants or undefs. Find the smallest element
6549 // size that splats the vector.
6551 HasAnyUndefs = (SplatUndef != 0);
6554 unsigned HalfSize = sz / 2;
6555 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6556 APInt LowValue = SplatValue.trunc(HalfSize);
6557 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6558 APInt LowUndef = SplatUndef.trunc(HalfSize);
6560 // If the two halves do not match (ignoring undef bits), stop here.
6561 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6562 MinSplatBits > HalfSize)
6565 SplatValue = HighValue | LowValue;
6566 SplatUndef = HighUndef & LowUndef;
6575 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6576 // Find the first non-undef value in the shuffle mask.
6578 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6581 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6583 // Make sure all remaining elements are either undef or the same as the first
6585 for (int Idx = Mask[i]; i != e; ++i)
6586 if (Mask[i] >= 0 && Mask[i] != Idx)
6592 static void checkForCyclesHelper(const SDNode *N,
6593 SmallPtrSet<const SDNode*, 32> &Visited,
6594 SmallPtrSet<const SDNode*, 32> &Checked) {
6595 // If this node has already been checked, don't check it again.
6596 if (Checked.count(N))
6599 // If a node has already been visited on this depth-first walk, reject it as
6601 if (!Visited.insert(N)) {
6602 dbgs() << "Offending node:\n";
6604 errs() << "Detected cycle in SelectionDAG\n";
6608 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6609 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6616 void llvm::checkForCycles(const llvm::SDNode *N) {
6618 assert(N && "Checking nonexistant SDNode");
6619 SmallPtrSet<const SDNode*, 32> visited;
6620 SmallPtrSet<const SDNode*, 32> checked;
6621 checkForCyclesHelper(N, visited, checked);
6625 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6626 checkForCycles(DAG->getRoot().getNode());