1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "llvm/Constants.h"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Assembly/Writer.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/Support/MathExtras.h"
20 #include "llvm/Target/MRegisterInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
30 // Temporary boolean for testing the dag combiner
32 extern bool CombinerEnabled;
35 static bool isCommutativeBinOp(unsigned Opcode) {
43 case ISD::XOR: return true;
44 default: return false; // FIXME: Need commutative info for user ops!
48 static bool isAssociativeBinOp(unsigned Opcode) {
54 case ISD::XOR: return true;
55 default: return false; // FIXME: Need associative info for user ops!
59 // isInvertibleForFree - Return true if there is no cost to emitting the logical
60 // inverse of this node.
61 static bool isInvertibleForFree(SDOperand N) {
62 if (isa<ConstantSDNode>(N.Val)) return true;
63 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse())
68 //===----------------------------------------------------------------------===//
69 // ConstantFPSDNode Class
70 //===----------------------------------------------------------------------===//
72 /// isExactlyValue - We don't rely on operator== working on double values, as
73 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
74 /// As such, this method can be used to do an exact bit-for-bit comparison of
75 /// two floating point values.
76 bool ConstantFPSDNode::isExactlyValue(double V) const {
77 return DoubleToBits(V) == DoubleToBits(Value);
80 //===----------------------------------------------------------------------===//
82 //===----------------------------------------------------------------------===//
84 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
85 /// when given the operation for (X op Y).
86 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
87 // To perform this operation, we just need to swap the L and G bits of the
89 unsigned OldL = (Operation >> 2) & 1;
90 unsigned OldG = (Operation >> 1) & 1;
91 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
92 (OldL << 1) | // New G bit
93 (OldG << 2)); // New L bit.
96 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
97 /// 'op' is a valid SetCC operation.
98 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
99 unsigned Operation = Op;
101 Operation ^= 7; // Flip L, G, E bits, but not U.
103 Operation ^= 15; // Flip all of the condition bits.
104 if (Operation > ISD::SETTRUE2)
105 Operation &= ~8; // Don't let N and U bits get set.
106 return ISD::CondCode(Operation);
110 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
111 /// signed operation and 2 if the result is an unsigned comparison. Return zero
112 /// if the operation does not depend on the sign of the input (setne and seteq).
113 static int isSignedOp(ISD::CondCode Opcode) {
115 default: assert(0 && "Illegal integer setcc operation!");
117 case ISD::SETNE: return 0;
121 case ISD::SETGE: return 1;
125 case ISD::SETUGE: return 2;
129 /// getSetCCOrOperation - Return the result of a logical OR between different
130 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
131 /// returns SETCC_INVALID if it is not possible to represent the resultant
133 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
135 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
136 // Cannot fold a signed integer setcc with an unsigned integer setcc.
137 return ISD::SETCC_INVALID;
139 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
141 // If the N and U bits get set then the resultant comparison DOES suddenly
142 // care about orderedness, and is true when ordered.
143 if (Op > ISD::SETTRUE2)
144 Op &= ~16; // Clear the N bit.
145 return ISD::CondCode(Op);
148 /// getSetCCAndOperation - Return the result of a logical AND between different
149 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
150 /// function returns zero if it is not possible to represent the resultant
152 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
154 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
155 // Cannot fold a signed setcc with an unsigned setcc.
156 return ISD::SETCC_INVALID;
158 // Combine all of the condition bits.
159 return ISD::CondCode(Op1 & Op2);
162 const TargetMachine &SelectionDAG::getTarget() const {
163 return TLI.getTargetMachine();
166 //===----------------------------------------------------------------------===//
167 // SelectionDAG Class
168 //===----------------------------------------------------------------------===//
170 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
171 /// SelectionDAG, including nodes (like loads) that have uses of their token
172 /// chain but no other uses and no side effect. If a node is passed in as an
173 /// argument, it is used as the seed for node deletion.
174 void SelectionDAG::RemoveDeadNodes(SDNode *N) {
175 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end());
177 // Create a dummy node (which is not added to allnodes), that adds a reference
178 // to the root node, preventing it from being deleted.
179 HandleSDNode Dummy(getRoot());
181 // If we have a hint to start from, use it.
182 if (N) DeleteNodeIfDead(N, &AllNodeSet);
185 unsigned NumNodes = AllNodeSet.size();
186 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end();
188 // Try to delete this node.
189 DeleteNodeIfDead(*I, &AllNodeSet);
191 // If we actually deleted any nodes, do not use invalid iterators in
193 if (AllNodeSet.size() != NumNodes)
198 if (AllNodes.size() != NumNodes)
199 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end());
201 // If the root changed (e.g. it was a dead load, update the root).
202 setRoot(Dummy.getValue());
206 void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) {
210 // Okay, we really are going to delete this node. First take this out of the
211 // appropriate CSE map.
212 RemoveNodeFromCSEMaps(N);
214 // Next, brutally remove the operand list. This is safe to do, as there are
215 // no cycles in the graph.
216 while (!N->Operands.empty()) {
217 SDNode *O = N->Operands.back().Val;
218 N->Operands.pop_back();
221 // Now that we removed this operand, see if there are no uses of it left.
222 DeleteNodeIfDead(O, NodeSet);
225 // Remove the node from the nodes set and delete it.
226 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet;
229 // Now that the node is gone, check to see if any of the operands of this node
234 void SelectionDAG::DeleteNode(SDNode *N) {
235 assert(N->use_empty() && "Cannot delete a node that is not dead!");
237 // First take this out of the appropriate CSE map.
238 RemoveNodeFromCSEMaps(N);
240 // Finally, remove uses due to operands of this node, remove from the
241 // AllNodes list, and delete the node.
242 DeleteNodeNotInCSEMaps(N);
245 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
247 // Remove it from the AllNodes list.
248 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) {
249 assert(I != AllNodes.end() && "Node not in AllNodes list??");
251 // Erase from the vector, which is not ordered.
252 std::swap(*I, AllNodes.back());
258 // Drop all of the operands and decrement used nodes use counts.
259 while (!N->Operands.empty()) {
260 SDNode *O = N->Operands.back().Val;
261 N->Operands.pop_back();
268 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
269 /// correspond to it. This is useful when we're about to delete or repurpose
270 /// the node. We don't want future request for structurally identical nodes
271 /// to return N anymore.
272 void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
274 switch (N->getOpcode()) {
275 case ISD::HANDLENODE: return; // noop.
277 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(),
278 N->getValueType(0)));
280 case ISD::TargetConstant:
281 Erased = TargetConstants.erase(std::make_pair(
282 cast<ConstantSDNode>(N)->getValue(),
283 N->getValueType(0)));
285 case ISD::ConstantFP: {
286 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue());
287 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0)));
291 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
292 "Cond code doesn't exist!");
293 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
294 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
296 case ISD::GlobalAddress:
297 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
299 case ISD::TargetGlobalAddress:
300 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal());
302 case ISD::FrameIndex:
303 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
305 case ISD::TargetFrameIndex:
306 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex());
308 case ISD::ConstantPool:
309 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
311 case ISD::TargetConstantPool:
312 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get());
314 case ISD::BasicBlock:
315 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock());
317 case ISD::ExternalSymbol:
318 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
321 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0;
322 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0;
325 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(),
326 N->getValueType(0)));
328 case ISD::SRCVALUE: {
329 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N);
330 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset()));
334 Erased = Loads.erase(std::make_pair(N->getOperand(1),
335 std::make_pair(N->getOperand(0),
336 N->getValueType(0))));
339 if (N->getNumValues() == 1) {
340 if (N->getNumOperands() == 0) {
341 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(),
342 N->getValueType(0)));
343 } else if (N->getNumOperands() == 1) {
345 UnaryOps.erase(std::make_pair(N->getOpcode(),
346 std::make_pair(N->getOperand(0),
347 N->getValueType(0))));
348 } else if (N->getNumOperands() == 2) {
350 BinaryOps.erase(std::make_pair(N->getOpcode(),
351 std::make_pair(N->getOperand(0),
354 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
356 OneResultNodes.erase(std::make_pair(N->getOpcode(),
357 std::make_pair(N->getValueType(0),
361 // Remove the node from the ArbitraryNodes map.
362 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
363 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
365 ArbitraryNodes.erase(std::make_pair(N->getOpcode(),
366 std::make_pair(RV, Ops)));
371 // Verify that the node was actually in one of the CSE maps, unless it has a
372 // flag result (which cannot be CSE'd) or is one of the special cases that are
373 // not subject to CSE.
374 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
375 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START &&
376 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) {
379 assert(0 && "Node is not in map!");
384 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
385 /// has been taken out and modified in some way. If the specified node already
386 /// exists in the CSE maps, do not modify the maps, but return the existing node
387 /// instead. If it doesn't exist, add it and return null.
389 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
390 assert(N->getNumOperands() && "This is a leaf node!");
391 if (N->getOpcode() == ISD::LOAD) {
392 SDNode *&L = Loads[std::make_pair(N->getOperand(1),
393 std::make_pair(N->getOperand(0),
394 N->getValueType(0)))];
397 } else if (N->getOpcode() == ISD::HANDLENODE) {
398 return 0; // never add it.
399 } else if (N->getNumOperands() == 1) {
400 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(),
401 std::make_pair(N->getOperand(0),
402 N->getValueType(0)))];
405 } else if (N->getNumOperands() == 2) {
406 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(),
407 std::make_pair(N->getOperand(0),
411 } else if (N->getNumValues() == 1) {
412 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
413 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(),
414 std::make_pair(N->getValueType(0), Ops))];
418 // Remove the node from the ArbitraryNodes map.
419 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end());
420 std::vector<SDOperand> Ops(N->op_begin(), N->op_end());
421 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(),
422 std::make_pair(RV, Ops))];
432 SelectionDAG::~SelectionDAG() {
433 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i)
437 SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) {
438 if (Op.getValueType() == VT) return Op;
439 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT));
440 return getNode(ISD::AND, Op.getValueType(), Op,
441 getConstant(Imm, Op.getValueType()));
444 SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) {
445 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
446 // Mask out any bits that are not valid for this constant.
448 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
450 SDNode *&N = Constants[std::make_pair(Val, VT)];
451 if (N) return SDOperand(N, 0);
452 N = new ConstantSDNode(false, Val, VT);
453 AllNodes.push_back(N);
454 return SDOperand(N, 0);
457 SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) {
458 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!");
459 // Mask out any bits that are not valid for this constant.
461 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1;
463 SDNode *&N = TargetConstants[std::make_pair(Val, VT)];
464 if (N) return SDOperand(N, 0);
465 N = new ConstantSDNode(true, Val, VT);
466 AllNodes.push_back(N);
467 return SDOperand(N, 0);
470 SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) {
471 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!");
473 Val = (float)Val; // Mask out extra precision.
475 // Do the map lookup using the actual bit pattern for the floating point
476 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
477 // we don't have issues with SNANs.
478 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)];
479 if (N) return SDOperand(N, 0);
480 N = new ConstantFPSDNode(Val, VT);
481 AllNodes.push_back(N);
482 return SDOperand(N, 0);
487 SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
489 SDNode *&N = GlobalValues[GV];
490 if (N) return SDOperand(N, 0);
491 N = new GlobalAddressSDNode(false, GV, VT);
492 AllNodes.push_back(N);
493 return SDOperand(N, 0);
496 SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV,
498 SDNode *&N = TargetGlobalValues[GV];
499 if (N) return SDOperand(N, 0);
500 N = new GlobalAddressSDNode(true, GV, VT);
501 AllNodes.push_back(N);
502 return SDOperand(N, 0);
505 SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) {
506 SDNode *&N = FrameIndices[FI];
507 if (N) return SDOperand(N, 0);
508 N = new FrameIndexSDNode(FI, VT, false);
509 AllNodes.push_back(N);
510 return SDOperand(N, 0);
513 SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) {
514 SDNode *&N = TargetFrameIndices[FI];
515 if (N) return SDOperand(N, 0);
516 N = new FrameIndexSDNode(FI, VT, true);
517 AllNodes.push_back(N);
518 return SDOperand(N, 0);
521 SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) {
522 SDNode *&N = ConstantPoolIndices[C];
523 if (N) return SDOperand(N, 0);
524 N = new ConstantPoolSDNode(C, VT, false);
525 AllNodes.push_back(N);
526 return SDOperand(N, 0);
529 SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) {
530 SDNode *&N = TargetConstantPoolIndices[C];
531 if (N) return SDOperand(N, 0);
532 N = new ConstantPoolSDNode(C, VT, true);
533 AllNodes.push_back(N);
534 return SDOperand(N, 0);
537 SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
538 SDNode *&N = BBNodes[MBB];
539 if (N) return SDOperand(N, 0);
540 N = new BasicBlockSDNode(MBB);
541 AllNodes.push_back(N);
542 return SDOperand(N, 0);
545 SDOperand SelectionDAG::getValueType(MVT::ValueType VT) {
546 if ((unsigned)VT >= ValueTypeNodes.size())
547 ValueTypeNodes.resize(VT+1);
548 if (ValueTypeNodes[VT] == 0) {
549 ValueTypeNodes[VT] = new VTSDNode(VT);
550 AllNodes.push_back(ValueTypeNodes[VT]);
553 return SDOperand(ValueTypeNodes[VT], 0);
556 SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) {
557 SDNode *&N = ExternalSymbols[Sym];
558 if (N) return SDOperand(N, 0);
559 N = new ExternalSymbolSDNode(Sym, VT);
560 AllNodes.push_back(N);
561 return SDOperand(N, 0);
564 SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
565 if ((unsigned)Cond >= CondCodeNodes.size())
566 CondCodeNodes.resize(Cond+1);
568 if (CondCodeNodes[Cond] == 0) {
569 CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
570 AllNodes.push_back(CondCodeNodes[Cond]);
572 return SDOperand(CondCodeNodes[Cond], 0);
575 SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) {
576 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)];
578 Reg = new RegisterSDNode(RegNo, VT);
579 AllNodes.push_back(Reg);
581 return SDOperand(Reg, 0);
584 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
585 /// this predicate to simplify operations downstream. V and Mask are known to
586 /// be the same type.
587 static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
588 const TargetLowering &TLI) {
590 if (Mask == 0) return true;
592 // If we know the result of a setcc has the top bits zero, use this info.
593 switch (Op.getOpcode()) {
595 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
598 return ((Mask & 1) == 0) &&
599 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
602 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
603 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
604 case ISD::ZERO_EXTEND:
605 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
606 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
607 case ISD::AssertZext:
608 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
609 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
611 // (X & C1) & C2 == 0 iff C1 & C2 == 0.
612 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
613 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
618 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
619 MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
621 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
622 MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
624 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
625 MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
627 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
628 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
629 uint64_t NewVal = Mask << ShAmt->getValue();
630 SrcBits = MVT::getSizeInBits(Op.getValueType());
631 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
632 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
636 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
637 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
638 uint64_t NewVal = Mask >> ShAmt->getValue();
639 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
645 // Bit counting instructions can not set the high bits of the result
646 // register. The max number of bits sets depends on the input.
647 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
649 // TODO we could handle some SRA cases here.
658 SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1,
659 SDOperand N2, ISD::CondCode Cond) {
660 // These setcc operations always fold.
664 case ISD::SETFALSE2: return getConstant(0, VT);
666 case ISD::SETTRUE2: return getConstant(1, VT);
669 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
670 uint64_t C2 = N2C->getValue();
671 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
672 uint64_t C1 = N1C->getValue();
674 // Sign extend the operands if required
675 if (ISD::isSignedIntSetCC(Cond)) {
676 C1 = N1C->getSignExtended();
677 C2 = N2C->getSignExtended();
681 default: assert(0 && "Unknown integer setcc!");
682 case ISD::SETEQ: return getConstant(C1 == C2, VT);
683 case ISD::SETNE: return getConstant(C1 != C2, VT);
684 case ISD::SETULT: return getConstant(C1 < C2, VT);
685 case ISD::SETUGT: return getConstant(C1 > C2, VT);
686 case ISD::SETULE: return getConstant(C1 <= C2, VT);
687 case ISD::SETUGE: return getConstant(C1 >= C2, VT);
688 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT);
689 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT);
690 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT);
691 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT);
694 // If the LHS is a ZERO_EXTEND, perform the comparison on the input.
695 if (N1.getOpcode() == ISD::ZERO_EXTEND) {
696 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType());
698 // If the comparison constant has bits in the upper part, the
699 // zero-extended value could never match.
700 if (C2 & (~0ULL << InSize)) {
701 unsigned VSize = MVT::getSizeInBits(N1.getValueType());
705 case ISD::SETEQ: return getConstant(0, VT);
708 case ISD::SETNE: return getConstant(1, VT);
711 // True if the sign bit of C2 is set.
712 return getConstant((C2 & (1ULL << VSize)) != 0, VT);
715 // True if the sign bit of C2 isn't set.
716 return getConstant((C2 & (1ULL << VSize)) == 0, VT);
722 // Otherwise, we can perform the comparison with the low bits.
730 return getSetCC(VT, N1.getOperand(0),
731 getConstant(C2, N1.getOperand(0).getValueType()),
734 break; // todo, be more careful with signed comparisons
736 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
737 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
738 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT();
739 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
740 MVT::ValueType ExtDstTy = N1.getValueType();
741 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
743 // If the extended part has any inconsistent bits, it cannot ever
744 // compare equal. In other words, they have to be all ones or all
747 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
748 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits)
749 return getConstant(Cond == ISD::SETNE, VT);
751 // Otherwise, make this a use of a zext.
752 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy),
753 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy),
757 uint64_t MinVal, MaxVal;
758 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0));
759 if (ISD::isSignedIntSetCC(Cond)) {
760 MinVal = 1ULL << (OperandBitSize-1);
761 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
762 MaxVal = ~0ULL >> (65-OperandBitSize);
767 MaxVal = ~0ULL >> (64-OperandBitSize);
770 // Canonicalize GE/LE comparisons to use GT/LT comparisons.
771 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
772 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true
773 --C2; // X >= C1 --> X > (C1-1)
774 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
775 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
778 if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
779 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true
780 ++C2; // X <= C1 --> X < (C1+1)
781 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()),
782 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
785 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal)
786 return getConstant(0, VT); // X < MIN --> false
788 // Canonicalize setgt X, Min --> setne X, Min
789 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal)
790 return getSetCC(VT, N1, N2, ISD::SETNE);
792 // If we have setult X, 1, turn it into seteq X, 0
793 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1)
794 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()),
796 // If we have setugt X, Max-1, turn it into seteq X, Max
797 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1)
798 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()),
801 // If we have "setcc X, C1", check to see if we can shrink the immediate
804 // SETUGT X, SINTMAX -> SETLT X, 0
805 if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
806 C2 == (~0ULL >> (65-OperandBitSize)))
807 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT);
809 // FIXME: Implement the rest of these.
812 // Fold bit comparisons when we can.
813 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
814 VT == N1.getValueType() && N1.getOpcode() == ISD::AND)
815 if (ConstantSDNode *AndRHS =
816 dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
817 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
818 // Perform the xform if the AND RHS is a single bit.
819 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
820 return getNode(ISD::SRL, VT, N1,
821 getConstant(Log2_64(AndRHS->getValue()),
822 TLI.getShiftAmountTy()));
824 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) {
825 // (X & 8) == 8 --> (X & 8) >> 3
826 // Perform the xform if C2 is a single bit.
827 if ((C2 & (C2-1)) == 0) {
828 return getNode(ISD::SRL, VT, N1,
829 getConstant(Log2_64(C2),TLI.getShiftAmountTy()));
834 } else if (isa<ConstantSDNode>(N1.Val)) {
835 // Ensure that the constant occurs on the RHS.
836 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
839 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val))
840 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
841 double C1 = N1C->getValue(), C2 = N2C->getValue();
844 default: break; // FIXME: Implement the rest of these!
845 case ISD::SETEQ: return getConstant(C1 == C2, VT);
846 case ISD::SETNE: return getConstant(C1 != C2, VT);
847 case ISD::SETLT: return getConstant(C1 < C2, VT);
848 case ISD::SETGT: return getConstant(C1 > C2, VT);
849 case ISD::SETLE: return getConstant(C1 <= C2, VT);
850 case ISD::SETGE: return getConstant(C1 >= C2, VT);
853 // Ensure that the constant occurs on the RHS.
854 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
857 if (!CombinerEnabled) {
859 // We can always fold X == Y for integer setcc's.
860 if (MVT::isInteger(N1.getValueType()))
861 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
862 unsigned UOF = ISD::getUnorderedFlavor(Cond);
863 if (UOF == 2) // FP operators that are undefined on NaNs.
864 return getConstant(ISD::isTrueWhenEqual(Cond), VT);
865 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
866 return getConstant(UOF, VT);
867 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
868 // if it is not already.
869 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO;
871 return getSetCC(VT, N1, N2, NewCond);
874 if (Cond == ISD::SETEQ || Cond == ISD::SETNE) {
875 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
876 N1.getOpcode() == ISD::XOR) {
877 // Simplify (X+Y) == (X+Z) --> Y == Z
878 if (N1.getOpcode() == N2.getOpcode()) {
879 if (N1.getOperand(0) == N2.getOperand(0))
880 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
881 if (N1.getOperand(1) == N2.getOperand(1))
882 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond);
883 if (isCommutativeBinOp(N1.getOpcode())) {
884 // If X op Y == Y op X, try other combinations.
885 if (N1.getOperand(0) == N2.getOperand(1))
886 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond);
887 if (N1.getOperand(1) == N2.getOperand(0))
888 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond);
892 // FIXME: move this stuff to the DAG Combiner when it exists!
894 // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes.
895 if (N1.getOpcode() == ISD::XOR)
896 if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
897 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N2)) {
898 // If we know that all of the inverted bits are zero, don't bother
899 // performing the inversion.
900 if (MaskedValueIsZero(N1.getOperand(0), ~XORC->getValue(), TLI))
901 return getSetCC(VT, N1.getOperand(0),
902 getConstant(XORC->getValue()^RHSC->getValue(),
903 N1.getValueType()), Cond);
906 // Simplify (X+Z) == X --> Z == 0
907 if (N1.getOperand(0) == N2)
908 return getSetCC(VT, N1.getOperand(1),
909 getConstant(0, N1.getValueType()), Cond);
910 if (N1.getOperand(1) == N2) {
911 if (isCommutativeBinOp(N1.getOpcode()))
912 return getSetCC(VT, N1.getOperand(0),
913 getConstant(0, N1.getValueType()), Cond);
915 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
916 // (Z-X) == X --> Z == X<<1
917 return getSetCC(VT, N1.getOperand(0),
918 getNode(ISD::SHL, N2.getValueType(),
919 N2, getConstant(1, TLI.getShiftAmountTy())),
925 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
926 N2.getOpcode() == ISD::XOR) {
927 // Simplify X == (X+Z) --> Z == 0
928 if (N2.getOperand(0) == N1) {
929 return getSetCC(VT, N2.getOperand(1),
930 getConstant(0, N2.getValueType()), Cond);
931 } else if (N2.getOperand(1) == N1) {
932 if (isCommutativeBinOp(N2.getOpcode())) {
933 return getSetCC(VT, N2.getOperand(0),
934 getConstant(0, N2.getValueType()), Cond);
936 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
937 // X == (Z-X) --> X<<1 == Z
938 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1,
939 getConstant(1, TLI.getShiftAmountTy())),
940 N2.getOperand(0), Cond);
946 // Fold away ALL boolean setcc's.
947 if (N1.getValueType() == MVT::i1) {
949 default: assert(0 && "Unknown integer setcc!");
950 case ISD::SETEQ: // X == Y -> (X^Y)^1
951 N1 = getNode(ISD::XOR, MVT::i1,
952 getNode(ISD::XOR, MVT::i1, N1, N2),
953 getConstant(1, MVT::i1));
955 case ISD::SETNE: // X != Y --> (X^Y)
956 N1 = getNode(ISD::XOR, MVT::i1, N1, N2);
958 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
959 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
960 N1 = getNode(ISD::AND, MVT::i1, N2,
961 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
963 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
964 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
965 N1 = getNode(ISD::AND, MVT::i1, N1,
966 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
968 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
969 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
970 N1 = getNode(ISD::OR, MVT::i1, N2,
971 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1)));
973 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
974 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
975 N1 = getNode(ISD::OR, MVT::i1, N1,
976 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1)));
980 N1 = getNode(ISD::ZERO_EXTEND, VT, N1);
984 // Could not fold it.
988 SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2,
989 SDOperand N3, SDOperand N4,
991 MVT::ValueType VT = N3.getValueType();
992 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
993 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
994 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
995 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val);
997 // Check to see if we can simplify the select into an fabs node
998 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) {
999 // Allow either -0.0 or 0.0
1000 if (CFP->getValue() == 0.0) {
1001 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
1002 if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
1003 N1 == N3 && N4.getOpcode() == ISD::FNEG &&
1004 N1 == N4.getOperand(0))
1005 return getNode(ISD::FABS, VT, N1);
1007 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs
1008 if ((CC == ISD::SETLT || CC == ISD::SETLE) &&
1009 N1 == N4 && N3.getOpcode() == ISD::FNEG &&
1010 N3.getOperand(0) == N4)
1011 return getNode(ISD::FABS, VT, N4);
1015 // check to see if we're select_cc'ing a select_cc.
1016 // this allows us to turn:
1017 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false ->
1018 // select_cc cc, lhs, rhs, true, false
1019 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) ||
1020 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) &&
1021 (CC == ISD::SETEQ || CC == ISD::SETNE)) {
1022 SDOperand SCC = N1C ? N2 : N1;
1023 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2));
1024 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3));
1025 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) {
1026 if (CC == ISD::SETEQ) std::swap(N3, N4);
1027 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0),
1028 SCC.getOperand(1), N3, N4, SCC.getOperand(4));
1032 // Check to see if we can perform the "gzip trick", transforming
1033 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
1034 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() &&
1035 MVT::isInteger(N1.getValueType()) &&
1036 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) {
1037 MVT::ValueType XType = N1.getValueType();
1038 MVT::ValueType AType = N3.getValueType();
1039 if (XType >= AType) {
1040 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a
1041 // single-bit constant. FIXME: remove once the dag combiner
1043 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) {
1044 unsigned ShCtV = Log2_64(N3C->getValue());
1045 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1;
1046 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy());
1047 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt);
1049 Shift = getNode(ISD::TRUNCATE, AType, Shift);
1050 return getNode(ISD::AND, AType, Shift, N3);
1052 SDOperand Shift = getNode(ISD::SRA, XType, N1,
1053 getConstant(MVT::getSizeInBits(XType)-1,
1054 TLI.getShiftAmountTy()));
1056 Shift = getNode(ISD::TRUNCATE, AType, Shift);
1057 return getNode(ISD::AND, AType, Shift, N3);
1061 // Check to see if this is the equivalent of setcc
1062 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) {
1063 MVT::ValueType XType = N1.getValueType();
1064 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) {
1065 SDOperand Res = getSetCC(TLI.getSetCCResultTy(), N1, N2, CC);
1066 if (Res.getValueType() != VT)
1067 Res = getNode(ISD::ZERO_EXTEND, VT, Res);
1071 // seteq X, 0 -> srl (ctlz X, log2(size(X)))
1072 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ &&
1073 TLI.isOperationLegal(ISD::CTLZ, XType)) {
1074 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1);
1075 return getNode(ISD::SRL, XType, Ctlz,
1076 getConstant(Log2_32(MVT::getSizeInBits(XType)),
1077 TLI.getShiftAmountTy()));
1079 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1)
1080 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) {
1081 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1);
1082 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType));
1083 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1),
1084 getConstant(MVT::getSizeInBits(XType)-1,
1085 TLI.getShiftAmountTy()));
1087 // setgt X, -1 -> xor (srl (X, size(X)-1), 1)
1088 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) {
1089 SDOperand Sign = getNode(ISD::SRL, XType, N1,
1090 getConstant(MVT::getSizeInBits(XType)-1,
1091 TLI.getShiftAmountTy()));
1092 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType));
1096 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X ->
1097 // Y = sra (X, size(X)-1); xor (add (X, Y), Y)
1098 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) &&
1099 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) {
1100 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) {
1101 MVT::ValueType XType = N1.getValueType();
1102 if (SubC->isNullValue() && MVT::isInteger(XType)) {
1103 SDOperand Shift = getNode(ISD::SRA, XType, N1,
1104 getConstant(MVT::getSizeInBits(XType)-1,
1105 TLI.getShiftAmountTy()));
1106 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift),
1112 // Could not fold it.
1116 /// getNode - Gets or creates the specified node.
1118 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) {
1119 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)];
1121 N = new SDNode(Opcode, VT);
1122 AllNodes.push_back(N);
1124 return SDOperand(N, 0);
1127 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1128 SDOperand Operand) {
1129 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1130 uint64_t Val = C->getValue();
1133 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT);
1134 case ISD::ANY_EXTEND:
1135 case ISD::ZERO_EXTEND: return getConstant(Val, VT);
1136 case ISD::TRUNCATE: return getConstant(Val, VT);
1137 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT);
1138 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT);
1142 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val))
1145 return getConstantFP(-C->getValue(), VT);
1147 case ISD::FP_EXTEND:
1148 return getConstantFP(C->getValue(), VT);
1149 case ISD::FP_TO_SINT:
1150 return getConstant((int64_t)C->getValue(), VT);
1151 case ISD::FP_TO_UINT:
1152 return getConstant((uint64_t)C->getValue(), VT);
1155 unsigned OpOpcode = Operand.Val->getOpcode();
1157 case ISD::TokenFactor:
1158 return Operand; // Factor of one node? No factor.
1159 case ISD::SIGN_EXTEND:
1160 if (Operand.getValueType() == VT) return Operand; // noop extension
1161 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
1162 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1164 case ISD::ZERO_EXTEND:
1165 if (Operand.getValueType() == VT) return Operand; // noop extension
1166 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
1167 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
1169 case ISD::ANY_EXTEND:
1170 if (Operand.getValueType() == VT) return Operand; // noop extension
1171 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
1172 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
1173 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1176 if (Operand.getValueType() == VT) return Operand; // noop truncate
1177 if (OpOpcode == ISD::TRUNCATE)
1178 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1179 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
1180 OpOpcode == ISD::ANY_EXTEND) {
1181 // If the source is smaller than the dest, we still need an extend.
1182 if (Operand.Val->getOperand(0).getValueType() < VT)
1183 return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
1184 else if (Operand.Val->getOperand(0).getValueType() > VT)
1185 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
1187 return Operand.Val->getOperand(0);
1191 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
1192 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1),
1193 Operand.Val->getOperand(0));
1194 if (OpOpcode == ISD::FNEG) // --X -> X
1195 return Operand.Val->getOperand(0);
1198 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
1199 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
1204 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
1205 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))];
1206 if (E) return SDOperand(E, 0);
1207 E = N = new SDNode(Opcode, Operand);
1209 N = new SDNode(Opcode, Operand);
1211 N->setValueTypes(VT);
1212 AllNodes.push_back(N);
1213 return SDOperand(N, 0);
1218 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1219 SDOperand N1, SDOperand N2) {
1222 case ISD::TokenFactor:
1223 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
1224 N2.getValueType() == MVT::Other && "Invalid token factor!");
1233 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!");
1240 assert(MVT::isInteger(N1.getValueType()) && "Should use F* for FP ops");
1247 assert(N1.getValueType() == N2.getValueType() &&
1248 N1.getValueType() == VT && "Binary operator types must match!");
1254 assert(VT == N1.getValueType() &&
1255 "Shift operators return type must be the same as their first arg");
1256 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
1257 VT != MVT::i1 && "Shifts only work on integers");
1259 case ISD::FP_ROUND_INREG: {
1260 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1261 assert(VT == N1.getValueType() && "Not an inreg round!");
1262 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) &&
1263 "Cannot FP_ROUND_INREG integer types");
1264 assert(EVT <= VT && "Not rounding down!");
1267 case ISD::AssertSext:
1268 case ISD::AssertZext:
1269 case ISD::SIGN_EXTEND_INREG: {
1270 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1271 assert(VT == N1.getValueType() && "Not an inreg extend!");
1272 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) &&
1273 "Cannot *_EXTEND_INREG FP types");
1274 assert(EVT <= VT && "Not extending!");
1281 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1282 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1285 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue();
1287 case ISD::ADD: return getConstant(C1 + C2, VT);
1288 case ISD::SUB: return getConstant(C1 - C2, VT);
1289 case ISD::MUL: return getConstant(C1 * C2, VT);
1291 if (C2) return getConstant(C1 / C2, VT);
1294 if (C2) return getConstant(C1 % C2, VT);
1297 if (C2) return getConstant(N1C->getSignExtended() /
1298 N2C->getSignExtended(), VT);
1301 if (C2) return getConstant(N1C->getSignExtended() %
1302 N2C->getSignExtended(), VT);
1304 case ISD::AND : return getConstant(C1 & C2, VT);
1305 case ISD::OR : return getConstant(C1 | C2, VT);
1306 case ISD::XOR : return getConstant(C1 ^ C2, VT);
1307 case ISD::SHL : return getConstant(C1 << C2, VT);
1308 case ISD::SRL : return getConstant(C1 >> C2, VT);
1309 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT);
1312 } else { // Cannonicalize constant to RHS if commutative
1313 if (isCommutativeBinOp(Opcode)) {
1314 std::swap(N1C, N2C);
1319 if (!CombinerEnabled) {
1322 case ISD::SHL: // shl 0, X -> 0
1323 if (N1C->isNullValue()) return N1;
1325 case ISD::SRL: // srl 0, X -> 0
1326 if (N1C->isNullValue()) return N1;
1328 case ISD::SRA: // sra -1, X -> -1
1329 if (N1C->isAllOnesValue()) return N1;
1331 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT
1332 // Extending a constant? Just return the extended constant.
1333 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1);
1334 return getNode(ISD::SIGN_EXTEND, VT, Tmp);
1339 if (!CombinerEnabled) {
1341 uint64_t C2 = N2C->getValue();
1345 if (!C2) return N1; // add X, 0 -> X
1348 if (!C2) return N1; // sub X, 0 -> X
1349 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT));
1351 if (!C2) return N2; // mul X, 0 -> 0
1352 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X
1353 return getNode(ISD::SUB, VT, getConstant(0, VT), N1);
1355 // FIXME: Move this to the DAG combiner when it exists.
1356 if ((C2 & C2-1) == 0) {
1357 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1358 return getNode(ISD::SHL, VT, N1, ShAmt);
1364 if (!C2) return N2; // mul X, 0 -> 0
1366 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0
1367 return getConstant(0, VT);
1369 // Many others could be handled here, including -1, powers of 2, etc.
1373 // FIXME: Move this to the DAG combiner when it exists.
1374 if ((C2 & C2-1) == 0 && C2) {
1375 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy());
1376 return getNode(ISD::SRL, VT, N1, ShAmt);
1383 // If the shift amount is bigger than the size of the data, then all the
1384 // bits are shifted out. Simplify to undef.
1385 if (C2 >= MVT::getSizeInBits(N1.getValueType())) {
1386 return getNode(ISD::UNDEF, N1.getValueType());
1388 if (C2 == 0) return N1;
1390 if (Opcode == ISD::SRA) {
1391 // If the sign bit is known to be zero, switch this to a SRL.
1392 if (MaskedValueIsZero(N1,
1393 1ULL << (MVT::getSizeInBits(N1.getValueType())-1),
1395 return getNode(ISD::SRL, N1.getValueType(), N1, N2);
1397 // If the part left over is known to be zero, the whole thing is zero.
1398 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType()));
1399 if (Opcode == ISD::SRL) {
1400 if (MaskedValueIsZero(N1, TypeMask << C2, TLI))
1401 return getConstant(0, N1.getValueType());
1402 } else if (Opcode == ISD::SHL) {
1403 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI))
1404 return getConstant(0, N1.getValueType());
1408 if (Opcode == ISD::SHL && N1.getNumOperands() == 2)
1409 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1410 unsigned OpSAC = OpSA->getValue();
1411 if (N1.getOpcode() == ISD::SHL) {
1412 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType()))
1413 return getConstant(0, N1.getValueType());
1414 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0),
1415 getConstant(C2+OpSAC, N2.getValueType()));
1416 } else if (N1.getOpcode() == ISD::SRL) {
1417 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1)
1418 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0),
1419 getConstant(~0ULL << OpSAC, VT));
1421 return getNode(ISD::SHL, VT, Mask,
1422 getConstant(C2-OpSAC, N2.getValueType()));
1424 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2)
1425 return getNode(ISD::SRL, VT, Mask,
1426 getConstant(OpSAC-C2, N2.getValueType()));
1428 } else if (N1.getOpcode() == ISD::SRA) {
1429 // if C1 == C2, just mask out low bits.
1431 return getNode(ISD::AND, VT, N1.getOperand(0),
1432 getConstant(~0ULL << C2, VT));
1438 if (!C2) return N2; // X and 0 -> 0
1439 if (N2C->isAllOnesValue())
1440 return N1; // X and -1 -> X
1442 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0
1443 return getConstant(0, VT);
1446 uint64_t NotC2 = ~C2;
1448 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1;
1450 if (MaskedValueIsZero(N1, NotC2, TLI))
1451 return N1; // if (X & ~C2) -> 0, the and is redundant
1454 // FIXME: Should add a corresponding version of this for
1455 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
1456 // we don't have yet.
1457 // FIXME: NOW WE DO, add this.
1459 // and (sign_extend_inreg x:16:32), 1 -> and x, 1
1460 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) {
1461 // If we are masking out the part of our input that was extended, just
1462 // mask the input to the extension directly.
1463 unsigned ExtendBits =
1464 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT());
1465 if ((C2 & (~0ULL << ExtendBits)) == 0)
1466 return getNode(ISD::AND, VT, N1.getOperand(0), N2);
1467 } else if (N1.getOpcode() == ISD::OR) {
1468 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
1469 if ((ORI->getValue() & C2) == C2) {
1470 // If the 'or' is setting all of the bits that we are masking for,
1471 // we know the result of the AND will be the AND mask itself.
1477 if (!C2)return N1; // X or 0 -> X
1478 if (N2C->isAllOnesValue())
1479 return N2; // X or -1 -> -1
1482 if (!C2) return N1; // X xor 0 -> X
1483 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) {
1484 SDNode *SetCC = N1.Val;
1485 // !(X op Y) -> (X !op Y)
1486 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
1487 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
1488 return getSetCC(SetCC->getValueType(0),
1489 SetCC->getOperand(0), SetCC->getOperand(1),
1490 ISD::getSetCCInverse(CC, isInteger));
1491 } else if (N2C->isAllOnesValue()) {
1492 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) {
1493 SDNode *Op = N1.Val;
1494 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible
1495 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible
1496 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1);
1497 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) {
1498 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS
1499 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS
1500 if (Op->getOpcode() == ISD::AND)
1501 return getNode(ISD::OR, VT, LHS, RHS);
1502 return getNode(ISD::AND, VT, LHS, RHS);
1505 // X xor -1 -> not(x) ?
1510 // Reassociate ((X op C1) op C2) if possible.
1511 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode))
1512 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1)))
1513 return getNode(Opcode, VT, N1.Val->getOperand(0),
1514 getNode(Opcode, VT, N2, N1.Val->getOperand(1)));
1518 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
1519 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
1522 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue();
1524 case ISD::FADD: return getConstantFP(C1 + C2, VT);
1525 case ISD::FSUB: return getConstantFP(C1 - C2, VT);
1526 case ISD::FMUL: return getConstantFP(C1 * C2, VT);
1528 if (C2) return getConstantFP(C1 / C2, VT);
1531 if (C2) return getConstantFP(fmod(C1, C2), VT);
1535 } else { // Cannonicalize constant to RHS if commutative
1536 if (isCommutativeBinOp(Opcode)) {
1537 std::swap(N1CFP, N2CFP);
1542 if (!CombinerEnabled) {
1543 if (Opcode == ISD::FP_ROUND_INREG)
1544 return getNode(ISD::FP_EXTEND, VT,
1545 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1));
1549 // Finally, fold operations that do not require constants.
1551 case ISD::TokenFactor:
1552 if (!CombinerEnabled) {
1553 if (N1.getOpcode() == ISD::EntryToken)
1555 if (N2.getOpcode() == ISD::EntryToken)
1560 if (CombinerEnabled) break;
1562 // If we know the sign bits of both operands are zero, strength reduce to a
1563 // udiv instead. Handles (X&15) /s 4 -> X&15 >> 2
1564 uint64_t SignBit = 1ULL << (MVT::getSizeInBits(VT)-1);
1565 if (MaskedValueIsZero(N2, SignBit, TLI) &&
1566 MaskedValueIsZero(N1, SignBit, TLI))
1567 return getNode(ISD::UDIV, VT, N1, N2);
1573 if (!CombinerEnabled) {
1574 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){
1575 SDNode *LHS = N1.Val, *RHS = N2.Val;
1576 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0);
1577 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1);
1578 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get();
1579 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get();
1581 if (LR == RR && isa<ConstantSDNode>(LR) &&
1582 Op2 == Op1 && MVT::isInteger(LL.getValueType())) {
1583 // (X != 0) | (Y != 0) -> (X|Y != 0)
1584 // (X == 0) & (Y == 0) -> (X|Y == 0)
1585 // (X < 0) | (Y < 0) -> (X|Y < 0)
1586 if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
1587 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) ||
1588 (Op2 == ISD::SETNE && Opcode == ISD::OR) ||
1589 (Op2 == ISD::SETLT && Opcode == ISD::OR)))
1590 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR,
1593 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) {
1594 // (X == -1) & (Y == -1) -> (X&Y == -1)
1595 // (X != -1) | (Y != -1) -> (X&Y != -1)
1596 // (X > -1) | (Y > -1) -> (X&Y > -1)
1597 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) ||
1598 (Opcode == ISD::OR && Op2 == ISD::SETNE) ||
1599 (Opcode == ISD::OR && Op2 == ISD::SETGT))
1600 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL),
1602 // (X > -1) & (Y > -1) -> (X|Y > -1)
1603 if (Opcode == ISD::AND && Op2 == ISD::SETGT)
1604 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL),
1609 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y)
1610 if (LL == RR && LR == RL) {
1611 Op2 = ISD::getSetCCSwappedOperands(Op2);
1612 goto MatchedBackwards;
1615 if (LL == RL && LR == RR) {
1617 ISD::CondCode Result;
1618 bool isInteger = MVT::isInteger(LL.getValueType());
1619 if (Opcode == ISD::OR)
1620 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger);
1622 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger);
1624 if (Result != ISD::SETCC_INVALID)
1625 return getSetCC(LHS->getValueType(0), LL, LR, Result);
1629 // and/or zext(a), zext(b) -> zext(and/or a, b)
1630 if (N1.getOpcode() == ISD::ZERO_EXTEND &&
1631 N2.getOpcode() == ISD::ZERO_EXTEND &&
1632 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType())
1633 return getNode(ISD::ZERO_EXTEND, VT,
1634 getNode(Opcode, N1.getOperand(0).getValueType(),
1635 N1.getOperand(0), N2.getOperand(0)));
1639 if (!CombinerEnabled) {
1640 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0
1644 if (!CombinerEnabled) {
1645 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
1646 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0)
1647 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A
1648 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) &&
1649 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0)
1650 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B
1651 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1))
1652 return N2.Val->getOperand(0); // A+(B-A) -> B
1656 if (!CombinerEnabled) {
1657 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B
1658 return getNode(ISD::FSUB, VT, N1, N2.getOperand(0));
1659 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A
1660 return getNode(ISD::FSUB, VT, N2, N1.getOperand(0));
1665 if (!CombinerEnabled) {
1666 if (N1.getOpcode() == ISD::ADD) {
1667 if (N1.Val->getOperand(0) == N2)
1668 return N1.Val->getOperand(1); // (A+B)-A == B
1669 if (N1.Val->getOperand(1) == N2)
1670 return N1.Val->getOperand(0); // (A+B)-B == A
1675 if (!CombinerEnabled) {
1676 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B
1677 return getNode(ISD::FADD, VT, N1, N2.getOperand(0));
1680 case ISD::FP_ROUND_INREG:
1681 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
1683 case ISD::SIGN_EXTEND_INREG: {
1684 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT();
1685 if (EVT == VT) return N1; // Not actually extending
1686 if (!CombinerEnabled) {
1687 // If we are sign extending an extension, use the original source.
1688 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG ||
1689 N1.getOpcode() == ISD::AssertSext)
1690 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT)
1693 // If we are sign extending a sextload, return just the load.
1694 if (N1.getOpcode() == ISD::SEXTLOAD)
1695 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT)
1698 // If we are extending the result of a setcc, and we already know the
1699 // contents of the top bits, eliminate the extension.
1700 if (N1.getOpcode() == ISD::SETCC &&
1701 TLI.getSetCCResultContents() ==
1702 TargetLowering::ZeroOrNegativeOneSetCCResult)
1705 // If we are sign extending the result of an (and X, C) operation, and we
1706 // know the extended bits are zeros already, don't do the extend.
1707 if (N1.getOpcode() == ISD::AND)
1708 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) {
1709 uint64_t Mask = N1C->getValue();
1710 unsigned NumBits = MVT::getSizeInBits(EVT);
1711 if ((Mask & (~0ULL << (NumBits-1))) == 0)
1718 // FIXME: figure out how to safely handle things like
1719 // int foo(int x) { return 1 << (x & 255); }
1720 // int bar() { return foo(256); }
1725 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG &&
1726 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1)
1727 return getNode(Opcode, VT, N1, N2.getOperand(0));
1728 else if (N2.getOpcode() == ISD::AND)
1729 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) {
1730 // If the and is only masking out bits that cannot effect the shift,
1731 // eliminate the and.
1732 unsigned NumBits = MVT::getSizeInBits(VT);
1733 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
1734 return getNode(Opcode, VT, N1, N2.getOperand(0));
1740 // Memoize this node if possible.
1742 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END &&
1744 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))];
1745 if (BON) return SDOperand(BON, 0);
1747 BON = N = new SDNode(Opcode, N1, N2);
1749 N = new SDNode(Opcode, N1, N2);
1752 N->setValueTypes(VT);
1753 AllNodes.push_back(N);
1754 return SDOperand(N, 0);
1757 // setAdjCallChain - This method changes the token chain of an
1758 // CALLSEQ_START/END node to be the specified operand.
1759 void SDNode::setAdjCallChain(SDOperand N) {
1760 assert(N.getValueType() == MVT::Other);
1761 assert((getOpcode() == ISD::CALLSEQ_START ||
1762 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!");
1764 Operands[0].Val->removeUser(this);
1766 N.Val->Uses.push_back(this);
1771 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
1772 SDOperand Chain, SDOperand Ptr,
1774 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
1775 if (N) return SDOperand(N, 0);
1776 N = new SDNode(ISD::LOAD, Chain, Ptr, SV);
1778 // Loads have a token chain.
1779 N->setValueTypes(VT, MVT::Other);
1780 AllNodes.push_back(N);
1781 return SDOperand(N, 0);
1785 SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT,
1786 SDOperand Chain, SDOperand Ptr, SDOperand SV,
1787 MVT::ValueType EVT) {
1788 std::vector<SDOperand> Ops;
1790 Ops.push_back(Chain);
1793 Ops.push_back(getValueType(EVT));
1794 std::vector<MVT::ValueType> VTs;
1796 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain.
1797 return getNode(Opcode, VTs, Ops);
1800 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1801 SDOperand N1, SDOperand N2, SDOperand N3) {
1802 // Perform various simplifications.
1803 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
1804 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
1805 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val);
1808 // Use SimplifySetCC to simplify SETCC's.
1809 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
1810 if (Simp.Val) return Simp;
1815 if (N1C->getValue())
1816 return N2; // select true, X, Y -> X
1818 return N3; // select false, X, Y -> Y
1820 if (N2 == N3) return N2; // select C, X, X -> X
1822 if (!CombinerEnabled) {
1823 if (VT == MVT::i1) { // Boolean SELECT
1825 if (N2C->getValue()) // select C, 1, X -> C | X
1826 return getNode(ISD::OR, VT, N1, N3);
1827 else // select C, 0, X -> ~C & X
1828 return getNode(ISD::AND, VT,
1829 getNode(ISD::XOR, N1.getValueType(), N1,
1830 getConstant(1, N1.getValueType())), N3);
1832 if (N3C->getValue()) // select C, X, 1 -> ~C | X
1833 return getNode(ISD::OR, VT,
1834 getNode(ISD::XOR, N1.getValueType(), N1,
1835 getConstant(1, N1.getValueType())), N2);
1836 else // select C, X, 0 -> C & X
1837 return getNode(ISD::AND, VT, N1, N2);
1840 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y
1841 return getNode(ISD::OR, VT, N1, N3);
1842 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y
1843 return getNode(ISD::AND, VT, N1, N2);
1845 if (N1.getOpcode() == ISD::SETCC) {
1846 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2,
1847 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get());
1848 if (Simp.Val) return Simp;
1854 if (N2C->getValue()) // Unconditional branch
1855 return getNode(ISD::BR, MVT::Other, N1, N3);
1857 return N1; // Never-taken branch
1861 std::vector<SDOperand> Ops;
1867 // Memoize node if it doesn't produce a flag.
1869 if (VT != MVT::Flag) {
1870 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))];
1871 if (E) return SDOperand(E, 0);
1872 E = N = new SDNode(Opcode, N1, N2, N3);
1874 N = new SDNode(Opcode, N1, N2, N3);
1876 N->setValueTypes(VT);
1877 AllNodes.push_back(N);
1878 return SDOperand(N, 0);
1881 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1882 SDOperand N1, SDOperand N2, SDOperand N3,
1884 std::vector<SDOperand> Ops;
1890 return getNode(Opcode, VT, Ops);
1893 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1894 SDOperand N1, SDOperand N2, SDOperand N3,
1895 SDOperand N4, SDOperand N5) {
1896 std::vector<SDOperand> Ops;
1903 return getNode(Opcode, VT, Ops);
1907 SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
1908 assert((!V || isa<PointerType>(V->getType())) &&
1909 "SrcValue is not a pointer?");
1910 SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
1911 if (N) return SDOperand(N, 0);
1913 N = new SrcValueSDNode(V, Offset);
1914 AllNodes.push_back(N);
1915 return SDOperand(N, 0);
1918 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
1919 std::vector<SDOperand> &Ops) {
1920 switch (Ops.size()) {
1921 case 0: return getNode(Opcode, VT);
1922 case 1: return getNode(Opcode, VT, Ops[0]);
1923 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
1924 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
1928 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val);
1931 case ISD::BRCONDTWOWAY:
1933 if (N1C->getValue()) // Unconditional branch to true dest.
1934 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]);
1935 else // Unconditional branch to false dest.
1936 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]);
1938 case ISD::BRTWOWAY_CC:
1939 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!");
1940 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1941 "LHS and RHS of comparison must have same type!");
1943 case ISD::TRUNCSTORE: {
1944 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!");
1945 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT();
1946 #if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store
1947 // If this is a truncating store of a constant, convert to the desired type
1948 // and store it instead.
1949 if (isa<Constant>(Ops[0])) {
1950 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1);
1951 if (isa<Constant>(Op))
1954 // Also for ConstantFP?
1956 if (Ops[0].getValueType() == EVT) // Normal store?
1957 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]);
1958 assert(Ops[1].getValueType() > EVT && "Not a truncation?");
1959 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) &&
1960 "Can't do FP-INT conversion!");
1963 case ISD::SELECT_CC: {
1964 assert(Ops.size() == 5 && "SELECT_CC takes 5 operands!");
1965 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
1966 "LHS and RHS of condition must have same type!");
1967 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1968 "True and False arms of SelectCC must have same type!");
1969 assert(Ops[2].getValueType() == VT &&
1970 "select_cc node must be of same type as true and false value!");
1971 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3],
1972 cast<CondCodeSDNode>(Ops[4])->get());
1973 if (Simp.Val) return Simp;
1977 assert(Ops.size() == 5 && "BR_CC takes 5 operands!");
1978 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
1979 "LHS/RHS of comparison should match types!");
1981 if (CombinerEnabled) break; // xforms moved to dag combine.
1983 // Use SimplifySetCC to simplify SETCC's.
1984 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3],
1985 cast<CondCodeSDNode>(Ops[1])->get());
1987 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) {
1988 if (C->getValue() & 1) // Unconditional branch
1989 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]);
1991 return Ops[0]; // Unconditional Fall through
1992 } else if (Simp.Val->getOpcode() == ISD::SETCC) {
1993 Ops[2] = Simp.getOperand(0);
1994 Ops[3] = Simp.getOperand(1);
1995 Ops[1] = Simp.getOperand(2);
2004 if (VT != MVT::Flag) {
2006 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))];
2007 if (E) return SDOperand(E, 0);
2008 E = N = new SDNode(Opcode, Ops);
2010 N = new SDNode(Opcode, Ops);
2012 N->setValueTypes(VT);
2013 AllNodes.push_back(N);
2014 return SDOperand(N, 0);
2017 SDOperand SelectionDAG::getNode(unsigned Opcode,
2018 std::vector<MVT::ValueType> &ResultTys,
2019 std::vector<SDOperand> &Ops) {
2020 if (ResultTys.size() == 1)
2021 return getNode(Opcode, ResultTys[0], Ops);
2026 case ISD::ZEXTLOAD: {
2027 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT();
2028 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!");
2029 // If they are asking for an extending load from/to the same thing, return a
2031 if (ResultTys[0] == EVT)
2032 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]);
2033 assert(EVT < ResultTys[0] &&
2034 "Should only be an extending load, not truncating!");
2035 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) &&
2036 "Cannot sign/zero extend a FP load!");
2037 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) &&
2038 "Cannot convert from FP to Int or Int -> FP!");
2042 // FIXME: figure out how to safely handle things like
2043 // int foo(int x) { return 1 << (x & 255); }
2044 // int bar() { return foo(256); }
2046 case ISD::SRA_PARTS:
2047 case ISD::SRL_PARTS:
2048 case ISD::SHL_PARTS:
2049 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
2050 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
2051 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
2052 else if (N3.getOpcode() == ISD::AND)
2053 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
2054 // If the and is only masking out bits that cannot effect the shift,
2055 // eliminate the and.
2056 unsigned NumBits = MVT::getSizeInBits(VT)*2;
2057 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
2058 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
2064 // Memoize the node unless it returns a flag.
2066 if (ResultTys.back() != MVT::Flag) {
2068 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))];
2069 if (E) return SDOperand(E, 0);
2070 E = N = new SDNode(Opcode, Ops);
2072 N = new SDNode(Opcode, Ops);
2074 N->setValueTypes(ResultTys);
2075 AllNodes.push_back(N);
2076 return SDOperand(N, 0);
2080 /// SelectNodeTo - These are used for target selectors to *mutate* the
2081 /// specified node to have the specified return type, Target opcode, and
2082 /// operands. Note that target opcodes are stored as
2083 /// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
2084 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2085 MVT::ValueType VT) {
2086 RemoveNodeFromCSEMaps(N);
2087 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2088 N->setValueTypes(VT);
2090 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2091 MVT::ValueType VT, SDOperand Op1) {
2092 RemoveNodeFromCSEMaps(N);
2093 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2094 N->setValueTypes(VT);
2095 N->setOperands(Op1);
2097 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2098 MVT::ValueType VT, SDOperand Op1,
2100 RemoveNodeFromCSEMaps(N);
2101 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2102 N->setValueTypes(VT);
2103 N->setOperands(Op1, Op2);
2105 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2106 MVT::ValueType VT1, MVT::ValueType VT2,
2107 SDOperand Op1, SDOperand Op2) {
2108 RemoveNodeFromCSEMaps(N);
2109 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2110 N->setValueTypes(VT1, VT2);
2111 N->setOperands(Op1, Op2);
2113 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2114 MVT::ValueType VT, SDOperand Op1,
2115 SDOperand Op2, SDOperand Op3) {
2116 RemoveNodeFromCSEMaps(N);
2117 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2118 N->setValueTypes(VT);
2119 N->setOperands(Op1, Op2, Op3);
2121 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2122 MVT::ValueType VT1, MVT::ValueType VT2,
2123 SDOperand Op1, SDOperand Op2, SDOperand Op3) {
2124 RemoveNodeFromCSEMaps(N);
2125 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2126 N->setValueTypes(VT1, VT2);
2127 N->setOperands(Op1, Op2, Op3);
2130 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2131 MVT::ValueType VT, SDOperand Op1,
2132 SDOperand Op2, SDOperand Op3, SDOperand Op4) {
2133 RemoveNodeFromCSEMaps(N);
2134 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2135 N->setValueTypes(VT);
2136 N->setOperands(Op1, Op2, Op3, Op4);
2138 void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
2139 MVT::ValueType VT, SDOperand Op1,
2140 SDOperand Op2, SDOperand Op3, SDOperand Op4,
2142 RemoveNodeFromCSEMaps(N);
2143 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc);
2144 N->setValueTypes(VT);
2145 N->setOperands(Op1, Op2, Op3, Op4, Op5);
2148 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2149 /// This can cause recursive merging of nodes in the DAG.
2151 /// This version assumes From/To have a single result value.
2153 void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN,
2154 std::vector<SDNode*> *Deleted) {
2155 SDNode *From = FromN.Val, *To = ToN.Val;
2156 assert(From->getNumValues() == 1 && To->getNumValues() == 1 &&
2157 "Cannot replace with this method!");
2158 assert(From != To && "Cannot replace uses of with self");
2160 while (!From->use_empty()) {
2161 // Process users until they are all gone.
2162 SDNode *U = *From->use_begin();
2164 // This node is about to morph, remove its old self from the CSE maps.
2165 RemoveNodeFromCSEMaps(U);
2167 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2168 if (U->getOperand(i).Val == From) {
2169 From->removeUser(U);
2170 U->Operands[i].Val = To;
2174 // Now that we have modified U, add it back to the CSE maps. If it already
2175 // exists there, recursively merge the results together.
2176 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2177 ReplaceAllUsesWith(U, Existing, Deleted);
2179 if (Deleted) Deleted->push_back(U);
2180 DeleteNodeNotInCSEMaps(U);
2185 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2186 /// This can cause recursive merging of nodes in the DAG.
2188 /// This version assumes From/To have matching types and numbers of result
2191 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
2192 std::vector<SDNode*> *Deleted) {
2193 assert(From != To && "Cannot replace uses of with self");
2194 assert(From->getNumValues() == To->getNumValues() &&
2195 "Cannot use this version of ReplaceAllUsesWith!");
2196 if (From->getNumValues() == 1) { // If possible, use the faster version.
2197 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted);
2201 while (!From->use_empty()) {
2202 // Process users until they are all gone.
2203 SDNode *U = *From->use_begin();
2205 // This node is about to morph, remove its old self from the CSE maps.
2206 RemoveNodeFromCSEMaps(U);
2208 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2209 if (U->getOperand(i).Val == From) {
2210 From->removeUser(U);
2211 U->Operands[i].Val = To;
2215 // Now that we have modified U, add it back to the CSE maps. If it already
2216 // exists there, recursively merge the results together.
2217 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2218 ReplaceAllUsesWith(U, Existing, Deleted);
2220 if (Deleted) Deleted->push_back(U);
2221 DeleteNodeNotInCSEMaps(U);
2226 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
2227 /// This can cause recursive merging of nodes in the DAG.
2229 /// This version can replace From with any result values. To must match the
2230 /// number and types of values returned by From.
2231 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
2232 const std::vector<SDOperand> &To,
2233 std::vector<SDNode*> *Deleted) {
2234 assert(From->getNumValues() == To.size() &&
2235 "Incorrect number of values to replace with!");
2236 if (To.size() == 1 && To[0].Val->getNumValues() == 1) {
2237 // Degenerate case handled above.
2238 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted);
2242 while (!From->use_empty()) {
2243 // Process users until they are all gone.
2244 SDNode *U = *From->use_begin();
2246 // This node is about to morph, remove its old self from the CSE maps.
2247 RemoveNodeFromCSEMaps(U);
2249 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i)
2250 if (U->getOperand(i).Val == From) {
2251 const SDOperand &ToOp = To[U->getOperand(i).ResNo];
2252 From->removeUser(U);
2253 U->Operands[i] = ToOp;
2254 ToOp.Val->addUser(U);
2257 // Now that we have modified U, add it back to the CSE maps. If it already
2258 // exists there, recursively merge the results together.
2259 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
2260 ReplaceAllUsesWith(U, Existing, Deleted);
2262 if (Deleted) Deleted->push_back(U);
2263 DeleteNodeNotInCSEMaps(U);
2269 //===----------------------------------------------------------------------===//
2271 //===----------------------------------------------------------------------===//
2273 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
2274 /// indicated value. This method ignores uses of other values defined by this
2276 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) {
2277 assert(Value < getNumValues() && "Bad value!");
2279 // If there is only one value, this is easy.
2280 if (getNumValues() == 1)
2281 return use_size() == NUses;
2282 if (Uses.size() < NUses) return false;
2284 SDOperand TheValue(this, Value);
2286 std::set<SDNode*> UsersHandled;
2288 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end();
2291 if (User->getNumOperands() == 1 ||
2292 UsersHandled.insert(User).second) // First time we've seen this?
2293 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
2294 if (User->getOperand(i) == TheValue) {
2296 return false; // too many uses
2301 // Found exactly the right number of uses?
2306 const char *SDNode::getOperationName(const SelectionDAG *G) const {
2307 switch (getOpcode()) {
2309 if (getOpcode() < ISD::BUILTIN_OP_END)
2310 return "<<Unknown DAG Node>>";
2313 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
2314 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes())
2315 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END);
2316 return "<<Unknown Target Node>>";
2319 case ISD::PCMARKER: return "PCMarker";
2320 case ISD::SRCVALUE: return "SrcValue";
2321 case ISD::VALUETYPE: return "ValueType";
2322 case ISD::EntryToken: return "EntryToken";
2323 case ISD::TokenFactor: return "TokenFactor";
2324 case ISD::AssertSext: return "AssertSext";
2325 case ISD::AssertZext: return "AssertZext";
2326 case ISD::Constant: return "Constant";
2327 case ISD::TargetConstant: return "TargetConstant";
2328 case ISD::ConstantFP: return "ConstantFP";
2329 case ISD::GlobalAddress: return "GlobalAddress";
2330 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
2331 case ISD::FrameIndex: return "FrameIndex";
2332 case ISD::TargetFrameIndex: return "TargetFrameIndex";
2333 case ISD::BasicBlock: return "BasicBlock";
2334 case ISD::Register: return "Register";
2335 case ISD::ExternalSymbol: return "ExternalSymbol";
2336 case ISD::ConstantPool: return "ConstantPool";
2337 case ISD::TargetConstantPool: return "TargetConstantPool";
2338 case ISD::CopyToReg: return "CopyToReg";
2339 case ISD::CopyFromReg: return "CopyFromReg";
2340 case ISD::ImplicitDef: return "ImplicitDef";
2341 case ISD::UNDEF: return "undef";
2344 case ISD::FABS: return "fabs";
2345 case ISD::FNEG: return "fneg";
2346 case ISD::FSQRT: return "fsqrt";
2347 case ISD::FSIN: return "fsin";
2348 case ISD::FCOS: return "fcos";
2351 case ISD::ADD: return "add";
2352 case ISD::SUB: return "sub";
2353 case ISD::MUL: return "mul";
2354 case ISD::MULHU: return "mulhu";
2355 case ISD::MULHS: return "mulhs";
2356 case ISD::SDIV: return "sdiv";
2357 case ISD::UDIV: return "udiv";
2358 case ISD::SREM: return "srem";
2359 case ISD::UREM: return "urem";
2360 case ISD::AND: return "and";
2361 case ISD::OR: return "or";
2362 case ISD::XOR: return "xor";
2363 case ISD::SHL: return "shl";
2364 case ISD::SRA: return "sra";
2365 case ISD::SRL: return "srl";
2366 case ISD::FADD: return "fadd";
2367 case ISD::FSUB: return "fsub";
2368 case ISD::FMUL: return "fmul";
2369 case ISD::FDIV: return "fdiv";
2370 case ISD::FREM: return "frem";
2372 case ISD::SETCC: return "setcc";
2373 case ISD::SELECT: return "select";
2374 case ISD::SELECT_CC: return "select_cc";
2375 case ISD::ADD_PARTS: return "add_parts";
2376 case ISD::SUB_PARTS: return "sub_parts";
2377 case ISD::SHL_PARTS: return "shl_parts";
2378 case ISD::SRA_PARTS: return "sra_parts";
2379 case ISD::SRL_PARTS: return "srl_parts";
2381 // Conversion operators.
2382 case ISD::SIGN_EXTEND: return "sign_extend";
2383 case ISD::ZERO_EXTEND: return "zero_extend";
2384 case ISD::ANY_EXTEND: return "any_extend";
2385 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
2386 case ISD::TRUNCATE: return "truncate";
2387 case ISD::FP_ROUND: return "fp_round";
2388 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
2389 case ISD::FP_EXTEND: return "fp_extend";
2391 case ISD::SINT_TO_FP: return "sint_to_fp";
2392 case ISD::UINT_TO_FP: return "uint_to_fp";
2393 case ISD::FP_TO_SINT: return "fp_to_sint";
2394 case ISD::FP_TO_UINT: return "fp_to_uint";
2396 // Control flow instructions
2397 case ISD::BR: return "br";
2398 case ISD::BRCOND: return "brcond";
2399 case ISD::BRCONDTWOWAY: return "brcondtwoway";
2400 case ISD::BR_CC: return "br_cc";
2401 case ISD::BRTWOWAY_CC: return "brtwoway_cc";
2402 case ISD::RET: return "ret";
2403 case ISD::CALL: return "call";
2404 case ISD::TAILCALL:return "tailcall";
2405 case ISD::CALLSEQ_START: return "callseq_start";
2406 case ISD::CALLSEQ_END: return "callseq_end";
2409 case ISD::LOAD: return "load";
2410 case ISD::STORE: return "store";
2411 case ISD::EXTLOAD: return "extload";
2412 case ISD::SEXTLOAD: return "sextload";
2413 case ISD::ZEXTLOAD: return "zextload";
2414 case ISD::TRUNCSTORE: return "truncstore";
2416 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
2417 case ISD::EXTRACT_ELEMENT: return "extract_element";
2418 case ISD::BUILD_PAIR: return "build_pair";
2419 case ISD::MEMSET: return "memset";
2420 case ISD::MEMCPY: return "memcpy";
2421 case ISD::MEMMOVE: return "memmove";
2424 case ISD::CTPOP: return "ctpop";
2425 case ISD::CTTZ: return "cttz";
2426 case ISD::CTLZ: return "ctlz";
2429 case ISD::READPORT: return "readport";
2430 case ISD::WRITEPORT: return "writeport";
2431 case ISD::READIO: return "readio";
2432 case ISD::WRITEIO: return "writeio";
2435 switch (cast<CondCodeSDNode>(this)->get()) {
2436 default: assert(0 && "Unknown setcc condition!");
2437 case ISD::SETOEQ: return "setoeq";
2438 case ISD::SETOGT: return "setogt";
2439 case ISD::SETOGE: return "setoge";
2440 case ISD::SETOLT: return "setolt";
2441 case ISD::SETOLE: return "setole";
2442 case ISD::SETONE: return "setone";
2444 case ISD::SETO: return "seto";
2445 case ISD::SETUO: return "setuo";
2446 case ISD::SETUEQ: return "setue";
2447 case ISD::SETUGT: return "setugt";
2448 case ISD::SETUGE: return "setuge";
2449 case ISD::SETULT: return "setult";
2450 case ISD::SETULE: return "setule";
2451 case ISD::SETUNE: return "setune";
2453 case ISD::SETEQ: return "seteq";
2454 case ISD::SETGT: return "setgt";
2455 case ISD::SETGE: return "setge";
2456 case ISD::SETLT: return "setlt";
2457 case ISD::SETLE: return "setle";
2458 case ISD::SETNE: return "setne";
2463 void SDNode::dump() const { dump(0); }
2464 void SDNode::dump(const SelectionDAG *G) const {
2465 std::cerr << (void*)this << ": ";
2467 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
2468 if (i) std::cerr << ",";
2469 if (getValueType(i) == MVT::Other)
2472 std::cerr << MVT::getValueTypeString(getValueType(i));
2474 std::cerr << " = " << getOperationName(G);
2477 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
2478 if (i) std::cerr << ", ";
2479 std::cerr << (void*)getOperand(i).Val;
2480 if (unsigned RN = getOperand(i).ResNo)
2481 std::cerr << ":" << RN;
2484 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
2485 std::cerr << "<" << CSDN->getValue() << ">";
2486 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
2487 std::cerr << "<" << CSDN->getValue() << ">";
2488 } else if (const GlobalAddressSDNode *GADN =
2489 dyn_cast<GlobalAddressSDNode>(this)) {
2491 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">";
2492 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
2493 std::cerr << "<" << FIDN->getIndex() << ">";
2494 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
2495 std::cerr << "<" << *CP->get() << ">";
2496 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
2498 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
2500 std::cerr << LBB->getName() << " ";
2501 std::cerr << (const void*)BBDN->getBasicBlock() << ">";
2502 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
2503 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) {
2504 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg());
2506 std::cerr << " #" << R->getReg();
2508 } else if (const ExternalSymbolSDNode *ES =
2509 dyn_cast<ExternalSymbolSDNode>(this)) {
2510 std::cerr << "'" << ES->getSymbol() << "'";
2511 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
2513 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">";
2515 std::cerr << "<null:" << M->getOffset() << ">";
2516 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
2517 std::cerr << ":" << getValueTypeString(N->getVT());
2521 static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) {
2522 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
2523 if (N->getOperand(i).Val->hasOneUse())
2524 DumpNodes(N->getOperand(i).Val, indent+2, G);
2526 std::cerr << "\n" << std::string(indent+2, ' ')
2527 << (void*)N->getOperand(i).Val << ": <multiple use>";
2530 std::cerr << "\n" << std::string(indent, ' ');
2534 void SelectionDAG::dump() const {
2535 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
2536 std::vector<SDNode*> Nodes(AllNodes);
2537 std::sort(Nodes.begin(), Nodes.end());
2539 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
2540 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
2541 DumpNodes(Nodes[i], 2, this);
2544 DumpNodes(getRoot().Val, 2, this);
2546 std::cerr << "\n\n";