1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 if (N->getOpcode() == ISD::BIT_CONVERT)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
117 SDValue NotZero = N->getOperand(i);
118 if (isa<ConstantSDNode>(NotZero)) {
119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
121 } else if (isa<ConstantFPSDNode>(NotZero)) {
122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
123 bitcastToAPInt().isAllOnesValue())
128 // Okay, we have at least one ~0 value, check to see if the rest match or are
130 for (++i; i != e; ++i)
131 if (N->getOperand(i) != NotZero &&
132 N->getOperand(i).getOpcode() != ISD::UNDEF)
138 /// isBuildVectorAllZeros - Return true if the specified node is a
139 /// BUILD_VECTOR where all of the elements are 0 or undef.
140 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
141 // Look through a bit convert.
142 if (N->getOpcode() == ISD::BIT_CONVERT)
143 N = N->getOperand(0).getNode();
145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
147 unsigned i = 0, e = N->getNumOperands();
149 // Skip over all of the undef values.
150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 // Do not accept an all-undef vector.
154 if (i == e) return false;
156 // Do not accept build_vectors that aren't all constants or which have non-~0
158 SDValue Zero = N->getOperand(i);
159 if (isa<ConstantSDNode>(Zero)) {
160 if (!cast<ConstantSDNode>(Zero)->isNullValue())
162 } else if (isa<ConstantFPSDNode>(Zero)) {
163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
168 // Okay, we have at least one ~0 value, check to see if the rest match or are
170 for (++i; i != e; ++i)
171 if (N->getOperand(i) != Zero &&
172 N->getOperand(i).getOpcode() != ISD::UNDEF)
177 /// isScalarToVector - Return true if the specified node is a
178 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
179 /// element is not an undef.
180 bool ISD::isScalarToVector(const SDNode *N) {
181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
184 if (N->getOpcode() != ISD::BUILD_VECTOR)
186 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
188 unsigned NumElems = N->getNumOperands();
189 for (unsigned i = 1; i < NumElems; ++i) {
190 SDValue V = N->getOperand(i);
191 if (V.getOpcode() != ISD::UNDEF)
198 /// isDebugLabel - Return true if the specified node represents a debug
199 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
200 bool ISD::isDebugLabel(const SDNode *N) {
202 if (N->getOpcode() == ISD::DBG_LABEL)
204 if (N->isMachineOpcode() &&
205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: assert(0 && "Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 const TargetMachine &SelectionDAG::getTarget() const {
310 return MF->getTarget();
313 //===----------------------------------------------------------------------===//
314 // SDNode Profile Support
315 //===----------------------------------------------------------------------===//
317 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
319 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
323 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
324 /// solely with their pointer.
325 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
326 ID.AddPointer(VTList.VTs);
329 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
331 static void AddNodeIDOperands(FoldingSetNodeID &ID,
332 const SDValue *Ops, unsigned NumOps) {
333 for (; NumOps; --NumOps, ++Ops) {
334 ID.AddPointer(Ops->getNode());
335 ID.AddInteger(Ops->getResNo());
339 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
341 static void AddNodeIDOperands(FoldingSetNodeID &ID,
342 const SDUse *Ops, unsigned NumOps) {
343 for (; NumOps; --NumOps, ++Ops) {
344 ID.AddPointer(Ops->getVal());
345 ID.AddInteger(Ops->getSDValue().getResNo());
349 static void AddNodeIDNode(FoldingSetNodeID &ID,
350 unsigned short OpC, SDVTList VTList,
351 const SDValue *OpList, unsigned N) {
352 AddNodeIDOpcode(ID, OpC);
353 AddNodeIDValueTypes(ID, VTList);
354 AddNodeIDOperands(ID, OpList, N);
357 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
359 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
360 switch (N->getOpcode()) {
361 default: break; // Normal nodes don't need extra info.
363 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
365 case ISD::TargetConstant:
367 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
369 case ISD::TargetConstantFP:
370 case ISD::ConstantFP: {
371 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
374 case ISD::TargetGlobalAddress:
375 case ISD::GlobalAddress:
376 case ISD::TargetGlobalTLSAddress:
377 case ISD::GlobalTLSAddress: {
378 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
379 ID.AddPointer(GA->getGlobal());
380 ID.AddInteger(GA->getOffset());
383 case ISD::BasicBlock:
384 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
387 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 case ISD::DBG_STOPPOINT: {
390 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
391 ID.AddInteger(DSP->getLine());
392 ID.AddInteger(DSP->getColumn());
393 ID.AddPointer(DSP->getCompileUnit());
397 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
399 case ISD::MEMOPERAND: {
400 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
412 case ISD::ConstantPool:
413 case ISD::TargetConstantPool: {
414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
415 ID.AddInteger(CP->getAlignment());
416 ID.AddInteger(CP->getOffset());
417 if (CP->isMachineConstantPoolEntry())
418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
420 ID.AddPointer(CP->getConstVal());
424 const CallSDNode *Call = cast<CallSDNode>(N);
425 ID.AddInteger(Call->getCallingConv());
426 ID.AddInteger(Call->isVarArg());
430 const LoadSDNode *LD = cast<LoadSDNode>(N);
431 ID.AddInteger(LD->getAddressingMode());
432 ID.AddInteger(LD->getExtensionType());
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawFlags());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getAddressingMode());
440 ID.AddInteger(ST->isTruncatingStore());
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawFlags());
445 case ISD::ATOMIC_CMP_SWAP_8:
446 case ISD::ATOMIC_SWAP_8:
447 case ISD::ATOMIC_LOAD_ADD_8:
448 case ISD::ATOMIC_LOAD_SUB_8:
449 case ISD::ATOMIC_LOAD_AND_8:
450 case ISD::ATOMIC_LOAD_OR_8:
451 case ISD::ATOMIC_LOAD_XOR_8:
452 case ISD::ATOMIC_LOAD_NAND_8:
453 case ISD::ATOMIC_LOAD_MIN_8:
454 case ISD::ATOMIC_LOAD_MAX_8:
455 case ISD::ATOMIC_LOAD_UMIN_8:
456 case ISD::ATOMIC_LOAD_UMAX_8:
457 case ISD::ATOMIC_CMP_SWAP_16:
458 case ISD::ATOMIC_SWAP_16:
459 case ISD::ATOMIC_LOAD_ADD_16:
460 case ISD::ATOMIC_LOAD_SUB_16:
461 case ISD::ATOMIC_LOAD_AND_16:
462 case ISD::ATOMIC_LOAD_OR_16:
463 case ISD::ATOMIC_LOAD_XOR_16:
464 case ISD::ATOMIC_LOAD_NAND_16:
465 case ISD::ATOMIC_LOAD_MIN_16:
466 case ISD::ATOMIC_LOAD_MAX_16:
467 case ISD::ATOMIC_LOAD_UMIN_16:
468 case ISD::ATOMIC_LOAD_UMAX_16:
469 case ISD::ATOMIC_CMP_SWAP_32:
470 case ISD::ATOMIC_SWAP_32:
471 case ISD::ATOMIC_LOAD_ADD_32:
472 case ISD::ATOMIC_LOAD_SUB_32:
473 case ISD::ATOMIC_LOAD_AND_32:
474 case ISD::ATOMIC_LOAD_OR_32:
475 case ISD::ATOMIC_LOAD_XOR_32:
476 case ISD::ATOMIC_LOAD_NAND_32:
477 case ISD::ATOMIC_LOAD_MIN_32:
478 case ISD::ATOMIC_LOAD_MAX_32:
479 case ISD::ATOMIC_LOAD_UMIN_32:
480 case ISD::ATOMIC_LOAD_UMAX_32:
481 case ISD::ATOMIC_CMP_SWAP_64:
482 case ISD::ATOMIC_SWAP_64:
483 case ISD::ATOMIC_LOAD_ADD_64:
484 case ISD::ATOMIC_LOAD_SUB_64:
485 case ISD::ATOMIC_LOAD_AND_64:
486 case ISD::ATOMIC_LOAD_OR_64:
487 case ISD::ATOMIC_LOAD_XOR_64:
488 case ISD::ATOMIC_LOAD_NAND_64:
489 case ISD::ATOMIC_LOAD_MIN_64:
490 case ISD::ATOMIC_LOAD_MAX_64:
491 case ISD::ATOMIC_LOAD_UMIN_64:
492 case ISD::ATOMIC_LOAD_UMAX_64: {
493 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
494 ID.AddInteger(AT->getRawFlags());
497 } // end switch (N->getOpcode())
500 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
502 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
503 AddNodeIDOpcode(ID, N->getOpcode());
504 // Add the return value info.
505 AddNodeIDValueTypes(ID, N->getVTList());
506 // Add the operand info.
507 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
509 // Handle SDNode leafs with special info.
510 AddNodeIDCustom(ID, N);
513 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
514 /// the CSE map that carries both alignment and volatility information.
516 static inline unsigned
517 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
518 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
521 //===----------------------------------------------------------------------===//
522 // SelectionDAG Class
523 //===----------------------------------------------------------------------===//
525 /// doNotCSE - Return true if CSE should not be performed for this node.
526 static bool doNotCSE(SDNode *N) {
527 if (N->getValueType(0) == MVT::Flag)
528 return true; // Never CSE anything that produces a flag.
530 switch (N->getOpcode()) {
532 case ISD::HANDLENODE:
534 case ISD::DBG_STOPPOINT:
537 return true; // Never CSE these nodes.
540 // Check that remaining values produced are not flags.
541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
542 if (N->getValueType(i) == MVT::Flag)
543 return true; // Never CSE anything that produces a flag.
548 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
550 void SelectionDAG::RemoveDeadNodes() {
551 // Create a dummy node (which is not added to allnodes), that adds a reference
552 // to the root node, preventing it from being deleted.
553 HandleSDNode Dummy(getRoot());
555 SmallVector<SDNode*, 128> DeadNodes;
557 // Add all obviously-dead nodes to the DeadNodes worklist.
558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
560 DeadNodes.push_back(I);
562 RemoveDeadNodes(DeadNodes);
564 // If the root changed (e.g. it was a dead load, update the root).
565 setRoot(Dummy.getValue());
568 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
569 /// given list, and any nodes that become unreachable as a result.
570 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
571 DAGUpdateListener *UpdateListener) {
573 // Process the worklist, deleting the nodes and adding their uses to the
575 while (!DeadNodes.empty()) {
576 SDNode *N = DeadNodes.back();
577 DeadNodes.pop_back();
580 UpdateListener->NodeDeleted(N, 0);
582 // Take the node out of the appropriate CSE map.
583 RemoveNodeFromCSEMaps(N);
585 // Next, brutally remove the operand list. This is safe to do, as there are
586 // no cycles in the graph.
587 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
588 SDNode *Operand = I->getVal();
589 Operand->removeUser(std::distance(N->op_begin(), I), N);
591 // Now that we removed this operand, see if there are no uses of it left.
592 if (Operand->use_empty())
593 DeadNodes.push_back(Operand);
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
602 // Finally, remove N itself.
603 NodeAllocator.Deallocate(AllNodes.remove(N));
607 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
608 SmallVector<SDNode*, 16> DeadNodes(1, N);
609 RemoveDeadNodes(DeadNodes, UpdateListener);
612 void SelectionDAG::DeleteNode(SDNode *N) {
613 assert(N->use_empty() && "Cannot delete a node that is not dead!");
615 // First take this out of the appropriate CSE map.
616 RemoveNodeFromCSEMaps(N);
618 // Finally, remove uses due to operands of this node, remove from the
619 // AllNodes list, and delete the node.
620 DeleteNodeNotInCSEMaps(N);
623 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
624 // Drop all of the operands and decrement used node's use counts.
625 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
626 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
628 if (N->OperandsNeedDelete) {
629 delete[] N->OperandList;
633 assert(N != AllNodes.begin());
634 NodeAllocator.Deallocate(AllNodes.remove(N));
637 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
638 /// correspond to it. This is useful when we're about to delete or repurpose
639 /// the node. We don't want future request for structurally identical nodes
640 /// to return N anymore.
641 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
643 switch (N->getOpcode()) {
644 case ISD::EntryToken:
645 assert(0 && "EntryToken should not be in CSEMaps!");
647 case ISD::HANDLENODE: return false; // noop.
649 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
650 "Cond code doesn't exist!");
651 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
652 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
654 case ISD::ExternalSymbol:
655 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
657 case ISD::TargetExternalSymbol:
659 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
661 case ISD::VALUETYPE: {
662 MVT VT = cast<VTSDNode>(N)->getVT();
663 if (VT.isExtended()) {
664 Erased = ExtendedValueTypeNodes.erase(VT);
666 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
667 ValueTypeNodes[VT.getSimpleVT()] = 0;
672 // Remove it from the CSE Map.
673 Erased = CSEMap.RemoveNode(N);
677 // Verify that the node was actually in one of the CSE maps, unless it has a
678 // flag result (which cannot be CSE'd) or is one of the special cases that are
679 // not subject to CSE.
680 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
681 !N->isMachineOpcode() && !doNotCSE(N)) {
684 assert(0 && "Node is not in map!");
690 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
691 /// has been taken out and modified in some way. If the specified node already
692 /// exists in the CSE maps, do not modify the maps, but return the existing node
693 /// instead. If it doesn't exist, add it and return null.
695 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
696 assert(N->getNumOperands() && "This is a leaf node!");
701 SDNode *New = CSEMap.GetOrInsertNode(N);
702 if (New != N) return New; // Node already existed.
706 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
707 /// were replaced with those specified. If this node is never memoized,
708 /// return null, otherwise return a pointer to the slot it would take. If a
709 /// node already exists with these operands, the slot will be non-null.
710 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
715 SDValue Ops[] = { Op };
717 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
718 AddNodeIDCustom(ID, N);
719 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
722 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
723 /// were replaced with those specified. If this node is never memoized,
724 /// return null, otherwise return a pointer to the slot it would take. If a
725 /// node already exists with these operands, the slot will be non-null.
726 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
727 SDValue Op1, SDValue Op2,
732 SDValue Ops[] = { Op1, Op2 };
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
735 AddNodeIDCustom(ID, N);
736 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
740 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
741 /// were replaced with those specified. If this node is never memoized,
742 /// return null, otherwise return a pointer to the slot it would take. If a
743 /// node already exists with these operands, the slot will be non-null.
744 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
745 const SDValue *Ops,unsigned NumOps,
751 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
752 AddNodeIDCustom(ID, N);
753 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
756 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
757 void SelectionDAG::VerifyNode(SDNode *N) {
758 switch (N->getOpcode()) {
761 case ISD::BUILD_PAIR: {
762 MVT VT = N->getValueType(0);
763 assert(N->getNumValues() == 1 && "Too many results!");
764 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
765 "Wrong return type!");
766 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
767 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
768 "Mismatched operand types!");
769 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
770 "Wrong operand type!");
771 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
772 "Wrong return type size");
775 case ISD::BUILD_VECTOR: {
776 assert(N->getNumValues() == 1 && "Too many results!");
777 assert(N->getValueType(0).isVector() && "Wrong return type!");
778 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
779 "Wrong number of operands!");
780 // FIXME: Change vector_shuffle to a variadic node with mask elements being
781 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
782 // operand, and it is not always possible to legalize it. Turning off the
783 // following checks at least makes it possible to legalize most of the time.
784 // MVT EltVT = N->getValueType(0).getVectorElementType();
785 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
786 // assert(I->getSDValue().getValueType() == EltVT &&
787 // "Wrong operand type!");
793 /// getMVTAlignment - Compute the default alignment value for the
796 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
797 const Type *Ty = VT == MVT::iPTR ?
798 PointerType::get(Type::Int8Ty, 0) :
801 return TLI.getTargetData()->getABITypeAlignment(Ty);
804 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
805 : TLI(tli), FLI(fli),
806 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
807 Root(getEntryNode()) {
808 AllNodes.push_back(&EntryNode);
811 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
816 SelectionDAG::~SelectionDAG() {
820 void SelectionDAG::allnodes_clear() {
821 assert(&*AllNodes.begin() == &EntryNode);
822 AllNodes.remove(AllNodes.begin());
823 while (!AllNodes.empty()) {
824 SDNode *N = AllNodes.remove(AllNodes.begin());
825 N->SetNextInBucket(0);
827 if (N->OperandsNeedDelete) {
828 delete [] N->OperandList;
832 NodeAllocator.Deallocate(N);
836 void SelectionDAG::clear() {
838 OperandAllocator.Reset();
841 ExtendedValueTypeNodes.clear();
842 ExternalSymbols.clear();
843 TargetExternalSymbols.clear();
844 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
845 static_cast<CondCodeSDNode*>(0));
846 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
847 static_cast<SDNode*>(0));
850 AllNodes.push_back(&EntryNode);
851 Root = getEntryNode();
854 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
855 if (Op.getValueType() == VT) return Op;
856 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
858 return getNode(ISD::AND, Op.getValueType(), Op,
859 getConstant(Imm, Op.getValueType()));
862 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
863 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
868 return getConstant(*ConstantInt::get(Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
872 assert(VT.isInteger() && "Cannot create FP integer constant!");
874 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
875 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
876 "APInt size does not match type size!");
878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
886 return SDValue(N, 0);
888 N = NodeAllocator.Allocate<ConstantSDNode>();
889 new (N) ConstantSDNode(isT, &Val, EltVT);
890 CSEMap.InsertNode(N, IP);
891 AllNodes.push_back(N);
894 SDValue Result(N, 0);
896 SmallVector<SDValue, 8> Ops;
897 Ops.assign(VT.getVectorNumElements(), Result);
898 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
903 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
904 return getConstant(Val, TLI.getPointerTy(), isTarget);
908 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
909 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
912 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
913 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
916 VT.isVector() ? VT.getVectorElementType() : VT;
918 // Do the map lookup using the actual bit pattern for the floating point
919 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
920 // we don't have issues with SNANs.
921 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
923 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
927 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
929 return SDValue(N, 0);
931 N = NodeAllocator.Allocate<ConstantFPSDNode>();
932 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
933 CSEMap.InsertNode(N, IP);
934 AllNodes.push_back(N);
937 SDValue Result(N, 0);
939 SmallVector<SDValue, 8> Ops;
940 Ops.assign(VT.getVectorNumElements(), Result);
941 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
946 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
948 VT.isVector() ? VT.getVectorElementType() : VT;
950 return getConstantFP(APFloat((float)Val), VT, isTarget);
952 return getConstantFP(APFloat(Val), VT, isTarget);
955 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
956 MVT VT, int64_t Offset,
960 // Truncate (with sign-extension) the offset value to the pointer size.
961 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
963 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
965 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
967 // If GV is an alias then use the aliasee for determining thread-localness.
968 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
969 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
972 if (GVar && GVar->isThreadLocal())
973 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
975 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
978 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
980 ID.AddInteger(Offset);
982 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
983 return SDValue(E, 0);
984 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
985 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
986 CSEMap.InsertNode(N, IP);
987 AllNodes.push_back(N);
988 return SDValue(N, 0);
991 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
992 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
994 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
998 return SDValue(E, 0);
999 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1000 new (N) FrameIndexSDNode(FI, VT, isTarget);
1001 CSEMap.InsertNode(N, IP);
1002 AllNodes.push_back(N);
1003 return SDValue(N, 0);
1006 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1007 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1008 FoldingSetNodeID ID;
1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1013 return SDValue(E, 0);
1014 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1015 new (N) JumpTableSDNode(JTI, VT, isTarget);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1018 return SDValue(N, 0);
1021 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1022 unsigned Alignment, int Offset,
1026 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1027 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1028 FoldingSetNodeID ID;
1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1030 ID.AddInteger(Alignment);
1031 ID.AddInteger(Offset);
1034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1035 return SDValue(E, 0);
1036 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1037 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1038 CSEMap.InsertNode(N, IP);
1039 AllNodes.push_back(N);
1040 return SDValue(N, 0);
1044 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1045 unsigned Alignment, int Offset,
1049 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1050 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1053 ID.AddInteger(Alignment);
1054 ID.AddInteger(Offset);
1055 C->AddSelectionDAGCSEId(ID);
1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1058 return SDValue(E, 0);
1059 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1060 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1061 CSEMap.InsertNode(N, IP);
1062 AllNodes.push_back(N);
1063 return SDValue(N, 0);
1067 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1073 return SDValue(E, 0);
1074 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1075 new (N) BasicBlockSDNode(MBB);
1076 CSEMap.InsertNode(N, IP);
1077 AllNodes.push_back(N);
1078 return SDValue(N, 0);
1081 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1082 FoldingSetNodeID ID;
1083 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1084 ID.AddInteger(Flags.getRawBits());
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1088 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1089 new (N) ARG_FLAGSSDNode(Flags);
1090 CSEMap.InsertNode(N, IP);
1091 AllNodes.push_back(N);
1092 return SDValue(N, 0);
1095 SDValue SelectionDAG::getValueType(MVT VT) {
1096 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1097 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1099 SDNode *&N = VT.isExtended() ?
1100 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1102 if (N) return SDValue(N, 0);
1103 N = NodeAllocator.Allocate<VTSDNode>();
1104 new (N) VTSDNode(VT);
1105 AllNodes.push_back(N);
1106 return SDValue(N, 0);
1109 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1110 SDNode *&N = ExternalSymbols[Sym];
1111 if (N) return SDValue(N, 0);
1112 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1113 new (N) ExternalSymbolSDNode(false, Sym, VT);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1119 SDNode *&N = TargetExternalSymbols[Sym];
1120 if (N) return SDValue(N, 0);
1121 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1122 new (N) ExternalSymbolSDNode(true, Sym, VT);
1123 AllNodes.push_back(N);
1124 return SDValue(N, 0);
1127 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1128 if ((unsigned)Cond >= CondCodeNodes.size())
1129 CondCodeNodes.resize(Cond+1);
1131 if (CondCodeNodes[Cond] == 0) {
1132 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1133 new (N) CondCodeSDNode(Cond);
1134 CondCodeNodes[Cond] = N;
1135 AllNodes.push_back(N);
1137 return SDValue(CondCodeNodes[Cond], 0);
1140 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1141 SDValue STy, SDValue Rnd, SDValue Sat,
1142 ISD::CvtCode Code) {
1143 FoldingSetNodeID ID;
1145 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1146 return SDValue(E, 0);
1147 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1148 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1149 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1150 CSEMap.InsertNode(N, IP);
1151 AllNodes.push_back(N);
1152 return SDValue(N, 0);
1155 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1156 FoldingSetNodeID ID;
1157 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1158 ID.AddInteger(RegNo);
1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1161 return SDValue(E, 0);
1162 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1163 new (N) RegisterSDNode(RegNo, VT);
1164 CSEMap.InsertNode(N, IP);
1165 AllNodes.push_back(N);
1166 return SDValue(N, 0);
1169 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1170 unsigned Line, unsigned Col,
1171 const CompileUnitDesc *CU) {
1172 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1173 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1174 AllNodes.push_back(N);
1175 return SDValue(N, 0);
1178 SDValue SelectionDAG::getLabel(unsigned Opcode,
1181 FoldingSetNodeID ID;
1182 SDValue Ops[] = { Root };
1183 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1184 ID.AddInteger(LabelID);
1186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1187 return SDValue(E, 0);
1188 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1189 new (N) LabelSDNode(Opcode, Root, LabelID);
1190 CSEMap.InsertNode(N, IP);
1191 AllNodes.push_back(N);
1192 return SDValue(N, 0);
1195 SDValue SelectionDAG::getSrcValue(const Value *V) {
1196 assert((!V || isa<PointerType>(V->getType())) &&
1197 "SrcValue is not a pointer?");
1199 FoldingSetNodeID ID;
1200 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1204 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1205 return SDValue(E, 0);
1207 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1208 new (N) SrcValueSDNode(V);
1209 CSEMap.InsertNode(N, IP);
1210 AllNodes.push_back(N);
1211 return SDValue(N, 0);
1214 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1216 const Value *v = MO.getValue();
1217 assert((!v || isa<PointerType>(v->getType())) &&
1218 "SrcValue is not a pointer?");
1221 FoldingSetNodeID ID;
1222 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1227 return SDValue(E, 0);
1229 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1230 new (N) MemOperandSDNode(MO);
1231 CSEMap.InsertNode(N, IP);
1232 AllNodes.push_back(N);
1233 return SDValue(N, 0);
1236 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1237 /// specified value type.
1238 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1239 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1240 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1241 const Type *Ty = VT.getTypeForMVT();
1242 unsigned StackAlign =
1243 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1245 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1246 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1249 /// CreateStackTemporary - Create a stack temporary suitable for holding
1250 /// either of the specified value types.
1251 SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
1252 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1253 VT2.getStoreSizeInBits())/8;
1254 const Type *Ty1 = VT1.getTypeForMVT();
1255 const Type *Ty2 = VT2.getTypeForMVT();
1256 const TargetData *TD = TLI.getTargetData();
1257 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1258 TD->getPrefTypeAlignment(Ty2));
1260 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1261 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align);
1262 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1265 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1266 SDValue N2, ISD::CondCode Cond) {
1267 // These setcc operations always fold.
1271 case ISD::SETFALSE2: return getConstant(0, VT);
1273 case ISD::SETTRUE2: return getConstant(1, VT);
1285 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1289 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1290 const APInt &C2 = N2C->getAPIntValue();
1291 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1292 const APInt &C1 = N1C->getAPIntValue();
1295 default: assert(0 && "Unknown integer setcc!");
1296 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1297 case ISD::SETNE: return getConstant(C1 != C2, VT);
1298 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1299 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1300 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1301 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1302 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1303 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1304 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1305 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1309 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1310 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1311 // No compile time operations on this type yet.
1312 if (N1C->getValueType(0) == MVT::ppcf128)
1315 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1318 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1319 return getNode(ISD::UNDEF, VT);
1321 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1322 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1323 return getNode(ISD::UNDEF, VT);
1325 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1326 R==APFloat::cmpLessThan, VT);
1327 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1328 return getNode(ISD::UNDEF, VT);
1330 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1331 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1332 return getNode(ISD::UNDEF, VT);
1334 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1335 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1336 return getNode(ISD::UNDEF, VT);
1338 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1339 R==APFloat::cmpEqual, VT);
1340 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1341 return getNode(ISD::UNDEF, VT);
1343 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1344 R==APFloat::cmpEqual, VT);
1345 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1346 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1347 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1348 R==APFloat::cmpEqual, VT);
1349 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1350 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1351 R==APFloat::cmpLessThan, VT);
1352 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1353 R==APFloat::cmpUnordered, VT);
1354 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1355 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1358 // Ensure that the constant occurs on the RHS.
1359 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1363 // Could not fold it.
1367 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1368 /// use this predicate to simplify operations downstream.
1369 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1370 unsigned BitWidth = Op.getValueSizeInBits();
1371 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1374 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1375 /// this predicate to simplify operations downstream. Mask is known to be zero
1376 /// for bits that V cannot have.
1377 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1378 unsigned Depth) const {
1379 APInt KnownZero, KnownOne;
1380 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1381 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1382 return (KnownZero & Mask) == Mask;
1385 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1386 /// known to be either zero or one and return them in the KnownZero/KnownOne
1387 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1389 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1390 APInt &KnownZero, APInt &KnownOne,
1391 unsigned Depth) const {
1392 unsigned BitWidth = Mask.getBitWidth();
1393 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1394 "Mask size mismatches value type size!");
1396 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1397 if (Depth == 6 || Mask == 0)
1398 return; // Limit search depth.
1400 APInt KnownZero2, KnownOne2;
1402 switch (Op.getOpcode()) {
1404 // We know all of the bits for a constant!
1405 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1406 KnownZero = ~KnownOne & Mask;
1409 // If either the LHS or the RHS are Zero, the result is zero.
1410 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1411 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1412 KnownZero2, KnownOne2, Depth+1);
1413 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1414 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1416 // Output known-1 bits are only known if set in both the LHS & RHS.
1417 KnownOne &= KnownOne2;
1418 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1419 KnownZero |= KnownZero2;
1422 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1423 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1424 KnownZero2, KnownOne2, Depth+1);
1425 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1426 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1428 // Output known-0 bits are only known if clear in both the LHS & RHS.
1429 KnownZero &= KnownZero2;
1430 // Output known-1 are known to be set if set in either the LHS | RHS.
1431 KnownOne |= KnownOne2;
1434 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1435 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1436 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1437 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1439 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1440 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1441 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1442 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1443 KnownZero = KnownZeroOut;
1447 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1448 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1449 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1450 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1451 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1453 // If low bits are zero in either operand, output low known-0 bits.
1454 // Also compute a conserative estimate for high known-0 bits.
1455 // More trickiness is possible, but this is sufficient for the
1456 // interesting case of alignment computation.
1458 unsigned TrailZ = KnownZero.countTrailingOnes() +
1459 KnownZero2.countTrailingOnes();
1460 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1461 KnownZero2.countLeadingOnes(),
1462 BitWidth) - BitWidth;
1464 TrailZ = std::min(TrailZ, BitWidth);
1465 LeadZ = std::min(LeadZ, BitWidth);
1466 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1467 APInt::getHighBitsSet(BitWidth, LeadZ);
1472 // For the purposes of computing leading zeros we can conservatively
1473 // treat a udiv as a logical right shift by the power of 2 known to
1474 // be less than the denominator.
1475 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1476 ComputeMaskedBits(Op.getOperand(0),
1477 AllOnes, KnownZero2, KnownOne2, Depth+1);
1478 unsigned LeadZ = KnownZero2.countLeadingOnes();
1482 ComputeMaskedBits(Op.getOperand(1),
1483 AllOnes, KnownZero2, KnownOne2, Depth+1);
1484 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1485 if (RHSUnknownLeadingOnes != BitWidth)
1486 LeadZ = std::min(BitWidth,
1487 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1489 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1493 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1494 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1495 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1496 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1498 // Only known if known in both the LHS and RHS.
1499 KnownOne &= KnownOne2;
1500 KnownZero &= KnownZero2;
1502 case ISD::SELECT_CC:
1503 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1504 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1505 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1506 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1508 // Only known if known in both the LHS and RHS.
1509 KnownOne &= KnownOne2;
1510 KnownZero &= KnownZero2;
1514 if (Op.getResNo() != 1)
1516 // The boolean result conforms to getBooleanContents. Fall through.
1518 // If we know the result of a setcc has the top bits zero, use this info.
1519 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1521 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1524 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1525 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1526 unsigned ShAmt = SA->getZExtValue();
1528 // If the shift count is an invalid immediate, don't do anything.
1529 if (ShAmt >= BitWidth)
1532 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1533 KnownZero, KnownOne, Depth+1);
1534 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1535 KnownZero <<= ShAmt;
1537 // low bits known zero.
1538 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1542 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1543 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1544 unsigned ShAmt = SA->getZExtValue();
1546 // If the shift count is an invalid immediate, don't do anything.
1547 if (ShAmt >= BitWidth)
1550 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1551 KnownZero, KnownOne, Depth+1);
1552 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1553 KnownZero = KnownZero.lshr(ShAmt);
1554 KnownOne = KnownOne.lshr(ShAmt);
1556 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1557 KnownZero |= HighBits; // High bits known zero.
1561 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1562 unsigned ShAmt = SA->getZExtValue();
1564 // If the shift count is an invalid immediate, don't do anything.
1565 if (ShAmt >= BitWidth)
1568 APInt InDemandedMask = (Mask << ShAmt);
1569 // If any of the demanded bits are produced by the sign extension, we also
1570 // demand the input sign bit.
1571 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1572 if (HighBits.getBoolValue())
1573 InDemandedMask |= APInt::getSignBit(BitWidth);
1575 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1578 KnownZero = KnownZero.lshr(ShAmt);
1579 KnownOne = KnownOne.lshr(ShAmt);
1581 // Handle the sign bits.
1582 APInt SignBit = APInt::getSignBit(BitWidth);
1583 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1585 if (KnownZero.intersects(SignBit)) {
1586 KnownZero |= HighBits; // New bits are known zero.
1587 } else if (KnownOne.intersects(SignBit)) {
1588 KnownOne |= HighBits; // New bits are known one.
1592 case ISD::SIGN_EXTEND_INREG: {
1593 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1594 unsigned EBits = EVT.getSizeInBits();
1596 // Sign extension. Compute the demanded bits in the result that are not
1597 // present in the input.
1598 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1600 APInt InSignBit = APInt::getSignBit(EBits);
1601 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1603 // If the sign extended bits are demanded, we know that the sign
1605 InSignBit.zext(BitWidth);
1606 if (NewBits.getBoolValue())
1607 InputDemandedBits |= InSignBit;
1609 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1610 KnownZero, KnownOne, Depth+1);
1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1613 // If the sign bit of the input is known set or clear, then we know the
1614 // top bits of the result.
1615 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1616 KnownZero |= NewBits;
1617 KnownOne &= ~NewBits;
1618 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1619 KnownOne |= NewBits;
1620 KnownZero &= ~NewBits;
1621 } else { // Input sign bit unknown
1622 KnownZero &= ~NewBits;
1623 KnownOne &= ~NewBits;
1630 unsigned LowBits = Log2_32(BitWidth)+1;
1631 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1636 if (ISD::isZEXTLoad(Op.getNode())) {
1637 LoadSDNode *LD = cast<LoadSDNode>(Op);
1638 MVT VT = LD->getMemoryVT();
1639 unsigned MemBits = VT.getSizeInBits();
1640 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1644 case ISD::ZERO_EXTEND: {
1645 MVT InVT = Op.getOperand(0).getValueType();
1646 unsigned InBits = InVT.getSizeInBits();
1647 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1648 APInt InMask = Mask;
1649 InMask.trunc(InBits);
1650 KnownZero.trunc(InBits);
1651 KnownOne.trunc(InBits);
1652 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1653 KnownZero.zext(BitWidth);
1654 KnownOne.zext(BitWidth);
1655 KnownZero |= NewBits;
1658 case ISD::SIGN_EXTEND: {
1659 MVT InVT = Op.getOperand(0).getValueType();
1660 unsigned InBits = InVT.getSizeInBits();
1661 APInt InSignBit = APInt::getSignBit(InBits);
1662 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1663 APInt InMask = Mask;
1664 InMask.trunc(InBits);
1666 // If any of the sign extended bits are demanded, we know that the sign
1667 // bit is demanded. Temporarily set this bit in the mask for our callee.
1668 if (NewBits.getBoolValue())
1669 InMask |= InSignBit;
1671 KnownZero.trunc(InBits);
1672 KnownOne.trunc(InBits);
1673 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1675 // Note if the sign bit is known to be zero or one.
1676 bool SignBitKnownZero = KnownZero.isNegative();
1677 bool SignBitKnownOne = KnownOne.isNegative();
1678 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1679 "Sign bit can't be known to be both zero and one!");
1681 // If the sign bit wasn't actually demanded by our caller, we don't
1682 // want it set in the KnownZero and KnownOne result values. Reset the
1683 // mask and reapply it to the result values.
1685 InMask.trunc(InBits);
1686 KnownZero &= InMask;
1689 KnownZero.zext(BitWidth);
1690 KnownOne.zext(BitWidth);
1692 // If the sign bit is known zero or one, the top bits match.
1693 if (SignBitKnownZero)
1694 KnownZero |= NewBits;
1695 else if (SignBitKnownOne)
1696 KnownOne |= NewBits;
1699 case ISD::ANY_EXTEND: {
1700 MVT InVT = Op.getOperand(0).getValueType();
1701 unsigned InBits = InVT.getSizeInBits();
1702 APInt InMask = Mask;
1703 InMask.trunc(InBits);
1704 KnownZero.trunc(InBits);
1705 KnownOne.trunc(InBits);
1706 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1707 KnownZero.zext(BitWidth);
1708 KnownOne.zext(BitWidth);
1711 case ISD::TRUNCATE: {
1712 MVT InVT = Op.getOperand(0).getValueType();
1713 unsigned InBits = InVT.getSizeInBits();
1714 APInt InMask = Mask;
1715 InMask.zext(InBits);
1716 KnownZero.zext(InBits);
1717 KnownOne.zext(InBits);
1718 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1720 KnownZero.trunc(BitWidth);
1721 KnownOne.trunc(BitWidth);
1724 case ISD::AssertZext: {
1725 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1726 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1727 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1729 KnownZero |= (~InMask) & Mask;
1733 // All bits are zero except the low bit.
1734 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1738 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1739 // We know that the top bits of C-X are clear if X contains less bits
1740 // than C (i.e. no wrap-around can happen). For example, 20-X is
1741 // positive if we can prove that X is >= 0 and < 16.
1742 if (CLHS->getAPIntValue().isNonNegative()) {
1743 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1744 // NLZ can't be BitWidth with no sign bit
1745 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1746 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1749 // If all of the MaskV bits are known to be zero, then we know the
1750 // output top bits are zero, because we now know that the output is
1752 if ((KnownZero2 & MaskV) == MaskV) {
1753 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1754 // Top bits known zero.
1755 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1762 // Output known-0 bits are known if clear or set in both the low clear bits
1763 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1764 // low 3 bits clear.
1765 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1766 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1767 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1768 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1770 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1771 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1772 KnownZeroOut = std::min(KnownZeroOut,
1773 KnownZero2.countTrailingOnes());
1775 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1779 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1780 const APInt &RA = Rem->getAPIntValue();
1781 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1782 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1783 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1784 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1786 // If the sign bit of the first operand is zero, the sign bit of
1787 // the result is zero. If the first operand has no one bits below
1788 // the second operand's single 1 bit, its sign will be zero.
1789 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1790 KnownZero2 |= ~LowBits;
1792 KnownZero |= KnownZero2 & Mask;
1794 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1799 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1800 const APInt &RA = Rem->getAPIntValue();
1801 if (RA.isPowerOf2()) {
1802 APInt LowBits = (RA - 1);
1803 APInt Mask2 = LowBits & Mask;
1804 KnownZero |= ~LowBits & Mask;
1805 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1806 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1811 // Since the result is less than or equal to either operand, any leading
1812 // zero bits in either operand must also exist in the result.
1813 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1814 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1816 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1819 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1820 KnownZero2.countLeadingOnes());
1822 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1826 // Allow the target to implement this method for its nodes.
1827 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1828 case ISD::INTRINSIC_WO_CHAIN:
1829 case ISD::INTRINSIC_W_CHAIN:
1830 case ISD::INTRINSIC_VOID:
1831 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1837 /// ComputeNumSignBits - Return the number of times the sign bit of the
1838 /// register is replicated into the other bits. We know that at least 1 bit
1839 /// is always equal to the sign bit (itself), but other cases can give us
1840 /// information. For example, immediately after an "SRA X, 2", we know that
1841 /// the top 3 bits are all equal to each other, so we return 3.
1842 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1843 MVT VT = Op.getValueType();
1844 assert(VT.isInteger() && "Invalid VT!");
1845 unsigned VTBits = VT.getSizeInBits();
1847 unsigned FirstAnswer = 1;
1850 return 1; // Limit search depth.
1852 switch (Op.getOpcode()) {
1854 case ISD::AssertSext:
1855 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1856 return VTBits-Tmp+1;
1857 case ISD::AssertZext:
1858 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1861 case ISD::Constant: {
1862 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1863 // If negative, return # leading ones.
1864 if (Val.isNegative())
1865 return Val.countLeadingOnes();
1867 // Return # leading zeros.
1868 return Val.countLeadingZeros();
1871 case ISD::SIGN_EXTEND:
1872 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1873 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1875 case ISD::SIGN_EXTEND_INREG:
1876 // Max of the input and what this extends.
1877 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1880 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1881 return std::max(Tmp, Tmp2);
1884 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1885 // SRA X, C -> adds C sign bits.
1886 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1887 Tmp += C->getZExtValue();
1888 if (Tmp > VTBits) Tmp = VTBits;
1892 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1893 // shl destroys sign bits.
1894 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1895 if (C->getZExtValue() >= VTBits || // Bad shift.
1896 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1897 return Tmp - C->getZExtValue();
1902 case ISD::XOR: // NOT is handled here.
1903 // Logical binary ops preserve the number of sign bits at the worst.
1904 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1906 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1907 FirstAnswer = std::min(Tmp, Tmp2);
1908 // We computed what we know about the sign bits as our first
1909 // answer. Now proceed to the generic code that uses
1910 // ComputeMaskedBits, and pick whichever answer is better.
1915 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1916 if (Tmp == 1) return 1; // Early out.
1917 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1918 return std::min(Tmp, Tmp2);
1922 if (Op.getResNo() != 1)
1924 // The boolean result conforms to getBooleanContents. Fall through.
1926 // If setcc returns 0/-1, all bits are sign bits.
1927 if (TLI.getBooleanContents() ==
1928 TargetLowering::ZeroOrNegativeOneBooleanContent)
1933 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1934 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1936 // Handle rotate right by N like a rotate left by 32-N.
1937 if (Op.getOpcode() == ISD::ROTR)
1938 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1940 // If we aren't rotating out all of the known-in sign bits, return the
1941 // number that are left. This handles rotl(sext(x), 1) for example.
1942 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1943 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1947 // Add can have at most one carry bit. Thus we know that the output
1948 // is, at worst, one more bit than the inputs.
1949 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1950 if (Tmp == 1) return 1; // Early out.
1952 // Special case decrementing a value (ADD X, -1):
1953 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1954 if (CRHS->isAllOnesValue()) {
1955 APInt KnownZero, KnownOne;
1956 APInt Mask = APInt::getAllOnesValue(VTBits);
1957 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1959 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1961 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1964 // If we are subtracting one from a positive number, there is no carry
1965 // out of the result.
1966 if (KnownZero.isNegative())
1970 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1971 if (Tmp2 == 1) return 1;
1972 return std::min(Tmp, Tmp2)-1;
1976 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1977 if (Tmp2 == 1) return 1;
1980 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1981 if (CLHS->isNullValue()) {
1982 APInt KnownZero, KnownOne;
1983 APInt Mask = APInt::getAllOnesValue(VTBits);
1984 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1985 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1987 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1990 // If the input is known to be positive (the sign bit is known clear),
1991 // the output of the NEG has the same number of sign bits as the input.
1992 if (KnownZero.isNegative())
1995 // Otherwise, we treat this like a SUB.
1998 // Sub can have at most one carry bit. Thus we know that the output
1999 // is, at worst, one more bit than the inputs.
2000 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2001 if (Tmp == 1) return 1; // Early out.
2002 return std::min(Tmp, Tmp2)-1;
2005 // FIXME: it's tricky to do anything useful for this, but it is an important
2006 // case for targets like X86.
2010 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2011 if (Op.getOpcode() == ISD::LOAD) {
2012 LoadSDNode *LD = cast<LoadSDNode>(Op);
2013 unsigned ExtType = LD->getExtensionType();
2016 case ISD::SEXTLOAD: // '17' bits known
2017 Tmp = LD->getMemoryVT().getSizeInBits();
2018 return VTBits-Tmp+1;
2019 case ISD::ZEXTLOAD: // '16' bits known
2020 Tmp = LD->getMemoryVT().getSizeInBits();
2025 // Allow the target to implement this method for its nodes.
2026 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2027 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2028 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2029 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2030 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2031 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2034 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2035 // use this information.
2036 APInt KnownZero, KnownOne;
2037 APInt Mask = APInt::getAllOnesValue(VTBits);
2038 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2040 if (KnownZero.isNegative()) { // sign bit is 0
2042 } else if (KnownOne.isNegative()) { // sign bit is 1;
2049 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2050 // the number of identical bits in the top of the input value.
2052 Mask <<= Mask.getBitWidth()-VTBits;
2053 // Return # leading zeros. We use 'min' here in case Val was zero before
2054 // shifting. We don't want to return '64' as for an i32 "0".
2055 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2059 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2060 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2061 if (!GA) return false;
2062 if (GA->getOffset() != 0) return false;
2063 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2064 if (!GV) return false;
2065 MachineModuleInfo *MMI = getMachineModuleInfo();
2066 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
2070 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2071 /// element of the result of the vector shuffle.
2072 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2073 MVT VT = N->getValueType(0);
2074 SDValue PermMask = N->getOperand(2);
2075 SDValue Idx = PermMask.getOperand(i);
2076 if (Idx.getOpcode() == ISD::UNDEF)
2077 return getNode(ISD::UNDEF, VT.getVectorElementType());
2078 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2079 unsigned NumElems = PermMask.getNumOperands();
2080 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2083 if (V.getOpcode() == ISD::BIT_CONVERT) {
2084 V = V.getOperand(0);
2085 MVT VVT = V.getValueType();
2086 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems)
2089 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2090 return (Index == 0) ? V.getOperand(0)
2091 : getNode(ISD::UNDEF, VT.getVectorElementType());
2092 if (V.getOpcode() == ISD::BUILD_VECTOR)
2093 return V.getOperand(Index);
2094 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2095 return getShuffleScalarElt(V.getNode(), Index);
2100 /// getNode - Gets or creates the specified node.
2102 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2103 FoldingSetNodeID ID;
2104 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2107 return SDValue(E, 0);
2108 SDNode *N = NodeAllocator.Allocate<SDNode>();
2109 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2110 CSEMap.InsertNode(N, IP);
2112 AllNodes.push_back(N);
2116 return SDValue(N, 0);
2119 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2120 // Constant fold unary operations with an integer constant operand.
2121 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2122 const APInt &Val = C->getAPIntValue();
2123 unsigned BitWidth = VT.getSizeInBits();
2126 case ISD::SIGN_EXTEND:
2127 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2128 case ISD::ANY_EXTEND:
2129 case ISD::ZERO_EXTEND:
2131 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2132 case ISD::UINT_TO_FP:
2133 case ISD::SINT_TO_FP: {
2134 const uint64_t zero[] = {0, 0};
2135 // No compile time operations on this type.
2136 if (VT==MVT::ppcf128)
2138 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2139 (void)apf.convertFromAPInt(Val,
2140 Opcode==ISD::SINT_TO_FP,
2141 APFloat::rmNearestTiesToEven);
2142 return getConstantFP(apf, VT);
2144 case ISD::BIT_CONVERT:
2145 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2146 return getConstantFP(Val.bitsToFloat(), VT);
2147 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2148 return getConstantFP(Val.bitsToDouble(), VT);
2151 return getConstant(Val.byteSwap(), VT);
2153 return getConstant(Val.countPopulation(), VT);
2155 return getConstant(Val.countLeadingZeros(), VT);
2157 return getConstant(Val.countTrailingZeros(), VT);
2161 // Constant fold unary operations with a floating point constant operand.
2162 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2163 APFloat V = C->getValueAPF(); // make copy
2164 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2168 return getConstantFP(V, VT);
2171 return getConstantFP(V, VT);
2173 case ISD::FP_EXTEND: {
2175 // This can return overflow, underflow, or inexact; we don't care.
2176 // FIXME need to be more flexible about rounding mode.
2177 (void)V.convert(*MVTToAPFloatSemantics(VT),
2178 APFloat::rmNearestTiesToEven, &ignored);
2179 return getConstantFP(V, VT);
2181 case ISD::FP_TO_SINT:
2182 case ISD::FP_TO_UINT: {
2185 assert(integerPartWidth >= 64);
2186 // FIXME need to be more flexible about rounding mode.
2187 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2188 Opcode==ISD::FP_TO_SINT,
2189 APFloat::rmTowardZero, &ignored);
2190 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2192 return getConstant(x, VT);
2194 case ISD::BIT_CONVERT:
2195 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2196 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2197 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2198 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2204 unsigned OpOpcode = Operand.getNode()->getOpcode();
2206 case ISD::TokenFactor:
2207 case ISD::MERGE_VALUES:
2208 case ISD::CONCAT_VECTORS:
2209 return Operand; // Factor, merge or concat of one node? No need.
2210 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2211 case ISD::FP_EXTEND:
2212 assert(VT.isFloatingPoint() &&
2213 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2214 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2215 if (Operand.getOpcode() == ISD::UNDEF)
2216 return getNode(ISD::UNDEF, VT);
2218 case ISD::SIGN_EXTEND:
2219 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2220 "Invalid SIGN_EXTEND!");
2221 if (Operand.getValueType() == VT) return Operand; // noop extension
2222 assert(Operand.getValueType().bitsLT(VT)
2223 && "Invalid sext node, dst < src!");
2224 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2225 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2227 case ISD::ZERO_EXTEND:
2228 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2229 "Invalid ZERO_EXTEND!");
2230 if (Operand.getValueType() == VT) return Operand; // noop extension
2231 assert(Operand.getValueType().bitsLT(VT)
2232 && "Invalid zext node, dst < src!");
2233 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2234 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2236 case ISD::ANY_EXTEND:
2237 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2238 "Invalid ANY_EXTEND!");
2239 if (Operand.getValueType() == VT) return Operand; // noop extension
2240 assert(Operand.getValueType().bitsLT(VT)
2241 && "Invalid anyext node, dst < src!");
2242 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2243 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2244 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2247 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2248 "Invalid TRUNCATE!");
2249 if (Operand.getValueType() == VT) return Operand; // noop truncate
2250 assert(Operand.getValueType().bitsGT(VT)
2251 && "Invalid truncate node, src < dst!");
2252 if (OpOpcode == ISD::TRUNCATE)
2253 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2254 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2255 OpOpcode == ISD::ANY_EXTEND) {
2256 // If the source is smaller than the dest, we still need an extend.
2257 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2258 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2259 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2260 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2262 return Operand.getNode()->getOperand(0);
2265 case ISD::BIT_CONVERT:
2266 // Basic sanity checking.
2267 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2268 && "Cannot BIT_CONVERT between types of different sizes!");
2269 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2270 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2271 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2272 if (OpOpcode == ISD::UNDEF)
2273 return getNode(ISD::UNDEF, VT);
2275 case ISD::SCALAR_TO_VECTOR:
2276 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2277 VT.getVectorElementType() == Operand.getValueType() &&
2278 "Illegal SCALAR_TO_VECTOR node!");
2279 if (OpOpcode == ISD::UNDEF)
2280 return getNode(ISD::UNDEF, VT);
2281 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2282 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2283 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2284 Operand.getConstantOperandVal(1) == 0 &&
2285 Operand.getOperand(0).getValueType() == VT)
2286 return Operand.getOperand(0);
2289 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2290 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2291 Operand.getNode()->getOperand(0));
2292 if (OpOpcode == ISD::FNEG) // --X -> X
2293 return Operand.getNode()->getOperand(0);
2296 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2297 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2302 SDVTList VTs = getVTList(VT);
2303 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2304 FoldingSetNodeID ID;
2305 SDValue Ops[1] = { Operand };
2306 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2309 return SDValue(E, 0);
2310 N = NodeAllocator.Allocate<UnarySDNode>();
2311 new (N) UnarySDNode(Opcode, VTs, Operand);
2312 CSEMap.InsertNode(N, IP);
2314 N = NodeAllocator.Allocate<UnarySDNode>();
2315 new (N) UnarySDNode(Opcode, VTs, Operand);
2318 AllNodes.push_back(N);
2322 return SDValue(N, 0);
2325 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2327 ConstantSDNode *Cst1,
2328 ConstantSDNode *Cst2) {
2329 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2332 case ISD::ADD: return getConstant(C1 + C2, VT);
2333 case ISD::SUB: return getConstant(C1 - C2, VT);
2334 case ISD::MUL: return getConstant(C1 * C2, VT);
2336 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2339 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2342 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2345 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2347 case ISD::AND: return getConstant(C1 & C2, VT);
2348 case ISD::OR: return getConstant(C1 | C2, VT);
2349 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2350 case ISD::SHL: return getConstant(C1 << C2, VT);
2351 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2352 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2353 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2354 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2361 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2362 SDValue N1, SDValue N2) {
2363 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2364 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2367 case ISD::TokenFactor:
2368 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2369 N2.getValueType() == MVT::Other && "Invalid token factor!");
2370 // Fold trivial token factors.
2371 if (N1.getOpcode() == ISD::EntryToken) return N2;
2372 if (N2.getOpcode() == ISD::EntryToken) return N1;
2373 if (N1 == N2) return N1;
2375 case ISD::CONCAT_VECTORS:
2376 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2377 // one big BUILD_VECTOR.
2378 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2379 N2.getOpcode() == ISD::BUILD_VECTOR) {
2380 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2381 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2382 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2386 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2387 N1.getValueType() == VT && "Binary operator types must match!");
2388 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2389 // worth handling here.
2390 if (N2C && N2C->isNullValue())
2392 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2399 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2400 N1.getValueType() == VT && "Binary operator types must match!");
2401 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2402 // it's worth handling here.
2403 if (N2C && N2C->isNullValue())
2410 assert(VT.isInteger() && "This operator does not apply to FP types!");
2420 assert(N1.getValueType() == N2.getValueType() &&
2421 N1.getValueType() == VT && "Binary operator types must match!");
2423 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2424 assert(N1.getValueType() == VT &&
2425 N1.getValueType().isFloatingPoint() &&
2426 N2.getValueType().isFloatingPoint() &&
2427 "Invalid FCOPYSIGN!");
2434 assert(VT == N1.getValueType() &&
2435 "Shift operators return type must be the same as their first arg");
2436 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2437 "Shifts only work on integers");
2438 assert((N2.getValueType() == TLI.getShiftAmountTy() ||
2439 (N2.getValueType().isVector() && N2.getValueType().isInteger())) &&
2440 "Wrong type for shift amount");
2442 // Always fold shifts of i1 values so the code generator doesn't need to
2443 // handle them. Since we know the size of the shift has to be less than the
2444 // size of the value, the shift/rotate count is guaranteed to be zero.
2448 case ISD::FP_ROUND_INREG: {
2449 MVT EVT = cast<VTSDNode>(N2)->getVT();
2450 assert(VT == N1.getValueType() && "Not an inreg round!");
2451 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2452 "Cannot FP_ROUND_INREG integer types");
2453 assert(EVT.bitsLE(VT) && "Not rounding down!");
2454 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2458 assert(VT.isFloatingPoint() &&
2459 N1.getValueType().isFloatingPoint() &&
2460 VT.bitsLE(N1.getValueType()) &&
2461 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2462 if (N1.getValueType() == VT) return N1; // noop conversion.
2464 case ISD::AssertSext:
2465 case ISD::AssertZext: {
2466 MVT EVT = cast<VTSDNode>(N2)->getVT();
2467 assert(VT == N1.getValueType() && "Not an inreg extend!");
2468 assert(VT.isInteger() && EVT.isInteger() &&
2469 "Cannot *_EXTEND_INREG FP types");
2470 assert(EVT.bitsLE(VT) && "Not extending!");
2471 if (VT == EVT) return N1; // noop assertion.
2474 case ISD::SIGN_EXTEND_INREG: {
2475 MVT EVT = cast<VTSDNode>(N2)->getVT();
2476 assert(VT == N1.getValueType() && "Not an inreg extend!");
2477 assert(VT.isInteger() && EVT.isInteger() &&
2478 "Cannot *_EXTEND_INREG FP types");
2479 assert(EVT.bitsLE(VT) && "Not extending!");
2480 if (EVT == VT) return N1; // Not actually extending
2483 APInt Val = N1C->getAPIntValue();
2484 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2485 Val <<= Val.getBitWidth()-FromBits;
2486 Val = Val.ashr(Val.getBitWidth()-FromBits);
2487 return getConstant(Val, VT);
2491 case ISD::EXTRACT_VECTOR_ELT:
2492 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2493 if (N1.getOpcode() == ISD::UNDEF)
2494 return getNode(ISD::UNDEF, VT);
2496 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2497 // expanding copies of large vectors from registers.
2499 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2500 N1.getNumOperands() > 0) {
2502 N1.getOperand(0).getValueType().getVectorNumElements();
2503 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2504 N1.getOperand(N2C->getZExtValue() / Factor),
2505 getConstant(N2C->getZExtValue() % Factor,
2506 N2.getValueType()));
2509 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2510 // expanding large vector constants.
2511 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2512 return N1.getOperand(N2C->getZExtValue());
2514 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2515 // operations are lowered to scalars.
2516 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2517 if (N1.getOperand(2) == N2)
2518 return N1.getOperand(1);
2520 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2523 case ISD::EXTRACT_ELEMENT:
2524 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2525 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2526 (N1.getValueType().isInteger() == VT.isInteger()) &&
2527 "Wrong types for EXTRACT_ELEMENT!");
2529 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2530 // 64-bit integers into 32-bit parts. Instead of building the extract of
2531 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2532 if (N1.getOpcode() == ISD::BUILD_PAIR)
2533 return N1.getOperand(N2C->getZExtValue());
2535 // EXTRACT_ELEMENT of a constant int is also very common.
2536 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2537 unsigned ElementSize = VT.getSizeInBits();
2538 unsigned Shift = ElementSize * N2C->getZExtValue();
2539 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2540 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2543 case ISD::EXTRACT_SUBVECTOR:
2544 if (N1.getValueType() == VT) // Trivial extraction.
2551 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2552 if (SV.getNode()) return SV;
2553 } else { // Cannonicalize constant to RHS if commutative
2554 if (isCommutativeBinOp(Opcode)) {
2555 std::swap(N1C, N2C);
2561 // Constant fold FP operations.
2562 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2563 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2565 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2566 // Cannonicalize constant to RHS if commutative
2567 std::swap(N1CFP, N2CFP);
2569 } else if (N2CFP && VT != MVT::ppcf128) {
2570 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2571 APFloat::opStatus s;
2574 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2575 if (s != APFloat::opInvalidOp)
2576 return getConstantFP(V1, VT);
2579 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2580 if (s!=APFloat::opInvalidOp)
2581 return getConstantFP(V1, VT);
2584 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2585 if (s!=APFloat::opInvalidOp)
2586 return getConstantFP(V1, VT);
2589 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2590 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2591 return getConstantFP(V1, VT);
2594 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2595 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2596 return getConstantFP(V1, VT);
2598 case ISD::FCOPYSIGN:
2600 return getConstantFP(V1, VT);
2606 // Canonicalize an UNDEF to the RHS, even over a constant.
2607 if (N1.getOpcode() == ISD::UNDEF) {
2608 if (isCommutativeBinOp(Opcode)) {
2612 case ISD::FP_ROUND_INREG:
2613 case ISD::SIGN_EXTEND_INREG:
2619 return N1; // fold op(undef, arg2) -> undef
2627 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2628 // For vectors, we can't easily build an all zero vector, just return
2635 // Fold a bunch of operators when the RHS is undef.
2636 if (N2.getOpcode() == ISD::UNDEF) {
2639 if (N1.getOpcode() == ISD::UNDEF)
2640 // Handle undef ^ undef -> 0 special case. This is a common
2642 return getConstant(0, VT);
2657 return N2; // fold op(arg1, undef) -> undef
2663 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2664 // For vectors, we can't easily build an all zero vector, just return
2669 return getConstant(VT.getIntegerVTBitMask(), VT);
2670 // For vectors, we can't easily build an all one vector, just return
2678 // Memoize this node if possible.
2680 SDVTList VTs = getVTList(VT);
2681 if (VT != MVT::Flag) {
2682 SDValue Ops[] = { N1, N2 };
2683 FoldingSetNodeID ID;
2684 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2687 return SDValue(E, 0);
2688 N = NodeAllocator.Allocate<BinarySDNode>();
2689 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2690 CSEMap.InsertNode(N, IP);
2692 N = NodeAllocator.Allocate<BinarySDNode>();
2693 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2696 AllNodes.push_back(N);
2700 return SDValue(N, 0);
2703 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2704 SDValue N1, SDValue N2, SDValue N3) {
2705 // Perform various simplifications.
2706 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2707 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2709 case ISD::CONCAT_VECTORS:
2710 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2711 // one big BUILD_VECTOR.
2712 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2713 N2.getOpcode() == ISD::BUILD_VECTOR &&
2714 N3.getOpcode() == ISD::BUILD_VECTOR) {
2715 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2716 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2717 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2718 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2722 // Use FoldSetCC to simplify SETCC's.
2723 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2724 if (Simp.getNode()) return Simp;
2729 if (N1C->getZExtValue())
2730 return N2; // select true, X, Y -> X
2732 return N3; // select false, X, Y -> Y
2735 if (N2 == N3) return N2; // select C, X, X -> X
2739 if (N2C->getZExtValue()) // Unconditional branch
2740 return getNode(ISD::BR, MVT::Other, N1, N3);
2742 return N1; // Never-taken branch
2745 case ISD::VECTOR_SHUFFLE:
2746 assert(N1.getValueType() == N2.getValueType() &&
2747 N1.getValueType().isVector() &&
2748 VT.isVector() && N3.getValueType().isVector() &&
2749 N3.getOpcode() == ISD::BUILD_VECTOR &&
2750 VT.getVectorNumElements() == N3.getNumOperands() &&
2751 "Illegal VECTOR_SHUFFLE node!");
2753 case ISD::BIT_CONVERT:
2754 // Fold bit_convert nodes from a type to themselves.
2755 if (N1.getValueType() == VT)
2760 // Memoize node if it doesn't produce a flag.
2762 SDVTList VTs = getVTList(VT);
2763 if (VT != MVT::Flag) {
2764 SDValue Ops[] = { N1, N2, N3 };
2765 FoldingSetNodeID ID;
2766 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2768 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2769 return SDValue(E, 0);
2770 N = NodeAllocator.Allocate<TernarySDNode>();
2771 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2772 CSEMap.InsertNode(N, IP);
2774 N = NodeAllocator.Allocate<TernarySDNode>();
2775 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2777 AllNodes.push_back(N);
2781 return SDValue(N, 0);
2784 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2785 SDValue N1, SDValue N2, SDValue N3,
2787 SDValue Ops[] = { N1, N2, N3, N4 };
2788 return getNode(Opcode, VT, Ops, 4);
2791 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2792 SDValue N1, SDValue N2, SDValue N3,
2793 SDValue N4, SDValue N5) {
2794 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2795 return getNode(Opcode, VT, Ops, 5);
2798 /// getMemsetValue - Vectorized representation of the memset value
2800 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2801 unsigned NumBits = VT.isVector() ?
2802 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2803 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2804 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2806 for (unsigned i = NumBits; i > 8; i >>= 1) {
2807 Val = (Val << Shift) | Val;
2811 return DAG.getConstant(Val, VT);
2812 return DAG.getConstantFP(APFloat(Val), VT);
2815 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2816 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2818 for (unsigned i = NumBits; i > 8; i >>= 1) {
2819 Value = DAG.getNode(ISD::OR, VT,
2820 DAG.getNode(ISD::SHL, VT, Value,
2821 DAG.getConstant(Shift,
2822 TLI.getShiftAmountTy())),
2830 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2831 /// used when a memcpy is turned into a memset when the source is a constant
2833 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2834 const TargetLowering &TLI,
2835 std::string &Str, unsigned Offset) {
2836 // Handle vector with all elements zero.
2839 return DAG.getConstant(0, VT);
2840 unsigned NumElts = VT.getVectorNumElements();
2841 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2842 return DAG.getNode(ISD::BIT_CONVERT, VT,
2843 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2846 assert(!VT.isVector() && "Can't handle vector type here!");
2847 unsigned NumBits = VT.getSizeInBits();
2848 unsigned MSB = NumBits / 8;
2850 if (TLI.isLittleEndian())
2851 Offset = Offset + MSB - 1;
2852 for (unsigned i = 0; i != MSB; ++i) {
2853 Val = (Val << 8) | (unsigned char)Str[Offset];
2854 Offset += TLI.isLittleEndian() ? -1 : 1;
2856 return DAG.getConstant(Val, VT);
2859 /// getMemBasePlusOffset - Returns base and offset node for the
2861 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2862 SelectionDAG &DAG) {
2863 MVT VT = Base.getValueType();
2864 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2867 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2869 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2870 unsigned SrcDelta = 0;
2871 GlobalAddressSDNode *G = NULL;
2872 if (Src.getOpcode() == ISD::GlobalAddress)
2873 G = cast<GlobalAddressSDNode>(Src);
2874 else if (Src.getOpcode() == ISD::ADD &&
2875 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2876 Src.getOperand(1).getOpcode() == ISD::Constant) {
2877 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2878 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2883 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2884 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2890 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2891 /// to replace the memset / memcpy is below the threshold. It also returns the
2892 /// types of the sequence of memory ops to perform memset / memcpy.
2894 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2895 SDValue Dst, SDValue Src,
2896 unsigned Limit, uint64_t Size, unsigned &Align,
2897 std::string &Str, bool &isSrcStr,
2899 const TargetLowering &TLI) {
2900 isSrcStr = isMemSrcFromString(Src, Str);
2901 bool isSrcConst = isa<ConstantSDNode>(Src);
2902 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2903 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2904 if (VT != MVT::iAny) {
2905 unsigned NewAlign = (unsigned)
2906 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2907 // If source is a string constant, this will require an unaligned load.
2908 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2909 if (Dst.getOpcode() != ISD::FrameIndex) {
2910 // Can't change destination alignment. It requires a unaligned store.
2914 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2915 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2916 if (MFI->isFixedObjectIndex(FI)) {
2917 // Can't change destination alignment. It requires a unaligned store.
2921 // Give the stack frame object a larger alignment if needed.
2922 if (MFI->getObjectAlignment(FI) < NewAlign)
2923 MFI->setObjectAlignment(FI, NewAlign);
2930 if (VT == MVT::iAny) {
2934 switch (Align & 7) {
2935 case 0: VT = MVT::i64; break;
2936 case 4: VT = MVT::i32; break;
2937 case 2: VT = MVT::i16; break;
2938 default: VT = MVT::i8; break;
2943 while (!TLI.isTypeLegal(LVT))
2944 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2945 assert(LVT.isInteger());
2951 unsigned NumMemOps = 0;
2953 unsigned VTSize = VT.getSizeInBits() / 8;
2954 while (VTSize > Size) {
2955 // For now, only use non-vector load / store's for the left-over pieces.
2956 if (VT.isVector()) {
2958 while (!TLI.isTypeLegal(VT))
2959 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2960 VTSize = VT.getSizeInBits() / 8;
2962 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2967 if (++NumMemOps > Limit)
2969 MemOps.push_back(VT);
2976 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2977 SDValue Chain, SDValue Dst,
2978 SDValue Src, uint64_t Size,
2979 unsigned Align, bool AlwaysInline,
2980 const Value *DstSV, uint64_t DstSVOff,
2981 const Value *SrcSV, uint64_t SrcSVOff){
2982 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2984 // Expand memcpy to a series of load and store ops if the size operand falls
2985 // below a certain threshold.
2986 std::vector<MVT> MemOps;
2987 uint64_t Limit = -1ULL;
2989 Limit = TLI.getMaxStoresPerMemcpy();
2990 unsigned DstAlign = Align; // Destination alignment can change.
2993 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2994 Str, CopyFromStr, DAG, TLI))
2998 bool isZeroStr = CopyFromStr && Str.empty();
2999 SmallVector<SDValue, 8> OutChains;
3000 unsigned NumMemOps = MemOps.size();
3001 uint64_t SrcOff = 0, DstOff = 0;
3002 for (unsigned i = 0; i < NumMemOps; i++) {
3004 unsigned VTSize = VT.getSizeInBits() / 8;
3005 SDValue Value, Store;
3007 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
3008 // It's unlikely a store of a vector immediate can be done in a single
3009 // instruction. It would require a load from a constantpool first.
3010 // We also handle store a vector with all zero's.
3011 // FIXME: Handle other cases where store of vector immediate is done in
3012 // a single instruction.
3013 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
3014 Store = DAG.getStore(Chain, Value,
3015 getMemBasePlusOffset(Dst, DstOff, DAG),
3016 DstSV, DstSVOff + DstOff, false, DstAlign);
3018 Value = DAG.getLoad(VT, Chain,
3019 getMemBasePlusOffset(Src, SrcOff, DAG),
3020 SrcSV, SrcSVOff + SrcOff, false, Align);
3021 Store = DAG.getStore(Chain, Value,
3022 getMemBasePlusOffset(Dst, DstOff, DAG),
3023 DstSV, DstSVOff + DstOff, false, DstAlign);
3025 OutChains.push_back(Store);
3030 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3031 &OutChains[0], OutChains.size());
3034 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3035 SDValue Chain, SDValue Dst,
3036 SDValue Src, uint64_t Size,
3037 unsigned Align, bool AlwaysInline,
3038 const Value *DstSV, uint64_t DstSVOff,
3039 const Value *SrcSV, uint64_t SrcSVOff){
3040 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3042 // Expand memmove to a series of load and store ops if the size operand falls
3043 // below a certain threshold.
3044 std::vector<MVT> MemOps;
3045 uint64_t Limit = -1ULL;
3047 Limit = TLI.getMaxStoresPerMemmove();
3048 unsigned DstAlign = Align; // Destination alignment can change.
3051 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3052 Str, CopyFromStr, DAG, TLI))
3055 uint64_t SrcOff = 0, DstOff = 0;
3057 SmallVector<SDValue, 8> LoadValues;
3058 SmallVector<SDValue, 8> LoadChains;
3059 SmallVector<SDValue, 8> OutChains;
3060 unsigned NumMemOps = MemOps.size();
3061 for (unsigned i = 0; i < NumMemOps; i++) {
3063 unsigned VTSize = VT.getSizeInBits() / 8;
3064 SDValue Value, Store;
3066 Value = DAG.getLoad(VT, Chain,
3067 getMemBasePlusOffset(Src, SrcOff, DAG),
3068 SrcSV, SrcSVOff + SrcOff, false, Align);
3069 LoadValues.push_back(Value);
3070 LoadChains.push_back(Value.getValue(1));
3073 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3074 &LoadChains[0], LoadChains.size());
3076 for (unsigned i = 0; i < NumMemOps; i++) {
3078 unsigned VTSize = VT.getSizeInBits() / 8;
3079 SDValue Value, Store;
3081 Store = DAG.getStore(Chain, LoadValues[i],
3082 getMemBasePlusOffset(Dst, DstOff, DAG),
3083 DstSV, DstSVOff + DstOff, false, DstAlign);
3084 OutChains.push_back(Store);
3088 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3089 &OutChains[0], OutChains.size());
3092 static SDValue getMemsetStores(SelectionDAG &DAG,
3093 SDValue Chain, SDValue Dst,
3094 SDValue Src, uint64_t Size,
3096 const Value *DstSV, uint64_t DstSVOff) {
3097 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3099 // Expand memset to a series of load/store ops if the size operand
3100 // falls below a certain threshold.
3101 std::vector<MVT> MemOps;
3104 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3105 Size, Align, Str, CopyFromStr, DAG, TLI))
3108 SmallVector<SDValue, 8> OutChains;
3109 uint64_t DstOff = 0;
3111 unsigned NumMemOps = MemOps.size();
3112 for (unsigned i = 0; i < NumMemOps; i++) {
3114 unsigned VTSize = VT.getSizeInBits() / 8;
3115 SDValue Value = getMemsetValue(Src, VT, DAG);
3116 SDValue Store = DAG.getStore(Chain, Value,
3117 getMemBasePlusOffset(Dst, DstOff, DAG),
3118 DstSV, DstSVOff + DstOff);
3119 OutChains.push_back(Store);
3123 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3124 &OutChains[0], OutChains.size());
3127 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3128 SDValue Src, SDValue Size,
3129 unsigned Align, bool AlwaysInline,
3130 const Value *DstSV, uint64_t DstSVOff,
3131 const Value *SrcSV, uint64_t SrcSVOff) {
3133 // Check to see if we should lower the memcpy to loads and stores first.
3134 // For cases within the target-specified limits, this is the best choice.
3135 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3137 // Memcpy with size zero? Just return the original chain.
3138 if (ConstantSize->isNullValue())
3142 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3143 ConstantSize->getZExtValue(),
3144 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3145 if (Result.getNode())
3149 // Then check to see if we should lower the memcpy with target-specific
3150 // code. If the target chooses to do this, this is the next best.
3152 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3154 DstSV, DstSVOff, SrcSV, SrcSVOff);
3155 if (Result.getNode())
3158 // If we really need inline code and the target declined to provide it,
3159 // use a (potentially long) sequence of loads and stores.
3161 assert(ConstantSize && "AlwaysInline requires a constant size!");
3162 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3163 ConstantSize->getZExtValue(), Align, true,
3164 DstSV, DstSVOff, SrcSV, SrcSVOff);
3167 // Emit a library call.
3168 TargetLowering::ArgListTy Args;
3169 TargetLowering::ArgListEntry Entry;
3170 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3171 Entry.Node = Dst; Args.push_back(Entry);
3172 Entry.Node = Src; Args.push_back(Entry);
3173 Entry.Node = Size; Args.push_back(Entry);
3174 std::pair<SDValue,SDValue> CallResult =
3175 TLI.LowerCallTo(Chain, Type::VoidTy,
3176 false, false, false, false, CallingConv::C, false,
3177 getExternalSymbol("memcpy", TLI.getPointerTy()),
3179 return CallResult.second;
3182 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3183 SDValue Src, SDValue Size,
3185 const Value *DstSV, uint64_t DstSVOff,
3186 const Value *SrcSV, uint64_t SrcSVOff) {
3188 // Check to see if we should lower the memmove to loads and stores first.
3189 // For cases within the target-specified limits, this is the best choice.
3190 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3192 // Memmove with size zero? Just return the original chain.
3193 if (ConstantSize->isNullValue())
3197 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3198 ConstantSize->getZExtValue(),
3199 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3200 if (Result.getNode())
3204 // Then check to see if we should lower the memmove with target-specific
3205 // code. If the target chooses to do this, this is the next best.
3207 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3208 DstSV, DstSVOff, SrcSV, SrcSVOff);
3209 if (Result.getNode())
3212 // Emit a library call.
3213 TargetLowering::ArgListTy Args;
3214 TargetLowering::ArgListEntry Entry;
3215 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3216 Entry.Node = Dst; Args.push_back(Entry);
3217 Entry.Node = Src; Args.push_back(Entry);
3218 Entry.Node = Size; Args.push_back(Entry);
3219 std::pair<SDValue,SDValue> CallResult =
3220 TLI.LowerCallTo(Chain, Type::VoidTy,
3221 false, false, false, false, CallingConv::C, false,
3222 getExternalSymbol("memmove", TLI.getPointerTy()),
3224 return CallResult.second;
3227 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3228 SDValue Src, SDValue Size,
3230 const Value *DstSV, uint64_t DstSVOff) {
3232 // Check to see if we should lower the memset to stores first.
3233 // For cases within the target-specified limits, this is the best choice.
3234 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3236 // Memset with size zero? Just return the original chain.
3237 if (ConstantSize->isNullValue())
3241 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3242 Align, DstSV, DstSVOff);
3243 if (Result.getNode())
3247 // Then check to see if we should lower the memset with target-specific
3248 // code. If the target chooses to do this, this is the next best.
3250 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3252 if (Result.getNode())
3255 // Emit a library call.
3256 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3257 TargetLowering::ArgListTy Args;
3258 TargetLowering::ArgListEntry Entry;
3259 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3260 Args.push_back(Entry);
3261 // Extend or truncate the argument to be an i32 value for the call.
3262 if (Src.getValueType().bitsGT(MVT::i32))
3263 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3265 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3266 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3267 Args.push_back(Entry);
3268 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3269 Args.push_back(Entry);
3270 std::pair<SDValue,SDValue> CallResult =
3271 TLI.LowerCallTo(Chain, Type::VoidTy,
3272 false, false, false, false, CallingConv::C, false,
3273 getExternalSymbol("memset", TLI.getPointerTy()),
3275 return CallResult.second;
3278 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3279 SDValue Ptr, SDValue Cmp,
3280 SDValue Swp, const Value* PtrVal,
3281 unsigned Alignment) {
3282 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 ||
3283 Opcode == ISD::ATOMIC_CMP_SWAP_16 ||
3284 Opcode == ISD::ATOMIC_CMP_SWAP_32 ||
3285 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op");
3286 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3288 MVT VT = Cmp.getValueType();
3290 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3291 Alignment = getMVTAlignment(VT);
3293 SDVTList VTs = getVTList(VT, MVT::Other);
3294 FoldingSetNodeID ID;
3295 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3296 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3299 return SDValue(E, 0);
3300 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3301 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3302 CSEMap.InsertNode(N, IP);
3303 AllNodes.push_back(N);
3304 return SDValue(N, 0);
3307 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3308 SDValue Ptr, SDValue Val,
3309 const Value* PtrVal,
3310 unsigned Alignment) {
3311 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 ||
3312 Opcode == ISD::ATOMIC_LOAD_SUB_8 ||
3313 Opcode == ISD::ATOMIC_LOAD_AND_8 ||
3314 Opcode == ISD::ATOMIC_LOAD_OR_8 ||
3315 Opcode == ISD::ATOMIC_LOAD_XOR_8 ||
3316 Opcode == ISD::ATOMIC_LOAD_NAND_8 ||
3317 Opcode == ISD::ATOMIC_LOAD_MIN_8 ||
3318 Opcode == ISD::ATOMIC_LOAD_MAX_8 ||
3319 Opcode == ISD::ATOMIC_LOAD_UMIN_8 ||
3320 Opcode == ISD::ATOMIC_LOAD_UMAX_8 ||
3321 Opcode == ISD::ATOMIC_SWAP_8 ||
3322 Opcode == ISD::ATOMIC_LOAD_ADD_16 ||
3323 Opcode == ISD::ATOMIC_LOAD_SUB_16 ||
3324 Opcode == ISD::ATOMIC_LOAD_AND_16 ||
3325 Opcode == ISD::ATOMIC_LOAD_OR_16 ||
3326 Opcode == ISD::ATOMIC_LOAD_XOR_16 ||
3327 Opcode == ISD::ATOMIC_LOAD_NAND_16 ||
3328 Opcode == ISD::ATOMIC_LOAD_MIN_16 ||
3329 Opcode == ISD::ATOMIC_LOAD_MAX_16 ||
3330 Opcode == ISD::ATOMIC_LOAD_UMIN_16 ||
3331 Opcode == ISD::ATOMIC_LOAD_UMAX_16 ||
3332 Opcode == ISD::ATOMIC_SWAP_16 ||
3333 Opcode == ISD::ATOMIC_LOAD_ADD_32 ||
3334 Opcode == ISD::ATOMIC_LOAD_SUB_32 ||
3335 Opcode == ISD::ATOMIC_LOAD_AND_32 ||
3336 Opcode == ISD::ATOMIC_LOAD_OR_32 ||
3337 Opcode == ISD::ATOMIC_LOAD_XOR_32 ||
3338 Opcode == ISD::ATOMIC_LOAD_NAND_32 ||
3339 Opcode == ISD::ATOMIC_LOAD_MIN_32 ||
3340 Opcode == ISD::ATOMIC_LOAD_MAX_32 ||
3341 Opcode == ISD::ATOMIC_LOAD_UMIN_32 ||
3342 Opcode == ISD::ATOMIC_LOAD_UMAX_32 ||
3343 Opcode == ISD::ATOMIC_SWAP_32 ||
3344 Opcode == ISD::ATOMIC_LOAD_ADD_64 ||
3345 Opcode == ISD::ATOMIC_LOAD_SUB_64 ||
3346 Opcode == ISD::ATOMIC_LOAD_AND_64 ||
3347 Opcode == ISD::ATOMIC_LOAD_OR_64 ||
3348 Opcode == ISD::ATOMIC_LOAD_XOR_64 ||
3349 Opcode == ISD::ATOMIC_LOAD_NAND_64 ||
3350 Opcode == ISD::ATOMIC_LOAD_MIN_64 ||
3351 Opcode == ISD::ATOMIC_LOAD_MAX_64 ||
3352 Opcode == ISD::ATOMIC_LOAD_UMIN_64 ||
3353 Opcode == ISD::ATOMIC_LOAD_UMAX_64 ||
3354 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op");
3356 MVT VT = Val.getValueType();
3358 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3359 Alignment = getMVTAlignment(VT);
3361 SDVTList VTs = getVTList(VT, MVT::Other);
3362 FoldingSetNodeID ID;
3363 SDValue Ops[] = {Chain, Ptr, Val};
3364 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3367 return SDValue(E, 0);
3368 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3369 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3370 CSEMap.InsertNode(N, IP);
3371 AllNodes.push_back(N);
3372 return SDValue(N, 0);
3375 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3376 /// Allowed to return something different (and simpler) if Simplify is true.
3377 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3381 SmallVector<MVT, 4> VTs;
3382 VTs.reserve(NumOps);
3383 for (unsigned i = 0; i < NumOps; ++i)
3384 VTs.push_back(Ops[i].getValueType());
3385 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3389 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3390 const MVT *VTs, unsigned NumVTs,
3391 const SDValue *Ops, unsigned NumOps,
3392 MVT MemVT, const Value *srcValue, int SVOff,
3393 unsigned Align, bool Vol,
3394 bool ReadMem, bool WriteMem) {
3395 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3396 MemVT, srcValue, SVOff, Align, Vol,
3401 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3402 const SDValue *Ops, unsigned NumOps,
3403 MVT MemVT, const Value *srcValue, int SVOff,
3404 unsigned Align, bool Vol,
3405 bool ReadMem, bool WriteMem) {
3406 // Memoize the node unless it returns a flag.
3407 MemIntrinsicSDNode *N;
3408 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3409 FoldingSetNodeID ID;
3410 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3412 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3413 return SDValue(E, 0);
3415 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3416 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3417 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3418 CSEMap.InsertNode(N, IP);
3420 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3421 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3422 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3424 AllNodes.push_back(N);
3425 return SDValue(N, 0);
3429 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3430 bool IsInreg, SDVTList VTs,
3431 const SDValue *Operands, unsigned NumOperands) {
3432 // Do not include isTailCall in the folding set profile.
3433 FoldingSetNodeID ID;
3434 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3435 ID.AddInteger(CallingConv);
3436 ID.AddInteger(IsVarArgs);
3438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3439 // Instead of including isTailCall in the folding set, we just
3440 // set the flag of the existing node.
3442 cast<CallSDNode>(E)->setNotTailCall();
3443 return SDValue(E, 0);
3445 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3446 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3447 VTs, Operands, NumOperands);
3448 CSEMap.InsertNode(N, IP);
3449 AllNodes.push_back(N);
3450 return SDValue(N, 0);
3454 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3455 MVT VT, SDValue Chain,
3456 SDValue Ptr, SDValue Offset,
3457 const Value *SV, int SVOffset, MVT EVT,
3458 bool isVolatile, unsigned Alignment) {
3459 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3460 Alignment = getMVTAlignment(VT);
3463 ExtType = ISD::NON_EXTLOAD;
3464 } else if (ExtType == ISD::NON_EXTLOAD) {
3465 assert(VT == EVT && "Non-extending load from different memory type!");
3469 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3470 "Invalid vector extload!");
3472 assert(EVT.bitsLT(VT) &&
3473 "Should only be an extending load, not truncating!");
3474 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3475 "Cannot sign/zero extend a FP/Vector load!");
3476 assert(VT.isInteger() == EVT.isInteger() &&
3477 "Cannot convert from FP to Int or Int -> FP!");
3480 bool Indexed = AM != ISD::UNINDEXED;
3481 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3482 "Unindexed load with an offset!");
3484 SDVTList VTs = Indexed ?
3485 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3486 SDValue Ops[] = { Chain, Ptr, Offset };
3487 FoldingSetNodeID ID;
3488 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3490 ID.AddInteger(ExtType);
3491 ID.AddInteger(EVT.getRawBits());
3492 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3494 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3495 return SDValue(E, 0);
3496 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3497 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3498 Alignment, isVolatile);
3499 CSEMap.InsertNode(N, IP);
3500 AllNodes.push_back(N);
3501 return SDValue(N, 0);
3504 SDValue SelectionDAG::getLoad(MVT VT,
3505 SDValue Chain, SDValue Ptr,
3506 const Value *SV, int SVOffset,
3507 bool isVolatile, unsigned Alignment) {
3508 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3509 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3510 SV, SVOffset, VT, isVolatile, Alignment);
3513 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3514 SDValue Chain, SDValue Ptr,
3516 int SVOffset, MVT EVT,
3517 bool isVolatile, unsigned Alignment) {
3518 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3519 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3520 SV, SVOffset, EVT, isVolatile, Alignment);
3524 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3525 SDValue Offset, ISD::MemIndexedMode AM) {
3526 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3527 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3528 "Load is already a indexed load!");
3529 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3530 LD->getChain(), Base, Offset, LD->getSrcValue(),
3531 LD->getSrcValueOffset(), LD->getMemoryVT(),
3532 LD->isVolatile(), LD->getAlignment());
3535 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3536 SDValue Ptr, const Value *SV, int SVOffset,
3537 bool isVolatile, unsigned Alignment) {
3538 MVT VT = Val.getValueType();
3540 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3541 Alignment = getMVTAlignment(VT);
3543 SDVTList VTs = getVTList(MVT::Other);
3544 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3545 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3546 FoldingSetNodeID ID;
3547 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3548 ID.AddInteger(ISD::UNINDEXED);
3549 ID.AddInteger(false);
3550 ID.AddInteger(VT.getRawBits());
3551 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3554 return SDValue(E, 0);
3555 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3556 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3557 VT, SV, SVOffset, Alignment, isVolatile);
3558 CSEMap.InsertNode(N, IP);
3559 AllNodes.push_back(N);
3560 return SDValue(N, 0);
3563 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3564 SDValue Ptr, const Value *SV,
3565 int SVOffset, MVT SVT,
3566 bool isVolatile, unsigned Alignment) {
3567 MVT VT = Val.getValueType();
3570 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3572 assert(VT.bitsGT(SVT) && "Not a truncation?");
3573 assert(VT.isInteger() == SVT.isInteger() &&
3574 "Can't do FP-INT conversion!");
3576 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3577 Alignment = getMVTAlignment(VT);
3579 SDVTList VTs = getVTList(MVT::Other);
3580 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3581 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3582 FoldingSetNodeID ID;
3583 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3584 ID.AddInteger(ISD::UNINDEXED);
3586 ID.AddInteger(SVT.getRawBits());
3587 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3589 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3590 return SDValue(E, 0);
3591 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3592 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3593 SVT, SV, SVOffset, Alignment, isVolatile);
3594 CSEMap.InsertNode(N, IP);
3595 AllNodes.push_back(N);
3596 return SDValue(N, 0);
3600 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3601 SDValue Offset, ISD::MemIndexedMode AM) {
3602 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3603 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3604 "Store is already a indexed store!");
3605 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3606 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3607 FoldingSetNodeID ID;
3608 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3610 ID.AddInteger(ST->isTruncatingStore());
3611 ID.AddInteger(ST->getMemoryVT().getRawBits());
3612 ID.AddInteger(ST->getRawFlags());
3614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3615 return SDValue(E, 0);
3616 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3617 new (N) StoreSDNode(Ops, VTs, AM,
3618 ST->isTruncatingStore(), ST->getMemoryVT(),
3619 ST->getSrcValue(), ST->getSrcValueOffset(),
3620 ST->getAlignment(), ST->isVolatile());
3621 CSEMap.InsertNode(N, IP);
3622 AllNodes.push_back(N);
3623 return SDValue(N, 0);
3626 SDValue SelectionDAG::getVAArg(MVT VT,
3627 SDValue Chain, SDValue Ptr,
3629 SDValue Ops[] = { Chain, Ptr, SV };
3630 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3633 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3634 const SDUse *Ops, unsigned NumOps) {
3636 case 0: return getNode(Opcode, VT);
3637 case 1: return getNode(Opcode, VT, Ops[0]);
3638 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3639 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3643 // Copy from an SDUse array into an SDValue array for use with
3644 // the regular getNode logic.
3645 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3646 return getNode(Opcode, VT, &NewOps[0], NumOps);
3649 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3650 const SDValue *Ops, unsigned NumOps) {
3652 case 0: return getNode(Opcode, VT);
3653 case 1: return getNode(Opcode, VT, Ops[0]);
3654 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3655 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3661 case ISD::SELECT_CC: {
3662 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3663 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3664 "LHS and RHS of condition must have same type!");
3665 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3666 "True and False arms of SelectCC must have same type!");
3667 assert(Ops[2].getValueType() == VT &&
3668 "select_cc node must be of same type as true and false value!");
3672 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3673 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3674 "LHS/RHS of comparison should match types!");
3681 SDVTList VTs = getVTList(VT);
3682 if (VT != MVT::Flag) {
3683 FoldingSetNodeID ID;
3684 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3687 return SDValue(E, 0);
3688 N = NodeAllocator.Allocate<SDNode>();
3689 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3690 CSEMap.InsertNode(N, IP);
3692 N = NodeAllocator.Allocate<SDNode>();
3693 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3695 AllNodes.push_back(N);
3699 return SDValue(N, 0);
3702 SDValue SelectionDAG::getNode(unsigned Opcode,
3703 const std::vector<MVT> &ResultTys,
3704 const SDValue *Ops, unsigned NumOps) {
3705 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3709 SDValue SelectionDAG::getNode(unsigned Opcode,
3710 const MVT *VTs, unsigned NumVTs,
3711 const SDValue *Ops, unsigned NumOps) {
3713 return getNode(Opcode, VTs[0], Ops, NumOps);
3714 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3717 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3718 const SDValue *Ops, unsigned NumOps) {
3719 if (VTList.NumVTs == 1)
3720 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3723 // FIXME: figure out how to safely handle things like
3724 // int foo(int x) { return 1 << (x & 255); }
3725 // int bar() { return foo(256); }
3727 case ISD::SRA_PARTS:
3728 case ISD::SRL_PARTS:
3729 case ISD::SHL_PARTS:
3730 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3731 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3732 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3733 else if (N3.getOpcode() == ISD::AND)
3734 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3735 // If the and is only masking out bits that cannot effect the shift,
3736 // eliminate the and.
3737 unsigned NumBits = VT.getSizeInBits()*2;
3738 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3739 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3745 // Memoize the node unless it returns a flag.
3747 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3748 FoldingSetNodeID ID;
3749 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3751 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3752 return SDValue(E, 0);
3754 N = NodeAllocator.Allocate<UnarySDNode>();
3755 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3756 } else if (NumOps == 2) {
3757 N = NodeAllocator.Allocate<BinarySDNode>();
3758 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3759 } else if (NumOps == 3) {
3760 N = NodeAllocator.Allocate<TernarySDNode>();
3761 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3763 N = NodeAllocator.Allocate<SDNode>();
3764 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3766 CSEMap.InsertNode(N, IP);
3769 N = NodeAllocator.Allocate<UnarySDNode>();
3770 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3771 } else if (NumOps == 2) {
3772 N = NodeAllocator.Allocate<BinarySDNode>();
3773 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3774 } else if (NumOps == 3) {
3775 N = NodeAllocator.Allocate<TernarySDNode>();
3776 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3778 N = NodeAllocator.Allocate<SDNode>();
3779 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3782 AllNodes.push_back(N);
3786 return SDValue(N, 0);
3789 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3790 return getNode(Opcode, VTList, 0, 0);
3793 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3795 SDValue Ops[] = { N1 };
3796 return getNode(Opcode, VTList, Ops, 1);
3799 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3800 SDValue N1, SDValue N2) {
3801 SDValue Ops[] = { N1, N2 };
3802 return getNode(Opcode, VTList, Ops, 2);
3805 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3806 SDValue N1, SDValue N2, SDValue N3) {
3807 SDValue Ops[] = { N1, N2, N3 };
3808 return getNode(Opcode, VTList, Ops, 3);
3811 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3812 SDValue N1, SDValue N2, SDValue N3,
3814 SDValue Ops[] = { N1, N2, N3, N4 };
3815 return getNode(Opcode, VTList, Ops, 4);
3818 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3819 SDValue N1, SDValue N2, SDValue N3,
3820 SDValue N4, SDValue N5) {
3821 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3822 return getNode(Opcode, VTList, Ops, 5);
3825 SDVTList SelectionDAG::getVTList(MVT VT) {
3826 return makeVTList(SDNode::getValueTypeList(VT), 1);
3829 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3830 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3831 E = VTList.rend(); I != E; ++I)
3832 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3835 MVT *Array = Allocator.Allocate<MVT>(2);
3838 SDVTList Result = makeVTList(Array, 2);
3839 VTList.push_back(Result);
3843 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3844 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3845 E = VTList.rend(); I != E; ++I)
3846 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3850 MVT *Array = Allocator.Allocate<MVT>(3);
3854 SDVTList Result = makeVTList(Array, 3);
3855 VTList.push_back(Result);
3859 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3860 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3861 E = VTList.rend(); I != E; ++I)
3862 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3863 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3866 MVT *Array = Allocator.Allocate<MVT>(3);
3871 SDVTList Result = makeVTList(Array, 4);
3872 VTList.push_back(Result);
3876 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3878 case 0: assert(0 && "Cannot have nodes without results!");
3879 case 1: return getVTList(VTs[0]);
3880 case 2: return getVTList(VTs[0], VTs[1]);
3881 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3885 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3886 E = VTList.rend(); I != E; ++I) {
3887 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3890 bool NoMatch = false;
3891 for (unsigned i = 2; i != NumVTs; ++i)
3892 if (VTs[i] != I->VTs[i]) {
3900 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3901 std::copy(VTs, VTs+NumVTs, Array);
3902 SDVTList Result = makeVTList(Array, NumVTs);
3903 VTList.push_back(Result);
3908 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3909 /// specified operands. If the resultant node already exists in the DAG,
3910 /// this does not modify the specified node, instead it returns the node that
3911 /// already exists. If the resultant node does not exist in the DAG, the
3912 /// input node is returned. As a degenerate case, if you specify the same
3913 /// input operands as the node already has, the input node is returned.
3914 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3915 SDNode *N = InN.getNode();
3916 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3918 // Check to see if there is no change.
3919 if (Op == N->getOperand(0)) return InN;
3921 // See if the modified node already exists.
3922 void *InsertPos = 0;
3923 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3924 return SDValue(Existing, InN.getResNo());
3926 // Nope it doesn't. Remove the node from its current place in the maps.
3928 if (!RemoveNodeFromCSEMaps(N))
3931 // Now we update the operands.
3932 N->OperandList[0].getVal()->removeUser(0, N);
3933 N->OperandList[0] = Op;
3934 N->OperandList[0].setUser(N);
3935 Op.getNode()->addUser(0, N);
3937 // If this gets put into a CSE map, add it.
3938 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3942 SDValue SelectionDAG::
3943 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3944 SDNode *N = InN.getNode();
3945 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3947 // Check to see if there is no change.
3948 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3949 return InN; // No operands changed, just return the input node.
3951 // See if the modified node already exists.
3952 void *InsertPos = 0;
3953 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3954 return SDValue(Existing, InN.getResNo());
3956 // Nope it doesn't. Remove the node from its current place in the maps.
3958 if (!RemoveNodeFromCSEMaps(N))
3961 // Now we update the operands.
3962 if (N->OperandList[0] != Op1) {
3963 N->OperandList[0].getVal()->removeUser(0, N);
3964 N->OperandList[0] = Op1;
3965 N->OperandList[0].setUser(N);
3966 Op1.getNode()->addUser(0, N);
3968 if (N->OperandList[1] != Op2) {
3969 N->OperandList[1].getVal()->removeUser(1, N);
3970 N->OperandList[1] = Op2;
3971 N->OperandList[1].setUser(N);
3972 Op2.getNode()->addUser(1, N);
3975 // If this gets put into a CSE map, add it.
3976 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3980 SDValue SelectionDAG::
3981 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3982 SDValue Ops[] = { Op1, Op2, Op3 };
3983 return UpdateNodeOperands(N, Ops, 3);
3986 SDValue SelectionDAG::
3987 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3988 SDValue Op3, SDValue Op4) {
3989 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3990 return UpdateNodeOperands(N, Ops, 4);
3993 SDValue SelectionDAG::
3994 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3995 SDValue Op3, SDValue Op4, SDValue Op5) {
3996 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3997 return UpdateNodeOperands(N, Ops, 5);
4000 SDValue SelectionDAG::
4001 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
4002 SDNode *N = InN.getNode();
4003 assert(N->getNumOperands() == NumOps &&
4004 "Update with wrong number of operands");
4006 // Check to see if there is no change.
4007 bool AnyChange = false;
4008 for (unsigned i = 0; i != NumOps; ++i) {
4009 if (Ops[i] != N->getOperand(i)) {
4015 // No operands changed, just return the input node.
4016 if (!AnyChange) return InN;
4018 // See if the modified node already exists.
4019 void *InsertPos = 0;
4020 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4021 return SDValue(Existing, InN.getResNo());
4023 // Nope it doesn't. Remove the node from its current place in the maps.
4025 if (!RemoveNodeFromCSEMaps(N))
4028 // Now we update the operands.
4029 for (unsigned i = 0; i != NumOps; ++i) {
4030 if (N->OperandList[i] != Ops[i]) {
4031 N->OperandList[i].getVal()->removeUser(i, N);
4032 N->OperandList[i] = Ops[i];
4033 N->OperandList[i].setUser(N);
4034 Ops[i].getNode()->addUser(i, N);
4038 // If this gets put into a CSE map, add it.
4039 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4043 /// DropOperands - Release the operands and set this node to have
4045 void SDNode::DropOperands() {
4046 // Unlike the code in MorphNodeTo that does this, we don't need to
4047 // watch for dead nodes here.
4048 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
4049 I->getVal()->removeUser(std::distance(op_begin(), I), this);
4054 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4057 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4059 SDVTList VTs = getVTList(VT);
4060 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4063 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4064 MVT VT, SDValue Op1) {
4065 SDVTList VTs = getVTList(VT);
4066 SDValue Ops[] = { Op1 };
4067 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4070 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4071 MVT VT, SDValue Op1,
4073 SDVTList VTs = getVTList(VT);
4074 SDValue Ops[] = { Op1, Op2 };
4075 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4078 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4079 MVT VT, SDValue Op1,
4080 SDValue Op2, SDValue Op3) {
4081 SDVTList VTs = getVTList(VT);
4082 SDValue Ops[] = { Op1, Op2, Op3 };
4083 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4086 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4087 MVT VT, const SDValue *Ops,
4089 SDVTList VTs = getVTList(VT);
4090 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4093 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4094 MVT VT1, MVT VT2, const SDValue *Ops,
4096 SDVTList VTs = getVTList(VT1, VT2);
4097 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4100 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4102 SDVTList VTs = getVTList(VT1, VT2);
4103 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4106 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4107 MVT VT1, MVT VT2, MVT VT3,
4108 const SDValue *Ops, unsigned NumOps) {
4109 SDVTList VTs = getVTList(VT1, VT2, VT3);
4110 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4113 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4114 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4115 const SDValue *Ops, unsigned NumOps) {
4116 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4117 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4120 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4123 SDVTList VTs = getVTList(VT1, VT2);
4124 SDValue Ops[] = { Op1 };
4125 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4128 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4130 SDValue Op1, SDValue Op2) {
4131 SDVTList VTs = getVTList(VT1, VT2);
4132 SDValue Ops[] = { Op1, Op2 };
4133 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4136 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4138 SDValue Op1, SDValue Op2,
4140 SDVTList VTs = getVTList(VT1, VT2);
4141 SDValue Ops[] = { Op1, Op2, Op3 };
4142 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4145 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4146 MVT VT1, MVT VT2, MVT VT3,
4147 SDValue Op1, SDValue Op2,
4149 SDVTList VTs = getVTList(VT1, VT2, VT3);
4150 SDValue Ops[] = { Op1, Op2, Op3 };
4151 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4154 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4155 SDVTList VTs, const SDValue *Ops,
4157 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4160 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4162 SDVTList VTs = getVTList(VT);
4163 return MorphNodeTo(N, Opc, VTs, 0, 0);
4166 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4167 MVT VT, SDValue Op1) {
4168 SDVTList VTs = getVTList(VT);
4169 SDValue Ops[] = { Op1 };
4170 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4173 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4174 MVT VT, SDValue Op1,
4176 SDVTList VTs = getVTList(VT);
4177 SDValue Ops[] = { Op1, Op2 };
4178 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4181 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4182 MVT VT, SDValue Op1,
4183 SDValue Op2, SDValue Op3) {
4184 SDVTList VTs = getVTList(VT);
4185 SDValue Ops[] = { Op1, Op2, Op3 };
4186 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4189 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4190 MVT VT, const SDValue *Ops,
4192 SDVTList VTs = getVTList(VT);
4193 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4196 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4197 MVT VT1, MVT VT2, const SDValue *Ops,
4199 SDVTList VTs = getVTList(VT1, VT2);
4200 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4203 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4205 SDVTList VTs = getVTList(VT1, VT2);
4206 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4209 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4210 MVT VT1, MVT VT2, MVT VT3,
4211 const SDValue *Ops, unsigned NumOps) {
4212 SDVTList VTs = getVTList(VT1, VT2, VT3);
4213 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4216 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4219 SDVTList VTs = getVTList(VT1, VT2);
4220 SDValue Ops[] = { Op1 };
4221 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4224 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4226 SDValue Op1, SDValue Op2) {
4227 SDVTList VTs = getVTList(VT1, VT2);
4228 SDValue Ops[] = { Op1, Op2 };
4229 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4232 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4234 SDValue Op1, SDValue Op2,
4236 SDVTList VTs = getVTList(VT1, VT2);
4237 SDValue Ops[] = { Op1, Op2, Op3 };
4238 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4241 /// MorphNodeTo - These *mutate* the specified node to have the specified
4242 /// return type, opcode, and operands.
4244 /// Note that MorphNodeTo returns the resultant node. If there is already a
4245 /// node of the specified opcode and operands, it returns that node instead of
4246 /// the current one.
4248 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4249 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4250 /// node, and because it doesn't require CSE recalculation for any of
4251 /// the node's users.
4253 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4254 SDVTList VTs, const SDValue *Ops,
4256 // If an identical node already exists, use it.
4258 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4259 FoldingSetNodeID ID;
4260 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4261 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4265 if (!RemoveNodeFromCSEMaps(N))
4268 // Start the morphing.
4270 N->ValueList = VTs.VTs;
4271 N->NumValues = VTs.NumVTs;
4273 // Clear the operands list, updating used nodes to remove this from their
4274 // use list. Keep track of any operands that become dead as a result.
4275 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4276 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4278 SDNode *Used = I->getVal();
4279 Used->removeUser(std::distance(B, I), N);
4280 if (Used->use_empty())
4281 DeadNodeSet.insert(Used);
4284 // If NumOps is larger than the # of operands we currently have, reallocate
4285 // the operand list.
4286 if (NumOps > N->NumOperands) {
4287 if (N->OperandsNeedDelete)
4288 delete[] N->OperandList;
4290 if (N->isMachineOpcode()) {
4291 // We're creating a final node that will live unmorphed for the
4292 // remainder of the current SelectionDAG iteration, so we can allocate
4293 // the operands directly out of a pool with no recycling metadata.
4294 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4295 N->OperandsNeedDelete = false;
4297 N->OperandList = new SDUse[NumOps];
4298 N->OperandsNeedDelete = true;
4302 // Assign the new operands.
4303 N->NumOperands = NumOps;
4304 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4305 N->OperandList[i] = Ops[i];
4306 N->OperandList[i].setUser(N);
4307 SDNode *ToUse = N->OperandList[i].getVal();
4308 ToUse->addUser(i, N);
4311 // Delete any nodes that are still dead after adding the uses for the
4313 SmallVector<SDNode *, 16> DeadNodes;
4314 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4315 E = DeadNodeSet.end(); I != E; ++I)
4316 if ((*I)->use_empty())
4317 DeadNodes.push_back(*I);
4318 RemoveDeadNodes(DeadNodes);
4321 CSEMap.InsertNode(N, IP); // Memoize the new node.
4326 /// getTargetNode - These are used for target selectors to create a new node
4327 /// with specified return type(s), target opcode, and operands.
4329 /// Note that getTargetNode returns the resultant node. If there is already a
4330 /// node of the specified opcode and operands, it returns that node instead of
4331 /// the current one.
4332 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4333 return getNode(~Opcode, VT).getNode();
4335 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4336 return getNode(~Opcode, VT, Op1).getNode();
4338 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4339 SDValue Op1, SDValue Op2) {
4340 return getNode(~Opcode, VT, Op1, Op2).getNode();
4342 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4343 SDValue Op1, SDValue Op2,
4345 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4347 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4348 const SDValue *Ops, unsigned NumOps) {
4349 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4351 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4352 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4354 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4356 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4357 MVT VT2, SDValue Op1) {
4358 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4359 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4361 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4362 MVT VT2, SDValue Op1,
4364 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4365 SDValue Ops[] = { Op1, Op2 };
4366 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4368 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4369 MVT VT2, SDValue Op1,
4370 SDValue Op2, SDValue Op3) {
4371 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4372 SDValue Ops[] = { Op1, Op2, Op3 };
4373 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4375 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4376 const SDValue *Ops, unsigned NumOps) {
4377 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4378 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4380 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4381 SDValue Op1, SDValue Op2) {
4382 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4383 SDValue Ops[] = { Op1, Op2 };
4384 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4386 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4387 SDValue Op1, SDValue Op2,
4389 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4390 SDValue Ops[] = { Op1, Op2, Op3 };
4391 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4393 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4394 const SDValue *Ops, unsigned NumOps) {
4395 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4396 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4398 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4399 MVT VT2, MVT VT3, MVT VT4,
4400 const SDValue *Ops, unsigned NumOps) {
4401 std::vector<MVT> VTList;
4402 VTList.push_back(VT1);
4403 VTList.push_back(VT2);
4404 VTList.push_back(VT3);
4405 VTList.push_back(VT4);
4406 const MVT *VTs = getNodeValueTypes(VTList);
4407 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4409 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4410 const std::vector<MVT> &ResultTys,
4411 const SDValue *Ops, unsigned NumOps) {
4412 const MVT *VTs = getNodeValueTypes(ResultTys);
4413 return getNode(~Opcode, VTs, ResultTys.size(),
4414 Ops, NumOps).getNode();
4417 /// getNodeIfExists - Get the specified node if it's already available, or
4418 /// else return NULL.
4419 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4420 const SDValue *Ops, unsigned NumOps) {
4421 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4422 FoldingSetNodeID ID;
4423 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4425 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4432 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4433 /// This can cause recursive merging of nodes in the DAG.
4435 /// This version assumes From has a single result value.
4437 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4438 DAGUpdateListener *UpdateListener) {
4439 SDNode *From = FromN.getNode();
4440 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4441 "Cannot replace with this method!");
4442 assert(From != To.getNode() && "Cannot replace uses of with self");
4444 while (!From->use_empty()) {
4445 SDNode::use_iterator UI = From->use_begin();
4448 // This node is about to morph, remove its old self from the CSE maps.
4449 RemoveNodeFromCSEMaps(U);
4451 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4452 I != E; ++I, ++operandNum)
4453 if (I->getVal() == From) {
4454 From->removeUser(operandNum, U);
4457 To.getNode()->addUser(operandNum, U);
4460 // Now that we have modified U, add it back to the CSE maps. If it already
4461 // exists there, recursively merge the results together.
4462 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4463 ReplaceAllUsesWith(U, Existing, UpdateListener);
4464 // U is now dead. Inform the listener if it exists and delete it.
4466 UpdateListener->NodeDeleted(U, Existing);
4467 DeleteNodeNotInCSEMaps(U);
4469 // If the node doesn't already exist, we updated it. Inform a listener if
4472 UpdateListener->NodeUpdated(U);
4477 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4478 /// This can cause recursive merging of nodes in the DAG.
4480 /// This version assumes From/To have matching types and numbers of result
4483 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4484 DAGUpdateListener *UpdateListener) {
4485 assert(From->getVTList().VTs == To->getVTList().VTs &&
4486 From->getNumValues() == To->getNumValues() &&
4487 "Cannot use this version of ReplaceAllUsesWith!");
4489 // Handle the trivial case.
4493 while (!From->use_empty()) {
4494 SDNode::use_iterator UI = From->use_begin();
4497 // This node is about to morph, remove its old self from the CSE maps.
4498 RemoveNodeFromCSEMaps(U);
4500 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4501 I != E; ++I, ++operandNum)
4502 if (I->getVal() == From) {
4503 From->removeUser(operandNum, U);
4504 I->getSDValue().setNode(To);
4505 To->addUser(operandNum, U);
4508 // Now that we have modified U, add it back to the CSE maps. If it already
4509 // exists there, recursively merge the results together.
4510 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4511 ReplaceAllUsesWith(U, Existing, UpdateListener);
4512 // U is now dead. Inform the listener if it exists and delete it.
4514 UpdateListener->NodeDeleted(U, Existing);
4515 DeleteNodeNotInCSEMaps(U);
4517 // If the node doesn't already exist, we updated it. Inform a listener if
4520 UpdateListener->NodeUpdated(U);
4525 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4526 /// This can cause recursive merging of nodes in the DAG.
4528 /// This version can replace From with any result values. To must match the
4529 /// number and types of values returned by From.
4530 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4532 DAGUpdateListener *UpdateListener) {
4533 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4534 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4536 while (!From->use_empty()) {
4537 SDNode::use_iterator UI = From->use_begin();
4540 // This node is about to morph, remove its old self from the CSE maps.
4541 RemoveNodeFromCSEMaps(U);
4543 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4544 I != E; ++I, ++operandNum)
4545 if (I->getVal() == From) {
4546 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4547 From->removeUser(operandNum, U);
4550 ToOp.getNode()->addUser(operandNum, U);
4553 // Now that we have modified U, add it back to the CSE maps. If it already
4554 // exists there, recursively merge the results together.
4555 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4556 ReplaceAllUsesWith(U, Existing, UpdateListener);
4557 // U is now dead. Inform the listener if it exists and delete it.
4559 UpdateListener->NodeDeleted(U, Existing);
4560 DeleteNodeNotInCSEMaps(U);
4562 // If the node doesn't already exist, we updated it. Inform a listener if
4565 UpdateListener->NodeUpdated(U);
4570 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4571 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4572 /// handled the same way as for ReplaceAllUsesWith.
4573 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4574 DAGUpdateListener *UpdateListener){
4575 // Handle the really simple, really trivial case efficiently.
4576 if (From == To) return;
4578 // Handle the simple, trivial, case efficiently.
4579 if (From.getNode()->getNumValues() == 1) {
4580 ReplaceAllUsesWith(From, To, UpdateListener);
4584 // Get all of the users of From.getNode(). We want these in a nice,
4585 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4586 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4588 while (!Users.empty()) {
4589 // We know that this user uses some value of From. If it is the right
4590 // value, update it.
4591 SDNode *User = Users.back();
4594 // Scan for an operand that matches From.
4595 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4596 for (; Op != E; ++Op)
4597 if (*Op == From) break;
4599 // If there are no matches, the user must use some other result of From.
4600 if (Op == E) continue;
4602 // Okay, we know this user needs to be updated. Remove its old self
4603 // from the CSE maps.
4604 RemoveNodeFromCSEMaps(User);
4606 // Update all operands that match "From" in case there are multiple uses.
4607 for (; Op != E; ++Op) {
4609 From.getNode()->removeUser(Op-User->op_begin(), User);
4612 To.getNode()->addUser(Op-User->op_begin(), User);
4616 // Now that we have modified User, add it back to the CSE maps. If it
4617 // already exists there, recursively merge the results together.
4618 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4620 if (UpdateListener) UpdateListener->NodeUpdated(User);
4621 continue; // Continue on to next user.
4624 // If there was already an existing matching node, use ReplaceAllUsesWith
4625 // to replace the dead one with the existing one. This can cause
4626 // recursive merging of other unrelated nodes down the line.
4627 ReplaceAllUsesWith(User, Existing, UpdateListener);
4629 // User is now dead. Notify a listener if present.
4630 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4631 DeleteNodeNotInCSEMaps(User);
4635 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4636 /// uses of other values produced by From.getVal() alone. The same value may
4637 /// appear in both the From and To list. The Deleted vector is
4638 /// handled the same way as for ReplaceAllUsesWith.
4639 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4642 DAGUpdateListener *UpdateListener){
4643 // Handle the simple, trivial case efficiently.
4645 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4647 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4648 for (unsigned i = 0; i != Num; ++i)
4649 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4650 E = From[i].getNode()->use_end(); UI != E; ++UI)
4651 Users.push_back(std::make_pair(*UI, i));
4653 while (!Users.empty()) {
4654 // We know that this user uses some value of From. If it is the right
4655 // value, update it.
4656 SDNode *User = Users.back().first;
4657 unsigned i = Users.back().second;
4660 // Scan for an operand that matches From.
4661 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4662 for (; Op != E; ++Op)
4663 if (*Op == From[i]) break;
4665 // If there are no matches, the user must use some other result of From.
4666 if (Op == E) continue;
4668 // Okay, we know this user needs to be updated. Remove its old self
4669 // from the CSE maps.
4670 RemoveNodeFromCSEMaps(User);
4672 // Update all operands that match "From" in case there are multiple uses.
4673 for (; Op != E; ++Op) {
4674 if (*Op == From[i]) {
4675 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4678 To[i].getNode()->addUser(Op-User->op_begin(), User);
4682 // Now that we have modified User, add it back to the CSE maps. If it
4683 // already exists there, recursively merge the results together.
4684 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4686 if (UpdateListener) UpdateListener->NodeUpdated(User);
4687 continue; // Continue on to next user.
4690 // If there was already an existing matching node, use ReplaceAllUsesWith
4691 // to replace the dead one with the existing one. This can cause
4692 // recursive merging of other unrelated nodes down the line.
4693 ReplaceAllUsesWith(User, Existing, UpdateListener);
4695 // User is now dead. Notify a listener if present.
4696 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4697 DeleteNodeNotInCSEMaps(User);
4701 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4702 /// based on their topological order. It returns the maximum id and a vector
4703 /// of the SDNodes* in assigned order by reference.
4704 unsigned SelectionDAG::AssignTopologicalOrder() {
4706 unsigned DAGSize = 0;
4708 // SortedPos tracks the progress of the algorithm. Nodes before it are
4709 // sorted, nodes after it are unsorted. When the algorithm completes
4710 // it is at the end of the list.
4711 allnodes_iterator SortedPos = allnodes_begin();
4713 // Visit all the nodes. Move nodes with no operands to the front of
4714 // the list immediately. Annotate nodes that do have operands with their
4715 // operand count. Before we do this, the Node Id fields of the nodes
4716 // may contain arbitrary values. After, the Node Id fields for nodes
4717 // before SortedPos will contain the topological sort index, and the
4718 // Node Id fields for nodes At SortedPos and after will contain the
4719 // count of outstanding operands.
4720 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4722 unsigned Degree = N->getNumOperands();
4724 // A node with no uses, add it to the result array immediately.
4725 N->setNodeId(DAGSize++);
4726 allnodes_iterator Q = N;
4728 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4731 // Temporarily use the Node Id as scratch space for the degree count.
4732 N->setNodeId(Degree);
4736 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4737 // such that by the time the end is reached all nodes will be sorted.
4738 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4740 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4743 unsigned Degree = P->getNodeId();
4746 // All of P's operands are sorted, so P may sorted now.
4747 P->setNodeId(DAGSize++);
4749 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4752 // Update P's outstanding operand count.
4753 P->setNodeId(Degree);
4758 assert(SortedPos == AllNodes.end() &&
4759 "Topological sort incomplete!");
4760 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4761 "First node in topological sort is not the entry token!");
4762 assert(AllNodes.front().getNodeId() == 0 &&
4763 "First node in topological sort has non-zero id!");
4764 assert(AllNodes.front().getNumOperands() == 0 &&
4765 "First node in topological sort has operands!");
4766 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4767 "Last node in topologic sort has unexpected id!");
4768 assert(AllNodes.back().use_empty() &&
4769 "Last node in topologic sort has users!");
4770 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4776 //===----------------------------------------------------------------------===//
4778 //===----------------------------------------------------------------------===//
4780 // Out-of-line virtual method to give class a home.
4781 void SDNode::ANCHOR() {}
4782 void UnarySDNode::ANCHOR() {}
4783 void BinarySDNode::ANCHOR() {}
4784 void TernarySDNode::ANCHOR() {}
4785 void HandleSDNode::ANCHOR() {}
4786 void ConstantSDNode::ANCHOR() {}
4787 void ConstantFPSDNode::ANCHOR() {}
4788 void GlobalAddressSDNode::ANCHOR() {}
4789 void FrameIndexSDNode::ANCHOR() {}
4790 void JumpTableSDNode::ANCHOR() {}
4791 void ConstantPoolSDNode::ANCHOR() {}
4792 void BasicBlockSDNode::ANCHOR() {}
4793 void SrcValueSDNode::ANCHOR() {}
4794 void MemOperandSDNode::ANCHOR() {}
4795 void RegisterSDNode::ANCHOR() {}
4796 void DbgStopPointSDNode::ANCHOR() {}
4797 void LabelSDNode::ANCHOR() {}
4798 void ExternalSymbolSDNode::ANCHOR() {}
4799 void CondCodeSDNode::ANCHOR() {}
4800 void ARG_FLAGSSDNode::ANCHOR() {}
4801 void VTSDNode::ANCHOR() {}
4802 void MemSDNode::ANCHOR() {}
4803 void LoadSDNode::ANCHOR() {}
4804 void StoreSDNode::ANCHOR() {}
4805 void AtomicSDNode::ANCHOR() {}
4806 void MemIntrinsicSDNode::ANCHOR() {}
4807 void CallSDNode::ANCHOR() {}
4808 void CvtRndSatSDNode::ANCHOR() {}
4810 HandleSDNode::~HandleSDNode() {
4814 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4816 : SDNode(isa<GlobalVariable>(GA) &&
4817 cast<GlobalVariable>(GA)->isThreadLocal() ?
4819 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4821 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4822 getSDVTList(VT)), Offset(o) {
4823 TheGlobal = const_cast<GlobalValue*>(GA);
4826 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4827 const Value *srcValue, int SVO,
4828 unsigned alignment, bool vol)
4829 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4830 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4832 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4833 assert(getAlignment() == alignment && "Alignment representation error!");
4834 assert(isVolatile() == vol && "Volatile representation error!");
4837 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4838 unsigned NumOps, MVT memvt, const Value *srcValue,
4839 int SVO, unsigned alignment, bool vol)
4840 : SDNode(Opc, VTs, Ops, NumOps),
4841 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4842 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4843 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4844 assert(getAlignment() == alignment && "Alignment representation error!");
4845 assert(isVolatile() == vol && "Volatile representation error!");
4848 /// getMemOperand - Return a MachineMemOperand object describing the memory
4849 /// reference performed by this memory reference.
4850 MachineMemOperand MemSDNode::getMemOperand() const {
4852 if (isa<LoadSDNode>(this))
4853 Flags = MachineMemOperand::MOLoad;
4854 else if (isa<StoreSDNode>(this))
4855 Flags = MachineMemOperand::MOStore;
4856 else if (isa<AtomicSDNode>(this)) {
4857 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4860 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4861 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4862 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4863 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4866 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4867 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4869 // Check if the memory reference references a frame index
4870 const FrameIndexSDNode *FI =
4871 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4872 if (!getSrcValue() && FI)
4873 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4874 Flags, 0, Size, getAlignment());
4876 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4877 Size, getAlignment());
4880 /// Profile - Gather unique data for the node.
4882 void SDNode::Profile(FoldingSetNodeID &ID) const {
4883 AddNodeIDNode(ID, this);
4886 /// getValueTypeList - Return a pointer to the specified value type.
4888 const MVT *SDNode::getValueTypeList(MVT VT) {
4889 if (VT.isExtended()) {
4890 static std::set<MVT, MVT::compareRawBits> EVTs;
4891 return &(*EVTs.insert(VT).first);
4893 static MVT VTs[MVT::LAST_VALUETYPE];
4894 VTs[VT.getSimpleVT()] = VT;
4895 return &VTs[VT.getSimpleVT()];
4899 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4900 /// indicated value. This method ignores uses of other values defined by this
4902 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4903 assert(Value < getNumValues() && "Bad value!");
4905 // TODO: Only iterate over uses of a given value of the node
4906 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4907 if (UI.getUse().getSDValue().getResNo() == Value) {
4914 // Found exactly the right number of uses?
4919 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4920 /// value. This method ignores uses of other values defined by this operation.
4921 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4922 assert(Value < getNumValues() && "Bad value!");
4924 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4925 if (UI.getUse().getSDValue().getResNo() == Value)
4932 /// isOnlyUserOf - Return true if this node is the only use of N.
4934 bool SDNode::isOnlyUserOf(SDNode *N) const {
4936 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4947 /// isOperand - Return true if this node is an operand of N.
4949 bool SDValue::isOperandOf(SDNode *N) const {
4950 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4951 if (*this == N->getOperand(i))
4956 bool SDNode::isOperandOf(SDNode *N) const {
4957 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4958 if (this == N->OperandList[i].getVal())
4963 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4964 /// be a chain) reaches the specified operand without crossing any
4965 /// side-effecting instructions. In practice, this looks through token
4966 /// factors and non-volatile loads. In order to remain efficient, this only
4967 /// looks a couple of nodes in, it does not do an exhaustive search.
4968 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4969 unsigned Depth) const {
4970 if (*this == Dest) return true;
4972 // Don't search too deeply, we just want to be able to see through
4973 // TokenFactor's etc.
4974 if (Depth == 0) return false;
4976 // If this is a token factor, all inputs to the TF happen in parallel. If any
4977 // of the operands of the TF reach dest, then we can do the xform.
4978 if (getOpcode() == ISD::TokenFactor) {
4979 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4980 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4985 // Loads don't have side effects, look through them.
4986 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4987 if (!Ld->isVolatile())
4988 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4994 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4995 SmallPtrSet<SDNode *, 32> &Visited) {
4996 if (found || !Visited.insert(N))
4999 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
5000 SDNode *Op = N->getOperand(i).getNode();
5005 findPredecessor(Op, P, found, Visited);
5009 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5010 /// is either an operand of N or it can be reached by recursively traversing
5011 /// up the operands.
5012 /// NOTE: this is an expensive method. Use it carefully.
5013 bool SDNode::isPredecessorOf(SDNode *N) const {
5014 SmallPtrSet<SDNode *, 32> Visited;
5016 findPredecessor(N, this, found, Visited);
5020 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5021 assert(Num < NumOperands && "Invalid child # of SDNode!");
5022 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5025 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5026 switch (getOpcode()) {
5028 if (getOpcode() < ISD::BUILTIN_OP_END)
5029 return "<<Unknown DAG Node>>";
5030 if (isMachineOpcode()) {
5032 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5033 if (getMachineOpcode() < TII->getNumOpcodes())
5034 return TII->get(getMachineOpcode()).getName();
5035 return "<<Unknown Machine Node>>";
5038 TargetLowering &TLI = G->getTargetLoweringInfo();
5039 const char *Name = TLI.getTargetNodeName(getOpcode());
5040 if (Name) return Name;
5041 return "<<Unknown Target Node>>";
5043 return "<<Unknown Node>>";
5046 case ISD::DELETED_NODE:
5047 return "<<Deleted Node!>>";
5049 case ISD::PREFETCH: return "Prefetch";
5050 case ISD::MEMBARRIER: return "MemBarrier";
5051 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8";
5052 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8";
5053 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8";
5054 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8";
5055 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8";
5056 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8";
5057 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8";
5058 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8";
5059 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8";
5060 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8";
5061 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8";
5062 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8";
5063 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16";
5064 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16";
5065 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16";
5066 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16";
5067 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16";
5068 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16";
5069 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16";
5070 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16";
5071 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16";
5072 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16";
5073 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16";
5074 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16";
5075 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32";
5076 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32";
5077 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32";
5078 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32";
5079 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32";
5080 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32";
5081 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32";
5082 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32";
5083 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32";
5084 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32";
5085 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32";
5086 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32";
5087 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64";
5088 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64";
5089 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64";
5090 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64";
5091 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64";
5092 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64";
5093 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64";
5094 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64";
5095 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64";
5096 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64";
5097 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64";
5098 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64";
5099 case ISD::PCMARKER: return "PCMarker";
5100 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5101 case ISD::SRCVALUE: return "SrcValue";
5102 case ISD::MEMOPERAND: return "MemOperand";
5103 case ISD::EntryToken: return "EntryToken";
5104 case ISD::TokenFactor: return "TokenFactor";
5105 case ISD::AssertSext: return "AssertSext";
5106 case ISD::AssertZext: return "AssertZext";
5108 case ISD::BasicBlock: return "BasicBlock";
5109 case ISD::ARG_FLAGS: return "ArgFlags";
5110 case ISD::VALUETYPE: return "ValueType";
5111 case ISD::Register: return "Register";
5113 case ISD::Constant: return "Constant";
5114 case ISD::ConstantFP: return "ConstantFP";
5115 case ISD::GlobalAddress: return "GlobalAddress";
5116 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5117 case ISD::FrameIndex: return "FrameIndex";
5118 case ISD::JumpTable: return "JumpTable";
5119 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5120 case ISD::RETURNADDR: return "RETURNADDR";
5121 case ISD::FRAMEADDR: return "FRAMEADDR";
5122 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5123 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5124 case ISD::EHSELECTION: return "EHSELECTION";
5125 case ISD::EH_RETURN: return "EH_RETURN";
5126 case ISD::ConstantPool: return "ConstantPool";
5127 case ISD::ExternalSymbol: return "ExternalSymbol";
5128 case ISD::INTRINSIC_WO_CHAIN: {
5129 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5130 return Intrinsic::getName((Intrinsic::ID)IID);
5132 case ISD::INTRINSIC_VOID:
5133 case ISD::INTRINSIC_W_CHAIN: {
5134 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5135 return Intrinsic::getName((Intrinsic::ID)IID);
5138 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5139 case ISD::TargetConstant: return "TargetConstant";
5140 case ISD::TargetConstantFP:return "TargetConstantFP";
5141 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5142 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5143 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5144 case ISD::TargetJumpTable: return "TargetJumpTable";
5145 case ISD::TargetConstantPool: return "TargetConstantPool";
5146 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5148 case ISD::CopyToReg: return "CopyToReg";
5149 case ISD::CopyFromReg: return "CopyFromReg";
5150 case ISD::UNDEF: return "undef";
5151 case ISD::MERGE_VALUES: return "merge_values";
5152 case ISD::INLINEASM: return "inlineasm";
5153 case ISD::DBG_LABEL: return "dbg_label";
5154 case ISD::EH_LABEL: return "eh_label";
5155 case ISD::DECLARE: return "declare";
5156 case ISD::HANDLENODE: return "handlenode";
5157 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5158 case ISD::CALL: return "call";
5161 case ISD::FABS: return "fabs";
5162 case ISD::FNEG: return "fneg";
5163 case ISD::FSQRT: return "fsqrt";
5164 case ISD::FSIN: return "fsin";
5165 case ISD::FCOS: return "fcos";
5166 case ISD::FPOWI: return "fpowi";
5167 case ISD::FPOW: return "fpow";
5168 case ISD::FTRUNC: return "ftrunc";
5169 case ISD::FFLOOR: return "ffloor";
5170 case ISD::FCEIL: return "fceil";
5171 case ISD::FRINT: return "frint";
5172 case ISD::FNEARBYINT: return "fnearbyint";
5175 case ISD::ADD: return "add";
5176 case ISD::SUB: return "sub";
5177 case ISD::MUL: return "mul";
5178 case ISD::MULHU: return "mulhu";
5179 case ISD::MULHS: return "mulhs";
5180 case ISD::SDIV: return "sdiv";
5181 case ISD::UDIV: return "udiv";
5182 case ISD::SREM: return "srem";
5183 case ISD::UREM: return "urem";
5184 case ISD::SMUL_LOHI: return "smul_lohi";
5185 case ISD::UMUL_LOHI: return "umul_lohi";
5186 case ISD::SDIVREM: return "sdivrem";
5187 case ISD::UDIVREM: return "udivrem";
5188 case ISD::AND: return "and";
5189 case ISD::OR: return "or";
5190 case ISD::XOR: return "xor";
5191 case ISD::SHL: return "shl";
5192 case ISD::SRA: return "sra";
5193 case ISD::SRL: return "srl";
5194 case ISD::ROTL: return "rotl";
5195 case ISD::ROTR: return "rotr";
5196 case ISD::FADD: return "fadd";
5197 case ISD::FSUB: return "fsub";
5198 case ISD::FMUL: return "fmul";
5199 case ISD::FDIV: return "fdiv";
5200 case ISD::FREM: return "frem";
5201 case ISD::FCOPYSIGN: return "fcopysign";
5202 case ISD::FGETSIGN: return "fgetsign";
5204 case ISD::SETCC: return "setcc";
5205 case ISD::VSETCC: return "vsetcc";
5206 case ISD::SELECT: return "select";
5207 case ISD::SELECT_CC: return "select_cc";
5208 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5209 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5210 case ISD::CONCAT_VECTORS: return "concat_vectors";
5211 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5212 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5213 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5214 case ISD::CARRY_FALSE: return "carry_false";
5215 case ISD::ADDC: return "addc";
5216 case ISD::ADDE: return "adde";
5217 case ISD::SADDO: return "saddo";
5218 case ISD::UADDO: return "uaddo";
5219 case ISD::SUBC: return "subc";
5220 case ISD::SUBE: return "sube";
5221 case ISD::SHL_PARTS: return "shl_parts";
5222 case ISD::SRA_PARTS: return "sra_parts";
5223 case ISD::SRL_PARTS: return "srl_parts";
5225 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5226 case ISD::INSERT_SUBREG: return "insert_subreg";
5228 // Conversion operators.
5229 case ISD::SIGN_EXTEND: return "sign_extend";
5230 case ISD::ZERO_EXTEND: return "zero_extend";
5231 case ISD::ANY_EXTEND: return "any_extend";
5232 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5233 case ISD::TRUNCATE: return "truncate";
5234 case ISD::FP_ROUND: return "fp_round";
5235 case ISD::FLT_ROUNDS_: return "flt_rounds";
5236 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5237 case ISD::FP_EXTEND: return "fp_extend";
5239 case ISD::SINT_TO_FP: return "sint_to_fp";
5240 case ISD::UINT_TO_FP: return "uint_to_fp";
5241 case ISD::FP_TO_SINT: return "fp_to_sint";
5242 case ISD::FP_TO_UINT: return "fp_to_uint";
5243 case ISD::BIT_CONVERT: return "bit_convert";
5245 case ISD::CONVERT_RNDSAT: {
5246 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5247 default: assert(0 && "Unknown cvt code!");
5248 case ISD::CVT_FF: return "cvt_ff";
5249 case ISD::CVT_FS: return "cvt_fs";
5250 case ISD::CVT_FU: return "cvt_fu";
5251 case ISD::CVT_SF: return "cvt_sf";
5252 case ISD::CVT_UF: return "cvt_uf";
5253 case ISD::CVT_SS: return "cvt_ss";
5254 case ISD::CVT_SU: return "cvt_su";
5255 case ISD::CVT_US: return "cvt_us";
5256 case ISD::CVT_UU: return "cvt_uu";
5260 // Control flow instructions
5261 case ISD::BR: return "br";
5262 case ISD::BRIND: return "brind";
5263 case ISD::BR_JT: return "br_jt";
5264 case ISD::BRCOND: return "brcond";
5265 case ISD::BR_CC: return "br_cc";
5266 case ISD::RET: return "ret";
5267 case ISD::CALLSEQ_START: return "callseq_start";
5268 case ISD::CALLSEQ_END: return "callseq_end";
5271 case ISD::LOAD: return "load";
5272 case ISD::STORE: return "store";
5273 case ISD::VAARG: return "vaarg";
5274 case ISD::VACOPY: return "vacopy";
5275 case ISD::VAEND: return "vaend";
5276 case ISD::VASTART: return "vastart";
5277 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5278 case ISD::EXTRACT_ELEMENT: return "extract_element";
5279 case ISD::BUILD_PAIR: return "build_pair";
5280 case ISD::STACKSAVE: return "stacksave";
5281 case ISD::STACKRESTORE: return "stackrestore";
5282 case ISD::TRAP: return "trap";
5285 case ISD::BSWAP: return "bswap";
5286 case ISD::CTPOP: return "ctpop";
5287 case ISD::CTTZ: return "cttz";
5288 case ISD::CTLZ: return "ctlz";
5291 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5292 case ISD::DEBUG_LOC: return "debug_loc";
5295 case ISD::TRAMPOLINE: return "trampoline";
5298 switch (cast<CondCodeSDNode>(this)->get()) {
5299 default: assert(0 && "Unknown setcc condition!");
5300 case ISD::SETOEQ: return "setoeq";
5301 case ISD::SETOGT: return "setogt";
5302 case ISD::SETOGE: return "setoge";
5303 case ISD::SETOLT: return "setolt";
5304 case ISD::SETOLE: return "setole";
5305 case ISD::SETONE: return "setone";
5307 case ISD::SETO: return "seto";
5308 case ISD::SETUO: return "setuo";
5309 case ISD::SETUEQ: return "setue";
5310 case ISD::SETUGT: return "setugt";
5311 case ISD::SETUGE: return "setuge";
5312 case ISD::SETULT: return "setult";
5313 case ISD::SETULE: return "setule";
5314 case ISD::SETUNE: return "setune";
5316 case ISD::SETEQ: return "seteq";
5317 case ISD::SETGT: return "setgt";
5318 case ISD::SETGE: return "setge";
5319 case ISD::SETLT: return "setlt";
5320 case ISD::SETLE: return "setle";
5321 case ISD::SETNE: return "setne";
5326 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5335 return "<post-inc>";
5337 return "<post-dec>";
5341 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5342 std::string S = "< ";
5356 if (getByValAlign())
5357 S += "byval-align:" + utostr(getByValAlign()) + " ";
5359 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5361 S += "byval-size:" + utostr(getByValSize()) + " ";
5365 void SDNode::dump() const { dump(0); }
5366 void SDNode::dump(const SelectionDAG *G) const {
5371 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5372 OS << (void*)this << ": ";
5374 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5376 if (getValueType(i) == MVT::Other)
5379 OS << getValueType(i).getMVTString();
5381 OS << " = " << getOperationName(G);
5384 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5386 OS << (void*)getOperand(i).getNode();
5387 if (unsigned RN = getOperand(i).getResNo())
5391 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5392 SDNode *Mask = getOperand(2).getNode();
5394 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5396 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5399 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5404 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5405 OS << '<' << CSDN->getAPIntValue() << '>';
5406 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5407 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5408 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5409 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5410 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5413 CSDN->getValueAPF().bitcastToAPInt().dump();
5416 } else if (const GlobalAddressSDNode *GADN =
5417 dyn_cast<GlobalAddressSDNode>(this)) {
5418 int64_t offset = GADN->getOffset();
5420 WriteAsOperand(OS, GADN->getGlobal());
5423 OS << " + " << offset;
5425 OS << " " << offset;
5426 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5427 OS << "<" << FIDN->getIndex() << ">";
5428 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5429 OS << "<" << JTDN->getIndex() << ">";
5430 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5431 int offset = CP->getOffset();
5432 if (CP->isMachineConstantPoolEntry())
5433 OS << "<" << *CP->getMachineCPVal() << ">";
5435 OS << "<" << *CP->getConstVal() << ">";
5437 OS << " + " << offset;
5439 OS << " " << offset;
5440 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5442 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5444 OS << LBB->getName() << " ";
5445 OS << (const void*)BBDN->getBasicBlock() << ">";
5446 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5447 if (G && R->getReg() &&
5448 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5449 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5451 OS << " #" << R->getReg();
5453 } else if (const ExternalSymbolSDNode *ES =
5454 dyn_cast<ExternalSymbolSDNode>(this)) {
5455 OS << "'" << ES->getSymbol() << "'";
5456 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5458 OS << "<" << M->getValue() << ">";
5461 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5462 if (M->MO.getValue())
5463 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5465 OS << "<null:" << M->MO.getOffset() << ">";
5466 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5467 OS << N->getArgFlags().getArgFlagsString();
5468 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5469 OS << ":" << N->getVT().getMVTString();
5471 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5472 const Value *SrcValue = LD->getSrcValue();
5473 int SrcOffset = LD->getSrcValueOffset();
5479 OS << ":" << SrcOffset << ">";
5482 switch (LD->getExtensionType()) {
5483 default: doExt = false; break;
5484 case ISD::EXTLOAD: OS << " <anyext "; break;
5485 case ISD::SEXTLOAD: OS << " <sext "; break;
5486 case ISD::ZEXTLOAD: OS << " <zext "; break;
5489 OS << LD->getMemoryVT().getMVTString() << ">";
5491 const char *AM = getIndexedModeName(LD->getAddressingMode());
5494 if (LD->isVolatile())
5495 OS << " <volatile>";
5496 OS << " alignment=" << LD->getAlignment();
5497 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5498 const Value *SrcValue = ST->getSrcValue();
5499 int SrcOffset = ST->getSrcValueOffset();
5505 OS << ":" << SrcOffset << ">";
5507 if (ST->isTruncatingStore())
5508 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5510 const char *AM = getIndexedModeName(ST->getAddressingMode());
5513 if (ST->isVolatile())
5514 OS << " <volatile>";
5515 OS << " alignment=" << ST->getAlignment();
5516 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5517 const Value *SrcValue = AT->getSrcValue();
5518 int SrcOffset = AT->getSrcValueOffset();
5524 OS << ":" << SrcOffset << ">";
5525 if (AT->isVolatile())
5526 OS << " <volatile>";
5527 OS << " alignment=" << AT->getAlignment();
5531 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5532 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5533 if (N->getOperand(i).getNode()->hasOneUse())
5534 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5536 cerr << "\n" << std::string(indent+2, ' ')
5537 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5540 cerr << "\n" << std::string(indent, ' ');
5544 void SelectionDAG::dump() const {
5545 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5547 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5549 const SDNode *N = I;
5550 if (!N->hasOneUse() && N != getRoot().getNode())
5551 DumpNodes(N, 2, this);
5554 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5559 const Type *ConstantPoolSDNode::getType() const {
5560 if (isMachineConstantPoolEntry())
5561 return Val.MachineCPVal->getType();
5562 return Val.ConstVal->getType();