1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/PseudoSourceValue.h"
32 #include "llvm/Target/TargetRegisterInfo.h"
33 #include "llvm/Target/TargetData.h"
34 #include "llvm/Target/TargetFrameInfo.h"
35 #include "llvm/Target/TargetLowering.h"
36 #include "llvm/Target/TargetSelectionDAGInfo.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetInstrInfo.h"
39 #include "llvm/Target/TargetIntrinsicInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ErrorHandling.h"
44 #include "llvm/Support/ManagedStatic.h"
45 #include "llvm/Support/MathExtras.h"
46 #include "llvm/Support/raw_ostream.h"
47 #include "llvm/System/Mutex.h"
48 #include "llvm/ADT/SetVector.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallSet.h"
51 #include "llvm/ADT/SmallVector.h"
52 #include "llvm/ADT/StringExtras.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
65 switch (VT.getSimpleVT().SimpleTy) {
66 default: llvm_unreachable("Unknown FP format");
67 case MVT::f32: return &APFloat::IEEEsingle;
68 case MVT::f64: return &APFloat::IEEEdouble;
69 case MVT::f80: return &APFloat::x87DoubleExtended;
70 case MVT::f128: return &APFloat::IEEEquad;
71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
75 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
77 //===----------------------------------------------------------------------===//
78 // ConstantFPSDNode Class
79 //===----------------------------------------------------------------------===//
81 /// isExactlyValue - We don't rely on operator== working on double values, as
82 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
83 /// As such, this method can be used to do an exact bit-for-bit comparison of
84 /// two floating point values.
85 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
86 return getValueAPF().bitwiseIsEqual(V);
89 bool ConstantFPSDNode::isValueValidForType(EVT VT,
91 assert(VT.isFloatingPoint() && "Can only convert between FP types");
93 // PPC long double cannot be converted to any other type.
94 if (VT == MVT::ppcf128 ||
95 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
98 // convert modifies in place, so make a copy.
99 APFloat Val2 = APFloat(Val);
101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
106 //===----------------------------------------------------------------------===//
108 //===----------------------------------------------------------------------===//
110 /// isBuildVectorAllOnes - Return true if the specified node is a
111 /// BUILD_VECTOR where all of the elements are ~0 or undef.
112 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
113 // Look through a bit convert.
114 if (N->getOpcode() == ISD::BIT_CONVERT)
115 N = N->getOperand(0).getNode();
117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
119 unsigned i = 0, e = N->getNumOperands();
121 // Skip over all of the undef values.
122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
125 // Do not accept an all-undef vector.
126 if (i == e) return false;
128 // Do not accept build_vectors that aren't all constants or which have non-~0
130 SDValue NotZero = N->getOperand(i);
131 if (isa<ConstantSDNode>(NotZero)) {
132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
134 } else if (isa<ConstantFPSDNode>(NotZero)) {
135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
136 bitcastToAPInt().isAllOnesValue())
141 // Okay, we have at least one ~0 value, check to see if the rest match or are
143 for (++i; i != e; ++i)
144 if (N->getOperand(i) != NotZero &&
145 N->getOperand(i).getOpcode() != ISD::UNDEF)
151 /// isBuildVectorAllZeros - Return true if the specified node is a
152 /// BUILD_VECTOR where all of the elements are 0 or undef.
153 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
154 // Look through a bit convert.
155 if (N->getOpcode() == ISD::BIT_CONVERT)
156 N = N->getOperand(0).getNode();
158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
160 unsigned i = 0, e = N->getNumOperands();
162 // Skip over all of the undef values.
163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
166 // Do not accept an all-undef vector.
167 if (i == e) return false;
169 // Do not accept build_vectors that aren't all constants or which have non-0
171 SDValue Zero = N->getOperand(i);
172 if (isa<ConstantSDNode>(Zero)) {
173 if (!cast<ConstantSDNode>(Zero)->isNullValue())
175 } else if (isa<ConstantFPSDNode>(Zero)) {
176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
181 // Okay, we have at least one 0 value, check to see if the rest match or are
183 for (++i; i != e; ++i)
184 if (N->getOperand(i) != Zero &&
185 N->getOperand(i).getOpcode() != ISD::UNDEF)
190 /// isScalarToVector - Return true if the specified node is a
191 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
192 /// element is not an undef.
193 bool ISD::isScalarToVector(const SDNode *N) {
194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
197 if (N->getOpcode() != ISD::BUILD_VECTOR)
199 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
201 unsigned NumElems = N->getNumOperands();
204 for (unsigned i = 1; i < NumElems; ++i) {
205 SDValue V = N->getOperand(i);
206 if (V.getOpcode() != ISD::UNDEF)
212 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
213 /// when given the operation for (X op Y).
214 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
215 // To perform this operation, we just need to swap the L and G bits of the
217 unsigned OldL = (Operation >> 2) & 1;
218 unsigned OldG = (Operation >> 1) & 1;
219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
220 (OldL << 1) | // New G bit
221 (OldG << 2)); // New L bit.
224 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
225 /// 'op' is a valid SetCC operation.
226 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
227 unsigned Operation = Op;
229 Operation ^= 7; // Flip L, G, E bits, but not U.
231 Operation ^= 15; // Flip all of the condition bits.
233 if (Operation > ISD::SETTRUE2)
234 Operation &= ~8; // Don't let N and U bits get set.
236 return ISD::CondCode(Operation);
240 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
241 /// signed operation and 2 if the result is an unsigned comparison. Return zero
242 /// if the operation does not depend on the sign of the input (setne and seteq).
243 static int isSignedOp(ISD::CondCode Opcode) {
245 default: llvm_unreachable("Illegal integer setcc operation!");
247 case ISD::SETNE: return 0;
251 case ISD::SETGE: return 1;
255 case ISD::SETUGE: return 2;
259 /// getSetCCOrOperation - Return the result of a logical OR between different
260 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
261 /// returns SETCC_INVALID if it is not possible to represent the resultant
263 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
266 // Cannot fold a signed integer setcc with an unsigned integer setcc.
267 return ISD::SETCC_INVALID;
269 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
271 // If the N and U bits get set then the resultant comparison DOES suddenly
272 // care about orderedness, and is true when ordered.
273 if (Op > ISD::SETTRUE2)
274 Op &= ~16; // Clear the U bit if the N bit is set.
276 // Canonicalize illegal integer setcc's.
277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
280 return ISD::CondCode(Op);
283 /// getSetCCAndOperation - Return the result of a logical AND between different
284 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
285 /// function returns zero if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed setcc with an unsigned setcc.
291 return ISD::SETCC_INVALID;
293 // Combine all of the condition bits.
294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
296 // Canonicalize illegal integer setcc's.
300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETOEQ: // SETEQ & SETU[LG]E
302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
311 //===----------------------------------------------------------------------===//
312 // SDNode Profile Support
313 //===----------------------------------------------------------------------===//
315 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
317 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
321 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322 /// solely with their pointer.
323 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324 ID.AddPointer(VTList.VTs);
327 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
329 static void AddNodeIDOperands(FoldingSetNodeID &ID,
330 const SDValue *Ops, unsigned NumOps) {
331 for (; NumOps; --NumOps, ++Ops) {
332 ID.AddPointer(Ops->getNode());
333 ID.AddInteger(Ops->getResNo());
337 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
339 static void AddNodeIDOperands(FoldingSetNodeID &ID,
340 const SDUse *Ops, unsigned NumOps) {
341 for (; NumOps; --NumOps, ++Ops) {
342 ID.AddPointer(Ops->getNode());
343 ID.AddInteger(Ops->getResNo());
347 static void AddNodeIDNode(FoldingSetNodeID &ID,
348 unsigned short OpC, SDVTList VTList,
349 const SDValue *OpList, unsigned N) {
350 AddNodeIDOpcode(ID, OpC);
351 AddNodeIDValueTypes(ID, VTList);
352 AddNodeIDOperands(ID, OpList, N);
355 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
357 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
358 switch (N->getOpcode()) {
359 case ISD::TargetExternalSymbol:
360 case ISD::ExternalSymbol:
361 llvm_unreachable("Should only be used on nodes with operands");
362 default: break; // Normal nodes don't need extra info.
363 case ISD::TargetConstant:
365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
367 case ISD::TargetConstantFP:
368 case ISD::ConstantFP: {
369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
372 case ISD::TargetGlobalAddress:
373 case ISD::GlobalAddress:
374 case ISD::TargetGlobalTLSAddress:
375 case ISD::GlobalTLSAddress: {
376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
377 ID.AddPointer(GA->getGlobal());
378 ID.AddInteger(GA->getOffset());
379 ID.AddInteger(GA->getTargetFlags());
382 case ISD::BasicBlock:
383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
392 case ISD::FrameIndex:
393 case ISD::TargetFrameIndex:
394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
397 case ISD::TargetJumpTable:
398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
401 case ISD::ConstantPool:
402 case ISD::TargetConstantPool: {
403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
404 ID.AddInteger(CP->getAlignment());
405 ID.AddInteger(CP->getOffset());
406 if (CP->isMachineConstantPoolEntry())
407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
409 ID.AddPointer(CP->getConstVal());
410 ID.AddInteger(CP->getTargetFlags());
414 const LoadSDNode *LD = cast<LoadSDNode>(N);
415 ID.AddInteger(LD->getMemoryVT().getRawBits());
416 ID.AddInteger(LD->getRawSubclassData());
420 const StoreSDNode *ST = cast<StoreSDNode>(N);
421 ID.AddInteger(ST->getMemoryVT().getRawBits());
422 ID.AddInteger(ST->getRawSubclassData());
425 case ISD::ATOMIC_CMP_SWAP:
426 case ISD::ATOMIC_SWAP:
427 case ISD::ATOMIC_LOAD_ADD:
428 case ISD::ATOMIC_LOAD_SUB:
429 case ISD::ATOMIC_LOAD_AND:
430 case ISD::ATOMIC_LOAD_OR:
431 case ISD::ATOMIC_LOAD_XOR:
432 case ISD::ATOMIC_LOAD_NAND:
433 case ISD::ATOMIC_LOAD_MIN:
434 case ISD::ATOMIC_LOAD_MAX:
435 case ISD::ATOMIC_LOAD_UMIN:
436 case ISD::ATOMIC_LOAD_UMAX: {
437 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
438 ID.AddInteger(AT->getMemoryVT().getRawBits());
439 ID.AddInteger(AT->getRawSubclassData());
442 case ISD::VECTOR_SHUFFLE: {
443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
446 ID.AddInteger(SVN->getMaskElt(i));
449 case ISD::TargetBlockAddress:
450 case ISD::BlockAddress: {
451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
455 } // end switch (N->getOpcode())
458 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
460 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
461 AddNodeIDOpcode(ID, N->getOpcode());
462 // Add the return value info.
463 AddNodeIDValueTypes(ID, N->getVTList());
464 // Add the operand info.
465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
467 // Handle SDNode leafs with special info.
468 AddNodeIDCustom(ID, N);
471 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
472 /// the CSE map that carries volatility, temporalness, indexing mode, and
473 /// extension/truncation information.
475 static inline unsigned
476 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
477 bool isNonTemporal) {
478 assert((ConvType & 3) == ConvType &&
479 "ConvType may not require more than 2 bits!");
480 assert((AM & 7) == AM &&
481 "AM may not require more than 3 bits!");
485 (isNonTemporal << 6);
488 //===----------------------------------------------------------------------===//
489 // SelectionDAG Class
490 //===----------------------------------------------------------------------===//
492 /// doNotCSE - Return true if CSE should not be performed for this node.
493 static bool doNotCSE(SDNode *N) {
494 if (N->getValueType(0) == MVT::Flag)
495 return true; // Never CSE anything that produces a flag.
497 switch (N->getOpcode()) {
499 case ISD::HANDLENODE:
501 return true; // Never CSE these nodes.
504 // Check that remaining values produced are not flags.
505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
506 if (N->getValueType(i) == MVT::Flag)
507 return true; // Never CSE anything that produces a flag.
512 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
514 void SelectionDAG::RemoveDeadNodes() {
515 // Create a dummy node (which is not added to allnodes), that adds a reference
516 // to the root node, preventing it from being deleted.
517 HandleSDNode Dummy(getRoot());
519 SmallVector<SDNode*, 128> DeadNodes;
521 // Add all obviously-dead nodes to the DeadNodes worklist.
522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
524 DeadNodes.push_back(I);
526 RemoveDeadNodes(DeadNodes);
528 // If the root changed (e.g. it was a dead load, update the root).
529 setRoot(Dummy.getValue());
532 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
533 /// given list, and any nodes that become unreachable as a result.
534 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
535 DAGUpdateListener *UpdateListener) {
537 // Process the worklist, deleting the nodes and adding their uses to the
539 while (!DeadNodes.empty()) {
540 SDNode *N = DeadNodes.pop_back_val();
543 UpdateListener->NodeDeleted(N, 0);
545 // Take the node out of the appropriate CSE map.
546 RemoveNodeFromCSEMaps(N);
548 // Next, brutally remove the operand list. This is safe to do, as there are
549 // no cycles in the graph.
550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
552 SDNode *Operand = Use.getNode();
555 // Now that we removed this operand, see if there are no uses of it left.
556 if (Operand->use_empty())
557 DeadNodes.push_back(Operand);
564 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
565 SmallVector<SDNode*, 16> DeadNodes(1, N);
566 RemoveDeadNodes(DeadNodes, UpdateListener);
569 void SelectionDAG::DeleteNode(SDNode *N) {
570 // First take this out of the appropriate CSE map.
571 RemoveNodeFromCSEMaps(N);
573 // Finally, remove uses due to operands of this node, remove from the
574 // AllNodes list, and delete the node.
575 DeleteNodeNotInCSEMaps(N);
578 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
579 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
580 assert(N->use_empty() && "Cannot delete a node that is not dead!");
582 // Drop all of the operands and decrement used node's use counts.
588 void SelectionDAG::DeallocateNode(SDNode *N) {
589 if (N->OperandsNeedDelete)
590 delete[] N->OperandList;
592 // Set the opcode to DELETED_NODE to help catch bugs when node
593 // memory is reallocated.
594 N->NodeType = ISD::DELETED_NODE;
596 NodeAllocator.Deallocate(AllNodes.remove(N));
598 // Remove the ordering of this node.
601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N);
603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
604 DbgVals[i]->setIsInvalidated();
607 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
608 /// correspond to it. This is useful when we're about to delete or repurpose
609 /// the node. We don't want future request for structurally identical nodes
610 /// to return N anymore.
611 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
613 switch (N->getOpcode()) {
614 case ISD::EntryToken:
615 llvm_unreachable("EntryToken should not be in CSEMaps!");
617 case ISD::HANDLENODE: return false; // noop.
619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
620 "Cond code doesn't exist!");
621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
624 case ISD::ExternalSymbol:
625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
627 case ISD::TargetExternalSymbol: {
628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
629 Erased = TargetExternalSymbols.erase(
630 std::pair<std::string,unsigned char>(ESN->getSymbol(),
631 ESN->getTargetFlags()));
634 case ISD::VALUETYPE: {
635 EVT VT = cast<VTSDNode>(N)->getVT();
636 if (VT.isExtended()) {
637 Erased = ExtendedValueTypeNodes.erase(VT);
639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
645 // Remove it from the CSE Map.
646 Erased = CSEMap.RemoveNode(N);
650 // Verify that the node was actually in one of the CSE maps, unless it has a
651 // flag result (which cannot be CSE'd) or is one of the special cases that are
652 // not subject to CSE.
653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
654 !N->isMachineOpcode() && !doNotCSE(N)) {
657 llvm_unreachable("Node is not in map!");
663 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
664 /// maps and modified in place. Add it back to the CSE maps, unless an identical
665 /// node already exists, in which case transfer all its users to the existing
666 /// node. This transfer can potentially trigger recursive merging.
669 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
670 DAGUpdateListener *UpdateListener) {
671 // For node types that aren't CSE'd, just act as if no identical node
674 SDNode *Existing = CSEMap.GetOrInsertNode(N);
676 // If there was already an existing matching node, use ReplaceAllUsesWith
677 // to replace the dead one with the existing one. This can cause
678 // recursive merging of other unrelated nodes down the line.
679 ReplaceAllUsesWith(N, Existing, UpdateListener);
681 // N is now dead. Inform the listener if it exists and delete it.
683 UpdateListener->NodeDeleted(N, Existing);
684 DeleteNodeNotInCSEMaps(N);
689 // If the node doesn't already exist, we updated it. Inform a listener if
692 UpdateListener->NodeUpdated(N);
695 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
696 /// were replaced with those specified. If this node is never memoized,
697 /// return null, otherwise return a pointer to the slot it would take. If a
698 /// node already exists with these operands, the slot will be non-null.
699 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
704 SDValue Ops[] = { Op };
706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
707 AddNodeIDCustom(ID, N);
708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
717 SDValue Op1, SDValue Op2,
722 SDValue Ops[] = { Op1, Op2 };
724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
725 AddNodeIDCustom(ID, N);
726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
731 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
732 /// were replaced with those specified. If this node is never memoized,
733 /// return null, otherwise return a pointer to the slot it would take. If a
734 /// node already exists with these operands, the slot will be non-null.
735 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
736 const SDValue *Ops,unsigned NumOps,
742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
743 AddNodeIDCustom(ID, N);
744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
749 void SelectionDAG::VerifyNode(SDNode *N) {
750 switch (N->getOpcode()) {
753 case ISD::BUILD_PAIR: {
754 EVT VT = N->getValueType(0);
755 assert(N->getNumValues() == 1 && "Too many results!");
756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
757 "Wrong return type!");
758 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
760 "Mismatched operand types!");
761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
762 "Wrong operand type!");
763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
764 "Wrong return type size");
767 case ISD::BUILD_VECTOR: {
768 assert(N->getNumValues() == 1 && "Too many results!");
769 assert(N->getValueType(0).isVector() && "Wrong return type!");
770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
771 "Wrong number of operands!");
772 EVT EltVT = N->getValueType(0).getVectorElementType();
773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
774 assert((I->getValueType() == EltVT ||
775 (EltVT.isInteger() && I->getValueType().isInteger() &&
776 EltVT.bitsLE(I->getValueType()))) &&
777 "Wrong operand type!");
783 /// getEVTAlignment - Compute the default alignment value for the
786 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
787 const Type *Ty = VT == MVT::iPTR ?
788 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
789 VT.getTypeForEVT(*getContext());
791 return TLI.getTargetData()->getABITypeAlignment(Ty);
794 // EntryNode could meaningfully have debug info if we can find it...
795 SelectionDAG::SelectionDAG(const TargetMachine &tm)
796 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
798 Root(getEntryNode()), Ordering(0) {
799 AllNodes.push_back(&EntryNode);
800 Ordering = new SDNodeOrdering();
801 DbgInfo = new SDDbgInfo();
804 void SelectionDAG::init(MachineFunction &mf) {
806 Context = &mf.getFunction()->getContext();
809 SelectionDAG::~SelectionDAG() {
815 void SelectionDAG::allnodes_clear() {
816 assert(&*AllNodes.begin() == &EntryNode);
817 AllNodes.remove(AllNodes.begin());
818 while (!AllNodes.empty())
819 DeallocateNode(AllNodes.begin());
822 void SelectionDAG::clear() {
824 OperandAllocator.Reset();
827 ExtendedValueTypeNodes.clear();
828 ExternalSymbols.clear();
829 TargetExternalSymbols.clear();
830 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
831 static_cast<CondCodeSDNode*>(0));
832 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
833 static_cast<SDNode*>(0));
835 EntryNode.UseList = 0;
836 AllNodes.push_back(&EntryNode);
837 Root = getEntryNode();
842 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
843 return VT.bitsGT(Op.getValueType()) ?
844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
845 getNode(ISD::TRUNCATE, DL, VT, Op);
848 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
849 return VT.bitsGT(Op.getValueType()) ?
850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
851 getNode(ISD::TRUNCATE, DL, VT, Op);
854 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
855 assert(!VT.isVector() &&
856 "getZeroExtendInReg should use the vector element type instead of "
858 if (Op.getValueType() == VT) return Op;
859 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
860 APInt Imm = APInt::getLowBitsSet(BitWidth,
862 return getNode(ISD::AND, DL, Op.getValueType(), Op,
863 getConstant(Imm, Op.getValueType()));
866 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
868 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
869 EVT EltVT = VT.getScalarType();
871 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
872 return getNode(ISD::XOR, DL, VT, Val, NegOne);
875 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
876 EVT EltVT = VT.getScalarType();
877 assert((EltVT.getSizeInBits() >= 64 ||
878 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
879 "getConstant with a uint64_t value that doesn't fit in the type!");
880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
883 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
884 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
887 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
888 assert(VT.isInteger() && "Cannot create FP integer constant!");
890 EVT EltVT = VT.getScalarType();
891 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
892 "APInt size does not match type size!");
894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
902 return SDValue(N, 0);
905 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT);
906 CSEMap.InsertNode(N, IP);
907 AllNodes.push_back(N);
910 SDValue Result(N, 0);
912 SmallVector<SDValue, 8> Ops;
913 Ops.assign(VT.getVectorNumElements(), Result);
914 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
919 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
920 return getConstant(Val, TLI.getPointerTy(), isTarget);
924 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
925 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
928 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
931 EVT EltVT = VT.getScalarType();
933 // Do the map lookup using the actual bit pattern for the floating point
934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
935 // we don't have issues with SNANs.
936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
944 return SDValue(N, 0);
947 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
948 CSEMap.InsertNode(N, IP);
949 AllNodes.push_back(N);
952 SDValue Result(N, 0);
954 SmallVector<SDValue, 8> Ops;
955 Ops.assign(VT.getVectorNumElements(), Result);
956 // FIXME DebugLoc info might be appropriate here
957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
962 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
963 EVT EltVT = VT.getScalarType();
965 return getConstantFP(APFloat((float)Val), VT, isTarget);
966 else if (EltVT==MVT::f64)
967 return getConstantFP(APFloat(Val), VT, isTarget);
968 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
970 APFloat apf = APFloat(Val);
971 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
973 return getConstantFP(apf, VT, isTarget);
975 assert(0 && "Unsupported type in getConstantFP");
980 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
981 EVT VT, int64_t Offset,
983 unsigned char TargetFlags) {
984 assert((TargetFlags == 0 || isTargetGA) &&
985 "Cannot set target flags on target-independent globals");
987 // Truncate (with sign-extension) the offset value to the pointer size.
988 EVT PTy = TLI.getPointerTy();
989 unsigned BitWidth = PTy.getSizeInBits();
991 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
993 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
995 // If GV is an alias then use the aliasee for determining thread-localness.
996 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
997 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1001 if (GVar && GVar->isThreadLocal())
1002 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1004 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1006 FoldingSetNodeID ID;
1007 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1009 ID.AddInteger(Offset);
1010 ID.AddInteger(TargetFlags);
1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1013 return SDValue(E, 0);
1015 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1016 Offset, TargetFlags);
1017 CSEMap.InsertNode(N, IP);
1018 AllNodes.push_back(N);
1019 return SDValue(N, 0);
1022 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1023 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1024 FoldingSetNodeID ID;
1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1029 return SDValue(E, 0);
1031 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1032 CSEMap.InsertNode(N, IP);
1033 AllNodes.push_back(N);
1034 return SDValue(N, 0);
1037 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1038 unsigned char TargetFlags) {
1039 assert((TargetFlags == 0 || isTarget) &&
1040 "Cannot set target flags on target-independent jump tables");
1041 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1042 FoldingSetNodeID ID;
1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1045 ID.AddInteger(TargetFlags);
1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1048 return SDValue(E, 0);
1050 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1052 CSEMap.InsertNode(N, IP);
1053 AllNodes.push_back(N);
1054 return SDValue(N, 0);
1057 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1058 unsigned Alignment, int Offset,
1060 unsigned char TargetFlags) {
1061 assert((TargetFlags == 0 || isTarget) &&
1062 "Cannot set target flags on target-independent globals");
1064 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1065 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1066 FoldingSetNodeID ID;
1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1068 ID.AddInteger(Alignment);
1069 ID.AddInteger(Offset);
1071 ID.AddInteger(TargetFlags);
1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1074 return SDValue(E, 0);
1076 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1077 Alignment, TargetFlags);
1078 CSEMap.InsertNode(N, IP);
1079 AllNodes.push_back(N);
1080 return SDValue(N, 0);
1084 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1085 unsigned Alignment, int Offset,
1087 unsigned char TargetFlags) {
1088 assert((TargetFlags == 0 || isTarget) &&
1089 "Cannot set target flags on target-independent globals");
1091 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1092 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1093 FoldingSetNodeID ID;
1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1095 ID.AddInteger(Alignment);
1096 ID.AddInteger(Offset);
1097 C->AddSelectionDAGCSEId(ID);
1098 ID.AddInteger(TargetFlags);
1100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1101 return SDValue(E, 0);
1103 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1104 Alignment, TargetFlags);
1105 CSEMap.InsertNode(N, IP);
1106 AllNodes.push_back(N);
1107 return SDValue(N, 0);
1110 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1111 FoldingSetNodeID ID;
1112 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1116 return SDValue(E, 0);
1118 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1119 CSEMap.InsertNode(N, IP);
1120 AllNodes.push_back(N);
1121 return SDValue(N, 0);
1124 SDValue SelectionDAG::getValueType(EVT VT) {
1125 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1126 ValueTypeNodes.size())
1127 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1129 SDNode *&N = VT.isExtended() ?
1130 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1132 if (N) return SDValue(N, 0);
1133 N = new (NodeAllocator) VTSDNode(VT);
1134 AllNodes.push_back(N);
1135 return SDValue(N, 0);
1138 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1139 SDNode *&N = ExternalSymbols[Sym];
1140 if (N) return SDValue(N, 0);
1141 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1142 AllNodes.push_back(N);
1143 return SDValue(N, 0);
1146 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1147 unsigned char TargetFlags) {
1149 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1151 if (N) return SDValue(N, 0);
1152 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1153 AllNodes.push_back(N);
1154 return SDValue(N, 0);
1157 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1158 if ((unsigned)Cond >= CondCodeNodes.size())
1159 CondCodeNodes.resize(Cond+1);
1161 if (CondCodeNodes[Cond] == 0) {
1162 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1163 CondCodeNodes[Cond] = N;
1164 AllNodes.push_back(N);
1167 return SDValue(CondCodeNodes[Cond], 0);
1170 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1171 // the shuffle mask M that point at N1 to point at N2, and indices that point
1172 // N2 to point at N1.
1173 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1175 int NElts = M.size();
1176 for (int i = 0; i != NElts; ++i) {
1184 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1185 SDValue N2, const int *Mask) {
1186 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1187 assert(VT.isVector() && N1.getValueType().isVector() &&
1188 "Vector Shuffle VTs must be a vectors");
1189 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1190 && "Vector Shuffle VTs must have same element type");
1192 // Canonicalize shuffle undef, undef -> undef
1193 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1194 return getUNDEF(VT);
1196 // Validate that all indices in Mask are within the range of the elements
1197 // input to the shuffle.
1198 unsigned NElts = VT.getVectorNumElements();
1199 SmallVector<int, 8> MaskVec;
1200 for (unsigned i = 0; i != NElts; ++i) {
1201 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1202 MaskVec.push_back(Mask[i]);
1205 // Canonicalize shuffle v, v -> v, undef
1208 for (unsigned i = 0; i != NElts; ++i)
1209 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1212 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1213 if (N1.getOpcode() == ISD::UNDEF)
1214 commuteShuffle(N1, N2, MaskVec);
1216 // Canonicalize all index into lhs, -> shuffle lhs, undef
1217 // Canonicalize all index into rhs, -> shuffle rhs, undef
1218 bool AllLHS = true, AllRHS = true;
1219 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1220 for (unsigned i = 0; i != NElts; ++i) {
1221 if (MaskVec[i] >= (int)NElts) {
1226 } else if (MaskVec[i] >= 0) {
1230 if (AllLHS && AllRHS)
1231 return getUNDEF(VT);
1232 if (AllLHS && !N2Undef)
1236 commuteShuffle(N1, N2, MaskVec);
1239 // If Identity shuffle, or all shuffle in to undef, return that node.
1240 bool AllUndef = true;
1241 bool Identity = true;
1242 for (unsigned i = 0; i != NElts; ++i) {
1243 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1244 if (MaskVec[i] >= 0) AllUndef = false;
1246 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1249 return getUNDEF(VT);
1251 FoldingSetNodeID ID;
1252 SDValue Ops[2] = { N1, N2 };
1253 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1254 for (unsigned i = 0; i != NElts; ++i)
1255 ID.AddInteger(MaskVec[i]);
1258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1259 return SDValue(E, 0);
1261 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1262 // SDNode doesn't have access to it. This memory will be "leaked" when
1263 // the node is deallocated, but recovered when the NodeAllocator is released.
1264 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1265 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1267 ShuffleVectorSDNode *N =
1268 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1269 CSEMap.InsertNode(N, IP);
1270 AllNodes.push_back(N);
1271 return SDValue(N, 0);
1274 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1275 SDValue Val, SDValue DTy,
1276 SDValue STy, SDValue Rnd, SDValue Sat,
1277 ISD::CvtCode Code) {
1278 // If the src and dest types are the same and the conversion is between
1279 // integer types of the same sign or two floats, no conversion is necessary.
1281 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1284 FoldingSetNodeID ID;
1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1286 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1289 return SDValue(E, 0);
1291 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1293 CSEMap.InsertNode(N, IP);
1294 AllNodes.push_back(N);
1295 return SDValue(N, 0);
1298 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1299 FoldingSetNodeID ID;
1300 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1301 ID.AddInteger(RegNo);
1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1304 return SDValue(E, 0);
1306 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1307 CSEMap.InsertNode(N, IP);
1308 AllNodes.push_back(N);
1309 return SDValue(N, 0);
1312 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1313 FoldingSetNodeID ID;
1314 SDValue Ops[] = { Root };
1315 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1316 ID.AddPointer(Label);
1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1319 return SDValue(E, 0);
1321 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1322 CSEMap.InsertNode(N, IP);
1323 AllNodes.push_back(N);
1324 return SDValue(N, 0);
1328 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1330 unsigned char TargetFlags) {
1331 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1333 FoldingSetNodeID ID;
1334 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1336 ID.AddInteger(TargetFlags);
1338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1339 return SDValue(E, 0);
1341 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1342 CSEMap.InsertNode(N, IP);
1343 AllNodes.push_back(N);
1344 return SDValue(N, 0);
1347 SDValue SelectionDAG::getSrcValue(const Value *V) {
1348 assert((!V || V->getType()->isPointerTy()) &&
1349 "SrcValue is not a pointer?");
1351 FoldingSetNodeID ID;
1352 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1357 return SDValue(E, 0);
1359 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1360 CSEMap.InsertNode(N, IP);
1361 AllNodes.push_back(N);
1362 return SDValue(N, 0);
1365 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1366 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1367 FoldingSetNodeID ID;
1368 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1373 return SDValue(E, 0);
1375 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1376 CSEMap.InsertNode(N, IP);
1377 AllNodes.push_back(N);
1378 return SDValue(N, 0);
1382 /// getShiftAmountOperand - Return the specified value casted to
1383 /// the target's desired shift amount type.
1384 SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
1385 EVT OpTy = Op.getValueType();
1386 MVT ShTy = TLI.getShiftAmountTy();
1387 if (OpTy == ShTy || OpTy.isVector()) return Op;
1389 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1390 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1393 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1394 /// specified value type.
1395 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1396 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1397 unsigned ByteSize = VT.getStoreSize();
1398 const Type *Ty = VT.getTypeForEVT(*getContext());
1399 unsigned StackAlign =
1400 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1402 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1403 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1406 /// CreateStackTemporary - Create a stack temporary suitable for holding
1407 /// either of the specified value types.
1408 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1409 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1410 VT2.getStoreSizeInBits())/8;
1411 const Type *Ty1 = VT1.getTypeForEVT(*getContext());
1412 const Type *Ty2 = VT2.getTypeForEVT(*getContext());
1413 const TargetData *TD = TLI.getTargetData();
1414 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1415 TD->getPrefTypeAlignment(Ty2));
1417 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1418 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1419 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1422 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1423 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1424 // These setcc operations always fold.
1428 case ISD::SETFALSE2: return getConstant(0, VT);
1430 case ISD::SETTRUE2: return getConstant(1, VT);
1442 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1446 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1447 const APInt &C2 = N2C->getAPIntValue();
1448 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1449 const APInt &C1 = N1C->getAPIntValue();
1452 default: llvm_unreachable("Unknown integer setcc!");
1453 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1454 case ISD::SETNE: return getConstant(C1 != C2, VT);
1455 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1456 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1457 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1458 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1459 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1460 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1461 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1462 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1466 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1467 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1468 // No compile time operations on this type yet.
1469 if (N1C->getValueType(0) == MVT::ppcf128)
1472 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1475 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1476 return getUNDEF(VT);
1478 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1479 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1480 return getUNDEF(VT);
1482 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1483 R==APFloat::cmpLessThan, VT);
1484 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1485 return getUNDEF(VT);
1487 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1488 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1489 return getUNDEF(VT);
1491 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1492 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1493 return getUNDEF(VT);
1495 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1496 R==APFloat::cmpEqual, VT);
1497 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1498 return getUNDEF(VT);
1500 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1501 R==APFloat::cmpEqual, VT);
1502 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1503 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1504 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1505 R==APFloat::cmpEqual, VT);
1506 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1507 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1508 R==APFloat::cmpLessThan, VT);
1509 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1510 R==APFloat::cmpUnordered, VT);
1511 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1512 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1515 // Ensure that the constant occurs on the RHS.
1516 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1520 // Could not fold it.
1524 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1525 /// use this predicate to simplify operations downstream.
1526 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1527 // This predicate is not safe for vector operations.
1528 if (Op.getValueType().isVector())
1531 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1532 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1535 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1536 /// this predicate to simplify operations downstream. Mask is known to be zero
1537 /// for bits that V cannot have.
1538 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1539 unsigned Depth) const {
1540 APInt KnownZero, KnownOne;
1541 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1542 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1543 return (KnownZero & Mask) == Mask;
1546 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1547 /// known to be either zero or one and return them in the KnownZero/KnownOne
1548 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1550 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1551 APInt &KnownZero, APInt &KnownOne,
1552 unsigned Depth) const {
1553 unsigned BitWidth = Mask.getBitWidth();
1554 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() &&
1555 "Mask size mismatches value type size!");
1557 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1558 if (Depth == 6 || Mask == 0)
1559 return; // Limit search depth.
1561 APInt KnownZero2, KnownOne2;
1563 switch (Op.getOpcode()) {
1565 // We know all of the bits for a constant!
1566 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1567 KnownZero = ~KnownOne & Mask;
1570 // If either the LHS or the RHS are Zero, the result is zero.
1571 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1572 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1573 KnownZero2, KnownOne2, Depth+1);
1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1577 // Output known-1 bits are only known if set in both the LHS & RHS.
1578 KnownOne &= KnownOne2;
1579 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1580 KnownZero |= KnownZero2;
1583 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1584 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1585 KnownZero2, KnownOne2, Depth+1);
1586 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1587 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1589 // Output known-0 bits are only known if clear in both the LHS & RHS.
1590 KnownZero &= KnownZero2;
1591 // Output known-1 are known to be set if set in either the LHS | RHS.
1592 KnownOne |= KnownOne2;
1595 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1596 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1600 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1601 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1602 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1603 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1604 KnownZero = KnownZeroOut;
1608 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1609 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1610 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1614 // If low bits are zero in either operand, output low known-0 bits.
1615 // Also compute a conserative estimate for high known-0 bits.
1616 // More trickiness is possible, but this is sufficient for the
1617 // interesting case of alignment computation.
1619 unsigned TrailZ = KnownZero.countTrailingOnes() +
1620 KnownZero2.countTrailingOnes();
1621 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1622 KnownZero2.countLeadingOnes(),
1623 BitWidth) - BitWidth;
1625 TrailZ = std::min(TrailZ, BitWidth);
1626 LeadZ = std::min(LeadZ, BitWidth);
1627 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1628 APInt::getHighBitsSet(BitWidth, LeadZ);
1633 // For the purposes of computing leading zeros we can conservatively
1634 // treat a udiv as a logical right shift by the power of 2 known to
1635 // be less than the denominator.
1636 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1637 ComputeMaskedBits(Op.getOperand(0),
1638 AllOnes, KnownZero2, KnownOne2, Depth+1);
1639 unsigned LeadZ = KnownZero2.countLeadingOnes();
1643 ComputeMaskedBits(Op.getOperand(1),
1644 AllOnes, KnownZero2, KnownOne2, Depth+1);
1645 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1646 if (RHSUnknownLeadingOnes != BitWidth)
1647 LeadZ = std::min(BitWidth,
1648 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1650 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1654 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1655 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1659 // Only known if known in both the LHS and RHS.
1660 KnownOne &= KnownOne2;
1661 KnownZero &= KnownZero2;
1663 case ISD::SELECT_CC:
1664 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1665 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1666 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1667 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1669 // Only known if known in both the LHS and RHS.
1670 KnownOne &= KnownOne2;
1671 KnownZero &= KnownZero2;
1679 if (Op.getResNo() != 1)
1681 // The boolean result conforms to getBooleanContents. Fall through.
1683 // If we know the result of a setcc has the top bits zero, use this info.
1684 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1686 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1689 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1690 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1691 unsigned ShAmt = SA->getZExtValue();
1693 // If the shift count is an invalid immediate, don't do anything.
1694 if (ShAmt >= BitWidth)
1697 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1698 KnownZero, KnownOne, Depth+1);
1699 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1700 KnownZero <<= ShAmt;
1702 // low bits known zero.
1703 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1707 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1708 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1709 unsigned ShAmt = SA->getZExtValue();
1711 // If the shift count is an invalid immediate, don't do anything.
1712 if (ShAmt >= BitWidth)
1715 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1716 KnownZero, KnownOne, Depth+1);
1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1718 KnownZero = KnownZero.lshr(ShAmt);
1719 KnownOne = KnownOne.lshr(ShAmt);
1721 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1722 KnownZero |= HighBits; // High bits known zero.
1726 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1727 unsigned ShAmt = SA->getZExtValue();
1729 // If the shift count is an invalid immediate, don't do anything.
1730 if (ShAmt >= BitWidth)
1733 APInt InDemandedMask = (Mask << ShAmt);
1734 // If any of the demanded bits are produced by the sign extension, we also
1735 // demand the input sign bit.
1736 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1737 if (HighBits.getBoolValue())
1738 InDemandedMask |= APInt::getSignBit(BitWidth);
1740 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1742 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1743 KnownZero = KnownZero.lshr(ShAmt);
1744 KnownOne = KnownOne.lshr(ShAmt);
1746 // Handle the sign bits.
1747 APInt SignBit = APInt::getSignBit(BitWidth);
1748 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1750 if (KnownZero.intersects(SignBit)) {
1751 KnownZero |= HighBits; // New bits are known zero.
1752 } else if (KnownOne.intersects(SignBit)) {
1753 KnownOne |= HighBits; // New bits are known one.
1757 case ISD::SIGN_EXTEND_INREG: {
1758 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1759 unsigned EBits = EVT.getScalarType().getSizeInBits();
1761 // Sign extension. Compute the demanded bits in the result that are not
1762 // present in the input.
1763 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1765 APInt InSignBit = APInt::getSignBit(EBits);
1766 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1768 // If the sign extended bits are demanded, we know that the sign
1770 InSignBit.zext(BitWidth);
1771 if (NewBits.getBoolValue())
1772 InputDemandedBits |= InSignBit;
1774 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1775 KnownZero, KnownOne, Depth+1);
1776 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 // If the sign bit of the input is known set or clear, then we know the
1779 // top bits of the result.
1780 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1781 KnownZero |= NewBits;
1782 KnownOne &= ~NewBits;
1783 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1784 KnownOne |= NewBits;
1785 KnownZero &= ~NewBits;
1786 } else { // Input sign bit unknown
1787 KnownZero &= ~NewBits;
1788 KnownOne &= ~NewBits;
1795 unsigned LowBits = Log2_32(BitWidth)+1;
1796 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1801 if (ISD::isZEXTLoad(Op.getNode())) {
1802 LoadSDNode *LD = cast<LoadSDNode>(Op);
1803 EVT VT = LD->getMemoryVT();
1804 unsigned MemBits = VT.getScalarType().getSizeInBits();
1805 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1809 case ISD::ZERO_EXTEND: {
1810 EVT InVT = Op.getOperand(0).getValueType();
1811 unsigned InBits = InVT.getScalarType().getSizeInBits();
1812 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1813 APInt InMask = Mask;
1814 InMask.trunc(InBits);
1815 KnownZero.trunc(InBits);
1816 KnownOne.trunc(InBits);
1817 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1818 KnownZero.zext(BitWidth);
1819 KnownOne.zext(BitWidth);
1820 KnownZero |= NewBits;
1823 case ISD::SIGN_EXTEND: {
1824 EVT InVT = Op.getOperand(0).getValueType();
1825 unsigned InBits = InVT.getScalarType().getSizeInBits();
1826 APInt InSignBit = APInt::getSignBit(InBits);
1827 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1828 APInt InMask = Mask;
1829 InMask.trunc(InBits);
1831 // If any of the sign extended bits are demanded, we know that the sign
1832 // bit is demanded. Temporarily set this bit in the mask for our callee.
1833 if (NewBits.getBoolValue())
1834 InMask |= InSignBit;
1836 KnownZero.trunc(InBits);
1837 KnownOne.trunc(InBits);
1838 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1840 // Note if the sign bit is known to be zero or one.
1841 bool SignBitKnownZero = KnownZero.isNegative();
1842 bool SignBitKnownOne = KnownOne.isNegative();
1843 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1844 "Sign bit can't be known to be both zero and one!");
1846 // If the sign bit wasn't actually demanded by our caller, we don't
1847 // want it set in the KnownZero and KnownOne result values. Reset the
1848 // mask and reapply it to the result values.
1850 InMask.trunc(InBits);
1851 KnownZero &= InMask;
1854 KnownZero.zext(BitWidth);
1855 KnownOne.zext(BitWidth);
1857 // If the sign bit is known zero or one, the top bits match.
1858 if (SignBitKnownZero)
1859 KnownZero |= NewBits;
1860 else if (SignBitKnownOne)
1861 KnownOne |= NewBits;
1864 case ISD::ANY_EXTEND: {
1865 EVT InVT = Op.getOperand(0).getValueType();
1866 unsigned InBits = InVT.getScalarType().getSizeInBits();
1867 APInt InMask = Mask;
1868 InMask.trunc(InBits);
1869 KnownZero.trunc(InBits);
1870 KnownOne.trunc(InBits);
1871 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1872 KnownZero.zext(BitWidth);
1873 KnownOne.zext(BitWidth);
1876 case ISD::TRUNCATE: {
1877 EVT InVT = Op.getOperand(0).getValueType();
1878 unsigned InBits = InVT.getScalarType().getSizeInBits();
1879 APInt InMask = Mask;
1880 InMask.zext(InBits);
1881 KnownZero.zext(InBits);
1882 KnownOne.zext(InBits);
1883 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1884 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1885 KnownZero.trunc(BitWidth);
1886 KnownOne.trunc(BitWidth);
1889 case ISD::AssertZext: {
1890 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1891 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1892 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1894 KnownZero |= (~InMask) & Mask;
1898 // All bits are zero except the low bit.
1899 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1903 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1904 // We know that the top bits of C-X are clear if X contains less bits
1905 // than C (i.e. no wrap-around can happen). For example, 20-X is
1906 // positive if we can prove that X is >= 0 and < 16.
1907 if (CLHS->getAPIntValue().isNonNegative()) {
1908 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1909 // NLZ can't be BitWidth with no sign bit
1910 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1911 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1914 // If all of the MaskV bits are known to be zero, then we know the
1915 // output top bits are zero, because we now know that the output is
1917 if ((KnownZero2 & MaskV) == MaskV) {
1918 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1919 // Top bits known zero.
1920 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1927 // Output known-0 bits are known if clear or set in both the low clear bits
1928 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1929 // low 3 bits clear.
1930 APInt Mask2 = APInt::getLowBitsSet(BitWidth,
1931 BitWidth - Mask.countLeadingZeros());
1932 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1933 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1934 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1936 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1937 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1938 KnownZeroOut = std::min(KnownZeroOut,
1939 KnownZero2.countTrailingOnes());
1941 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1945 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1946 const APInt &RA = Rem->getAPIntValue().abs();
1947 if (RA.isPowerOf2()) {
1948 APInt LowBits = RA - 1;
1949 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1950 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1952 // The low bits of the first operand are unchanged by the srem.
1953 KnownZero = KnownZero2 & LowBits;
1954 KnownOne = KnownOne2 & LowBits;
1956 // If the first operand is non-negative or has all low bits zero, then
1957 // the upper bits are all zero.
1958 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1959 KnownZero |= ~LowBits;
1961 // If the first operand is negative and not all low bits are zero, then
1962 // the upper bits are all one.
1963 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
1964 KnownOne |= ~LowBits;
1969 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1974 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1975 const APInt &RA = Rem->getAPIntValue();
1976 if (RA.isPowerOf2()) {
1977 APInt LowBits = (RA - 1);
1978 APInt Mask2 = LowBits & Mask;
1979 KnownZero |= ~LowBits & Mask;
1980 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1981 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1986 // Since the result is less than or equal to either operand, any leading
1987 // zero bits in either operand must also exist in the result.
1988 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1989 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1991 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1994 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1995 KnownZero2.countLeadingOnes());
1997 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
2001 // Allow the target to implement this method for its nodes.
2002 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
2003 case ISD::INTRINSIC_WO_CHAIN:
2004 case ISD::INTRINSIC_W_CHAIN:
2005 case ISD::INTRINSIC_VOID:
2006 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this,
2013 /// ComputeNumSignBits - Return the number of times the sign bit of the
2014 /// register is replicated into the other bits. We know that at least 1 bit
2015 /// is always equal to the sign bit (itself), but other cases can give us
2016 /// information. For example, immediately after an "SRA X, 2", we know that
2017 /// the top 3 bits are all equal to each other, so we return 3.
2018 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2019 EVT VT = Op.getValueType();
2020 assert(VT.isInteger() && "Invalid VT!");
2021 unsigned VTBits = VT.getScalarType().getSizeInBits();
2023 unsigned FirstAnswer = 1;
2026 return 1; // Limit search depth.
2028 switch (Op.getOpcode()) {
2030 case ISD::AssertSext:
2031 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2032 return VTBits-Tmp+1;
2033 case ISD::AssertZext:
2034 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2037 case ISD::Constant: {
2038 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2039 // If negative, return # leading ones.
2040 if (Val.isNegative())
2041 return Val.countLeadingOnes();
2043 // Return # leading zeros.
2044 return Val.countLeadingZeros();
2047 case ISD::SIGN_EXTEND:
2048 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2049 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2051 case ISD::SIGN_EXTEND_INREG:
2052 // Max of the input and what this extends.
2054 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2057 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2058 return std::max(Tmp, Tmp2);
2061 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2062 // SRA X, C -> adds C sign bits.
2063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2064 Tmp += C->getZExtValue();
2065 if (Tmp > VTBits) Tmp = VTBits;
2069 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2070 // shl destroys sign bits.
2071 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2072 if (C->getZExtValue() >= VTBits || // Bad shift.
2073 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2074 return Tmp - C->getZExtValue();
2079 case ISD::XOR: // NOT is handled here.
2080 // Logical binary ops preserve the number of sign bits at the worst.
2081 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2083 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2084 FirstAnswer = std::min(Tmp, Tmp2);
2085 // We computed what we know about the sign bits as our first
2086 // answer. Now proceed to the generic code that uses
2087 // ComputeMaskedBits, and pick whichever answer is better.
2092 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2093 if (Tmp == 1) return 1; // Early out.
2094 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2095 return std::min(Tmp, Tmp2);
2103 if (Op.getResNo() != 1)
2105 // The boolean result conforms to getBooleanContents. Fall through.
2107 // If setcc returns 0/-1, all bits are sign bits.
2108 if (TLI.getBooleanContents() ==
2109 TargetLowering::ZeroOrNegativeOneBooleanContent)
2114 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2115 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2117 // Handle rotate right by N like a rotate left by 32-N.
2118 if (Op.getOpcode() == ISD::ROTR)
2119 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2121 // If we aren't rotating out all of the known-in sign bits, return the
2122 // number that are left. This handles rotl(sext(x), 1) for example.
2123 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2124 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2128 // Add can have at most one carry bit. Thus we know that the output
2129 // is, at worst, one more bit than the inputs.
2130 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2131 if (Tmp == 1) return 1; // Early out.
2133 // Special case decrementing a value (ADD X, -1):
2134 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2135 if (CRHS->isAllOnesValue()) {
2136 APInt KnownZero, KnownOne;
2137 APInt Mask = APInt::getAllOnesValue(VTBits);
2138 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
2140 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2142 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2145 // If we are subtracting one from a positive number, there is no carry
2146 // out of the result.
2147 if (KnownZero.isNegative())
2151 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2152 if (Tmp2 == 1) return 1;
2153 return std::min(Tmp, Tmp2)-1;
2157 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2158 if (Tmp2 == 1) return 1;
2161 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2162 if (CLHS->isNullValue()) {
2163 APInt KnownZero, KnownOne;
2164 APInt Mask = APInt::getAllOnesValue(VTBits);
2165 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
2166 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2168 if ((KnownZero | APInt(VTBits, 1)) == Mask)
2171 // If the input is known to be positive (the sign bit is known clear),
2172 // the output of the NEG has the same number of sign bits as the input.
2173 if (KnownZero.isNegative())
2176 // Otherwise, we treat this like a SUB.
2179 // Sub can have at most one carry bit. Thus we know that the output
2180 // is, at worst, one more bit than the inputs.
2181 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2182 if (Tmp == 1) return 1; // Early out.
2183 return std::min(Tmp, Tmp2)-1;
2186 // FIXME: it's tricky to do anything useful for this, but it is an important
2187 // case for targets like X86.
2191 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2192 if (Op.getOpcode() == ISD::LOAD) {
2193 LoadSDNode *LD = cast<LoadSDNode>(Op);
2194 unsigned ExtType = LD->getExtensionType();
2197 case ISD::SEXTLOAD: // '17' bits known
2198 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2199 return VTBits-Tmp+1;
2200 case ISD::ZEXTLOAD: // '16' bits known
2201 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2206 // Allow the target to implement this method for its nodes.
2207 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2208 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2209 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2210 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2211 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2212 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2215 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2216 // use this information.
2217 APInt KnownZero, KnownOne;
2218 APInt Mask = APInt::getAllOnesValue(VTBits);
2219 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2221 if (KnownZero.isNegative()) { // sign bit is 0
2223 } else if (KnownOne.isNegative()) { // sign bit is 1;
2230 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2231 // the number of identical bits in the top of the input value.
2233 Mask <<= Mask.getBitWidth()-VTBits;
2234 // Return # leading zeros. We use 'min' here in case Val was zero before
2235 // shifting. We don't want to return '64' as for an i32 "0".
2236 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2239 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2240 // If we're told that NaNs won't happen, assume they won't.
2244 // If the value is a constant, we can obviously see if it is a NaN or not.
2245 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2246 return !C->getValueAPF().isNaN();
2248 // TODO: Recognize more cases here.
2253 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2254 // If the value is a constant, we can obviously see if it is a zero or not.
2255 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2256 return !C->isZero();
2258 // TODO: Recognize more cases here.
2263 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2264 // Check the obvious case.
2265 if (A == B) return true;
2267 // For for negative and positive zero.
2268 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2269 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2270 if (CA->isZero() && CB->isZero()) return true;
2272 // Otherwise they may not be equal.
2276 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2277 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2278 if (!GA) return false;
2279 if (GA->getOffset() != 0) return false;
2280 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2281 if (!GV) return false;
2282 return MF->getMMI().hasDebugInfo();
2286 /// getNode - Gets or creates the specified node.
2288 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2289 FoldingSetNodeID ID;
2290 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2292 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2293 return SDValue(E, 0);
2295 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2296 CSEMap.InsertNode(N, IP);
2298 AllNodes.push_back(N);
2302 return SDValue(N, 0);
2305 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2306 EVT VT, SDValue Operand) {
2307 // Constant fold unary operations with an integer constant operand.
2308 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2309 const APInt &Val = C->getAPIntValue();
2312 case ISD::SIGN_EXTEND:
2313 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT);
2314 case ISD::ANY_EXTEND:
2315 case ISD::ZERO_EXTEND:
2317 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT);
2318 case ISD::UINT_TO_FP:
2319 case ISD::SINT_TO_FP: {
2320 const uint64_t zero[] = {0, 0};
2321 // No compile time operations on ppcf128.
2322 if (VT == MVT::ppcf128) break;
2323 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero));
2324 (void)apf.convertFromAPInt(Val,
2325 Opcode==ISD::SINT_TO_FP,
2326 APFloat::rmNearestTiesToEven);
2327 return getConstantFP(apf, VT);
2329 case ISD::BIT_CONVERT:
2330 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2331 return getConstantFP(Val.bitsToFloat(), VT);
2332 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2333 return getConstantFP(Val.bitsToDouble(), VT);
2336 return getConstant(Val.byteSwap(), VT);
2338 return getConstant(Val.countPopulation(), VT);
2340 return getConstant(Val.countLeadingZeros(), VT);
2342 return getConstant(Val.countTrailingZeros(), VT);
2346 // Constant fold unary operations with a floating point constant operand.
2347 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2348 APFloat V = C->getValueAPF(); // make copy
2349 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2353 return getConstantFP(V, VT);
2356 return getConstantFP(V, VT);
2358 case ISD::FP_EXTEND: {
2360 // This can return overflow, underflow, or inexact; we don't care.
2361 // FIXME need to be more flexible about rounding mode.
2362 (void)V.convert(*EVTToAPFloatSemantics(VT),
2363 APFloat::rmNearestTiesToEven, &ignored);
2364 return getConstantFP(V, VT);
2366 case ISD::FP_TO_SINT:
2367 case ISD::FP_TO_UINT: {
2370 assert(integerPartWidth >= 64);
2371 // FIXME need to be more flexible about rounding mode.
2372 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2373 Opcode==ISD::FP_TO_SINT,
2374 APFloat::rmTowardZero, &ignored);
2375 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2377 APInt api(VT.getSizeInBits(), 2, x);
2378 return getConstant(api, VT);
2380 case ISD::BIT_CONVERT:
2381 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2382 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2383 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2384 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2390 unsigned OpOpcode = Operand.getNode()->getOpcode();
2392 case ISD::TokenFactor:
2393 case ISD::MERGE_VALUES:
2394 case ISD::CONCAT_VECTORS:
2395 return Operand; // Factor, merge or concat of one node? No need.
2396 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2397 case ISD::FP_EXTEND:
2398 assert(VT.isFloatingPoint() &&
2399 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2400 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2401 assert((!VT.isVector() ||
2402 VT.getVectorNumElements() ==
2403 Operand.getValueType().getVectorNumElements()) &&
2404 "Vector element count mismatch!");
2405 if (Operand.getOpcode() == ISD::UNDEF)
2406 return getUNDEF(VT);
2408 case ISD::SIGN_EXTEND:
2409 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2410 "Invalid SIGN_EXTEND!");
2411 if (Operand.getValueType() == VT) return Operand; // noop extension
2412 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2413 "Invalid sext node, dst < src!");
2414 assert((!VT.isVector() ||
2415 VT.getVectorNumElements() ==
2416 Operand.getValueType().getVectorNumElements()) &&
2417 "Vector element count mismatch!");
2418 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2419 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2421 case ISD::ZERO_EXTEND:
2422 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2423 "Invalid ZERO_EXTEND!");
2424 if (Operand.getValueType() == VT) return Operand; // noop extension
2425 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2426 "Invalid zext node, dst < src!");
2427 assert((!VT.isVector() ||
2428 VT.getVectorNumElements() ==
2429 Operand.getValueType().getVectorNumElements()) &&
2430 "Vector element count mismatch!");
2431 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2432 return getNode(ISD::ZERO_EXTEND, DL, VT,
2433 Operand.getNode()->getOperand(0));
2435 case ISD::ANY_EXTEND:
2436 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2437 "Invalid ANY_EXTEND!");
2438 if (Operand.getValueType() == VT) return Operand; // noop extension
2439 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2440 "Invalid anyext node, dst < src!");
2441 assert((!VT.isVector() ||
2442 VT.getVectorNumElements() ==
2443 Operand.getValueType().getVectorNumElements()) &&
2444 "Vector element count mismatch!");
2446 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2447 OpOpcode == ISD::ANY_EXTEND)
2448 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2449 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2451 // (ext (trunx x)) -> x
2452 if (OpOpcode == ISD::TRUNCATE) {
2453 SDValue OpOp = Operand.getNode()->getOperand(0);
2454 if (OpOp.getValueType() == VT)
2459 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2460 "Invalid TRUNCATE!");
2461 if (Operand.getValueType() == VT) return Operand; // noop truncate
2462 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2463 "Invalid truncate node, src < dst!");
2464 assert((!VT.isVector() ||
2465 VT.getVectorNumElements() ==
2466 Operand.getValueType().getVectorNumElements()) &&
2467 "Vector element count mismatch!");
2468 if (OpOpcode == ISD::TRUNCATE)
2469 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2470 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2471 OpOpcode == ISD::ANY_EXTEND) {
2472 // If the source is smaller than the dest, we still need an extend.
2473 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2474 .bitsLT(VT.getScalarType()))
2475 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2476 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2477 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2479 return Operand.getNode()->getOperand(0);
2482 case ISD::BIT_CONVERT:
2483 // Basic sanity checking.
2484 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2485 && "Cannot BIT_CONVERT between types of different sizes!");
2486 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2487 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2488 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0));
2489 if (OpOpcode == ISD::UNDEF)
2490 return getUNDEF(VT);
2492 case ISD::SCALAR_TO_VECTOR:
2493 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2494 (VT.getVectorElementType() == Operand.getValueType() ||
2495 (VT.getVectorElementType().isInteger() &&
2496 Operand.getValueType().isInteger() &&
2497 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2498 "Illegal SCALAR_TO_VECTOR node!");
2499 if (OpOpcode == ISD::UNDEF)
2500 return getUNDEF(VT);
2501 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2502 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2503 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2504 Operand.getConstantOperandVal(1) == 0 &&
2505 Operand.getOperand(0).getValueType() == VT)
2506 return Operand.getOperand(0);
2509 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2510 if (UnsafeFPMath && OpOpcode == ISD::FSUB)
2511 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2512 Operand.getNode()->getOperand(0));
2513 if (OpOpcode == ISD::FNEG) // --X -> X
2514 return Operand.getNode()->getOperand(0);
2517 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2518 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2523 SDVTList VTs = getVTList(VT);
2524 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2525 FoldingSetNodeID ID;
2526 SDValue Ops[1] = { Operand };
2527 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2529 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2530 return SDValue(E, 0);
2532 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2533 CSEMap.InsertNode(N, IP);
2535 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2538 AllNodes.push_back(N);
2542 return SDValue(N, 0);
2545 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2547 ConstantSDNode *Cst1,
2548 ConstantSDNode *Cst2) {
2549 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2552 case ISD::ADD: return getConstant(C1 + C2, VT);
2553 case ISD::SUB: return getConstant(C1 - C2, VT);
2554 case ISD::MUL: return getConstant(C1 * C2, VT);
2556 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2559 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2562 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2565 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2567 case ISD::AND: return getConstant(C1 & C2, VT);
2568 case ISD::OR: return getConstant(C1 | C2, VT);
2569 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2570 case ISD::SHL: return getConstant(C1 << C2, VT);
2571 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2572 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2573 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2574 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2581 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2582 SDValue N1, SDValue N2) {
2583 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2584 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2587 case ISD::TokenFactor:
2588 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2589 N2.getValueType() == MVT::Other && "Invalid token factor!");
2590 // Fold trivial token factors.
2591 if (N1.getOpcode() == ISD::EntryToken) return N2;
2592 if (N2.getOpcode() == ISD::EntryToken) return N1;
2593 if (N1 == N2) return N1;
2595 case ISD::CONCAT_VECTORS:
2596 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2597 // one big BUILD_VECTOR.
2598 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2599 N2.getOpcode() == ISD::BUILD_VECTOR) {
2600 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2601 N1.getNode()->op_end());
2602 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2603 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2607 assert(VT.isInteger() && "This operator does not apply to FP types!");
2608 assert(N1.getValueType() == N2.getValueType() &&
2609 N1.getValueType() == VT && "Binary operator types must match!");
2610 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2611 // worth handling here.
2612 if (N2C && N2C->isNullValue())
2614 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2621 assert(VT.isInteger() && "This operator does not apply to FP types!");
2622 assert(N1.getValueType() == N2.getValueType() &&
2623 N1.getValueType() == VT && "Binary operator types must match!");
2624 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2625 // it's worth handling here.
2626 if (N2C && N2C->isNullValue())
2636 assert(VT.isInteger() && "This operator does not apply to FP types!");
2637 assert(N1.getValueType() == N2.getValueType() &&
2638 N1.getValueType() == VT && "Binary operator types must match!");
2646 if (Opcode == ISD::FADD) {
2648 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2649 if (CFP->getValueAPF().isZero())
2652 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2653 if (CFP->getValueAPF().isZero())
2655 } else if (Opcode == ISD::FSUB) {
2657 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2658 if (CFP->getValueAPF().isZero())
2662 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2663 assert(N1.getValueType() == N2.getValueType() &&
2664 N1.getValueType() == VT && "Binary operator types must match!");
2666 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2667 assert(N1.getValueType() == VT &&
2668 N1.getValueType().isFloatingPoint() &&
2669 N2.getValueType().isFloatingPoint() &&
2670 "Invalid FCOPYSIGN!");
2677 assert(VT == N1.getValueType() &&
2678 "Shift operators return type must be the same as their first arg");
2679 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2680 "Shifts only work on integers");
2682 // Always fold shifts of i1 values so the code generator doesn't need to
2683 // handle them. Since we know the size of the shift has to be less than the
2684 // size of the value, the shift/rotate count is guaranteed to be zero.
2687 if (N2C && N2C->isNullValue())
2690 case ISD::FP_ROUND_INREG: {
2691 EVT EVT = cast<VTSDNode>(N2)->getVT();
2692 assert(VT == N1.getValueType() && "Not an inreg round!");
2693 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2694 "Cannot FP_ROUND_INREG integer types");
2695 assert(EVT.isVector() == VT.isVector() &&
2696 "FP_ROUND_INREG type should be vector iff the operand "
2698 assert((!EVT.isVector() ||
2699 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2700 "Vector element counts must match in FP_ROUND_INREG");
2701 assert(EVT.bitsLE(VT) && "Not rounding down!");
2702 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2706 assert(VT.isFloatingPoint() &&
2707 N1.getValueType().isFloatingPoint() &&
2708 VT.bitsLE(N1.getValueType()) &&
2709 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2710 if (N1.getValueType() == VT) return N1; // noop conversion.
2712 case ISD::AssertSext:
2713 case ISD::AssertZext: {
2714 EVT EVT = cast<VTSDNode>(N2)->getVT();
2715 assert(VT == N1.getValueType() && "Not an inreg extend!");
2716 assert(VT.isInteger() && EVT.isInteger() &&
2717 "Cannot *_EXTEND_INREG FP types");
2718 assert(!EVT.isVector() &&
2719 "AssertSExt/AssertZExt type should be the vector element type "
2720 "rather than the vector type!");
2721 assert(EVT.bitsLE(VT) && "Not extending!");
2722 if (VT == EVT) return N1; // noop assertion.
2725 case ISD::SIGN_EXTEND_INREG: {
2726 EVT EVT = cast<VTSDNode>(N2)->getVT();
2727 assert(VT == N1.getValueType() && "Not an inreg extend!");
2728 assert(VT.isInteger() && EVT.isInteger() &&
2729 "Cannot *_EXTEND_INREG FP types");
2730 assert(EVT.isVector() == VT.isVector() &&
2731 "SIGN_EXTEND_INREG type should be vector iff the operand "
2733 assert((!EVT.isVector() ||
2734 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2735 "Vector element counts must match in SIGN_EXTEND_INREG");
2736 assert(EVT.bitsLE(VT) && "Not extending!");
2737 if (EVT == VT) return N1; // Not actually extending
2740 APInt Val = N1C->getAPIntValue();
2741 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2742 Val <<= Val.getBitWidth()-FromBits;
2743 Val = Val.ashr(Val.getBitWidth()-FromBits);
2744 return getConstant(Val, VT);
2748 case ISD::EXTRACT_VECTOR_ELT:
2749 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2750 if (N1.getOpcode() == ISD::UNDEF)
2751 return getUNDEF(VT);
2753 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2754 // expanding copies of large vectors from registers.
2756 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2757 N1.getNumOperands() > 0) {
2759 N1.getOperand(0).getValueType().getVectorNumElements();
2760 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2761 N1.getOperand(N2C->getZExtValue() / Factor),
2762 getConstant(N2C->getZExtValue() % Factor,
2763 N2.getValueType()));
2766 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2767 // expanding large vector constants.
2768 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2769 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2770 EVT VEltTy = N1.getValueType().getVectorElementType();
2771 if (Elt.getValueType() != VEltTy) {
2772 // If the vector element type is not legal, the BUILD_VECTOR operands
2773 // are promoted and implicitly truncated. Make that explicit here.
2774 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2777 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2778 // result is implicitly extended.
2779 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2784 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2785 // operations are lowered to scalars.
2786 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2787 // If the indices are the same, return the inserted element else
2788 // if the indices are known different, extract the element from
2789 // the original vector.
2790 SDValue N1Op2 = N1.getOperand(2);
2791 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2793 if (N1Op2C && N2C) {
2794 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2795 if (VT == N1.getOperand(1).getValueType())
2796 return N1.getOperand(1);
2798 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2801 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2805 case ISD::EXTRACT_ELEMENT:
2806 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2807 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2808 (N1.getValueType().isInteger() == VT.isInteger()) &&
2809 "Wrong types for EXTRACT_ELEMENT!");
2811 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2812 // 64-bit integers into 32-bit parts. Instead of building the extract of
2813 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2814 if (N1.getOpcode() == ISD::BUILD_PAIR)
2815 return N1.getOperand(N2C->getZExtValue());
2817 // EXTRACT_ELEMENT of a constant int is also very common.
2818 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2819 unsigned ElementSize = VT.getSizeInBits();
2820 unsigned Shift = ElementSize * N2C->getZExtValue();
2821 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2822 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2825 case ISD::EXTRACT_SUBVECTOR:
2826 if (N1.getValueType() == VT) // Trivial extraction.
2833 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2834 if (SV.getNode()) return SV;
2835 } else { // Cannonicalize constant to RHS if commutative
2836 if (isCommutativeBinOp(Opcode)) {
2837 std::swap(N1C, N2C);
2843 // Constant fold FP operations.
2844 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2845 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2847 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2848 // Cannonicalize constant to RHS if commutative
2849 std::swap(N1CFP, N2CFP);
2851 } else if (N2CFP && VT != MVT::ppcf128) {
2852 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2853 APFloat::opStatus s;
2856 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2857 if (s != APFloat::opInvalidOp)
2858 return getConstantFP(V1, VT);
2861 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2862 if (s!=APFloat::opInvalidOp)
2863 return getConstantFP(V1, VT);
2866 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2867 if (s!=APFloat::opInvalidOp)
2868 return getConstantFP(V1, VT);
2871 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2872 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2873 return getConstantFP(V1, VT);
2876 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2877 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2878 return getConstantFP(V1, VT);
2880 case ISD::FCOPYSIGN:
2882 return getConstantFP(V1, VT);
2888 // Canonicalize an UNDEF to the RHS, even over a constant.
2889 if (N1.getOpcode() == ISD::UNDEF) {
2890 if (isCommutativeBinOp(Opcode)) {
2894 case ISD::FP_ROUND_INREG:
2895 case ISD::SIGN_EXTEND_INREG:
2901 return N1; // fold op(undef, arg2) -> undef
2909 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2910 // For vectors, we can't easily build an all zero vector, just return
2917 // Fold a bunch of operators when the RHS is undef.
2918 if (N2.getOpcode() == ISD::UNDEF) {
2921 if (N1.getOpcode() == ISD::UNDEF)
2922 // Handle undef ^ undef -> 0 special case. This is a common
2924 return getConstant(0, VT);
2934 return N2; // fold op(arg1, undef) -> undef
2948 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2949 // For vectors, we can't easily build an all zero vector, just return
2954 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
2955 // For vectors, we can't easily build an all one vector, just return
2963 // Memoize this node if possible.
2965 SDVTList VTs = getVTList(VT);
2966 if (VT != MVT::Flag) {
2967 SDValue Ops[] = { N1, N2 };
2968 FoldingSetNodeID ID;
2969 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2971 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2972 return SDValue(E, 0);
2974 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2975 CSEMap.InsertNode(N, IP);
2977 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
2980 AllNodes.push_back(N);
2984 return SDValue(N, 0);
2987 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2988 SDValue N1, SDValue N2, SDValue N3) {
2989 // Perform various simplifications.
2990 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2992 case ISD::CONCAT_VECTORS:
2993 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2994 // one big BUILD_VECTOR.
2995 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2996 N2.getOpcode() == ISD::BUILD_VECTOR &&
2997 N3.getOpcode() == ISD::BUILD_VECTOR) {
2998 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2999 N1.getNode()->op_end());
3000 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3001 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3002 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3006 // Use FoldSetCC to simplify SETCC's.
3007 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3008 if (Simp.getNode()) return Simp;
3013 if (N1C->getZExtValue())
3014 return N2; // select true, X, Y -> X
3016 return N3; // select false, X, Y -> Y
3019 if (N2 == N3) return N2; // select C, X, X -> X
3021 case ISD::VECTOR_SHUFFLE:
3022 llvm_unreachable("should use getVectorShuffle constructor!");
3024 case ISD::BIT_CONVERT:
3025 // Fold bit_convert nodes from a type to themselves.
3026 if (N1.getValueType() == VT)
3031 // Memoize node if it doesn't produce a flag.
3033 SDVTList VTs = getVTList(VT);
3034 if (VT != MVT::Flag) {
3035 SDValue Ops[] = { N1, N2, N3 };
3036 FoldingSetNodeID ID;
3037 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3040 return SDValue(E, 0);
3042 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3043 CSEMap.InsertNode(N, IP);
3045 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3048 AllNodes.push_back(N);
3052 return SDValue(N, 0);
3055 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3056 SDValue N1, SDValue N2, SDValue N3,
3058 SDValue Ops[] = { N1, N2, N3, N4 };
3059 return getNode(Opcode, DL, VT, Ops, 4);
3062 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3063 SDValue N1, SDValue N2, SDValue N3,
3064 SDValue N4, SDValue N5) {
3065 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3066 return getNode(Opcode, DL, VT, Ops, 5);
3069 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3070 /// the incoming stack arguments to be loaded from the stack.
3071 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3072 SmallVector<SDValue, 8> ArgChains;
3074 // Include the original chain at the beginning of the list. When this is
3075 // used by target LowerCall hooks, this helps legalize find the
3076 // CALLSEQ_BEGIN node.
3077 ArgChains.push_back(Chain);
3079 // Add a chain value for each stack argument.
3080 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3081 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3082 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3083 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3084 if (FI->getIndex() < 0)
3085 ArgChains.push_back(SDValue(L, 1));
3087 // Build a tokenfactor for all the chains.
3088 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3089 &ArgChains[0], ArgChains.size());
3092 /// getMemsetValue - Vectorized representation of the memset value
3094 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3096 assert(Value.getOpcode() != ISD::UNDEF);
3098 unsigned NumBits = VT.getScalarType().getSizeInBits();
3099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3100 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
3102 for (unsigned i = NumBits; i > 8; i >>= 1) {
3103 Val = (Val << Shift) | Val;
3107 return DAG.getConstant(Val, VT);
3108 return DAG.getConstantFP(APFloat(Val), VT);
3111 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3112 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3114 for (unsigned i = NumBits; i > 8; i >>= 1) {
3115 Value = DAG.getNode(ISD::OR, dl, VT,
3116 DAG.getNode(ISD::SHL, dl, VT, Value,
3117 DAG.getConstant(Shift,
3118 TLI.getShiftAmountTy())),
3126 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3127 /// used when a memcpy is turned into a memset when the source is a constant
3129 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3130 const TargetLowering &TLI,
3131 std::string &Str, unsigned Offset) {
3132 // Handle vector with all elements zero.
3135 return DAG.getConstant(0, VT);
3136 else if (VT == MVT::f32 || VT == MVT::f64)
3137 return DAG.getConstantFP(0.0, VT);
3138 else if (VT.isVector()) {
3139 unsigned NumElts = VT.getVectorNumElements();
3140 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3141 return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
3142 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3145 llvm_unreachable("Expected type!");
3148 assert(!VT.isVector() && "Can't handle vector type here!");
3149 unsigned NumBits = VT.getSizeInBits();
3150 unsigned MSB = NumBits / 8;
3152 if (TLI.isLittleEndian())
3153 Offset = Offset + MSB - 1;
3154 for (unsigned i = 0; i != MSB; ++i) {
3155 Val = (Val << 8) | (unsigned char)Str[Offset];
3156 Offset += TLI.isLittleEndian() ? -1 : 1;
3158 return DAG.getConstant(Val, VT);
3161 /// getMemBasePlusOffset - Returns base and offset node for the
3163 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3164 SelectionDAG &DAG) {
3165 EVT VT = Base.getValueType();
3166 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3167 VT, Base, DAG.getConstant(Offset, VT));
3170 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3172 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
3173 unsigned SrcDelta = 0;
3174 GlobalAddressSDNode *G = NULL;
3175 if (Src.getOpcode() == ISD::GlobalAddress)
3176 G = cast<GlobalAddressSDNode>(Src);
3177 else if (Src.getOpcode() == ISD::ADD &&
3178 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3179 Src.getOperand(1).getOpcode() == ISD::Constant) {
3180 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3181 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3186 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
3187 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
3193 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3194 /// to replace the memset / memcpy. Return true if the number of memory ops
3195 /// is below the threshold. It returns the types of the sequence of
3196 /// memory ops to perform memset / memcpy by reference.
3197 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3198 unsigned Limit, uint64_t Size,
3199 unsigned DstAlign, unsigned SrcAlign,
3200 bool NonScalarIntSafe,
3203 const TargetLowering &TLI) {
3204 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3205 "Expecting memcpy / memset source to meet alignment requirement!");
3206 // If 'SrcAlign' is zero, that means the memory operation does not need load
3207 // the value, i.e. memset or memcpy from constant string. Otherwise, it's
3208 // the inferred alignment of the source. 'DstAlign', on the other hand, is the
3209 // specified alignment of the memory operation. If it is zero, that means
3210 // it's possible to change the alignment of the destination. 'MemcpyStrSrc'
3211 // indicates whether the memcpy source is constant so it does not need to be
3213 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3214 NonScalarIntSafe, MemcpyStrSrc,
3215 DAG.getMachineFunction());
3217 if (VT == MVT::Other) {
3218 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3219 TLI.allowsUnalignedMemoryAccesses(VT)) {
3220 VT = TLI.getPointerTy();
3222 switch (DstAlign & 7) {
3223 case 0: VT = MVT::i64; break;
3224 case 4: VT = MVT::i32; break;
3225 case 2: VT = MVT::i16; break;
3226 default: VT = MVT::i8; break;
3231 while (!TLI.isTypeLegal(LVT))
3232 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3233 assert(LVT.isInteger());
3239 // If we're optimizing for size, and there is a limit, bump the maximum number
3240 // of operations inserted down to 4. This is a wild guess that approximates
3241 // the size of a call to memcpy or memset (3 arguments + call).
3243 const Function *F = DAG.getMachineFunction().getFunction();
3244 if (F->hasFnAttr(Attribute::OptimizeForSize))
3248 unsigned NumMemOps = 0;
3250 unsigned VTSize = VT.getSizeInBits() / 8;
3251 while (VTSize > Size) {
3252 // For now, only use non-vector load / store's for the left-over pieces.
3253 if (VT.isVector() || VT.isFloatingPoint()) {
3255 while (!TLI.isTypeLegal(VT))
3256 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3257 VTSize = VT.getSizeInBits() / 8;
3259 // This can result in a type that is not legal on the target, e.g.
3260 // 1 or 2 bytes on PPC.
3261 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3266 if (++NumMemOps > Limit)
3268 MemOps.push_back(VT);
3275 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3276 SDValue Chain, SDValue Dst,
3277 SDValue Src, uint64_t Size,
3278 unsigned Align, bool isVol,
3280 MachinePointerInfo DstPtrInfo,
3281 MachinePointerInfo SrcPtrInfo) {
3282 // Turn a memcpy of undef to nop.
3283 if (Src.getOpcode() == ISD::UNDEF)
3286 // Expand memcpy to a series of load and store ops if the size operand falls
3287 // below a certain threshold.
3288 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3289 // rather than maybe a humongous number of loads and stores.
3290 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3291 std::vector<EVT> MemOps;
3292 bool DstAlignCanChange = false;
3293 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3294 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3295 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3296 DstAlignCanChange = true;
3297 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3298 if (Align > SrcAlign)
3301 bool CopyFromStr = isMemSrcFromString(Src, Str);
3302 bool isZeroStr = CopyFromStr && Str.empty();
3303 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy();
3305 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3306 (DstAlignCanChange ? 0 : Align),
3307 (isZeroStr ? 0 : SrcAlign),
3308 true, CopyFromStr, DAG, TLI))
3311 if (DstAlignCanChange) {
3312 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3313 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3314 if (NewAlign > Align) {
3315 // Give the stack frame object a larger alignment if needed.
3316 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3317 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3322 SmallVector<SDValue, 8> OutChains;
3323 unsigned NumMemOps = MemOps.size();
3324 uint64_t SrcOff = 0, DstOff = 0;
3325 for (unsigned i = 0; i != NumMemOps; ++i) {
3327 unsigned VTSize = VT.getSizeInBits() / 8;
3328 SDValue Value, Store;
3331 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3332 // It's unlikely a store of a vector immediate can be done in a single
3333 // instruction. It would require a load from a constantpool first.
3334 // We only handle zero vectors here.
3335 // FIXME: Handle other cases where store of vector immediate is done in
3336 // a single instruction.
3337 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff);
3338 Store = DAG.getStore(Chain, dl, Value,
3339 getMemBasePlusOffset(Dst, DstOff, DAG),
3340 DstPtrInfo.getWithOffset(DstOff), isVol,
3343 // The type might not be legal for the target. This should only happen
3344 // if the type is smaller than a legal type, as on PPC, so the right
3345 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3346 // to Load/Store if NVT==VT.
3347 // FIXME does the case above also need this?
3348 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3349 assert(NVT.bitsGE(VT));
3350 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain,
3351 getMemBasePlusOffset(Src, SrcOff, DAG),
3352 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3353 MinAlign(SrcAlign, SrcOff));
3354 Store = DAG.getTruncStore(Chain, dl, Value,
3355 getMemBasePlusOffset(Dst, DstOff, DAG),
3356 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3359 OutChains.push_back(Store);
3364 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3365 &OutChains[0], OutChains.size());
3368 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3369 SDValue Chain, SDValue Dst,
3370 SDValue Src, uint64_t Size,
3371 unsigned Align, bool isVol,
3373 MachinePointerInfo DstPtrInfo,
3374 MachinePointerInfo SrcPtrInfo) {
3375 // Turn a memmove of undef to nop.
3376 if (Src.getOpcode() == ISD::UNDEF)
3379 // Expand memmove to a series of load and store ops if the size operand falls
3380 // below a certain threshold.
3381 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3382 std::vector<EVT> MemOps;
3383 bool DstAlignCanChange = false;
3384 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3385 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3386 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3387 DstAlignCanChange = true;
3388 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3389 if (Align > SrcAlign)
3391 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove();
3393 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3394 (DstAlignCanChange ? 0 : Align),
3395 SrcAlign, true, false, DAG, TLI))
3398 if (DstAlignCanChange) {
3399 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3400 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3401 if (NewAlign > Align) {
3402 // Give the stack frame object a larger alignment if needed.
3403 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3404 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3409 uint64_t SrcOff = 0, DstOff = 0;
3410 SmallVector<SDValue, 8> LoadValues;
3411 SmallVector<SDValue, 8> LoadChains;
3412 SmallVector<SDValue, 8> OutChains;
3413 unsigned NumMemOps = MemOps.size();
3414 for (unsigned i = 0; i < NumMemOps; i++) {
3416 unsigned VTSize = VT.getSizeInBits() / 8;
3417 SDValue Value, Store;
3419 Value = DAG.getLoad(VT, dl, Chain,
3420 getMemBasePlusOffset(Src, SrcOff, DAG),
3421 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3423 LoadValues.push_back(Value);
3424 LoadChains.push_back(Value.getValue(1));
3427 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3428 &LoadChains[0], LoadChains.size());
3430 for (unsigned i = 0; i < NumMemOps; i++) {
3432 unsigned VTSize = VT.getSizeInBits() / 8;
3433 SDValue Value, Store;
3435 Store = DAG.getStore(Chain, dl, LoadValues[i],
3436 getMemBasePlusOffset(Dst, DstOff, DAG),
3437 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3438 OutChains.push_back(Store);
3442 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3443 &OutChains[0], OutChains.size());
3446 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3447 SDValue Chain, SDValue Dst,
3448 SDValue Src, uint64_t Size,
3449 unsigned Align, bool isVol,
3450 MachinePointerInfo DstPtrInfo) {
3451 // Turn a memset of undef to nop.
3452 if (Src.getOpcode() == ISD::UNDEF)
3455 // Expand memset to a series of load/store ops if the size operand
3456 // falls below a certain threshold.
3457 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3458 std::vector<EVT> MemOps;
3459 bool DstAlignCanChange = false;
3460 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
3461 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3462 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3463 DstAlignCanChange = true;
3464 bool NonScalarIntSafe =
3465 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3466 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(),
3467 Size, (DstAlignCanChange ? 0 : Align), 0,
3468 NonScalarIntSafe, false, DAG, TLI))
3471 if (DstAlignCanChange) {
3472 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3473 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3474 if (NewAlign > Align) {
3475 // Give the stack frame object a larger alignment if needed.
3476 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3477 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3482 SmallVector<SDValue, 8> OutChains;
3483 uint64_t DstOff = 0;
3484 unsigned NumMemOps = MemOps.size();
3485 for (unsigned i = 0; i < NumMemOps; i++) {
3487 unsigned VTSize = VT.getSizeInBits() / 8;
3488 SDValue Value = getMemsetValue(Src, VT, DAG, dl);
3489 SDValue Store = DAG.getStore(Chain, dl, Value,
3490 getMemBasePlusOffset(Dst, DstOff, DAG),
3491 DstPtrInfo.getWithOffset(DstOff),
3492 isVol, false, Align);
3493 OutChains.push_back(Store);
3497 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3498 &OutChains[0], OutChains.size());
3501 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3502 SDValue Src, SDValue Size,
3503 unsigned Align, bool isVol, bool AlwaysInline,
3504 MachinePointerInfo DstPtrInfo,
3505 MachinePointerInfo SrcPtrInfo) {
3507 // Check to see if we should lower the memcpy to loads and stores first.
3508 // For cases within the target-specified limits, this is the best choice.
3509 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3511 // Memcpy with size zero? Just return the original chain.
3512 if (ConstantSize->isNullValue())
3515 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3516 ConstantSize->getZExtValue(),Align,
3517 isVol, false, DstPtrInfo, SrcPtrInfo);
3518 if (Result.getNode())
3522 // Then check to see if we should lower the memcpy with target-specific
3523 // code. If the target chooses to do this, this is the next best.
3525 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3526 isVol, AlwaysInline,
3527 DstPtrInfo, SrcPtrInfo);
3528 if (Result.getNode())
3531 // If we really need inline code and the target declined to provide it,
3532 // use a (potentially long) sequence of loads and stores.
3534 assert(ConstantSize && "AlwaysInline requires a constant size!");
3535 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3536 ConstantSize->getZExtValue(), Align, isVol,
3537 true, DstPtrInfo, SrcPtrInfo);
3540 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3541 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3542 // respect volatile, so they may do things like read or write memory
3543 // beyond the given memory regions. But fixing this isn't easy, and most
3544 // people don't care.
3546 // Emit a library call.
3547 TargetLowering::ArgListTy Args;
3548 TargetLowering::ArgListEntry Entry;
3549 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3550 Entry.Node = Dst; Args.push_back(Entry);
3551 Entry.Node = Src; Args.push_back(Entry);
3552 Entry.Node = Size; Args.push_back(Entry);
3553 // FIXME: pass in DebugLoc
3554 std::pair<SDValue,SDValue> CallResult =
3555 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3556 false, false, false, false, 0,
3557 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false,
3558 /*isReturnValueUsed=*/false,
3559 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3560 TLI.getPointerTy()),
3562 return CallResult.second;
3565 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3566 SDValue Src, SDValue Size,
3567 unsigned Align, bool isVol,
3568 MachinePointerInfo DstPtrInfo,
3569 MachinePointerInfo SrcPtrInfo) {
3571 // Check to see if we should lower the memmove to loads and stores first.
3572 // For cases within the target-specified limits, this is the best choice.
3573 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3575 // Memmove with size zero? Just return the original chain.
3576 if (ConstantSize->isNullValue())
3580 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3581 ConstantSize->getZExtValue(), Align, isVol,
3582 false, DstPtrInfo, SrcPtrInfo);
3583 if (Result.getNode())
3587 // Then check to see if we should lower the memmove with target-specific
3588 // code. If the target chooses to do this, this is the next best.
3590 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3591 DstPtrInfo, SrcPtrInfo);
3592 if (Result.getNode())
3595 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3596 // not be safe. See memcpy above for more details.
3598 // Emit a library call.
3599 TargetLowering::ArgListTy Args;
3600 TargetLowering::ArgListEntry Entry;
3601 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3602 Entry.Node = Dst; Args.push_back(Entry);
3603 Entry.Node = Src; Args.push_back(Entry);
3604 Entry.Node = Size; Args.push_back(Entry);
3605 // FIXME: pass in DebugLoc
3606 std::pair<SDValue,SDValue> CallResult =
3607 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3608 false, false, false, false, 0,
3609 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false,
3610 /*isReturnValueUsed=*/false,
3611 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3612 TLI.getPointerTy()),
3614 return CallResult.second;
3617 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3618 SDValue Src, SDValue Size,
3619 unsigned Align, bool isVol,
3620 MachinePointerInfo DstPtrInfo) {
3622 // Check to see if we should lower the memset to stores first.
3623 // For cases within the target-specified limits, this is the best choice.
3624 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3626 // Memset with size zero? Just return the original chain.
3627 if (ConstantSize->isNullValue())
3631 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3632 Align, isVol, DstPtrInfo);
3634 if (Result.getNode())
3638 // Then check to see if we should lower the memset with target-specific
3639 // code. If the target chooses to do this, this is the next best.
3641 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3643 if (Result.getNode())
3646 // Emit a library call.
3647 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3648 TargetLowering::ArgListTy Args;
3649 TargetLowering::ArgListEntry Entry;
3650 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3651 Args.push_back(Entry);
3652 // Extend or truncate the argument to be an i32 value for the call.
3653 if (Src.getValueType().bitsGT(MVT::i32))
3654 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3656 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3658 Entry.Ty = Type::getInt32Ty(*getContext());
3659 Entry.isSExt = true;
3660 Args.push_back(Entry);
3662 Entry.Ty = IntPtrTy;
3663 Entry.isSExt = false;
3664 Args.push_back(Entry);
3665 // FIXME: pass in DebugLoc
3666 std::pair<SDValue,SDValue> CallResult =
3667 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3668 false, false, false, false, 0,
3669 TLI.getLibcallCallingConv(RTLIB::MEMSET), false,
3670 /*isReturnValueUsed=*/false,
3671 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3672 TLI.getPointerTy()),
3674 return CallResult.second;
3677 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3678 SDValue Chain, SDValue Ptr, SDValue Cmp,
3679 SDValue Swp, MachinePointerInfo PtrInfo,
3680 unsigned Alignment) {
3681 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3682 Alignment = getEVTAlignment(MemVT);
3684 MachineFunction &MF = getMachineFunction();
3685 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3687 // For now, atomics are considered to be volatile always.
3688 Flags |= MachineMemOperand::MOVolatile;
3690 MachineMemOperand *MMO =
3691 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3693 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO);
3696 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3698 SDValue Ptr, SDValue Cmp,
3699 SDValue Swp, MachineMemOperand *MMO) {
3700 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3701 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3703 EVT VT = Cmp.getValueType();
3705 SDVTList VTs = getVTList(VT, MVT::Other);
3706 FoldingSetNodeID ID;
3707 ID.AddInteger(MemVT.getRawBits());
3708 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3709 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3711 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3712 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3713 return SDValue(E, 0);
3715 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3716 Ptr, Cmp, Swp, MMO);
3717 CSEMap.InsertNode(N, IP);
3718 AllNodes.push_back(N);
3719 return SDValue(N, 0);
3722 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3724 SDValue Ptr, SDValue Val,
3725 const Value* PtrVal,
3726 unsigned Alignment) {
3727 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3728 Alignment = getEVTAlignment(MemVT);
3730 MachineFunction &MF = getMachineFunction();
3731 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3733 // For now, atomics are considered to be volatile always.
3734 Flags |= MachineMemOperand::MOVolatile;
3736 MachineMemOperand *MMO =
3737 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3738 MemVT.getStoreSize(), Alignment);
3740 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
3743 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3745 SDValue Ptr, SDValue Val,
3746 MachineMemOperand *MMO) {
3747 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3748 Opcode == ISD::ATOMIC_LOAD_SUB ||
3749 Opcode == ISD::ATOMIC_LOAD_AND ||
3750 Opcode == ISD::ATOMIC_LOAD_OR ||
3751 Opcode == ISD::ATOMIC_LOAD_XOR ||
3752 Opcode == ISD::ATOMIC_LOAD_NAND ||
3753 Opcode == ISD::ATOMIC_LOAD_MIN ||
3754 Opcode == ISD::ATOMIC_LOAD_MAX ||
3755 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3756 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3757 Opcode == ISD::ATOMIC_SWAP) &&
3758 "Invalid Atomic Op");
3760 EVT VT = Val.getValueType();
3762 SDVTList VTs = getVTList(VT, MVT::Other);
3763 FoldingSetNodeID ID;
3764 ID.AddInteger(MemVT.getRawBits());
3765 SDValue Ops[] = {Chain, Ptr, Val};
3766 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3768 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3769 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3770 return SDValue(E, 0);
3772 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3774 CSEMap.InsertNode(N, IP);
3775 AllNodes.push_back(N);
3776 return SDValue(N, 0);
3779 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3780 /// Allowed to return something different (and simpler) if Simplify is true.
3781 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
3786 SmallVector<EVT, 4> VTs;
3787 VTs.reserve(NumOps);
3788 for (unsigned i = 0; i < NumOps; ++i)
3789 VTs.push_back(Ops[i].getValueType());
3790 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
3795 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
3796 const EVT *VTs, unsigned NumVTs,
3797 const SDValue *Ops, unsigned NumOps,
3798 EVT MemVT, MachinePointerInfo PtrInfo,
3799 unsigned Align, bool Vol,
3800 bool ReadMem, bool WriteMem) {
3801 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
3802 MemVT, PtrInfo, Align, Vol,
3807 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3808 const SDValue *Ops, unsigned NumOps,
3809 EVT MemVT, MachinePointerInfo PtrInfo,
3810 unsigned Align, bool Vol,
3811 bool ReadMem, bool WriteMem) {
3812 if (Align == 0) // Ensure that codegen never sees alignment 0
3813 Align = getEVTAlignment(MemVT);
3815 MachineFunction &MF = getMachineFunction();
3818 Flags |= MachineMemOperand::MOStore;
3820 Flags |= MachineMemOperand::MOLoad;
3822 Flags |= MachineMemOperand::MOVolatile;
3823 MachineMemOperand *MMO =
3824 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
3826 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
3830 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
3831 const SDValue *Ops, unsigned NumOps,
3832 EVT MemVT, MachineMemOperand *MMO) {
3833 assert((Opcode == ISD::INTRINSIC_VOID ||
3834 Opcode == ISD::INTRINSIC_W_CHAIN ||
3835 Opcode == ISD::PREFETCH ||
3836 (Opcode <= INT_MAX &&
3837 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
3838 "Opcode is not a memory-accessing opcode!");
3840 // Memoize the node unless it returns a flag.
3841 MemIntrinsicSDNode *N;
3842 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3843 FoldingSetNodeID ID;
3844 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3846 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3847 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
3848 return SDValue(E, 0);
3851 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3853 CSEMap.InsertNode(N, IP);
3855 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
3858 AllNodes.push_back(N);
3859 return SDValue(N, 0);
3862 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3863 /// MachinePointerInfo record from it. This is particularly useful because the
3864 /// code generator has many cases where it doesn't bother passing in a
3865 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3866 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
3867 // If this is FI+Offset, we can model it.
3868 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
3869 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
3871 // If this is (FI+Offset1)+Offset2, we can model it.
3872 if (Ptr.getOpcode() != ISD::ADD ||
3873 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
3874 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
3875 return MachinePointerInfo();
3877 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
3878 return MachinePointerInfo::getFixedStack(FI, Offset+
3879 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
3882 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
3883 /// MachinePointerInfo record from it. This is particularly useful because the
3884 /// code generator has many cases where it doesn't bother passing in a
3885 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
3886 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
3887 // If the 'Offset' value isn't a constant, we can't handle this.
3888 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
3889 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
3890 if (OffsetOp.getOpcode() == ISD::UNDEF)
3891 return InferPointerInfo(Ptr);
3892 return MachinePointerInfo();
3897 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3898 EVT VT, DebugLoc dl, SDValue Chain,
3899 SDValue Ptr, SDValue Offset,
3900 MachinePointerInfo PtrInfo, EVT MemVT,
3901 bool isVolatile, bool isNonTemporal,
3902 unsigned Alignment, const MDNode *TBAAInfo) {
3903 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3904 Alignment = getEVTAlignment(VT);
3906 unsigned Flags = MachineMemOperand::MOLoad;
3908 Flags |= MachineMemOperand::MOVolatile;
3910 Flags |= MachineMemOperand::MONonTemporal;
3912 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
3915 PtrInfo = InferPointerInfo(Ptr, Offset);
3917 MachineFunction &MF = getMachineFunction();
3918 MachineMemOperand *MMO =
3919 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
3921 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
3925 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3926 EVT VT, DebugLoc dl, SDValue Chain,
3927 SDValue Ptr, SDValue Offset, EVT MemVT,
3928 MachineMemOperand *MMO) {
3930 ExtType = ISD::NON_EXTLOAD;
3931 } else if (ExtType == ISD::NON_EXTLOAD) {
3932 assert(VT == MemVT && "Non-extending load from different memory type!");
3935 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
3936 "Should only be an extending load, not truncating!");
3937 assert(VT.isInteger() == MemVT.isInteger() &&
3938 "Cannot convert from FP to Int or Int -> FP!");
3939 assert(VT.isVector() == MemVT.isVector() &&
3940 "Cannot use trunc store to convert to or from a vector!");
3941 assert((!VT.isVector() ||
3942 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
3943 "Cannot use trunc store to change the number of vector elements!");
3946 bool Indexed = AM != ISD::UNINDEXED;
3947 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3948 "Unindexed load with an offset!");
3950 SDVTList VTs = Indexed ?
3951 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3952 SDValue Ops[] = { Chain, Ptr, Offset };
3953 FoldingSetNodeID ID;
3954 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3955 ID.AddInteger(MemVT.getRawBits());
3956 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
3957 MMO->isNonTemporal()));
3959 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3960 cast<LoadSDNode>(E)->refineAlignment(MMO);
3961 return SDValue(E, 0);
3963 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
3965 CSEMap.InsertNode(N, IP);
3966 AllNodes.push_back(N);
3967 return SDValue(N, 0);
3970 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
3971 SDValue Chain, SDValue Ptr,
3972 MachinePointerInfo PtrInfo,
3973 bool isVolatile, bool isNonTemporal,
3974 unsigned Alignment, const MDNode *TBAAInfo) {
3975 SDValue Undef = getUNDEF(Ptr.getValueType());
3976 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
3977 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo);
3980 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
3981 SDValue Chain, SDValue Ptr,
3982 MachinePointerInfo PtrInfo, EVT MemVT,
3983 bool isVolatile, bool isNonTemporal,
3984 unsigned Alignment, const MDNode *TBAAInfo) {
3985 SDValue Undef = getUNDEF(Ptr.getValueType());
3986 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
3987 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment,
3993 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
3994 SDValue Offset, ISD::MemIndexedMode AM) {
3995 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3996 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3997 "Load is already a indexed load!");
3998 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
3999 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4001 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment());
4004 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4005 SDValue Ptr, MachinePointerInfo PtrInfo,
4006 bool isVolatile, bool isNonTemporal,
4007 unsigned Alignment, const MDNode *TBAAInfo) {
4008 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4009 Alignment = getEVTAlignment(Val.getValueType());
4011 unsigned Flags = MachineMemOperand::MOStore;
4013 Flags |= MachineMemOperand::MOVolatile;
4015 Flags |= MachineMemOperand::MONonTemporal;
4018 PtrInfo = InferPointerInfo(Ptr);
4020 MachineFunction &MF = getMachineFunction();
4021 MachineMemOperand *MMO =
4022 MF.getMachineMemOperand(PtrInfo, Flags,
4023 Val.getValueType().getStoreSize(), Alignment,
4026 return getStore(Chain, dl, Val, Ptr, MMO);
4029 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4030 SDValue Ptr, MachineMemOperand *MMO) {
4031 EVT VT = Val.getValueType();
4032 SDVTList VTs = getVTList(MVT::Other);
4033 SDValue Undef = getUNDEF(Ptr.getValueType());
4034 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4035 FoldingSetNodeID ID;
4036 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4037 ID.AddInteger(VT.getRawBits());
4038 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4039 MMO->isNonTemporal()));
4041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4042 cast<StoreSDNode>(E)->refineAlignment(MMO);
4043 return SDValue(E, 0);
4045 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4047 CSEMap.InsertNode(N, IP);
4048 AllNodes.push_back(N);
4049 return SDValue(N, 0);
4052 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4053 SDValue Ptr, MachinePointerInfo PtrInfo,
4054 EVT SVT,bool isVolatile, bool isNonTemporal,
4056 const MDNode *TBAAInfo) {
4057 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4058 Alignment = getEVTAlignment(SVT);
4060 unsigned Flags = MachineMemOperand::MOStore;
4062 Flags |= MachineMemOperand::MOVolatile;
4064 Flags |= MachineMemOperand::MONonTemporal;
4067 PtrInfo = InferPointerInfo(Ptr);
4069 MachineFunction &MF = getMachineFunction();
4070 MachineMemOperand *MMO =
4071 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4074 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4077 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4078 SDValue Ptr, EVT SVT,
4079 MachineMemOperand *MMO) {
4080 EVT VT = Val.getValueType();
4083 return getStore(Chain, dl, Val, Ptr, MMO);
4085 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4086 "Should only be a truncating store, not extending!");
4087 assert(VT.isInteger() == SVT.isInteger() &&
4088 "Can't do FP-INT conversion!");
4089 assert(VT.isVector() == SVT.isVector() &&
4090 "Cannot use trunc store to convert to or from a vector!");
4091 assert((!VT.isVector() ||
4092 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4093 "Cannot use trunc store to change the number of vector elements!");
4095 SDVTList VTs = getVTList(MVT::Other);
4096 SDValue Undef = getUNDEF(Ptr.getValueType());
4097 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4098 FoldingSetNodeID ID;
4099 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4100 ID.AddInteger(SVT.getRawBits());
4101 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4102 MMO->isNonTemporal()));
4104 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4105 cast<StoreSDNode>(E)->refineAlignment(MMO);
4106 return SDValue(E, 0);
4108 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4110 CSEMap.InsertNode(N, IP);
4111 AllNodes.push_back(N);
4112 return SDValue(N, 0);
4116 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4117 SDValue Offset, ISD::MemIndexedMode AM) {
4118 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4119 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4120 "Store is already a indexed store!");
4121 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4122 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4123 FoldingSetNodeID ID;
4124 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4125 ID.AddInteger(ST->getMemoryVT().getRawBits());
4126 ID.AddInteger(ST->getRawSubclassData());
4128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4129 return SDValue(E, 0);
4131 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4132 ST->isTruncatingStore(),
4134 ST->getMemOperand());
4135 CSEMap.InsertNode(N, IP);
4136 AllNodes.push_back(N);
4137 return SDValue(N, 0);
4140 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4141 SDValue Chain, SDValue Ptr,
4144 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4145 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4148 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4149 const SDUse *Ops, unsigned NumOps) {
4151 case 0: return getNode(Opcode, DL, VT);
4152 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4153 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4154 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4158 // Copy from an SDUse array into an SDValue array for use with
4159 // the regular getNode logic.
4160 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4161 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4164 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4165 const SDValue *Ops, unsigned NumOps) {
4167 case 0: return getNode(Opcode, DL, VT);
4168 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4169 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4170 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4176 case ISD::SELECT_CC: {
4177 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4178 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4179 "LHS and RHS of condition must have same type!");
4180 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4181 "True and False arms of SelectCC must have same type!");
4182 assert(Ops[2].getValueType() == VT &&
4183 "select_cc node must be of same type as true and false value!");
4187 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4188 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4189 "LHS/RHS of comparison should match types!");
4196 SDVTList VTs = getVTList(VT);
4198 if (VT != MVT::Flag) {
4199 FoldingSetNodeID ID;
4200 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4204 return SDValue(E, 0);
4206 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4207 CSEMap.InsertNode(N, IP);
4209 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4212 AllNodes.push_back(N);
4216 return SDValue(N, 0);
4219 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4220 const std::vector<EVT> &ResultTys,
4221 const SDValue *Ops, unsigned NumOps) {
4222 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4226 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4227 const EVT *VTs, unsigned NumVTs,
4228 const SDValue *Ops, unsigned NumOps) {
4230 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4231 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4234 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4235 const SDValue *Ops, unsigned NumOps) {
4236 if (VTList.NumVTs == 1)
4237 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4241 // FIXME: figure out how to safely handle things like
4242 // int foo(int x) { return 1 << (x & 255); }
4243 // int bar() { return foo(256); }
4244 case ISD::SRA_PARTS:
4245 case ISD::SRL_PARTS:
4246 case ISD::SHL_PARTS:
4247 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4248 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4249 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4250 else if (N3.getOpcode() == ISD::AND)
4251 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4252 // If the and is only masking out bits that cannot effect the shift,
4253 // eliminate the and.
4254 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4255 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4256 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4262 // Memoize the node unless it returns a flag.
4264 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4265 FoldingSetNodeID ID;
4266 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4268 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4269 return SDValue(E, 0);
4272 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4273 } else if (NumOps == 2) {
4274 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4275 } else if (NumOps == 3) {
4276 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4279 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4281 CSEMap.InsertNode(N, IP);
4284 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4285 } else if (NumOps == 2) {
4286 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4287 } else if (NumOps == 3) {
4288 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4291 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4294 AllNodes.push_back(N);
4298 return SDValue(N, 0);
4301 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4302 return getNode(Opcode, DL, VTList, 0, 0);
4305 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4307 SDValue Ops[] = { N1 };
4308 return getNode(Opcode, DL, VTList, Ops, 1);
4311 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4312 SDValue N1, SDValue N2) {
4313 SDValue Ops[] = { N1, N2 };
4314 return getNode(Opcode, DL, VTList, Ops, 2);
4317 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4318 SDValue N1, SDValue N2, SDValue N3) {
4319 SDValue Ops[] = { N1, N2, N3 };
4320 return getNode(Opcode, DL, VTList, Ops, 3);
4323 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4324 SDValue N1, SDValue N2, SDValue N3,
4326 SDValue Ops[] = { N1, N2, N3, N4 };
4327 return getNode(Opcode, DL, VTList, Ops, 4);
4330 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4331 SDValue N1, SDValue N2, SDValue N3,
4332 SDValue N4, SDValue N5) {
4333 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4334 return getNode(Opcode, DL, VTList, Ops, 5);
4337 SDVTList SelectionDAG::getVTList(EVT VT) {
4338 return makeVTList(SDNode::getValueTypeList(VT), 1);
4341 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4342 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4343 E = VTList.rend(); I != E; ++I)
4344 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4347 EVT *Array = Allocator.Allocate<EVT>(2);
4350 SDVTList Result = makeVTList(Array, 2);
4351 VTList.push_back(Result);
4355 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4356 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4357 E = VTList.rend(); I != E; ++I)
4358 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4362 EVT *Array = Allocator.Allocate<EVT>(3);
4366 SDVTList Result = makeVTList(Array, 3);
4367 VTList.push_back(Result);
4371 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4372 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4373 E = VTList.rend(); I != E; ++I)
4374 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4375 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4378 EVT *Array = Allocator.Allocate<EVT>(4);
4383 SDVTList Result = makeVTList(Array, 4);
4384 VTList.push_back(Result);
4388 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4390 case 0: llvm_unreachable("Cannot have nodes without results!");
4391 case 1: return getVTList(VTs[0]);
4392 case 2: return getVTList(VTs[0], VTs[1]);
4393 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4394 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4398 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4399 E = VTList.rend(); I != E; ++I) {
4400 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4403 bool NoMatch = false;
4404 for (unsigned i = 2; i != NumVTs; ++i)
4405 if (VTs[i] != I->VTs[i]) {
4413 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4414 std::copy(VTs, VTs+NumVTs, Array);
4415 SDVTList Result = makeVTList(Array, NumVTs);
4416 VTList.push_back(Result);
4421 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4422 /// specified operands. If the resultant node already exists in the DAG,
4423 /// this does not modify the specified node, instead it returns the node that
4424 /// already exists. If the resultant node does not exist in the DAG, the
4425 /// input node is returned. As a degenerate case, if you specify the same
4426 /// input operands as the node already has, the input node is returned.
4427 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4428 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4430 // Check to see if there is no change.
4431 if (Op == N->getOperand(0)) return N;
4433 // See if the modified node already exists.
4434 void *InsertPos = 0;
4435 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4438 // Nope it doesn't. Remove the node from its current place in the maps.
4440 if (!RemoveNodeFromCSEMaps(N))
4443 // Now we update the operands.
4444 N->OperandList[0].set(Op);
4446 // If this gets put into a CSE map, add it.
4447 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4451 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4452 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4454 // Check to see if there is no change.
4455 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4456 return N; // No operands changed, just return the input node.
4458 // See if the modified node already exists.
4459 void *InsertPos = 0;
4460 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4463 // Nope it doesn't. Remove the node from its current place in the maps.
4465 if (!RemoveNodeFromCSEMaps(N))
4468 // Now we update the operands.
4469 if (N->OperandList[0] != Op1)
4470 N->OperandList[0].set(Op1);
4471 if (N->OperandList[1] != Op2)
4472 N->OperandList[1].set(Op2);
4474 // If this gets put into a CSE map, add it.
4475 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4479 SDNode *SelectionDAG::
4480 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4481 SDValue Ops[] = { Op1, Op2, Op3 };
4482 return UpdateNodeOperands(N, Ops, 3);
4485 SDNode *SelectionDAG::
4486 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4487 SDValue Op3, SDValue Op4) {
4488 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4489 return UpdateNodeOperands(N, Ops, 4);
4492 SDNode *SelectionDAG::
4493 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4494 SDValue Op3, SDValue Op4, SDValue Op5) {
4495 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4496 return UpdateNodeOperands(N, Ops, 5);
4499 SDNode *SelectionDAG::
4500 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4501 assert(N->getNumOperands() == NumOps &&
4502 "Update with wrong number of operands");
4504 // Check to see if there is no change.
4505 bool AnyChange = false;
4506 for (unsigned i = 0; i != NumOps; ++i) {
4507 if (Ops[i] != N->getOperand(i)) {
4513 // No operands changed, just return the input node.
4514 if (!AnyChange) return N;
4516 // See if the modified node already exists.
4517 void *InsertPos = 0;
4518 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4521 // Nope it doesn't. Remove the node from its current place in the maps.
4523 if (!RemoveNodeFromCSEMaps(N))
4526 // Now we update the operands.
4527 for (unsigned i = 0; i != NumOps; ++i)
4528 if (N->OperandList[i] != Ops[i])
4529 N->OperandList[i].set(Ops[i]);
4531 // If this gets put into a CSE map, add it.
4532 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4536 /// DropOperands - Release the operands and set this node to have
4538 void SDNode::DropOperands() {
4539 // Unlike the code in MorphNodeTo that does this, we don't need to
4540 // watch for dead nodes here.
4541 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4547 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4550 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4552 SDVTList VTs = getVTList(VT);
4553 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4556 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4557 EVT VT, SDValue Op1) {
4558 SDVTList VTs = getVTList(VT);
4559 SDValue Ops[] = { Op1 };
4560 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4563 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4564 EVT VT, SDValue Op1,
4566 SDVTList VTs = getVTList(VT);
4567 SDValue Ops[] = { Op1, Op2 };
4568 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4571 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4572 EVT VT, SDValue Op1,
4573 SDValue Op2, SDValue Op3) {
4574 SDVTList VTs = getVTList(VT);
4575 SDValue Ops[] = { Op1, Op2, Op3 };
4576 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4579 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4580 EVT VT, const SDValue *Ops,
4582 SDVTList VTs = getVTList(VT);
4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4586 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4587 EVT VT1, EVT VT2, const SDValue *Ops,
4589 SDVTList VTs = getVTList(VT1, VT2);
4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4593 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4595 SDVTList VTs = getVTList(VT1, VT2);
4596 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4599 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4600 EVT VT1, EVT VT2, EVT VT3,
4601 const SDValue *Ops, unsigned NumOps) {
4602 SDVTList VTs = getVTList(VT1, VT2, VT3);
4603 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4606 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4607 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4608 const SDValue *Ops, unsigned NumOps) {
4609 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4610 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4613 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4616 SDVTList VTs = getVTList(VT1, VT2);
4617 SDValue Ops[] = { Op1 };
4618 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4621 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4623 SDValue Op1, SDValue Op2) {
4624 SDVTList VTs = getVTList(VT1, VT2);
4625 SDValue Ops[] = { Op1, Op2 };
4626 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4629 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4631 SDValue Op1, SDValue Op2,
4633 SDVTList VTs = getVTList(VT1, VT2);
4634 SDValue Ops[] = { Op1, Op2, Op3 };
4635 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4638 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4639 EVT VT1, EVT VT2, EVT VT3,
4640 SDValue Op1, SDValue Op2,
4642 SDVTList VTs = getVTList(VT1, VT2, VT3);
4643 SDValue Ops[] = { Op1, Op2, Op3 };
4644 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4647 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4648 SDVTList VTs, const SDValue *Ops,
4650 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4651 // Reset the NodeID to -1.
4656 /// MorphNodeTo - This *mutates* the specified node to have the specified
4657 /// return type, opcode, and operands.
4659 /// Note that MorphNodeTo returns the resultant node. If there is already a
4660 /// node of the specified opcode and operands, it returns that node instead of
4661 /// the current one. Note that the DebugLoc need not be the same.
4663 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4664 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4665 /// node, and because it doesn't require CSE recalculation for any of
4666 /// the node's users.
4668 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4669 SDVTList VTs, const SDValue *Ops,
4671 // If an identical node already exists, use it.
4673 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4674 FoldingSetNodeID ID;
4675 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4676 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4680 if (!RemoveNodeFromCSEMaps(N))
4683 // Start the morphing.
4685 N->ValueList = VTs.VTs;
4686 N->NumValues = VTs.NumVTs;
4688 // Clear the operands list, updating used nodes to remove this from their
4689 // use list. Keep track of any operands that become dead as a result.
4690 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4691 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4693 SDNode *Used = Use.getNode();
4695 if (Used->use_empty())
4696 DeadNodeSet.insert(Used);
4699 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4700 // Initialize the memory references information.
4701 MN->setMemRefs(0, 0);
4702 // If NumOps is larger than the # of operands we can have in a
4703 // MachineSDNode, reallocate the operand list.
4704 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4705 if (MN->OperandsNeedDelete)
4706 delete[] MN->OperandList;
4707 if (NumOps > array_lengthof(MN->LocalOperands))
4708 // We're creating a final node that will live unmorphed for the
4709 // remainder of the current SelectionDAG iteration, so we can allocate
4710 // the operands directly out of a pool with no recycling metadata.
4711 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4714 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4715 MN->OperandsNeedDelete = false;
4717 MN->InitOperands(MN->OperandList, Ops, NumOps);
4719 // If NumOps is larger than the # of operands we currently have, reallocate
4720 // the operand list.
4721 if (NumOps > N->NumOperands) {
4722 if (N->OperandsNeedDelete)
4723 delete[] N->OperandList;
4724 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4725 N->OperandsNeedDelete = true;
4727 N->InitOperands(N->OperandList, Ops, NumOps);
4730 // Delete any nodes that are still dead after adding the uses for the
4732 if (!DeadNodeSet.empty()) {
4733 SmallVector<SDNode *, 16> DeadNodes;
4734 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4735 E = DeadNodeSet.end(); I != E; ++I)
4736 if ((*I)->use_empty())
4737 DeadNodes.push_back(*I);
4738 RemoveDeadNodes(DeadNodes);
4742 CSEMap.InsertNode(N, IP); // Memoize the new node.
4747 /// getMachineNode - These are used for target selectors to create a new node
4748 /// with specified return type(s), MachineInstr opcode, and operands.
4750 /// Note that getMachineNode returns the resultant node. If there is already a
4751 /// node of the specified opcode and operands, it returns that node instead of
4752 /// the current one.
4754 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
4755 SDVTList VTs = getVTList(VT);
4756 return getMachineNode(Opcode, dl, VTs, 0, 0);
4760 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
4761 SDVTList VTs = getVTList(VT);
4762 SDValue Ops[] = { Op1 };
4763 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4767 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4768 SDValue Op1, SDValue Op2) {
4769 SDVTList VTs = getVTList(VT);
4770 SDValue Ops[] = { Op1, Op2 };
4771 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4775 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4776 SDValue Op1, SDValue Op2, SDValue Op3) {
4777 SDVTList VTs = getVTList(VT);
4778 SDValue Ops[] = { Op1, Op2, Op3 };
4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4783 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
4784 const SDValue *Ops, unsigned NumOps) {
4785 SDVTList VTs = getVTList(VT);
4786 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4790 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
4791 SDVTList VTs = getVTList(VT1, VT2);
4792 return getMachineNode(Opcode, dl, VTs, 0, 0);
4796 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4797 EVT VT1, EVT VT2, SDValue Op1) {
4798 SDVTList VTs = getVTList(VT1, VT2);
4799 SDValue Ops[] = { Op1 };
4800 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4804 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4805 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
4806 SDVTList VTs = getVTList(VT1, VT2);
4807 SDValue Ops[] = { Op1, Op2 };
4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4812 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4813 EVT VT1, EVT VT2, SDValue Op1,
4814 SDValue Op2, SDValue Op3) {
4815 SDVTList VTs = getVTList(VT1, VT2);
4816 SDValue Ops[] = { Op1, Op2, Op3 };
4817 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4821 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4823 const SDValue *Ops, unsigned NumOps) {
4824 SDVTList VTs = getVTList(VT1, VT2);
4825 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4829 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4830 EVT VT1, EVT VT2, EVT VT3,
4831 SDValue Op1, SDValue Op2) {
4832 SDVTList VTs = getVTList(VT1, VT2, VT3);
4833 SDValue Ops[] = { Op1, Op2 };
4834 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4838 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4839 EVT VT1, EVT VT2, EVT VT3,
4840 SDValue Op1, SDValue Op2, SDValue Op3) {
4841 SDVTList VTs = getVTList(VT1, VT2, VT3);
4842 SDValue Ops[] = { Op1, Op2, Op3 };
4843 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
4847 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4848 EVT VT1, EVT VT2, EVT VT3,
4849 const SDValue *Ops, unsigned NumOps) {
4850 SDVTList VTs = getVTList(VT1, VT2, VT3);
4851 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4855 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
4856 EVT VT2, EVT VT3, EVT VT4,
4857 const SDValue *Ops, unsigned NumOps) {
4858 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4859 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4863 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
4864 const std::vector<EVT> &ResultTys,
4865 const SDValue *Ops, unsigned NumOps) {
4866 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
4867 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
4871 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
4872 const SDValue *Ops, unsigned NumOps) {
4873 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
4878 FoldingSetNodeID ID;
4879 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
4881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4882 return cast<MachineSDNode>(E);
4885 // Allocate a new MachineSDNode.
4886 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
4888 // Initialize the operands list.
4889 if (NumOps > array_lengthof(N->LocalOperands))
4890 // We're creating a final node that will live unmorphed for the
4891 // remainder of the current SelectionDAG iteration, so we can allocate
4892 // the operands directly out of a pool with no recycling metadata.
4893 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4896 N->InitOperands(N->LocalOperands, Ops, NumOps);
4897 N->OperandsNeedDelete = false;
4900 CSEMap.InsertNode(N, IP);
4902 AllNodes.push_back(N);
4909 /// getTargetExtractSubreg - A convenience function for creating
4910 /// TargetOpcode::EXTRACT_SUBREG nodes.
4912 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
4914 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4915 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
4916 VT, Operand, SRIdxVal);
4917 return SDValue(Subreg, 0);
4920 /// getTargetInsertSubreg - A convenience function for creating
4921 /// TargetOpcode::INSERT_SUBREG nodes.
4923 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
4924 SDValue Operand, SDValue Subreg) {
4925 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
4926 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
4927 VT, Operand, Subreg, SRIdxVal);
4928 return SDValue(Result, 0);
4931 /// getNodeIfExists - Get the specified node if it's already available, or
4932 /// else return NULL.
4933 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4934 const SDValue *Ops, unsigned NumOps) {
4935 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4936 FoldingSetNodeID ID;
4937 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4939 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4945 /// getDbgValue - Creates a SDDbgValue node.
4948 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
4949 DebugLoc DL, unsigned O) {
4950 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
4954 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
4955 DebugLoc DL, unsigned O) {
4956 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
4960 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
4961 DebugLoc DL, unsigned O) {
4962 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
4967 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
4968 /// pointed to by a use iterator is deleted, increment the use iterator
4969 /// so that it doesn't dangle.
4971 /// This class also manages a "downlink" DAGUpdateListener, to forward
4972 /// messages to ReplaceAllUsesWith's callers.
4974 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
4975 SelectionDAG::DAGUpdateListener *DownLink;
4976 SDNode::use_iterator &UI;
4977 SDNode::use_iterator &UE;
4979 virtual void NodeDeleted(SDNode *N, SDNode *E) {
4980 // Increment the iterator as needed.
4981 while (UI != UE && N == *UI)
4984 // Then forward the message.
4985 if (DownLink) DownLink->NodeDeleted(N, E);
4988 virtual void NodeUpdated(SDNode *N) {
4989 // Just forward the message.
4990 if (DownLink) DownLink->NodeUpdated(N);
4994 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
4995 SDNode::use_iterator &ui,
4996 SDNode::use_iterator &ue)
4997 : DownLink(dl), UI(ui), UE(ue) {}
5002 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5003 /// This can cause recursive merging of nodes in the DAG.
5005 /// This version assumes From has a single result value.
5007 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5008 DAGUpdateListener *UpdateListener) {
5009 SDNode *From = FromN.getNode();
5010 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5011 "Cannot replace with this method!");
5012 assert(From != To.getNode() && "Cannot replace uses of with self");
5014 // Iterate over all the existing uses of From. New uses will be added
5015 // to the beginning of the use list, which we avoid visiting.
5016 // This specifically avoids visiting uses of From that arise while the
5017 // replacement is happening, because any such uses would be the result
5018 // of CSE: If an existing node looks like From after one of its operands
5019 // is replaced by To, we don't want to replace of all its users with To
5020 // too. See PR3018 for more info.
5021 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5022 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5026 // This node is about to morph, remove its old self from the CSE maps.
5027 RemoveNodeFromCSEMaps(User);
5029 // A user can appear in a use list multiple times, and when this
5030 // happens the uses are usually next to each other in the list.
5031 // To help reduce the number of CSE recomputations, process all
5032 // the uses of this user that we can find this way.
5034 SDUse &Use = UI.getUse();
5037 } while (UI != UE && *UI == User);
5039 // Now that we have modified User, add it back to the CSE maps. If it
5040 // already exists there, recursively merge the results together.
5041 AddModifiedNodeToCSEMaps(User, &Listener);
5045 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5046 /// This can cause recursive merging of nodes in the DAG.
5048 /// This version assumes that for each value of From, there is a
5049 /// corresponding value in To in the same position with the same type.
5051 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5052 DAGUpdateListener *UpdateListener) {
5054 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5055 assert((!From->hasAnyUseOfValue(i) ||
5056 From->getValueType(i) == To->getValueType(i)) &&
5057 "Cannot use this version of ReplaceAllUsesWith!");
5060 // Handle the trivial case.
5064 // Iterate over just the existing users of From. See the comments in
5065 // the ReplaceAllUsesWith above.
5066 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5067 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5071 // This node is about to morph, remove its old self from the CSE maps.
5072 RemoveNodeFromCSEMaps(User);
5074 // A user can appear in a use list multiple times, and when this
5075 // happens the uses are usually next to each other in the list.
5076 // To help reduce the number of CSE recomputations, process all
5077 // the uses of this user that we can find this way.
5079 SDUse &Use = UI.getUse();
5082 } while (UI != UE && *UI == User);
5084 // Now that we have modified User, add it back to the CSE maps. If it
5085 // already exists there, recursively merge the results together.
5086 AddModifiedNodeToCSEMaps(User, &Listener);
5090 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5091 /// This can cause recursive merging of nodes in the DAG.
5093 /// This version can replace From with any result values. To must match the
5094 /// number and types of values returned by From.
5095 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5097 DAGUpdateListener *UpdateListener) {
5098 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5099 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5101 // Iterate over just the existing users of From. See the comments in
5102 // the ReplaceAllUsesWith above.
5103 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5104 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5108 // This node is about to morph, remove its old self from the CSE maps.
5109 RemoveNodeFromCSEMaps(User);
5111 // A user can appear in a use list multiple times, and when this
5112 // happens the uses are usually next to each other in the list.
5113 // To help reduce the number of CSE recomputations, process all
5114 // the uses of this user that we can find this way.
5116 SDUse &Use = UI.getUse();
5117 const SDValue &ToOp = To[Use.getResNo()];
5120 } while (UI != UE && *UI == User);
5122 // Now that we have modified User, add it back to the CSE maps. If it
5123 // already exists there, recursively merge the results together.
5124 AddModifiedNodeToCSEMaps(User, &Listener);
5128 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5129 /// uses of other values produced by From.getNode() alone. The Deleted
5130 /// vector is handled the same way as for ReplaceAllUsesWith.
5131 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5132 DAGUpdateListener *UpdateListener){
5133 // Handle the really simple, really trivial case efficiently.
5134 if (From == To) return;
5136 // Handle the simple, trivial, case efficiently.
5137 if (From.getNode()->getNumValues() == 1) {
5138 ReplaceAllUsesWith(From, To, UpdateListener);
5142 // Iterate over just the existing users of From. See the comments in
5143 // the ReplaceAllUsesWith above.
5144 SDNode::use_iterator UI = From.getNode()->use_begin(),
5145 UE = From.getNode()->use_end();
5146 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5149 bool UserRemovedFromCSEMaps = false;
5151 // A user can appear in a use list multiple times, and when this
5152 // happens the uses are usually next to each other in the list.
5153 // To help reduce the number of CSE recomputations, process all
5154 // the uses of this user that we can find this way.
5156 SDUse &Use = UI.getUse();
5158 // Skip uses of different values from the same node.
5159 if (Use.getResNo() != From.getResNo()) {
5164 // If this node hasn't been modified yet, it's still in the CSE maps,
5165 // so remove its old self from the CSE maps.
5166 if (!UserRemovedFromCSEMaps) {
5167 RemoveNodeFromCSEMaps(User);
5168 UserRemovedFromCSEMaps = true;
5173 } while (UI != UE && *UI == User);
5175 // We are iterating over all uses of the From node, so if a use
5176 // doesn't use the specific value, no changes are made.
5177 if (!UserRemovedFromCSEMaps)
5180 // Now that we have modified User, add it back to the CSE maps. If it
5181 // already exists there, recursively merge the results together.
5182 AddModifiedNodeToCSEMaps(User, &Listener);
5187 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5188 /// to record information about a use.
5195 /// operator< - Sort Memos by User.
5196 bool operator<(const UseMemo &L, const UseMemo &R) {
5197 return (intptr_t)L.User < (intptr_t)R.User;
5201 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5202 /// uses of other values produced by From.getNode() alone. The same value
5203 /// may appear in both the From and To list. The Deleted vector is
5204 /// handled the same way as for ReplaceAllUsesWith.
5205 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5208 DAGUpdateListener *UpdateListener){
5209 // Handle the simple, trivial case efficiently.
5211 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5213 // Read up all the uses and make records of them. This helps
5214 // processing new uses that are introduced during the
5215 // replacement process.
5216 SmallVector<UseMemo, 4> Uses;
5217 for (unsigned i = 0; i != Num; ++i) {
5218 unsigned FromResNo = From[i].getResNo();
5219 SDNode *FromNode = From[i].getNode();
5220 for (SDNode::use_iterator UI = FromNode->use_begin(),
5221 E = FromNode->use_end(); UI != E; ++UI) {
5222 SDUse &Use = UI.getUse();
5223 if (Use.getResNo() == FromResNo) {
5224 UseMemo Memo = { *UI, i, &Use };
5225 Uses.push_back(Memo);
5230 // Sort the uses, so that all the uses from a given User are together.
5231 std::sort(Uses.begin(), Uses.end());
5233 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5234 UseIndex != UseIndexEnd; ) {
5235 // We know that this user uses some value of From. If it is the right
5236 // value, update it.
5237 SDNode *User = Uses[UseIndex].User;
5239 // This node is about to morph, remove its old self from the CSE maps.
5240 RemoveNodeFromCSEMaps(User);
5242 // The Uses array is sorted, so all the uses for a given User
5243 // are next to each other in the list.
5244 // To help reduce the number of CSE recomputations, process all
5245 // the uses of this user that we can find this way.
5247 unsigned i = Uses[UseIndex].Index;
5248 SDUse &Use = *Uses[UseIndex].Use;
5252 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5254 // Now that we have modified User, add it back to the CSE maps. If it
5255 // already exists there, recursively merge the results together.
5256 AddModifiedNodeToCSEMaps(User, UpdateListener);
5260 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5261 /// based on their topological order. It returns the maximum id and a vector
5262 /// of the SDNodes* in assigned order by reference.
5263 unsigned SelectionDAG::AssignTopologicalOrder() {
5265 unsigned DAGSize = 0;
5267 // SortedPos tracks the progress of the algorithm. Nodes before it are
5268 // sorted, nodes after it are unsorted. When the algorithm completes
5269 // it is at the end of the list.
5270 allnodes_iterator SortedPos = allnodes_begin();
5272 // Visit all the nodes. Move nodes with no operands to the front of
5273 // the list immediately. Annotate nodes that do have operands with their
5274 // operand count. Before we do this, the Node Id fields of the nodes
5275 // may contain arbitrary values. After, the Node Id fields for nodes
5276 // before SortedPos will contain the topological sort index, and the
5277 // Node Id fields for nodes At SortedPos and after will contain the
5278 // count of outstanding operands.
5279 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5282 unsigned Degree = N->getNumOperands();
5284 // A node with no uses, add it to the result array immediately.
5285 N->setNodeId(DAGSize++);
5286 allnodes_iterator Q = N;
5288 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5289 assert(SortedPos != AllNodes.end() && "Overran node list");
5292 // Temporarily use the Node Id as scratch space for the degree count.
5293 N->setNodeId(Degree);
5297 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5298 // such that by the time the end is reached all nodes will be sorted.
5299 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5302 // N is in sorted position, so all its uses have one less operand
5303 // that needs to be sorted.
5304 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5307 unsigned Degree = P->getNodeId();
5308 assert(Degree != 0 && "Invalid node degree");
5311 // All of P's operands are sorted, so P may sorted now.
5312 P->setNodeId(DAGSize++);
5314 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5315 assert(SortedPos != AllNodes.end() && "Overran node list");
5318 // Update P's outstanding operand count.
5319 P->setNodeId(Degree);
5322 if (I == SortedPos) {
5325 dbgs() << "Overran sorted position:\n";
5328 llvm_unreachable(0);
5332 assert(SortedPos == AllNodes.end() &&
5333 "Topological sort incomplete!");
5334 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5335 "First node in topological sort is not the entry token!");
5336 assert(AllNodes.front().getNodeId() == 0 &&
5337 "First node in topological sort has non-zero id!");
5338 assert(AllNodes.front().getNumOperands() == 0 &&
5339 "First node in topological sort has operands!");
5340 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5341 "Last node in topologic sort has unexpected id!");
5342 assert(AllNodes.back().use_empty() &&
5343 "Last node in topologic sort has users!");
5344 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5348 /// AssignOrdering - Assign an order to the SDNode.
5349 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5350 assert(SD && "Trying to assign an order to a null node!");
5351 Ordering->add(SD, Order);
5354 /// GetOrdering - Get the order for the SDNode.
5355 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5356 assert(SD && "Trying to get the order of a null node!");
5357 return Ordering->getOrder(SD);
5360 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5361 /// value is produced by SD.
5362 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5363 DbgInfo->add(DB, SD, isParameter);
5365 SD->setHasDebugValue(true);
5368 //===----------------------------------------------------------------------===//
5370 //===----------------------------------------------------------------------===//
5372 HandleSDNode::~HandleSDNode() {
5376 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5377 const GlobalValue *GA,
5378 EVT VT, int64_t o, unsigned char TF)
5379 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5383 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5384 MachineMemOperand *mmo)
5385 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5386 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5387 MMO->isNonTemporal());
5388 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5389 assert(isNonTemporal() == MMO->isNonTemporal() &&
5390 "Non-temporal encoding error!");
5391 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5394 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5395 const SDValue *Ops, unsigned NumOps, EVT memvt,
5396 MachineMemOperand *mmo)
5397 : SDNode(Opc, dl, VTs, Ops, NumOps),
5398 MemoryVT(memvt), MMO(mmo) {
5399 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5400 MMO->isNonTemporal());
5401 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5402 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5405 /// Profile - Gather unique data for the node.
5407 void SDNode::Profile(FoldingSetNodeID &ID) const {
5408 AddNodeIDNode(ID, this);
5413 std::vector<EVT> VTs;
5416 VTs.reserve(MVT::LAST_VALUETYPE);
5417 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5418 VTs.push_back(MVT((MVT::SimpleValueType)i));
5423 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5424 static ManagedStatic<EVTArray> SimpleVTArray;
5425 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5427 /// getValueTypeList - Return a pointer to the specified value type.
5429 const EVT *SDNode::getValueTypeList(EVT VT) {
5430 if (VT.isExtended()) {
5431 sys::SmartScopedLock<true> Lock(*VTMutex);
5432 return &(*EVTs->insert(VT).first);
5434 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5435 "Value type out of range!");
5436 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5440 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5441 /// indicated value. This method ignores uses of other values defined by this
5443 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5444 assert(Value < getNumValues() && "Bad value!");
5446 // TODO: Only iterate over uses of a given value of the node
5447 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5448 if (UI.getUse().getResNo() == Value) {
5455 // Found exactly the right number of uses?
5460 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5461 /// value. This method ignores uses of other values defined by this operation.
5462 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5463 assert(Value < getNumValues() && "Bad value!");
5465 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5466 if (UI.getUse().getResNo() == Value)
5473 /// isOnlyUserOf - Return true if this node is the only use of N.
5475 bool SDNode::isOnlyUserOf(SDNode *N) const {
5477 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5488 /// isOperand - Return true if this node is an operand of N.
5490 bool SDValue::isOperandOf(SDNode *N) const {
5491 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5492 if (*this == N->getOperand(i))
5497 bool SDNode::isOperandOf(SDNode *N) const {
5498 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5499 if (this == N->OperandList[i].getNode())
5504 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5505 /// be a chain) reaches the specified operand without crossing any
5506 /// side-effecting instructions on any chain path. In practice, this looks
5507 /// through token factors and non-volatile loads. In order to remain efficient,
5508 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5509 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5510 unsigned Depth) const {
5511 if (*this == Dest) return true;
5513 // Don't search too deeply, we just want to be able to see through
5514 // TokenFactor's etc.
5515 if (Depth == 0) return false;
5517 // If this is a token factor, all inputs to the TF happen in parallel. If any
5518 // of the operands of the TF does not reach dest, then we cannot do the xform.
5519 if (getOpcode() == ISD::TokenFactor) {
5520 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5521 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5526 // Loads don't have side effects, look through them.
5527 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5528 if (!Ld->isVolatile())
5529 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5534 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
5535 /// is either an operand of N or it can be reached by traversing up the operands.
5536 /// NOTE: this is an expensive method. Use it carefully.
5537 bool SDNode::isPredecessorOf(SDNode *N) const {
5538 SmallPtrSet<SDNode *, 32> Visited;
5539 SmallVector<SDNode *, 16> Worklist;
5540 Worklist.push_back(N);
5543 N = Worklist.pop_back_val();
5544 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
5545 SDNode *Op = N->getOperand(i).getNode();
5548 if (Visited.insert(Op))
5549 Worklist.push_back(Op);
5551 } while (!Worklist.empty());
5556 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5557 assert(Num < NumOperands && "Invalid child # of SDNode!");
5558 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5561 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5562 switch (getOpcode()) {
5564 if (getOpcode() < ISD::BUILTIN_OP_END)
5565 return "<<Unknown DAG Node>>";
5566 if (isMachineOpcode()) {
5568 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5569 if (getMachineOpcode() < TII->getNumOpcodes())
5570 return TII->get(getMachineOpcode()).getName();
5571 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
5574 const TargetLowering &TLI = G->getTargetLoweringInfo();
5575 const char *Name = TLI.getTargetNodeName(getOpcode());
5576 if (Name) return Name;
5577 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
5579 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
5582 case ISD::DELETED_NODE:
5583 return "<<Deleted Node!>>";
5585 case ISD::PREFETCH: return "Prefetch";
5586 case ISD::MEMBARRIER: return "MemBarrier";
5587 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
5588 case ISD::ATOMIC_SWAP: return "AtomicSwap";
5589 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
5590 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
5591 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
5592 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
5593 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
5594 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
5595 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
5596 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
5597 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
5598 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
5599 case ISD::PCMARKER: return "PCMarker";
5600 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5601 case ISD::SRCVALUE: return "SrcValue";
5602 case ISD::MDNODE_SDNODE: return "MDNode";
5603 case ISD::EntryToken: return "EntryToken";
5604 case ISD::TokenFactor: return "TokenFactor";
5605 case ISD::AssertSext: return "AssertSext";
5606 case ISD::AssertZext: return "AssertZext";
5608 case ISD::BasicBlock: return "BasicBlock";
5609 case ISD::VALUETYPE: return "ValueType";
5610 case ISD::Register: return "Register";
5612 case ISD::Constant: return "Constant";
5613 case ISD::ConstantFP: return "ConstantFP";
5614 case ISD::GlobalAddress: return "GlobalAddress";
5615 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5616 case ISD::FrameIndex: return "FrameIndex";
5617 case ISD::JumpTable: return "JumpTable";
5618 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5619 case ISD::RETURNADDR: return "RETURNADDR";
5620 case ISD::FRAMEADDR: return "FRAMEADDR";
5621 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5622 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5623 case ISD::LSDAADDR: return "LSDAADDR";
5624 case ISD::EHSELECTION: return "EHSELECTION";
5625 case ISD::EH_RETURN: return "EH_RETURN";
5626 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
5627 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
5628 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP";
5629 case ISD::ConstantPool: return "ConstantPool";
5630 case ISD::ExternalSymbol: return "ExternalSymbol";
5631 case ISD::BlockAddress: return "BlockAddress";
5632 case ISD::INTRINSIC_WO_CHAIN:
5633 case ISD::INTRINSIC_VOID:
5634 case ISD::INTRINSIC_W_CHAIN: {
5635 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
5636 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
5637 if (IID < Intrinsic::num_intrinsics)
5638 return Intrinsic::getName((Intrinsic::ID)IID);
5639 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
5640 return TII->getName(IID);
5641 llvm_unreachable("Invalid intrinsic ID");
5644 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5645 case ISD::TargetConstant: return "TargetConstant";
5646 case ISD::TargetConstantFP:return "TargetConstantFP";
5647 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5648 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5649 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5650 case ISD::TargetJumpTable: return "TargetJumpTable";
5651 case ISD::TargetConstantPool: return "TargetConstantPool";
5652 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5653 case ISD::TargetBlockAddress: return "TargetBlockAddress";
5655 case ISD::CopyToReg: return "CopyToReg";
5656 case ISD::CopyFromReg: return "CopyFromReg";
5657 case ISD::UNDEF: return "undef";
5658 case ISD::MERGE_VALUES: return "merge_values";
5659 case ISD::INLINEASM: return "inlineasm";
5660 case ISD::EH_LABEL: return "eh_label";
5661 case ISD::HANDLENODE: return "handlenode";
5664 case ISD::FABS: return "fabs";
5665 case ISD::FNEG: return "fneg";
5666 case ISD::FSQRT: return "fsqrt";
5667 case ISD::FSIN: return "fsin";
5668 case ISD::FCOS: return "fcos";
5669 case ISD::FTRUNC: return "ftrunc";
5670 case ISD::FFLOOR: return "ffloor";
5671 case ISD::FCEIL: return "fceil";
5672 case ISD::FRINT: return "frint";
5673 case ISD::FNEARBYINT: return "fnearbyint";
5674 case ISD::FEXP: return "fexp";
5675 case ISD::FEXP2: return "fexp2";
5676 case ISD::FLOG: return "flog";
5677 case ISD::FLOG2: return "flog2";
5678 case ISD::FLOG10: return "flog10";
5681 case ISD::ADD: return "add";
5682 case ISD::SUB: return "sub";
5683 case ISD::MUL: return "mul";
5684 case ISD::MULHU: return "mulhu";
5685 case ISD::MULHS: return "mulhs";
5686 case ISD::SDIV: return "sdiv";
5687 case ISD::UDIV: return "udiv";
5688 case ISD::SREM: return "srem";
5689 case ISD::UREM: return "urem";
5690 case ISD::SMUL_LOHI: return "smul_lohi";
5691 case ISD::UMUL_LOHI: return "umul_lohi";
5692 case ISD::SDIVREM: return "sdivrem";
5693 case ISD::UDIVREM: return "udivrem";
5694 case ISD::AND: return "and";
5695 case ISD::OR: return "or";
5696 case ISD::XOR: return "xor";
5697 case ISD::SHL: return "shl";
5698 case ISD::SRA: return "sra";
5699 case ISD::SRL: return "srl";
5700 case ISD::ROTL: return "rotl";
5701 case ISD::ROTR: return "rotr";
5702 case ISD::FADD: return "fadd";
5703 case ISD::FSUB: return "fsub";
5704 case ISD::FMUL: return "fmul";
5705 case ISD::FDIV: return "fdiv";
5706 case ISD::FREM: return "frem";
5707 case ISD::FCOPYSIGN: return "fcopysign";
5708 case ISD::FGETSIGN: return "fgetsign";
5709 case ISD::FPOW: return "fpow";
5711 case ISD::FPOWI: return "fpowi";
5712 case ISD::SETCC: return "setcc";
5713 case ISD::VSETCC: return "vsetcc";
5714 case ISD::SELECT: return "select";
5715 case ISD::SELECT_CC: return "select_cc";
5716 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5717 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5718 case ISD::CONCAT_VECTORS: return "concat_vectors";
5719 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5720 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5721 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5722 case ISD::CARRY_FALSE: return "carry_false";
5723 case ISD::ADDC: return "addc";
5724 case ISD::ADDE: return "adde";
5725 case ISD::SADDO: return "saddo";
5726 case ISD::UADDO: return "uaddo";
5727 case ISD::SSUBO: return "ssubo";
5728 case ISD::USUBO: return "usubo";
5729 case ISD::SMULO: return "smulo";
5730 case ISD::UMULO: return "umulo";
5731 case ISD::SUBC: return "subc";
5732 case ISD::SUBE: return "sube";
5733 case ISD::SHL_PARTS: return "shl_parts";
5734 case ISD::SRA_PARTS: return "sra_parts";
5735 case ISD::SRL_PARTS: return "srl_parts";
5737 // Conversion operators.
5738 case ISD::SIGN_EXTEND: return "sign_extend";
5739 case ISD::ZERO_EXTEND: return "zero_extend";
5740 case ISD::ANY_EXTEND: return "any_extend";
5741 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5742 case ISD::TRUNCATE: return "truncate";
5743 case ISD::FP_ROUND: return "fp_round";
5744 case ISD::FLT_ROUNDS_: return "flt_rounds";
5745 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5746 case ISD::FP_EXTEND: return "fp_extend";
5748 case ISD::SINT_TO_FP: return "sint_to_fp";
5749 case ISD::UINT_TO_FP: return "uint_to_fp";
5750 case ISD::FP_TO_SINT: return "fp_to_sint";
5751 case ISD::FP_TO_UINT: return "fp_to_uint";
5752 case ISD::BIT_CONVERT: return "bit_convert";
5753 case ISD::FP16_TO_FP32: return "fp16_to_fp32";
5754 case ISD::FP32_TO_FP16: return "fp32_to_fp16";
5756 case ISD::CONVERT_RNDSAT: {
5757 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5758 default: llvm_unreachable("Unknown cvt code!");
5759 case ISD::CVT_FF: return "cvt_ff";
5760 case ISD::CVT_FS: return "cvt_fs";
5761 case ISD::CVT_FU: return "cvt_fu";
5762 case ISD::CVT_SF: return "cvt_sf";
5763 case ISD::CVT_UF: return "cvt_uf";
5764 case ISD::CVT_SS: return "cvt_ss";
5765 case ISD::CVT_SU: return "cvt_su";
5766 case ISD::CVT_US: return "cvt_us";
5767 case ISD::CVT_UU: return "cvt_uu";
5771 // Control flow instructions
5772 case ISD::BR: return "br";
5773 case ISD::BRIND: return "brind";
5774 case ISD::BR_JT: return "br_jt";
5775 case ISD::BRCOND: return "brcond";
5776 case ISD::BR_CC: return "br_cc";
5777 case ISD::CALLSEQ_START: return "callseq_start";
5778 case ISD::CALLSEQ_END: return "callseq_end";
5781 case ISD::LOAD: return "load";
5782 case ISD::STORE: return "store";
5783 case ISD::VAARG: return "vaarg";
5784 case ISD::VACOPY: return "vacopy";
5785 case ISD::VAEND: return "vaend";
5786 case ISD::VASTART: return "vastart";
5787 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5788 case ISD::EXTRACT_ELEMENT: return "extract_element";
5789 case ISD::BUILD_PAIR: return "build_pair";
5790 case ISD::STACKSAVE: return "stacksave";
5791 case ISD::STACKRESTORE: return "stackrestore";
5792 case ISD::TRAP: return "trap";
5795 case ISD::BSWAP: return "bswap";
5796 case ISD::CTPOP: return "ctpop";
5797 case ISD::CTTZ: return "cttz";
5798 case ISD::CTLZ: return "ctlz";
5801 case ISD::TRAMPOLINE: return "trampoline";
5804 switch (cast<CondCodeSDNode>(this)->get()) {
5805 default: llvm_unreachable("Unknown setcc condition!");
5806 case ISD::SETOEQ: return "setoeq";
5807 case ISD::SETOGT: return "setogt";
5808 case ISD::SETOGE: return "setoge";
5809 case ISD::SETOLT: return "setolt";
5810 case ISD::SETOLE: return "setole";
5811 case ISD::SETONE: return "setone";
5813 case ISD::SETO: return "seto";
5814 case ISD::SETUO: return "setuo";
5815 case ISD::SETUEQ: return "setue";
5816 case ISD::SETUGT: return "setugt";
5817 case ISD::SETUGE: return "setuge";
5818 case ISD::SETULT: return "setult";
5819 case ISD::SETULE: return "setule";
5820 case ISD::SETUNE: return "setune";
5822 case ISD::SETEQ: return "seteq";
5823 case ISD::SETGT: return "setgt";
5824 case ISD::SETGE: return "setge";
5825 case ISD::SETLT: return "setlt";
5826 case ISD::SETLE: return "setle";
5827 case ISD::SETNE: return "setne";
5832 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5841 return "<post-inc>";
5843 return "<post-dec>";
5847 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5848 std::string S = "< ";
5862 if (getByValAlign())
5863 S += "byval-align:" + utostr(getByValAlign()) + " ";
5865 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5867 S += "byval-size:" + utostr(getByValSize()) + " ";
5871 void SDNode::dump() const { dump(0); }
5872 void SDNode::dump(const SelectionDAG *G) const {
5877 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
5878 OS << (void*)this << ": ";
5880 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5882 if (getValueType(i) == MVT::Other)
5885 OS << getValueType(i).getEVTString();
5887 OS << " = " << getOperationName(G);
5890 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
5891 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
5892 if (!MN->memoperands_empty()) {
5895 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
5896 e = MN->memoperands_end(); i != e; ++i) {
5898 if (llvm::next(i) != e)
5903 } else if (const ShuffleVectorSDNode *SVN =
5904 dyn_cast<ShuffleVectorSDNode>(this)) {
5906 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
5907 int Idx = SVN->getMaskElt(i);
5915 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5916 OS << '<' << CSDN->getAPIntValue() << '>';
5917 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5918 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5919 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5920 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5921 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5924 CSDN->getValueAPF().bitcastToAPInt().dump();
5927 } else if (const GlobalAddressSDNode *GADN =
5928 dyn_cast<GlobalAddressSDNode>(this)) {
5929 int64_t offset = GADN->getOffset();
5931 WriteAsOperand(OS, GADN->getGlobal());
5934 OS << " + " << offset;
5936 OS << " " << offset;
5937 if (unsigned int TF = GADN->getTargetFlags())
5938 OS << " [TF=" << TF << ']';
5939 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5940 OS << "<" << FIDN->getIndex() << ">";
5941 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5942 OS << "<" << JTDN->getIndex() << ">";
5943 if (unsigned int TF = JTDN->getTargetFlags())
5944 OS << " [TF=" << TF << ']';
5945 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5946 int offset = CP->getOffset();
5947 if (CP->isMachineConstantPoolEntry())
5948 OS << "<" << *CP->getMachineCPVal() << ">";
5950 OS << "<" << *CP->getConstVal() << ">";
5952 OS << " + " << offset;
5954 OS << " " << offset;
5955 if (unsigned int TF = CP->getTargetFlags())
5956 OS << " [TF=" << TF << ']';
5957 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5959 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5961 OS << LBB->getName() << " ";
5962 OS << (const void*)BBDN->getBasicBlock() << ">";
5963 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5964 if (G && R->getReg() &&
5965 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5966 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
5968 OS << " %reg" << R->getReg();
5970 } else if (const ExternalSymbolSDNode *ES =
5971 dyn_cast<ExternalSymbolSDNode>(this)) {
5972 OS << "'" << ES->getSymbol() << "'";
5973 if (unsigned int TF = ES->getTargetFlags())
5974 OS << " [TF=" << TF << ']';
5975 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5977 OS << "<" << M->getValue() << ">";
5980 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
5982 OS << "<" << MD->getMD() << ">";
5985 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5986 OS << ":" << N->getVT().getEVTString();
5988 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5989 OS << "<" << *LD->getMemOperand();
5992 switch (LD->getExtensionType()) {
5993 default: doExt = false; break;
5994 case ISD::EXTLOAD: OS << ", anyext"; break;
5995 case ISD::SEXTLOAD: OS << ", sext"; break;
5996 case ISD::ZEXTLOAD: OS << ", zext"; break;
5999 OS << " from " << LD->getMemoryVT().getEVTString();
6001 const char *AM = getIndexedModeName(LD->getAddressingMode());
6006 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
6007 OS << "<" << *ST->getMemOperand();
6009 if (ST->isTruncatingStore())
6010 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
6012 const char *AM = getIndexedModeName(ST->getAddressingMode());
6017 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
6018 OS << "<" << *M->getMemOperand() << ">";
6019 } else if (const BlockAddressSDNode *BA =
6020 dyn_cast<BlockAddressSDNode>(this)) {
6022 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false);
6024 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false);
6026 if (unsigned int TF = BA->getTargetFlags())
6027 OS << " [TF=" << TF << ']';
6031 if (unsigned Order = G->GetOrdering(this))
6032 OS << " [ORD=" << Order << ']';
6034 if (getNodeId() != -1)
6035 OS << " [ID=" << getNodeId() << ']';
6037 DebugLoc dl = getDebugLoc();
6038 if (G && !dl.isUnknown()) {
6040 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext()));
6042 // Omit the directory, since it's usually long and uninteresting.
6044 OS << Scope.getFilename();
6047 OS << ':' << dl.getLine();
6048 if (dl.getCol() != 0)
6049 OS << ':' << dl.getCol();
6053 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
6055 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6056 if (i) OS << ", "; else OS << " ";
6057 OS << (void*)getOperand(i).getNode();
6058 if (unsigned RN = getOperand(i).getResNo())
6061 print_details(OS, G);
6064 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
6065 const SelectionDAG *G, unsigned depth,
6078 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6080 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2);
6084 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
6085 unsigned depth) const {
6086 printrWithDepthHelper(OS, this, G, depth, 0);
6089 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
6090 // Don't print impossibly deep things.
6091 printrWithDepth(OS, G, 100);
6094 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
6095 printrWithDepth(dbgs(), G, depth);
6098 void SDNode::dumprFull(const SelectionDAG *G) const {
6099 // Don't print impossibly deep things.
6100 dumprWithDepth(G, 100);
6103 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
6104 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6105 if (N->getOperand(i).getNode()->hasOneUse())
6106 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
6108 dbgs() << "\n" << std::string(indent+2, ' ')
6109 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
6113 dbgs().indent(indent);
6117 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6118 assert(N->getNumValues() == 1 &&
6119 "Can't unroll a vector with multiple results!");
6121 EVT VT = N->getValueType(0);
6122 unsigned NE = VT.getVectorNumElements();
6123 EVT EltVT = VT.getVectorElementType();
6124 DebugLoc dl = N->getDebugLoc();
6126 SmallVector<SDValue, 8> Scalars;
6127 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6129 // If ResNE is 0, fully unroll the vector op.
6132 else if (NE > ResNE)
6136 for (i= 0; i != NE; ++i) {
6137 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6138 SDValue Operand = N->getOperand(j);
6139 EVT OperandVT = Operand.getValueType();
6140 if (OperandVT.isVector()) {
6141 // A vector operand; extract a single element.
6142 EVT OperandEltVT = OperandVT.getVectorElementType();
6143 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6146 getConstant(i, MVT::i32));
6148 // A scalar operand; just use it as is.
6149 Operands[j] = Operand;
6153 switch (N->getOpcode()) {
6155 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6156 &Operands[0], Operands.size()));
6163 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6164 getShiftAmountOperand(Operands[1])));
6166 case ISD::SIGN_EXTEND_INREG:
6167 case ISD::FP_ROUND_INREG: {
6168 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6169 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6171 getValueType(ExtVT)));
6176 for (; i < ResNE; ++i)
6177 Scalars.push_back(getUNDEF(EltVT));
6179 return getNode(ISD::BUILD_VECTOR, dl,
6180 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6181 &Scalars[0], Scalars.size());
6185 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6186 /// location that is 'Dist' units away from the location that the 'Base' load
6187 /// is loading from.
6188 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6189 unsigned Bytes, int Dist) const {
6190 if (LD->getChain() != Base->getChain())
6192 EVT VT = LD->getValueType(0);
6193 if (VT.getSizeInBits() / 8 != Bytes)
6196 SDValue Loc = LD->getOperand(1);
6197 SDValue BaseLoc = Base->getOperand(1);
6198 if (Loc.getOpcode() == ISD::FrameIndex) {
6199 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6201 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6202 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6203 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6204 int FS = MFI->getObjectSize(FI);
6205 int BFS = MFI->getObjectSize(BFI);
6206 if (FS != BFS || FS != (int)Bytes) return false;
6207 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6209 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) {
6210 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1));
6211 if (V && (V->getSExtValue() == Dist*Bytes))
6215 const GlobalValue *GV1 = NULL;
6216 const GlobalValue *GV2 = NULL;
6217 int64_t Offset1 = 0;
6218 int64_t Offset2 = 0;
6219 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6220 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6221 if (isGA1 && isGA2 && GV1 == GV2)
6222 return Offset1 == (Offset2 + Dist*Bytes);
6227 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6228 /// it cannot be inferred.
6229 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6230 // If this is a GlobalAddress + cst, return the alignment.
6231 const GlobalValue *GV;
6232 int64_t GVOffset = 0;
6233 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6234 // If GV has specified alignment, then use it. Otherwise, use the preferred
6236 unsigned Align = GV->getAlignment();
6238 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) {
6239 if (GVar->hasInitializer()) {
6240 const TargetData *TD = TLI.getTargetData();
6241 Align = TD->getPreferredAlignment(GVar);
6245 return MinAlign(Align, GVOffset);
6248 // If this is a direct reference to a stack slot, use information about the
6249 // stack slot's alignment.
6250 int FrameIdx = 1 << 31;
6251 int64_t FrameOffset = 0;
6252 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6253 FrameIdx = FI->getIndex();
6254 } else if (Ptr.getOpcode() == ISD::ADD &&
6255 isa<ConstantSDNode>(Ptr.getOperand(1)) &&
6256 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6257 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6258 FrameOffset = Ptr.getConstantOperandVal(1);
6261 if (FrameIdx != (1 << 31)) {
6262 // FIXME: Handle FI+CST.
6263 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6264 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6272 void SelectionDAG::dump() const {
6273 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:";
6275 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
6277 const SDNode *N = I;
6278 if (!N->hasOneUse() && N != getRoot().getNode())
6279 DumpNodes(N, 2, this);
6282 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
6287 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
6289 print_details(OS, G);
6292 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet;
6293 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
6294 const SelectionDAG *G, VisitedSDNodeSet &once) {
6295 if (!once.insert(N)) // If we've been here before, return now.
6298 // Dump the current SDNode, but don't end the line yet.
6299 OS << std::string(indent, ' ');
6302 // Having printed this SDNode, walk the children:
6303 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6304 const SDNode *child = N->getOperand(i).getNode();
6309 if (child->getNumOperands() == 0) {
6310 // This child has no grandchildren; print it inline right here.
6311 child->printr(OS, G);
6313 } else { // Just the address. FIXME: also print the child's opcode.
6315 if (unsigned RN = N->getOperand(i).getResNo())
6322 // Dump children that have grandchildren on their own line(s).
6323 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
6324 const SDNode *child = N->getOperand(i).getNode();
6325 DumpNodesr(OS, child, indent+2, G, once);
6329 void SDNode::dumpr() const {
6330 VisitedSDNodeSet once;
6331 DumpNodesr(dbgs(), this, 0, 0, once);
6334 void SDNode::dumpr(const SelectionDAG *G) const {
6335 VisitedSDNodeSet once;
6336 DumpNodesr(dbgs(), this, 0, G, once);
6340 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6341 unsigned GlobalAddressSDNode::getAddressSpace() const {
6342 return getGlobal()->getType()->getAddressSpace();
6346 const Type *ConstantPoolSDNode::getType() const {
6347 if (isMachineConstantPoolEntry())
6348 return Val.MachineCPVal->getType();
6349 return Val.ConstVal->getType();
6352 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6354 unsigned &SplatBitSize,
6356 unsigned MinSplatBits,
6358 EVT VT = getValueType(0);
6359 assert(VT.isVector() && "Expected a vector type");
6360 unsigned sz = VT.getSizeInBits();
6361 if (MinSplatBits > sz)
6364 SplatValue = APInt(sz, 0);
6365 SplatUndef = APInt(sz, 0);
6367 // Get the bits. Bits with undefined values (when the corresponding element
6368 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6369 // in SplatValue. If any of the values are not constant, give up and return
6371 unsigned int nOps = getNumOperands();
6372 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6373 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6375 for (unsigned j = 0; j < nOps; ++j) {
6376 unsigned i = isBigEndian ? nOps-1-j : j;
6377 SDValue OpVal = getOperand(i);
6378 unsigned BitPos = j * EltBitSize;
6380 if (OpVal.getOpcode() == ISD::UNDEF)
6381 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6382 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6383 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize).
6384 zextOrTrunc(sz) << BitPos;
6385 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6386 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6391 // The build_vector is all constants or undefs. Find the smallest element
6392 // size that splats the vector.
6394 HasAnyUndefs = (SplatUndef != 0);
6397 unsigned HalfSize = sz / 2;
6398 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize);
6399 APInt LowValue = APInt(SplatValue).trunc(HalfSize);
6400 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize);
6401 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize);
6403 // If the two halves do not match (ignoring undef bits), stop here.
6404 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6405 MinSplatBits > HalfSize)
6408 SplatValue = HighValue | LowValue;
6409 SplatUndef = HighUndef & LowUndef;
6418 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6419 // Find the first non-undef value in the shuffle mask.
6421 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6424 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6426 // Make sure all remaining elements are either undef or the same as the first
6428 for (int Idx = Mask[i]; i != e; ++i)
6429 if (Mask[i] >= 0 && Mask[i] != Idx)
6435 static void checkForCyclesHelper(const SDNode *N,
6436 SmallPtrSet<const SDNode*, 32> &Visited,
6437 SmallPtrSet<const SDNode*, 32> &Checked) {
6438 // If this node has already been checked, don't check it again.
6439 if (Checked.count(N))
6442 // If a node has already been visited on this depth-first walk, reject it as
6444 if (!Visited.insert(N)) {
6445 dbgs() << "Offending node:\n";
6447 errs() << "Detected cycle in SelectionDAG\n";
6451 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6452 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6459 void llvm::checkForCycles(const llvm::SDNode *N) {
6461 assert(N && "Checking nonexistant SDNode");
6462 SmallPtrSet<const SDNode*, 32> visited;
6463 SmallPtrSet<const SDNode*, 32> checked;
6464 checkForCyclesHelper(N, visited, checked);
6468 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6469 checkForCycles(DAG->getRoot().getNode());