1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 while (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 while (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 bool IsAllUndef = true;
153 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) {
154 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
157 // Do not accept build_vectors that aren't all constants or which have non-0
158 // elements. We have to be a bit careful here, as the type of the constant
159 // may not be the same as the type of the vector elements due to type
160 // legalization (the elements are promoted to a legal type for the target
161 // and a vector of a type may be legal when the base element type is not).
162 // We only want to check enough bits to cover the vector elements, because
163 // we care if the resultant vector is all zeros, not whether the individual
165 SDValue Zero = N->getOperand(i);
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
190 SDValue Op = N->getOperand(i);
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
200 /// all ConstantFPSDNode or undef.
201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
205 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
206 SDValue Op = N->getOperand(i);
207 if (Op.getOpcode() == ISD::UNDEF)
209 if (!isa<ConstantFPSDNode>(Op))
215 /// isScalarToVector - Return true if the specified node is a
216 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
217 /// element is not an undef.
218 bool ISD::isScalarToVector(const SDNode *N) {
219 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
222 if (N->getOpcode() != ISD::BUILD_VECTOR)
224 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
226 unsigned NumElems = N->getNumOperands();
229 for (unsigned i = 1; i < NumElems; ++i) {
230 SDValue V = N->getOperand(i);
231 if (V.getOpcode() != ISD::UNDEF)
237 /// allOperandsUndef - Return true if the node has at least one operand
238 /// and all operands of the specified node are ISD::UNDEF.
239 bool ISD::allOperandsUndef(const SDNode *N) {
240 // Return false if the node has no operands.
241 // This is "logically inconsistent" with the definition of "all" but
242 // is probably the desired behavior.
243 if (N->getNumOperands() == 0)
246 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
247 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
253 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
256 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
258 return ISD::SIGN_EXTEND;
260 return ISD::ZERO_EXTEND;
265 llvm_unreachable("Invalid LoadExtType");
268 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
269 /// when given the operation for (X op Y).
270 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
271 // To perform this operation, we just need to swap the L and G bits of the
273 unsigned OldL = (Operation >> 2) & 1;
274 unsigned OldG = (Operation >> 1) & 1;
275 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
276 (OldL << 1) | // New G bit
277 (OldG << 2)); // New L bit.
280 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
281 /// 'op' is a valid SetCC operation.
282 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
283 unsigned Operation = Op;
285 Operation ^= 7; // Flip L, G, E bits, but not U.
287 Operation ^= 15; // Flip all of the condition bits.
289 if (Operation > ISD::SETTRUE2)
290 Operation &= ~8; // Don't let N and U bits get set.
292 return ISD::CondCode(Operation);
296 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
297 /// signed operation and 2 if the result is an unsigned comparison. Return zero
298 /// if the operation does not depend on the sign of the input (setne and seteq).
299 static int isSignedOp(ISD::CondCode Opcode) {
301 default: llvm_unreachable("Illegal integer setcc operation!");
303 case ISD::SETNE: return 0;
307 case ISD::SETGE: return 1;
311 case ISD::SETUGE: return 2;
315 /// getSetCCOrOperation - Return the result of a logical OR between different
316 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
317 /// returns SETCC_INVALID if it is not possible to represent the resultant
319 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
321 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
322 // Cannot fold a signed integer setcc with an unsigned integer setcc.
323 return ISD::SETCC_INVALID;
325 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
327 // If the N and U bits get set then the resultant comparison DOES suddenly
328 // care about orderedness, and is true when ordered.
329 if (Op > ISD::SETTRUE2)
330 Op &= ~16; // Clear the U bit if the N bit is set.
332 // Canonicalize illegal integer setcc's.
333 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
336 return ISD::CondCode(Op);
339 /// getSetCCAndOperation - Return the result of a logical AND between different
340 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
341 /// function returns zero if it is not possible to represent the resultant
343 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
345 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
346 // Cannot fold a signed setcc with an unsigned setcc.
347 return ISD::SETCC_INVALID;
349 // Combine all of the condition bits.
350 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
352 // Canonicalize illegal integer setcc's.
356 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
357 case ISD::SETOEQ: // SETEQ & SETU[LG]E
358 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
359 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
360 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
367 //===----------------------------------------------------------------------===//
368 // SDNode Profile Support
369 //===----------------------------------------------------------------------===//
371 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
373 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
377 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
378 /// solely with their pointer.
379 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
380 ID.AddPointer(VTList.VTs);
383 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
385 static void AddNodeIDOperands(FoldingSetNodeID &ID,
386 ArrayRef<SDValue> Ops) {
387 for (auto& Op : Ops) {
388 ID.AddPointer(Op.getNode());
389 ID.AddInteger(Op.getResNo());
393 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
395 static void AddNodeIDOperands(FoldingSetNodeID &ID,
396 ArrayRef<SDUse> Ops) {
397 for (auto& Op : Ops) {
398 ID.AddPointer(Op.getNode());
399 ID.AddInteger(Op.getResNo());
403 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, bool nuw, bool nsw,
407 ID.AddBoolean(exact);
410 /// AddBinaryNodeIDCustom - Add BinarySDNodes special infos
411 static void AddBinaryNodeIDCustom(FoldingSetNodeID &ID, unsigned Opcode,
412 bool nuw, bool nsw, bool exact) {
413 if (isBinOpWithFlags(Opcode))
414 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
417 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
418 SDVTList VTList, ArrayRef<SDValue> OpList) {
419 AddNodeIDOpcode(ID, OpC);
420 AddNodeIDValueTypes(ID, VTList);
421 AddNodeIDOperands(ID, OpList);
424 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
426 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
427 switch (N->getOpcode()) {
428 case ISD::TargetExternalSymbol:
429 case ISD::ExternalSymbol:
430 llvm_unreachable("Should only be used on nodes with operands");
431 default: break; // Normal nodes don't need extra info.
432 case ISD::TargetConstant:
433 case ISD::Constant: {
434 const ConstantSDNode *C = cast<ConstantSDNode>(N);
435 ID.AddPointer(C->getConstantIntValue());
436 ID.AddBoolean(C->isOpaque());
439 case ISD::TargetConstantFP:
440 case ISD::ConstantFP: {
441 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
444 case ISD::TargetGlobalAddress:
445 case ISD::GlobalAddress:
446 case ISD::TargetGlobalTLSAddress:
447 case ISD::GlobalTLSAddress: {
448 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
449 ID.AddPointer(GA->getGlobal());
450 ID.AddInteger(GA->getOffset());
451 ID.AddInteger(GA->getTargetFlags());
452 ID.AddInteger(GA->getAddressSpace());
455 case ISD::BasicBlock:
456 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
459 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
461 case ISD::RegisterMask:
462 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
465 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
467 case ISD::FrameIndex:
468 case ISD::TargetFrameIndex:
469 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
472 case ISD::TargetJumpTable:
473 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
474 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
476 case ISD::ConstantPool:
477 case ISD::TargetConstantPool: {
478 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
479 ID.AddInteger(CP->getAlignment());
480 ID.AddInteger(CP->getOffset());
481 if (CP->isMachineConstantPoolEntry())
482 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
484 ID.AddPointer(CP->getConstVal());
485 ID.AddInteger(CP->getTargetFlags());
488 case ISD::TargetIndex: {
489 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
490 ID.AddInteger(TI->getIndex());
491 ID.AddInteger(TI->getOffset());
492 ID.AddInteger(TI->getTargetFlags());
496 const LoadSDNode *LD = cast<LoadSDNode>(N);
497 ID.AddInteger(LD->getMemoryVT().getRawBits());
498 ID.AddInteger(LD->getRawSubclassData());
499 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
503 const StoreSDNode *ST = cast<StoreSDNode>(N);
504 ID.AddInteger(ST->getMemoryVT().getRawBits());
505 ID.AddInteger(ST->getRawSubclassData());
506 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
517 const BinaryWithFlagsSDNode *BinNode = cast<BinaryWithFlagsSDNode>(N);
518 AddBinaryNodeIDCustom(ID, N->getOpcode(), BinNode->hasNoUnsignedWrap(),
519 BinNode->hasNoSignedWrap(), BinNode->isExact());
522 case ISD::ATOMIC_CMP_SWAP:
523 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
524 case ISD::ATOMIC_SWAP:
525 case ISD::ATOMIC_LOAD_ADD:
526 case ISD::ATOMIC_LOAD_SUB:
527 case ISD::ATOMIC_LOAD_AND:
528 case ISD::ATOMIC_LOAD_OR:
529 case ISD::ATOMIC_LOAD_XOR:
530 case ISD::ATOMIC_LOAD_NAND:
531 case ISD::ATOMIC_LOAD_MIN:
532 case ISD::ATOMIC_LOAD_MAX:
533 case ISD::ATOMIC_LOAD_UMIN:
534 case ISD::ATOMIC_LOAD_UMAX:
535 case ISD::ATOMIC_LOAD:
536 case ISD::ATOMIC_STORE: {
537 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
538 ID.AddInteger(AT->getMemoryVT().getRawBits());
539 ID.AddInteger(AT->getRawSubclassData());
540 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
543 case ISD::PREFETCH: {
544 const MemSDNode *PF = cast<MemSDNode>(N);
545 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
548 case ISD::VECTOR_SHUFFLE: {
549 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
550 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
552 ID.AddInteger(SVN->getMaskElt(i));
555 case ISD::TargetBlockAddress:
556 case ISD::BlockAddress: {
557 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
558 ID.AddPointer(BA->getBlockAddress());
559 ID.AddInteger(BA->getOffset());
560 ID.AddInteger(BA->getTargetFlags());
563 } // end switch (N->getOpcode())
565 // Target specific memory nodes could also have address spaces to check.
566 if (N->isTargetMemoryOpcode())
567 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
570 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
572 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
573 AddNodeIDOpcode(ID, N->getOpcode());
574 // Add the return value info.
575 AddNodeIDValueTypes(ID, N->getVTList());
576 // Add the operand info.
577 AddNodeIDOperands(ID, N->ops());
579 // Handle SDNode leafs with special info.
580 AddNodeIDCustom(ID, N);
583 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
584 /// the CSE map that carries volatility, temporalness, indexing mode, and
585 /// extension/truncation information.
587 static inline unsigned
588 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
589 bool isNonTemporal, bool isInvariant) {
590 assert((ConvType & 3) == ConvType &&
591 "ConvType may not require more than 2 bits!");
592 assert((AM & 7) == AM &&
593 "AM may not require more than 3 bits!");
597 (isNonTemporal << 6) |
601 //===----------------------------------------------------------------------===//
602 // SelectionDAG Class
603 //===----------------------------------------------------------------------===//
605 /// doNotCSE - Return true if CSE should not be performed for this node.
606 static bool doNotCSE(SDNode *N) {
607 if (N->getValueType(0) == MVT::Glue)
608 return true; // Never CSE anything that produces a flag.
610 switch (N->getOpcode()) {
612 case ISD::HANDLENODE:
614 return true; // Never CSE these nodes.
617 // Check that remaining values produced are not flags.
618 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
619 if (N->getValueType(i) == MVT::Glue)
620 return true; // Never CSE anything that produces a flag.
625 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
627 void SelectionDAG::RemoveDeadNodes() {
628 // Create a dummy node (which is not added to allnodes), that adds a reference
629 // to the root node, preventing it from being deleted.
630 HandleSDNode Dummy(getRoot());
632 SmallVector<SDNode*, 128> DeadNodes;
634 // Add all obviously-dead nodes to the DeadNodes worklist.
635 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
637 DeadNodes.push_back(I);
639 RemoveDeadNodes(DeadNodes);
641 // If the root changed (e.g. it was a dead load, update the root).
642 setRoot(Dummy.getValue());
645 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
646 /// given list, and any nodes that become unreachable as a result.
647 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
649 // Process the worklist, deleting the nodes and adding their uses to the
651 while (!DeadNodes.empty()) {
652 SDNode *N = DeadNodes.pop_back_val();
654 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
655 DUL->NodeDeleted(N, nullptr);
657 // Take the node out of the appropriate CSE map.
658 RemoveNodeFromCSEMaps(N);
660 // Next, brutally remove the operand list. This is safe to do, as there are
661 // no cycles in the graph.
662 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
664 SDNode *Operand = Use.getNode();
667 // Now that we removed this operand, see if there are no uses of it left.
668 if (Operand->use_empty())
669 DeadNodes.push_back(Operand);
676 void SelectionDAG::RemoveDeadNode(SDNode *N){
677 SmallVector<SDNode*, 16> DeadNodes(1, N);
679 // Create a dummy node that adds a reference to the root node, preventing
680 // it from being deleted. (This matters if the root is an operand of the
682 HandleSDNode Dummy(getRoot());
684 RemoveDeadNodes(DeadNodes);
687 void SelectionDAG::DeleteNode(SDNode *N) {
688 // First take this out of the appropriate CSE map.
689 RemoveNodeFromCSEMaps(N);
691 // Finally, remove uses due to operands of this node, remove from the
692 // AllNodes list, and delete the node.
693 DeleteNodeNotInCSEMaps(N);
696 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
697 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
698 assert(N->use_empty() && "Cannot delete a node that is not dead!");
700 // Drop all of the operands and decrement used node's use counts.
706 void SDDbgInfo::erase(const SDNode *Node) {
707 DbgValMapType::iterator I = DbgValMap.find(Node);
708 if (I == DbgValMap.end())
710 for (auto &Val: I->second)
711 Val->setIsInvalidated();
715 void SelectionDAG::DeallocateNode(SDNode *N) {
716 if (N->OperandsNeedDelete)
717 delete[] N->OperandList;
719 // Set the opcode to DELETED_NODE to help catch bugs when node
720 // memory is reallocated.
721 N->NodeType = ISD::DELETED_NODE;
723 NodeAllocator.Deallocate(AllNodes.remove(N));
725 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
726 // them and forget about that node.
731 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
732 static void VerifySDNode(SDNode *N) {
733 switch (N->getOpcode()) {
736 case ISD::BUILD_PAIR: {
737 EVT VT = N->getValueType(0);
738 assert(N->getNumValues() == 1 && "Too many results!");
739 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
740 "Wrong return type!");
741 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
742 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
743 "Mismatched operand types!");
744 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
745 "Wrong operand type!");
746 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
747 "Wrong return type size");
750 case ISD::BUILD_VECTOR: {
751 assert(N->getNumValues() == 1 && "Too many results!");
752 assert(N->getValueType(0).isVector() && "Wrong return type!");
753 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
754 "Wrong number of operands!");
755 EVT EltVT = N->getValueType(0).getVectorElementType();
756 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
757 assert((I->getValueType() == EltVT ||
758 (EltVT.isInteger() && I->getValueType().isInteger() &&
759 EltVT.bitsLE(I->getValueType()))) &&
760 "Wrong operand type!");
761 assert(I->getValueType() == N->getOperand(0).getValueType() &&
762 "Operands must all have the same type");
770 /// \brief Insert a newly allocated node into the DAG.
772 /// Handles insertion into the all nodes list and CSE map, as well as
773 /// verification and other common operations when a new node is allocated.
774 void SelectionDAG::InsertNode(SDNode *N) {
775 AllNodes.push_back(N);
781 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
782 /// correspond to it. This is useful when we're about to delete or repurpose
783 /// the node. We don't want future request for structurally identical nodes
784 /// to return N anymore.
785 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
787 switch (N->getOpcode()) {
788 case ISD::HANDLENODE: return false; // noop.
790 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
791 "Cond code doesn't exist!");
792 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
793 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
795 case ISD::ExternalSymbol:
796 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
798 case ISD::TargetExternalSymbol: {
799 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
800 Erased = TargetExternalSymbols.erase(
801 std::pair<std::string,unsigned char>(ESN->getSymbol(),
802 ESN->getTargetFlags()));
805 case ISD::VALUETYPE: {
806 EVT VT = cast<VTSDNode>(N)->getVT();
807 if (VT.isExtended()) {
808 Erased = ExtendedValueTypeNodes.erase(VT);
810 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
811 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
816 // Remove it from the CSE Map.
817 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
818 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
819 Erased = CSEMap.RemoveNode(N);
823 // Verify that the node was actually in one of the CSE maps, unless it has a
824 // flag result (which cannot be CSE'd) or is one of the special cases that are
825 // not subject to CSE.
826 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
827 !N->isMachineOpcode() && !doNotCSE(N)) {
830 llvm_unreachable("Node is not in map!");
836 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
837 /// maps and modified in place. Add it back to the CSE maps, unless an identical
838 /// node already exists, in which case transfer all its users to the existing
839 /// node. This transfer can potentially trigger recursive merging.
842 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
843 // For node types that aren't CSE'd, just act as if no identical node
846 SDNode *Existing = CSEMap.GetOrInsertNode(N);
848 // If there was already an existing matching node, use ReplaceAllUsesWith
849 // to replace the dead one with the existing one. This can cause
850 // recursive merging of other unrelated nodes down the line.
851 ReplaceAllUsesWith(N, Existing);
853 // N is now dead. Inform the listeners and delete it.
854 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
855 DUL->NodeDeleted(N, Existing);
856 DeleteNodeNotInCSEMaps(N);
861 // If the node doesn't already exist, we updated it. Inform listeners.
862 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
866 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
867 /// were replaced with those specified. If this node is never memoized,
868 /// return null, otherwise return a pointer to the slot it would take. If a
869 /// node already exists with these operands, the slot will be non-null.
870 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
875 SDValue Ops[] = { Op };
877 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
878 AddNodeIDCustom(ID, N);
879 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
883 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
884 /// were replaced with those specified. If this node is never memoized,
885 /// return null, otherwise return a pointer to the slot it would take. If a
886 /// node already exists with these operands, the slot will be non-null.
887 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
888 SDValue Op1, SDValue Op2,
893 SDValue Ops[] = { Op1, Op2 };
895 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
896 AddNodeIDCustom(ID, N);
897 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
902 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
903 /// were replaced with those specified. If this node is never memoized,
904 /// return null, otherwise return a pointer to the slot it would take. If a
905 /// node already exists with these operands, the slot will be non-null.
906 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
912 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
913 AddNodeIDCustom(ID, N);
914 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
918 /// getEVTAlignment - Compute the default alignment value for the
921 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
922 Type *Ty = VT == MVT::iPTR ?
923 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
924 VT.getTypeForEVT(*getContext());
926 return TLI->getDataLayout()->getABITypeAlignment(Ty);
929 // EntryNode could meaningfully have debug info if we can find it...
930 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
931 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
932 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
933 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
934 UpdateListeners(nullptr) {
935 AllNodes.push_back(&EntryNode);
936 DbgInfo = new SDDbgInfo();
939 void SelectionDAG::init(MachineFunction &mf) {
941 TLI = getSubtarget().getTargetLowering();
942 TSI = getSubtarget().getSelectionDAGInfo();
943 Context = &mf.getFunction()->getContext();
946 SelectionDAG::~SelectionDAG() {
947 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
952 void SelectionDAG::allnodes_clear() {
953 assert(&*AllNodes.begin() == &EntryNode);
954 AllNodes.remove(AllNodes.begin());
955 while (!AllNodes.empty())
956 DeallocateNode(AllNodes.begin());
959 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
960 SDVTList VTs, SDValue N1,
961 SDValue N2, bool nuw, bool nsw,
963 if (isBinOpWithFlags(Opcode)) {
964 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
965 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
966 FN->setHasNoUnsignedWrap(nuw);
967 FN->setHasNoSignedWrap(nsw);
968 FN->setIsExact(exact);
973 BinarySDNode *N = new (NodeAllocator)
974 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
978 void SelectionDAG::clear() {
980 OperandAllocator.Reset();
983 ExtendedValueTypeNodes.clear();
984 ExternalSymbols.clear();
985 TargetExternalSymbols.clear();
986 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
987 static_cast<CondCodeSDNode*>(nullptr));
988 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
989 static_cast<SDNode*>(nullptr));
991 EntryNode.UseList = nullptr;
992 AllNodes.push_back(&EntryNode);
993 Root = getEntryNode();
997 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
998 return VT.bitsGT(Op.getValueType()) ?
999 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1000 getNode(ISD::TRUNCATE, DL, VT, Op);
1003 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1004 return VT.bitsGT(Op.getValueType()) ?
1005 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1006 getNode(ISD::TRUNCATE, DL, VT, Op);
1009 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1010 return VT.bitsGT(Op.getValueType()) ?
1011 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1012 getNode(ISD::TRUNCATE, DL, VT, Op);
1015 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1017 if (VT.bitsLE(Op.getValueType()))
1018 return getNode(ISD::TRUNCATE, SL, VT, Op);
1020 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1021 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1024 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1025 assert(!VT.isVector() &&
1026 "getZeroExtendInReg should use the vector element type instead of "
1027 "the vector type!");
1028 if (Op.getValueType() == VT) return Op;
1029 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1030 APInt Imm = APInt::getLowBitsSet(BitWidth,
1031 VT.getSizeInBits());
1032 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1033 getConstant(Imm, Op.getValueType()));
1036 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1037 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1038 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1039 "The sizes of the input and result must match in order to perform the "
1040 "extend in-register.");
1041 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1042 "The destination vector type must have fewer lanes than the input.");
1043 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1046 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1047 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1048 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1049 "The sizes of the input and result must match in order to perform the "
1050 "extend in-register.");
1051 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1052 "The destination vector type must have fewer lanes than the input.");
1053 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1056 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1057 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1058 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1059 "The sizes of the input and result must match in order to perform the "
1060 "extend in-register.");
1061 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1062 "The destination vector type must have fewer lanes than the input.");
1063 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1066 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1068 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1069 EVT EltVT = VT.getScalarType();
1071 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
1072 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1075 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1076 EVT EltVT = VT.getScalarType();
1078 switch (TLI->getBooleanContents(VT)) {
1079 case TargetLowering::ZeroOrOneBooleanContent:
1080 case TargetLowering::UndefinedBooleanContent:
1081 TrueValue = getConstant(1, VT);
1083 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1084 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()),
1088 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1091 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) {
1092 EVT EltVT = VT.getScalarType();
1093 assert((EltVT.getSizeInBits() >= 64 ||
1094 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1095 "getConstant with a uint64_t value that doesn't fit in the type!");
1096 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO);
1099 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO)
1101 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO);
1104 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT,
1106 assert(VT.isInteger() && "Cannot create FP integer constant!");
1108 EVT EltVT = VT.getScalarType();
1109 const ConstantInt *Elt = &Val;
1111 // In some cases the vector type is legal but the element type is illegal and
1112 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1113 // inserted value (the type does not need to match the vector element type).
1114 // Any extra bits introduced will be truncated away.
1115 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1116 TargetLowering::TypePromoteInteger) {
1117 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1118 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1119 Elt = ConstantInt::get(*getContext(), NewVal);
1121 // In other cases the element type is illegal and needs to be expanded, for
1122 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1123 // the value into n parts and use a vector type with n-times the elements.
1124 // Then bitcast to the type requested.
1125 // Legalizing constants too early makes the DAGCombiner's job harder so we
1126 // only legalize if the DAG tells us we must produce legal types.
1127 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1128 TLI->getTypeAction(*getContext(), EltVT) ==
1129 TargetLowering::TypeExpandInteger) {
1130 APInt NewVal = Elt->getValue();
1131 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1132 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1133 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1134 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1136 // Check the temporary vector is the correct size. If this fails then
1137 // getTypeToTransformTo() probably returned a type whose size (in bits)
1138 // isn't a power-of-2 factor of the requested type size.
1139 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1141 SmallVector<SDValue, 2> EltParts;
1142 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1143 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1144 .trunc(ViaEltSizeInBits),
1145 ViaEltVT, isT, isO));
1148 // EltParts is currently in little endian order. If we actually want
1149 // big-endian order then reverse it now.
1150 if (TLI->isBigEndian())
1151 std::reverse(EltParts.begin(), EltParts.end());
1153 // The elements must be reversed when the element order is different
1154 // to the endianness of the elements (because the BITCAST is itself a
1155 // vector shuffle in this situation). However, we do not need any code to
1156 // perform this reversal because getConstant() is producing a vector
1158 // This situation occurs in MIPS MSA.
1160 SmallVector<SDValue, 8> Ops;
1161 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1162 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1164 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1165 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1170 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1171 "APInt size does not match type size!");
1172 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1173 FoldingSetNodeID ID;
1174 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1178 SDNode *N = nullptr;
1179 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1181 return SDValue(N, 0);
1184 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT);
1185 CSEMap.InsertNode(N, IP);
1189 SDValue Result(N, 0);
1190 if (VT.isVector()) {
1191 SmallVector<SDValue, 8> Ops;
1192 Ops.assign(VT.getVectorNumElements(), Result);
1193 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1198 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1199 return getConstant(Val, TLI->getPointerTy(), isTarget);
1203 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1204 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1207 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1208 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1210 EVT EltVT = VT.getScalarType();
1212 // Do the map lookup using the actual bit pattern for the floating point
1213 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1214 // we don't have issues with SNANs.
1215 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1216 FoldingSetNodeID ID;
1217 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1220 SDNode *N = nullptr;
1221 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1223 return SDValue(N, 0);
1226 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1227 CSEMap.InsertNode(N, IP);
1231 SDValue Result(N, 0);
1232 if (VT.isVector()) {
1233 SmallVector<SDValue, 8> Ops;
1234 Ops.assign(VT.getVectorNumElements(), Result);
1235 // FIXME SDLoc info might be appropriate here
1236 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1241 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1242 EVT EltVT = VT.getScalarType();
1243 if (EltVT==MVT::f32)
1244 return getConstantFP(APFloat((float)Val), VT, isTarget);
1245 else if (EltVT==MVT::f64)
1246 return getConstantFP(APFloat(Val), VT, isTarget);
1247 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1250 APFloat apf = APFloat(Val);
1251 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1253 return getConstantFP(apf, VT, isTarget);
1255 llvm_unreachable("Unsupported type in getConstantFP");
1258 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1259 EVT VT, int64_t Offset,
1261 unsigned char TargetFlags) {
1262 assert((TargetFlags == 0 || isTargetGA) &&
1263 "Cannot set target flags on target-independent globals");
1265 // Truncate (with sign-extension) the offset value to the pointer size.
1266 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType());
1268 Offset = SignExtend64(Offset, BitWidth);
1271 if (GV->isThreadLocal())
1272 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1274 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1276 FoldingSetNodeID ID;
1277 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1279 ID.AddInteger(Offset);
1280 ID.AddInteger(TargetFlags);
1281 ID.AddInteger(GV->getType()->getAddressSpace());
1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1284 return SDValue(E, 0);
1286 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1287 DL.getDebugLoc(), GV, VT,
1288 Offset, TargetFlags);
1289 CSEMap.InsertNode(N, IP);
1291 return SDValue(N, 0);
1294 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1295 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1296 FoldingSetNodeID ID;
1297 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1301 return SDValue(E, 0);
1303 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1304 CSEMap.InsertNode(N, IP);
1306 return SDValue(N, 0);
1309 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1310 unsigned char TargetFlags) {
1311 assert((TargetFlags == 0 || isTarget) &&
1312 "Cannot set target flags on target-independent jump tables");
1313 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1314 FoldingSetNodeID ID;
1315 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1317 ID.AddInteger(TargetFlags);
1319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1324 CSEMap.InsertNode(N, IP);
1326 return SDValue(N, 0);
1329 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1330 unsigned Alignment, int Offset,
1332 unsigned char TargetFlags) {
1333 assert((TargetFlags == 0 || isTarget) &&
1334 "Cannot set target flags on target-independent globals");
1336 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1337 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1338 FoldingSetNodeID ID;
1339 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1340 ID.AddInteger(Alignment);
1341 ID.AddInteger(Offset);
1343 ID.AddInteger(TargetFlags);
1345 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1346 return SDValue(E, 0);
1348 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1349 Alignment, TargetFlags);
1350 CSEMap.InsertNode(N, IP);
1352 return SDValue(N, 0);
1356 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1357 unsigned Alignment, int Offset,
1359 unsigned char TargetFlags) {
1360 assert((TargetFlags == 0 || isTarget) &&
1361 "Cannot set target flags on target-independent globals");
1363 Alignment = TLI->getDataLayout()->getPrefTypeAlignment(C->getType());
1364 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1365 FoldingSetNodeID ID;
1366 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1367 ID.AddInteger(Alignment);
1368 ID.AddInteger(Offset);
1369 C->addSelectionDAGCSEId(ID);
1370 ID.AddInteger(TargetFlags);
1372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1373 return SDValue(E, 0);
1375 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1376 Alignment, TargetFlags);
1377 CSEMap.InsertNode(N, IP);
1379 return SDValue(N, 0);
1382 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1383 unsigned char TargetFlags) {
1384 FoldingSetNodeID ID;
1385 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1386 ID.AddInteger(Index);
1387 ID.AddInteger(Offset);
1388 ID.AddInteger(TargetFlags);
1390 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1391 return SDValue(E, 0);
1393 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1395 CSEMap.InsertNode(N, IP);
1397 return SDValue(N, 0);
1400 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1401 FoldingSetNodeID ID;
1402 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1405 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1406 return SDValue(E, 0);
1408 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1409 CSEMap.InsertNode(N, IP);
1411 return SDValue(N, 0);
1414 SDValue SelectionDAG::getValueType(EVT VT) {
1415 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1416 ValueTypeNodes.size())
1417 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1419 SDNode *&N = VT.isExtended() ?
1420 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1422 if (N) return SDValue(N, 0);
1423 N = new (NodeAllocator) VTSDNode(VT);
1425 return SDValue(N, 0);
1428 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1429 SDNode *&N = ExternalSymbols[Sym];
1430 if (N) return SDValue(N, 0);
1431 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1437 unsigned char TargetFlags) {
1439 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1441 if (N) return SDValue(N, 0);
1442 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1444 return SDValue(N, 0);
1447 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1448 if ((unsigned)Cond >= CondCodeNodes.size())
1449 CondCodeNodes.resize(Cond+1);
1451 if (!CondCodeNodes[Cond]) {
1452 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1453 CondCodeNodes[Cond] = N;
1457 return SDValue(CondCodeNodes[Cond], 0);
1460 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1461 // the shuffle mask M that point at N1 to point at N2, and indices that point
1462 // N2 to point at N1.
1463 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1465 ShuffleVectorSDNode::commuteMask(M);
1468 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1469 SDValue N2, const int *Mask) {
1470 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1471 "Invalid VECTOR_SHUFFLE");
1473 // Canonicalize shuffle undef, undef -> undef
1474 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1475 return getUNDEF(VT);
1477 // Validate that all indices in Mask are within the range of the elements
1478 // input to the shuffle.
1479 unsigned NElts = VT.getVectorNumElements();
1480 SmallVector<int, 8> MaskVec;
1481 for (unsigned i = 0; i != NElts; ++i) {
1482 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1483 MaskVec.push_back(Mask[i]);
1486 // Canonicalize shuffle v, v -> v, undef
1489 for (unsigned i = 0; i != NElts; ++i)
1490 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1493 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1494 if (N1.getOpcode() == ISD::UNDEF)
1495 commuteShuffle(N1, N2, MaskVec);
1497 // If shuffling a splat, try to blend the splat instead. We do this here so
1498 // that even when this arises during lowering we don't have to re-handle it.
1499 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1500 BitVector UndefElements;
1501 SDValue Splat = BV->getSplatValue(&UndefElements);
1505 for (int i = 0; i < (int)NElts; ++i) {
1506 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1509 // If this input comes from undef, mark it as such.
1510 if (UndefElements[MaskVec[i] - Offset]) {
1515 // If we can blend a non-undef lane, use that instead.
1516 if (!UndefElements[i])
1517 MaskVec[i] = i + Offset;
1520 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1521 BlendSplat(N1BV, 0);
1522 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1523 BlendSplat(N2BV, NElts);
1525 // Canonicalize all index into lhs, -> shuffle lhs, undef
1526 // Canonicalize all index into rhs, -> shuffle rhs, undef
1527 bool AllLHS = true, AllRHS = true;
1528 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1529 for (unsigned i = 0; i != NElts; ++i) {
1530 if (MaskVec[i] >= (int)NElts) {
1535 } else if (MaskVec[i] >= 0) {
1539 if (AllLHS && AllRHS)
1540 return getUNDEF(VT);
1541 if (AllLHS && !N2Undef)
1545 commuteShuffle(N1, N2, MaskVec);
1547 // Reset our undef status after accounting for the mask.
1548 N2Undef = N2.getOpcode() == ISD::UNDEF;
1549 // Re-check whether both sides ended up undef.
1550 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1551 return getUNDEF(VT);
1553 // If Identity shuffle return that node.
1554 bool Identity = true, AllSame = true;
1555 for (unsigned i = 0; i != NElts; ++i) {
1556 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1557 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1559 if (Identity && NElts)
1562 // Shuffling a constant splat doesn't change the result.
1566 // Look through any bitcasts. We check that these don't change the number
1567 // (and size) of elements and just changes their types.
1568 while (V.getOpcode() == ISD::BITCAST)
1569 V = V->getOperand(0);
1571 // A splat should always show up as a build vector node.
1572 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1573 BitVector UndefElements;
1574 SDValue Splat = BV->getSplatValue(&UndefElements);
1575 // If this is a splat of an undef, shuffling it is also undef.
1576 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1577 return getUNDEF(VT);
1580 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1582 // We only have a splat which can skip shuffles if there is a splatted
1583 // value and no undef lanes rearranged by the shuffle.
1584 if (Splat && UndefElements.none()) {
1585 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1586 // number of elements match or the value splatted is a zero constant.
1589 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1590 if (C->isNullValue())
1594 // If the shuffle itself creates a splat, build the vector directly.
1595 if (AllSame && SameNumElts) {
1596 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1597 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1599 EVT BuildVT = BV->getValueType(0);
1600 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1602 // We may have jumped through bitcasts, so the type of the
1603 // BUILD_VECTOR may not match the type of the shuffle.
1605 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1611 FoldingSetNodeID ID;
1612 SDValue Ops[2] = { N1, N2 };
1613 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1614 for (unsigned i = 0; i != NElts; ++i)
1615 ID.AddInteger(MaskVec[i]);
1618 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1619 return SDValue(E, 0);
1621 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1622 // SDNode doesn't have access to it. This memory will be "leaked" when
1623 // the node is deallocated, but recovered when the NodeAllocator is released.
1624 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1625 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1627 ShuffleVectorSDNode *N =
1628 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1629 dl.getDebugLoc(), N1, N2,
1631 CSEMap.InsertNode(N, IP);
1633 return SDValue(N, 0);
1636 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1637 MVT VT = SV.getSimpleValueType(0);
1638 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1639 ShuffleVectorSDNode::commuteMask(MaskVec);
1641 SDValue Op0 = SV.getOperand(0);
1642 SDValue Op1 = SV.getOperand(1);
1643 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1646 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1647 SDValue Val, SDValue DTy,
1648 SDValue STy, SDValue Rnd, SDValue Sat,
1649 ISD::CvtCode Code) {
1650 // If the src and dest types are the same and the conversion is between
1651 // integer types of the same sign or two floats, no conversion is necessary.
1653 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1656 FoldingSetNodeID ID;
1657 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1658 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1661 return SDValue(E, 0);
1663 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1666 CSEMap.InsertNode(N, IP);
1668 return SDValue(N, 0);
1671 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1672 FoldingSetNodeID ID;
1673 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1674 ID.AddInteger(RegNo);
1676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1677 return SDValue(E, 0);
1679 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1680 CSEMap.InsertNode(N, IP);
1682 return SDValue(N, 0);
1685 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1686 FoldingSetNodeID ID;
1687 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1688 ID.AddPointer(RegMask);
1690 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1691 return SDValue(E, 0);
1693 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1694 CSEMap.InsertNode(N, IP);
1696 return SDValue(N, 0);
1699 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1700 FoldingSetNodeID ID;
1701 SDValue Ops[] = { Root };
1702 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1703 ID.AddPointer(Label);
1705 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1706 return SDValue(E, 0);
1708 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1709 dl.getDebugLoc(), Root, Label);
1710 CSEMap.InsertNode(N, IP);
1712 return SDValue(N, 0);
1716 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1719 unsigned char TargetFlags) {
1720 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1722 FoldingSetNodeID ID;
1723 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1725 ID.AddInteger(Offset);
1726 ID.AddInteger(TargetFlags);
1728 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1729 return SDValue(E, 0);
1731 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1733 CSEMap.InsertNode(N, IP);
1735 return SDValue(N, 0);
1738 SDValue SelectionDAG::getSrcValue(const Value *V) {
1739 assert((!V || V->getType()->isPointerTy()) &&
1740 "SrcValue is not a pointer?");
1742 FoldingSetNodeID ID;
1743 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1747 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1748 return SDValue(E, 0);
1750 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1751 CSEMap.InsertNode(N, IP);
1753 return SDValue(N, 0);
1756 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1757 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1758 FoldingSetNodeID ID;
1759 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1764 return SDValue(E, 0);
1766 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1767 CSEMap.InsertNode(N, IP);
1769 return SDValue(N, 0);
1772 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1773 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1774 unsigned SrcAS, unsigned DestAS) {
1775 SDValue Ops[] = {Ptr};
1776 FoldingSetNodeID ID;
1777 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1778 ID.AddInteger(SrcAS);
1779 ID.AddInteger(DestAS);
1782 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1783 return SDValue(E, 0);
1785 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1787 VT, Ptr, SrcAS, DestAS);
1788 CSEMap.InsertNode(N, IP);
1790 return SDValue(N, 0);
1793 /// getShiftAmountOperand - Return the specified value casted to
1794 /// the target's desired shift amount type.
1795 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1796 EVT OpTy = Op.getValueType();
1797 EVT ShTy = TLI->getShiftAmountTy(LHSTy);
1798 if (OpTy == ShTy || OpTy.isVector()) return Op;
1800 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1801 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1804 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1805 /// specified value type.
1806 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1807 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1808 unsigned ByteSize = VT.getStoreSize();
1809 Type *Ty = VT.getTypeForEVT(*getContext());
1810 unsigned StackAlign =
1811 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1813 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1814 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1817 /// CreateStackTemporary - Create a stack temporary suitable for holding
1818 /// either of the specified value types.
1819 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1820 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1821 VT2.getStoreSizeInBits())/8;
1822 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1823 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1824 const DataLayout *TD = TLI->getDataLayout();
1825 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1826 TD->getPrefTypeAlignment(Ty2));
1828 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1829 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1830 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1833 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1834 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1835 // These setcc operations always fold.
1839 case ISD::SETFALSE2: return getConstant(0, VT);
1841 case ISD::SETTRUE2: {
1842 TargetLowering::BooleanContent Cnt =
1843 TLI->getBooleanContents(N1->getValueType(0));
1845 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1858 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1862 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1863 const APInt &C2 = N2C->getAPIntValue();
1864 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1865 const APInt &C1 = N1C->getAPIntValue();
1868 default: llvm_unreachable("Unknown integer setcc!");
1869 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1870 case ISD::SETNE: return getConstant(C1 != C2, VT);
1871 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1872 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1873 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1874 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1875 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1876 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1877 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1878 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1882 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1883 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1884 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1887 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1888 return getUNDEF(VT);
1890 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1891 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1892 return getUNDEF(VT);
1894 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1895 R==APFloat::cmpLessThan, VT);
1896 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1897 return getUNDEF(VT);
1899 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1900 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1901 return getUNDEF(VT);
1903 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1904 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1905 return getUNDEF(VT);
1907 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1908 R==APFloat::cmpEqual, VT);
1909 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1910 return getUNDEF(VT);
1912 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1913 R==APFloat::cmpEqual, VT);
1914 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1915 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1916 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1917 R==APFloat::cmpEqual, VT);
1918 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1919 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1920 R==APFloat::cmpLessThan, VT);
1921 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1922 R==APFloat::cmpUnordered, VT);
1923 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1924 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1927 // Ensure that the constant occurs on the RHS.
1928 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1929 MVT CompVT = N1.getValueType().getSimpleVT();
1930 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1933 return getSetCC(dl, VT, N2, N1, SwappedCond);
1937 // Could not fold it.
1941 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1942 /// use this predicate to simplify operations downstream.
1943 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1944 // This predicate is not safe for vector operations.
1945 if (Op.getValueType().isVector())
1948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1949 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1952 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1953 /// this predicate to simplify operations downstream. Mask is known to be zero
1954 /// for bits that V cannot have.
1955 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1956 unsigned Depth) const {
1957 APInt KnownZero, KnownOne;
1958 computeKnownBits(Op, KnownZero, KnownOne, Depth);
1959 return (KnownZero & Mask) == Mask;
1962 /// Determine which bits of Op are known to be either zero or one and return
1963 /// them in the KnownZero/KnownOne bitsets.
1964 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
1965 APInt &KnownOne, unsigned Depth) const {
1966 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1968 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1970 return; // Limit search depth.
1972 APInt KnownZero2, KnownOne2;
1974 switch (Op.getOpcode()) {
1976 // We know all of the bits for a constant!
1977 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1978 KnownZero = ~KnownOne;
1981 // If either the LHS or the RHS are Zero, the result is zero.
1982 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1983 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1985 // Output known-1 bits are only known if set in both the LHS & RHS.
1986 KnownOne &= KnownOne2;
1987 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1988 KnownZero |= KnownZero2;
1991 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1992 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1994 // Output known-0 bits are only known if clear in both the LHS & RHS.
1995 KnownZero &= KnownZero2;
1996 // Output known-1 are known to be set if set in either the LHS | RHS.
1997 KnownOne |= KnownOne2;
2000 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2001 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2003 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2004 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2005 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2006 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2007 KnownZero = KnownZeroOut;
2011 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2012 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2014 // If low bits are zero in either operand, output low known-0 bits.
2015 // Also compute a conserative estimate for high known-0 bits.
2016 // More trickiness is possible, but this is sufficient for the
2017 // interesting case of alignment computation.
2018 KnownOne.clearAllBits();
2019 unsigned TrailZ = KnownZero.countTrailingOnes() +
2020 KnownZero2.countTrailingOnes();
2021 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2022 KnownZero2.countLeadingOnes(),
2023 BitWidth) - BitWidth;
2025 TrailZ = std::min(TrailZ, BitWidth);
2026 LeadZ = std::min(LeadZ, BitWidth);
2027 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2028 APInt::getHighBitsSet(BitWidth, LeadZ);
2032 // For the purposes of computing leading zeros we can conservatively
2033 // treat a udiv as a logical right shift by the power of 2 known to
2034 // be less than the denominator.
2035 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2036 unsigned LeadZ = KnownZero2.countLeadingOnes();
2038 KnownOne2.clearAllBits();
2039 KnownZero2.clearAllBits();
2040 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2041 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2042 if (RHSUnknownLeadingOnes != BitWidth)
2043 LeadZ = std::min(BitWidth,
2044 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2046 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2050 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2051 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2053 // Only known if known in both the LHS and RHS.
2054 KnownOne &= KnownOne2;
2055 KnownZero &= KnownZero2;
2057 case ISD::SELECT_CC:
2058 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2059 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2061 // Only known if known in both the LHS and RHS.
2062 KnownOne &= KnownOne2;
2063 KnownZero &= KnownZero2;
2071 if (Op.getResNo() != 1)
2073 // The boolean result conforms to getBooleanContents.
2074 // If we know the result of a setcc has the top bits zero, use this info.
2075 // We know that we have an integer-based boolean since these operations
2076 // are only available for integer.
2077 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2078 TargetLowering::ZeroOrOneBooleanContent &&
2080 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2083 // If we know the result of a setcc has the top bits zero, use this info.
2084 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2085 TargetLowering::ZeroOrOneBooleanContent &&
2087 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2090 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2091 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2092 unsigned ShAmt = SA->getZExtValue();
2094 // If the shift count is an invalid immediate, don't do anything.
2095 if (ShAmt >= BitWidth)
2098 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2099 KnownZero <<= ShAmt;
2101 // low bits known zero.
2102 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2106 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2107 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2108 unsigned ShAmt = SA->getZExtValue();
2110 // If the shift count is an invalid immediate, don't do anything.
2111 if (ShAmt >= BitWidth)
2114 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2115 KnownZero = KnownZero.lshr(ShAmt);
2116 KnownOne = KnownOne.lshr(ShAmt);
2118 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2119 KnownZero |= HighBits; // High bits known zero.
2123 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2124 unsigned ShAmt = SA->getZExtValue();
2126 // If the shift count is an invalid immediate, don't do anything.
2127 if (ShAmt >= BitWidth)
2130 // If any of the demanded bits are produced by the sign extension, we also
2131 // demand the input sign bit.
2132 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2134 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2135 KnownZero = KnownZero.lshr(ShAmt);
2136 KnownOne = KnownOne.lshr(ShAmt);
2138 // Handle the sign bits.
2139 APInt SignBit = APInt::getSignBit(BitWidth);
2140 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2142 if (KnownZero.intersects(SignBit)) {
2143 KnownZero |= HighBits; // New bits are known zero.
2144 } else if (KnownOne.intersects(SignBit)) {
2145 KnownOne |= HighBits; // New bits are known one.
2149 case ISD::SIGN_EXTEND_INREG: {
2150 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2151 unsigned EBits = EVT.getScalarType().getSizeInBits();
2153 // Sign extension. Compute the demanded bits in the result that are not
2154 // present in the input.
2155 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2157 APInt InSignBit = APInt::getSignBit(EBits);
2158 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2160 // If the sign extended bits are demanded, we know that the sign
2162 InSignBit = InSignBit.zext(BitWidth);
2163 if (NewBits.getBoolValue())
2164 InputDemandedBits |= InSignBit;
2166 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2167 KnownOne &= InputDemandedBits;
2168 KnownZero &= InputDemandedBits;
2170 // If the sign bit of the input is known set or clear, then we know the
2171 // top bits of the result.
2172 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2173 KnownZero |= NewBits;
2174 KnownOne &= ~NewBits;
2175 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2176 KnownOne |= NewBits;
2177 KnownZero &= ~NewBits;
2178 } else { // Input sign bit unknown
2179 KnownZero &= ~NewBits;
2180 KnownOne &= ~NewBits;
2185 case ISD::CTTZ_ZERO_UNDEF:
2187 case ISD::CTLZ_ZERO_UNDEF:
2189 unsigned LowBits = Log2_32(BitWidth)+1;
2190 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2191 KnownOne.clearAllBits();
2195 LoadSDNode *LD = cast<LoadSDNode>(Op);
2196 // If this is a ZEXTLoad and we are looking at the loaded value.
2197 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2198 EVT VT = LD->getMemoryVT();
2199 unsigned MemBits = VT.getScalarType().getSizeInBits();
2200 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2201 } else if (const MDNode *Ranges = LD->getRanges()) {
2202 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2206 case ISD::ZERO_EXTEND: {
2207 EVT InVT = Op.getOperand(0).getValueType();
2208 unsigned InBits = InVT.getScalarType().getSizeInBits();
2209 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2210 KnownZero = KnownZero.trunc(InBits);
2211 KnownOne = KnownOne.trunc(InBits);
2212 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2213 KnownZero = KnownZero.zext(BitWidth);
2214 KnownOne = KnownOne.zext(BitWidth);
2215 KnownZero |= NewBits;
2218 case ISD::SIGN_EXTEND: {
2219 EVT InVT = Op.getOperand(0).getValueType();
2220 unsigned InBits = InVT.getScalarType().getSizeInBits();
2221 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2223 KnownZero = KnownZero.trunc(InBits);
2224 KnownOne = KnownOne.trunc(InBits);
2225 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2227 // Note if the sign bit is known to be zero or one.
2228 bool SignBitKnownZero = KnownZero.isNegative();
2229 bool SignBitKnownOne = KnownOne.isNegative();
2231 KnownZero = KnownZero.zext(BitWidth);
2232 KnownOne = KnownOne.zext(BitWidth);
2234 // If the sign bit is known zero or one, the top bits match.
2235 if (SignBitKnownZero)
2236 KnownZero |= NewBits;
2237 else if (SignBitKnownOne)
2238 KnownOne |= NewBits;
2241 case ISD::ANY_EXTEND: {
2242 EVT InVT = Op.getOperand(0).getValueType();
2243 unsigned InBits = InVT.getScalarType().getSizeInBits();
2244 KnownZero = KnownZero.trunc(InBits);
2245 KnownOne = KnownOne.trunc(InBits);
2246 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2247 KnownZero = KnownZero.zext(BitWidth);
2248 KnownOne = KnownOne.zext(BitWidth);
2251 case ISD::TRUNCATE: {
2252 EVT InVT = Op.getOperand(0).getValueType();
2253 unsigned InBits = InVT.getScalarType().getSizeInBits();
2254 KnownZero = KnownZero.zext(InBits);
2255 KnownOne = KnownOne.zext(InBits);
2256 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2257 KnownZero = KnownZero.trunc(BitWidth);
2258 KnownOne = KnownOne.trunc(BitWidth);
2261 case ISD::AssertZext: {
2262 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2263 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2264 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2265 KnownZero |= (~InMask);
2266 KnownOne &= (~KnownZero);
2270 // All bits are zero except the low bit.
2271 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2275 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2276 // We know that the top bits of C-X are clear if X contains less bits
2277 // than C (i.e. no wrap-around can happen). For example, 20-X is
2278 // positive if we can prove that X is >= 0 and < 16.
2279 if (CLHS->getAPIntValue().isNonNegative()) {
2280 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2281 // NLZ can't be BitWidth with no sign bit
2282 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2283 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2285 // If all of the MaskV bits are known to be zero, then we know the
2286 // output top bits are zero, because we now know that the output is
2288 if ((KnownZero2 & MaskV) == MaskV) {
2289 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2290 // Top bits known zero.
2291 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2299 // Output known-0 bits are known if clear or set in both the low clear bits
2300 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2301 // low 3 bits clear.
2302 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2303 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2305 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2306 KnownZeroOut = std::min(KnownZeroOut,
2307 KnownZero2.countTrailingOnes());
2309 if (Op.getOpcode() == ISD::ADD) {
2310 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2314 // With ADDE, a carry bit may be added in, so we can only use this
2315 // information if we know (at least) that the low two bits are clear. We
2316 // then return to the caller that the low bit is unknown but that other bits
2318 if (KnownZeroOut >= 2) // ADDE
2319 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2323 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2324 const APInt &RA = Rem->getAPIntValue().abs();
2325 if (RA.isPowerOf2()) {
2326 APInt LowBits = RA - 1;
2327 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2329 // The low bits of the first operand are unchanged by the srem.
2330 KnownZero = KnownZero2 & LowBits;
2331 KnownOne = KnownOne2 & LowBits;
2333 // If the first operand is non-negative or has all low bits zero, then
2334 // the upper bits are all zero.
2335 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2336 KnownZero |= ~LowBits;
2338 // If the first operand is negative and not all low bits are zero, then
2339 // the upper bits are all one.
2340 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2341 KnownOne |= ~LowBits;
2342 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2347 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2348 const APInt &RA = Rem->getAPIntValue();
2349 if (RA.isPowerOf2()) {
2350 APInt LowBits = (RA - 1);
2351 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2353 // The upper bits are all zero, the lower ones are unchanged.
2354 KnownZero = KnownZero2 | ~LowBits;
2355 KnownOne = KnownOne2 & LowBits;
2360 // Since the result is less than or equal to either operand, any leading
2361 // zero bits in either operand must also exist in the result.
2362 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2363 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2365 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2366 KnownZero2.countLeadingOnes());
2367 KnownOne.clearAllBits();
2368 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2371 case ISD::EXTRACT_ELEMENT: {
2372 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2373 const unsigned Index =
2374 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2375 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2377 // Remove low part of known bits mask
2378 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2379 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2381 // Remove high part of known bit mask
2382 KnownZero = KnownZero.trunc(BitWidth);
2383 KnownOne = KnownOne.trunc(BitWidth);
2386 case ISD::FrameIndex:
2387 case ISD::TargetFrameIndex:
2388 if (unsigned Align = InferPtrAlignment(Op)) {
2389 // The low bits are known zero if the pointer is aligned.
2390 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2396 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2399 case ISD::INTRINSIC_WO_CHAIN:
2400 case ISD::INTRINSIC_W_CHAIN:
2401 case ISD::INTRINSIC_VOID:
2402 // Allow the target to implement this method for its nodes.
2403 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2407 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2410 /// ComputeNumSignBits - Return the number of times the sign bit of the
2411 /// register is replicated into the other bits. We know that at least 1 bit
2412 /// is always equal to the sign bit (itself), but other cases can give us
2413 /// information. For example, immediately after an "SRA X, 2", we know that
2414 /// the top 3 bits are all equal to each other, so we return 3.
2415 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2416 EVT VT = Op.getValueType();
2417 assert(VT.isInteger() && "Invalid VT!");
2418 unsigned VTBits = VT.getScalarType().getSizeInBits();
2420 unsigned FirstAnswer = 1;
2423 return 1; // Limit search depth.
2425 switch (Op.getOpcode()) {
2427 case ISD::AssertSext:
2428 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2429 return VTBits-Tmp+1;
2430 case ISD::AssertZext:
2431 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2434 case ISD::Constant: {
2435 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2436 return Val.getNumSignBits();
2439 case ISD::SIGN_EXTEND:
2441 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2442 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2444 case ISD::SIGN_EXTEND_INREG:
2445 // Max of the input and what this extends.
2447 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2450 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2451 return std::max(Tmp, Tmp2);
2454 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2455 // SRA X, C -> adds C sign bits.
2456 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2457 Tmp += C->getZExtValue();
2458 if (Tmp > VTBits) Tmp = VTBits;
2462 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2463 // shl destroys sign bits.
2464 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2465 if (C->getZExtValue() >= VTBits || // Bad shift.
2466 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2467 return Tmp - C->getZExtValue();
2472 case ISD::XOR: // NOT is handled here.
2473 // Logical binary ops preserve the number of sign bits at the worst.
2474 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2476 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2477 FirstAnswer = std::min(Tmp, Tmp2);
2478 // We computed what we know about the sign bits as our first
2479 // answer. Now proceed to the generic code that uses
2480 // computeKnownBits, and pick whichever answer is better.
2485 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2486 if (Tmp == 1) return 1; // Early out.
2487 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2488 return std::min(Tmp, Tmp2);
2496 if (Op.getResNo() != 1)
2498 // The boolean result conforms to getBooleanContents. Fall through.
2499 // If setcc returns 0/-1, all bits are sign bits.
2500 // We know that we have an integer-based boolean since these operations
2501 // are only available for integer.
2502 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2503 TargetLowering::ZeroOrNegativeOneBooleanContent)
2507 // If setcc returns 0/-1, all bits are sign bits.
2508 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2509 TargetLowering::ZeroOrNegativeOneBooleanContent)
2514 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2515 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2517 // Handle rotate right by N like a rotate left by 32-N.
2518 if (Op.getOpcode() == ISD::ROTR)
2519 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2521 // If we aren't rotating out all of the known-in sign bits, return the
2522 // number that are left. This handles rotl(sext(x), 1) for example.
2523 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2524 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2528 // Add can have at most one carry bit. Thus we know that the output
2529 // is, at worst, one more bit than the inputs.
2530 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2531 if (Tmp == 1) return 1; // Early out.
2533 // Special case decrementing a value (ADD X, -1):
2534 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2535 if (CRHS->isAllOnesValue()) {
2536 APInt KnownZero, KnownOne;
2537 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2539 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2541 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2544 // If we are subtracting one from a positive number, there is no carry
2545 // out of the result.
2546 if (KnownZero.isNegative())
2550 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2551 if (Tmp2 == 1) return 1;
2552 return std::min(Tmp, Tmp2)-1;
2555 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2556 if (Tmp2 == 1) return 1;
2559 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2560 if (CLHS->isNullValue()) {
2561 APInt KnownZero, KnownOne;
2562 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2563 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2565 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2568 // If the input is known to be positive (the sign bit is known clear),
2569 // the output of the NEG has the same number of sign bits as the input.
2570 if (KnownZero.isNegative())
2573 // Otherwise, we treat this like a SUB.
2576 // Sub can have at most one carry bit. Thus we know that the output
2577 // is, at worst, one more bit than the inputs.
2578 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2579 if (Tmp == 1) return 1; // Early out.
2580 return std::min(Tmp, Tmp2)-1;
2582 // FIXME: it's tricky to do anything useful for this, but it is an important
2583 // case for targets like X86.
2585 case ISD::EXTRACT_ELEMENT: {
2586 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2587 const int BitWidth = Op.getValueType().getSizeInBits();
2589 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2591 // Get reverse index (starting from 1), Op1 value indexes elements from
2592 // little end. Sign starts at big end.
2593 const int rIndex = Items - 1 -
2594 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2596 // If the sign portion ends in our element the substraction gives correct
2597 // result. Otherwise it gives either negative or > bitwidth result
2598 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2602 // If we are looking at the loaded value of the SDNode.
2603 if (Op.getResNo() == 0) {
2604 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2605 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2606 unsigned ExtType = LD->getExtensionType();
2609 case ISD::SEXTLOAD: // '17' bits known
2610 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2611 return VTBits-Tmp+1;
2612 case ISD::ZEXTLOAD: // '16' bits known
2613 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2619 // Allow the target to implement this method for its nodes.
2620 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2621 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2622 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2623 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2624 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2625 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2628 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2629 // use this information.
2630 APInt KnownZero, KnownOne;
2631 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2634 if (KnownZero.isNegative()) { // sign bit is 0
2636 } else if (KnownOne.isNegative()) { // sign bit is 1;
2643 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2644 // the number of identical bits in the top of the input value.
2646 Mask <<= Mask.getBitWidth()-VTBits;
2647 // Return # leading zeros. We use 'min' here in case Val was zero before
2648 // shifting. We don't want to return '64' as for an i32 "0".
2649 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2652 /// isBaseWithConstantOffset - Return true if the specified operand is an
2653 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2654 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2655 /// semantics as an ADD. This handles the equivalence:
2656 /// X|Cst == X+Cst iff X&Cst = 0.
2657 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2658 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2659 !isa<ConstantSDNode>(Op.getOperand(1)))
2662 if (Op.getOpcode() == ISD::OR &&
2663 !MaskedValueIsZero(Op.getOperand(0),
2664 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2671 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2672 // If we're told that NaNs won't happen, assume they won't.
2673 if (getTarget().Options.NoNaNsFPMath)
2676 // If the value is a constant, we can obviously see if it is a NaN or not.
2677 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2678 return !C->getValueAPF().isNaN();
2680 // TODO: Recognize more cases here.
2685 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2686 // If the value is a constant, we can obviously see if it is a zero or not.
2687 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2688 return !C->isZero();
2690 // TODO: Recognize more cases here.
2691 switch (Op.getOpcode()) {
2694 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2695 return !C->isNullValue();
2702 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2703 // Check the obvious case.
2704 if (A == B) return true;
2706 // For for negative and positive zero.
2707 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2708 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2709 if (CA->isZero() && CB->isZero()) return true;
2711 // Otherwise they may not be equal.
2715 /// getNode - Gets or creates the specified node.
2717 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2718 FoldingSetNodeID ID;
2719 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2722 return SDValue(E, 0);
2724 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2725 DL.getDebugLoc(), getVTList(VT));
2726 CSEMap.InsertNode(N, IP);
2729 return SDValue(N, 0);
2732 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2733 EVT VT, SDValue Operand) {
2734 // Constant fold unary operations with an integer constant operand. Even
2735 // opaque constant will be folded, because the folding of unary operations
2736 // doesn't create new constants with different values. Nevertheless, the
2737 // opaque flag is preserved during folding to prevent future folding with
2739 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2740 const APInt &Val = C->getAPIntValue();
2743 case ISD::SIGN_EXTEND:
2744 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT,
2745 C->isTargetOpcode(), C->isOpaque());
2746 case ISD::ANY_EXTEND:
2747 case ISD::ZERO_EXTEND:
2749 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT,
2750 C->isTargetOpcode(), C->isOpaque());
2751 case ISD::UINT_TO_FP:
2752 case ISD::SINT_TO_FP: {
2753 APFloat apf(EVTToAPFloatSemantics(VT),
2754 APInt::getNullValue(VT.getSizeInBits()));
2755 (void)apf.convertFromAPInt(Val,
2756 Opcode==ISD::SINT_TO_FP,
2757 APFloat::rmNearestTiesToEven);
2758 return getConstantFP(apf, VT);
2761 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2762 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), VT);
2763 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2764 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2765 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2766 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2769 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(),
2772 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(),
2775 case ISD::CTLZ_ZERO_UNDEF:
2776 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(),
2779 case ISD::CTTZ_ZERO_UNDEF:
2780 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(),
2785 // Constant fold unary operations with a floating point constant operand.
2786 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2787 APFloat V = C->getValueAPF(); // make copy
2791 return getConstantFP(V, VT);
2794 return getConstantFP(V, VT);
2796 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2797 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2798 return getConstantFP(V, VT);
2802 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2803 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2804 return getConstantFP(V, VT);
2808 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2809 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2810 return getConstantFP(V, VT);
2813 case ISD::FP_EXTEND: {
2815 // This can return overflow, underflow, or inexact; we don't care.
2816 // FIXME need to be more flexible about rounding mode.
2817 (void)V.convert(EVTToAPFloatSemantics(VT),
2818 APFloat::rmNearestTiesToEven, &ignored);
2819 return getConstantFP(V, VT);
2821 case ISD::FP_TO_SINT:
2822 case ISD::FP_TO_UINT: {
2825 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2826 // FIXME need to be more flexible about rounding mode.
2827 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2828 Opcode==ISD::FP_TO_SINT,
2829 APFloat::rmTowardZero, &ignored);
2830 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2832 APInt api(VT.getSizeInBits(), x);
2833 return getConstant(api, VT);
2836 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2837 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), VT);
2838 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2839 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2840 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2841 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2846 // Constant fold unary operations with a vector integer or float operand.
2847 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand.getNode())) {
2848 if (BV->isConstant()) {
2851 // FIXME: Entirely reasonable to perform folding of other unary
2852 // operations here as the need arises.
2855 // Constant build vector truncation can be done with the original scalar
2856 // operands but with a new build vector with the truncated value type.
2857 return getNode(ISD::BUILD_VECTOR, DL, VT, BV->ops());
2863 case ISD::FP_EXTEND:
2864 case ISD::UINT_TO_FP:
2865 case ISD::SINT_TO_FP: {
2866 // Let the above scalar folding handle the folding of each element.
2867 SmallVector<SDValue, 8> Ops;
2868 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2869 SDValue OpN = BV->getOperand(i);
2870 OpN = getNode(Opcode, DL, VT.getVectorElementType(), OpN);
2871 if (OpN.getOpcode() != ISD::UNDEF &&
2872 OpN.getOpcode() != ISD::Constant &&
2873 OpN.getOpcode() != ISD::ConstantFP)
2877 if (Ops.size() == VT.getVectorNumElements())
2878 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2885 unsigned OpOpcode = Operand.getNode()->getOpcode();
2887 case ISD::TokenFactor:
2888 case ISD::MERGE_VALUES:
2889 case ISD::CONCAT_VECTORS:
2890 return Operand; // Factor, merge or concat of one node? No need.
2891 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2892 case ISD::FP_EXTEND:
2893 assert(VT.isFloatingPoint() &&
2894 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2895 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2896 assert((!VT.isVector() ||
2897 VT.getVectorNumElements() ==
2898 Operand.getValueType().getVectorNumElements()) &&
2899 "Vector element count mismatch!");
2900 if (Operand.getOpcode() == ISD::UNDEF)
2901 return getUNDEF(VT);
2903 case ISD::SIGN_EXTEND:
2904 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2905 "Invalid SIGN_EXTEND!");
2906 if (Operand.getValueType() == VT) return Operand; // noop extension
2907 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2908 "Invalid sext node, dst < src!");
2909 assert((!VT.isVector() ||
2910 VT.getVectorNumElements() ==
2911 Operand.getValueType().getVectorNumElements()) &&
2912 "Vector element count mismatch!");
2913 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2914 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2915 else if (OpOpcode == ISD::UNDEF)
2916 // sext(undef) = 0, because the top bits will all be the same.
2917 return getConstant(0, VT);
2919 case ISD::ZERO_EXTEND:
2920 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2921 "Invalid ZERO_EXTEND!");
2922 if (Operand.getValueType() == VT) return Operand; // noop extension
2923 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2924 "Invalid zext node, dst < src!");
2925 assert((!VT.isVector() ||
2926 VT.getVectorNumElements() ==
2927 Operand.getValueType().getVectorNumElements()) &&
2928 "Vector element count mismatch!");
2929 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2930 return getNode(ISD::ZERO_EXTEND, DL, VT,
2931 Operand.getNode()->getOperand(0));
2932 else if (OpOpcode == ISD::UNDEF)
2933 // zext(undef) = 0, because the top bits will be zero.
2934 return getConstant(0, VT);
2936 case ISD::ANY_EXTEND:
2937 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2938 "Invalid ANY_EXTEND!");
2939 if (Operand.getValueType() == VT) return Operand; // noop extension
2940 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2941 "Invalid anyext node, dst < src!");
2942 assert((!VT.isVector() ||
2943 VT.getVectorNumElements() ==
2944 Operand.getValueType().getVectorNumElements()) &&
2945 "Vector element count mismatch!");
2947 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2948 OpOpcode == ISD::ANY_EXTEND)
2949 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2950 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2951 else if (OpOpcode == ISD::UNDEF)
2952 return getUNDEF(VT);
2954 // (ext (trunx x)) -> x
2955 if (OpOpcode == ISD::TRUNCATE) {
2956 SDValue OpOp = Operand.getNode()->getOperand(0);
2957 if (OpOp.getValueType() == VT)
2962 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2963 "Invalid TRUNCATE!");
2964 if (Operand.getValueType() == VT) return Operand; // noop truncate
2965 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2966 "Invalid truncate node, src < dst!");
2967 assert((!VT.isVector() ||
2968 VT.getVectorNumElements() ==
2969 Operand.getValueType().getVectorNumElements()) &&
2970 "Vector element count mismatch!");
2971 if (OpOpcode == ISD::TRUNCATE)
2972 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2973 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2974 OpOpcode == ISD::ANY_EXTEND) {
2975 // If the source is smaller than the dest, we still need an extend.
2976 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2977 .bitsLT(VT.getScalarType()))
2978 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2979 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2980 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2981 return Operand.getNode()->getOperand(0);
2983 if (OpOpcode == ISD::UNDEF)
2984 return getUNDEF(VT);
2987 // Basic sanity checking.
2988 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2989 && "Cannot BITCAST between types of different sizes!");
2990 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2991 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2992 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2993 if (OpOpcode == ISD::UNDEF)
2994 return getUNDEF(VT);
2996 case ISD::SCALAR_TO_VECTOR:
2997 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2998 (VT.getVectorElementType() == Operand.getValueType() ||
2999 (VT.getVectorElementType().isInteger() &&
3000 Operand.getValueType().isInteger() &&
3001 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3002 "Illegal SCALAR_TO_VECTOR node!");
3003 if (OpOpcode == ISD::UNDEF)
3004 return getUNDEF(VT);
3005 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3006 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3007 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3008 Operand.getConstantOperandVal(1) == 0 &&
3009 Operand.getOperand(0).getValueType() == VT)
3010 return Operand.getOperand(0);
3013 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3014 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3015 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3016 Operand.getNode()->getOperand(0));
3017 if (OpOpcode == ISD::FNEG) // --X -> X
3018 return Operand.getNode()->getOperand(0);
3021 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3022 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3027 SDVTList VTs = getVTList(VT);
3028 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3029 FoldingSetNodeID ID;
3030 SDValue Ops[1] = { Operand };
3031 AddNodeIDNode(ID, Opcode, VTs, Ops);
3033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3034 return SDValue(E, 0);
3036 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3037 DL.getDebugLoc(), VTs, Operand);
3038 CSEMap.InsertNode(N, IP);
3040 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3041 DL.getDebugLoc(), VTs, Operand);
3045 return SDValue(N, 0);
3048 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
3049 SDNode *Cst1, SDNode *Cst2) {
3050 // If the opcode is a target-specific ISD node, there's nothing we can
3051 // do here and the operand rules may not line up with the below, so
3053 if (Opcode >= ISD::BUILTIN_OP_END)
3056 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
3057 SmallVector<SDValue, 4> Outputs;
3058 EVT SVT = VT.getScalarType();
3060 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
3061 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
3062 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque()))
3065 if (Scalar1 && Scalar2)
3066 // Scalar instruction.
3067 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
3069 // For vectors extract each constant element into Inputs so we can constant
3070 // fold them individually.
3071 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3072 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3076 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3078 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3079 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3080 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3081 if (!V1 || !V2) // Not a constant, bail.
3084 if (V1->isOpaque() || V2->isOpaque())
3087 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3088 // FIXME: This is valid and could be handled by truncating the APInts.
3089 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3092 Inputs.push_back(std::make_pair(V1, V2));
3096 // We have a number of constant values, constant fold them element by element.
3097 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
3098 const APInt &C1 = Inputs[I].first->getAPIntValue();
3099 const APInt &C2 = Inputs[I].second->getAPIntValue();
3103 Outputs.push_back(getConstant(C1 + C2, SVT));
3106 Outputs.push_back(getConstant(C1 - C2, SVT));
3109 Outputs.push_back(getConstant(C1 * C2, SVT));
3112 if (!C2.getBoolValue())
3114 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
3117 if (!C2.getBoolValue())
3119 Outputs.push_back(getConstant(C1.urem(C2), SVT));
3122 if (!C2.getBoolValue())
3124 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
3127 if (!C2.getBoolValue())
3129 Outputs.push_back(getConstant(C1.srem(C2), SVT));
3132 Outputs.push_back(getConstant(C1 & C2, SVT));
3135 Outputs.push_back(getConstant(C1 | C2, SVT));
3138 Outputs.push_back(getConstant(C1 ^ C2, SVT));
3141 Outputs.push_back(getConstant(C1 << C2, SVT));
3144 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
3147 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
3150 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
3153 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
3160 assert((Scalar1 && Scalar2) || (VT.getVectorNumElements() == Outputs.size() &&
3161 "Expected a scalar or vector!"));
3163 // Handle the scalar case first.
3165 return Outputs.back();
3167 // We may have a vector type but a scalar result. Create a splat.
3168 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3170 // Build a big vector out of the scalar elements we generated.
3171 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3174 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3175 SDValue N2, bool nuw, bool nsw, bool exact) {
3176 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3177 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
3180 case ISD::TokenFactor:
3181 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3182 N2.getValueType() == MVT::Other && "Invalid token factor!");
3183 // Fold trivial token factors.
3184 if (N1.getOpcode() == ISD::EntryToken) return N2;
3185 if (N2.getOpcode() == ISD::EntryToken) return N1;
3186 if (N1 == N2) return N1;
3188 case ISD::CONCAT_VECTORS:
3189 // Concat of UNDEFs is UNDEF.
3190 if (N1.getOpcode() == ISD::UNDEF &&
3191 N2.getOpcode() == ISD::UNDEF)
3192 return getUNDEF(VT);
3194 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3195 // one big BUILD_VECTOR.
3196 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3197 N2.getOpcode() == ISD::BUILD_VECTOR) {
3198 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3199 N1.getNode()->op_end());
3200 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3201 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3205 assert(VT.isInteger() && "This operator does not apply to FP types!");
3206 assert(N1.getValueType() == N2.getValueType() &&
3207 N1.getValueType() == VT && "Binary operator types must match!");
3208 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3209 // worth handling here.
3210 if (N2C && N2C->isNullValue())
3212 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3219 assert(VT.isInteger() && "This operator does not apply to FP types!");
3220 assert(N1.getValueType() == N2.getValueType() &&
3221 N1.getValueType() == VT && "Binary operator types must match!");
3222 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3223 // it's worth handling here.
3224 if (N2C && N2C->isNullValue())
3234 assert(VT.isInteger() && "This operator does not apply to FP types!");
3235 assert(N1.getValueType() == N2.getValueType() &&
3236 N1.getValueType() == VT && "Binary operator types must match!");
3243 if (getTarget().Options.UnsafeFPMath) {
3244 if (Opcode == ISD::FADD) {
3246 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3247 if (CFP->getValueAPF().isZero())
3250 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3251 if (CFP->getValueAPF().isZero())
3253 } else if (Opcode == ISD::FSUB) {
3255 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3256 if (CFP->getValueAPF().isZero())
3258 } else if (Opcode == ISD::FMUL) {
3259 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3262 // If the first operand isn't the constant, try the second
3264 CFP = dyn_cast<ConstantFPSDNode>(N2);
3271 return SDValue(CFP,0);
3273 if (CFP->isExactlyValue(1.0))
3278 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3279 assert(N1.getValueType() == N2.getValueType() &&
3280 N1.getValueType() == VT && "Binary operator types must match!");
3282 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3283 assert(N1.getValueType() == VT &&
3284 N1.getValueType().isFloatingPoint() &&
3285 N2.getValueType().isFloatingPoint() &&
3286 "Invalid FCOPYSIGN!");
3293 assert(VT == N1.getValueType() &&
3294 "Shift operators return type must be the same as their first arg");
3295 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3296 "Shifts only work on integers");
3297 assert((!VT.isVector() || VT == N2.getValueType()) &&
3298 "Vector shift amounts must be in the same as their first arg");
3299 // Verify that the shift amount VT is bit enough to hold valid shift
3300 // amounts. This catches things like trying to shift an i1024 value by an
3301 // i8, which is easy to fall into in generic code that uses
3302 // TLI.getShiftAmount().
3303 assert(N2.getValueType().getSizeInBits() >=
3304 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3305 "Invalid use of small shift amount with oversized value!");
3307 // Always fold shifts of i1 values so the code generator doesn't need to
3308 // handle them. Since we know the size of the shift has to be less than the
3309 // size of the value, the shift/rotate count is guaranteed to be zero.
3312 if (N2C && N2C->isNullValue())
3315 case ISD::FP_ROUND_INREG: {
3316 EVT EVT = cast<VTSDNode>(N2)->getVT();
3317 assert(VT == N1.getValueType() && "Not an inreg round!");
3318 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3319 "Cannot FP_ROUND_INREG integer types");
3320 assert(EVT.isVector() == VT.isVector() &&
3321 "FP_ROUND_INREG type should be vector iff the operand "
3323 assert((!EVT.isVector() ||
3324 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3325 "Vector element counts must match in FP_ROUND_INREG");
3326 assert(EVT.bitsLE(VT) && "Not rounding down!");
3328 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3332 assert(VT.isFloatingPoint() &&
3333 N1.getValueType().isFloatingPoint() &&
3334 VT.bitsLE(N1.getValueType()) &&
3335 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3336 if (N1.getValueType() == VT) return N1; // noop conversion.
3338 case ISD::AssertSext:
3339 case ISD::AssertZext: {
3340 EVT EVT = cast<VTSDNode>(N2)->getVT();
3341 assert(VT == N1.getValueType() && "Not an inreg extend!");
3342 assert(VT.isInteger() && EVT.isInteger() &&
3343 "Cannot *_EXTEND_INREG FP types");
3344 assert(!EVT.isVector() &&
3345 "AssertSExt/AssertZExt type should be the vector element type "
3346 "rather than the vector type!");
3347 assert(EVT.bitsLE(VT) && "Not extending!");
3348 if (VT == EVT) return N1; // noop assertion.
3351 case ISD::SIGN_EXTEND_INREG: {
3352 EVT EVT = cast<VTSDNode>(N2)->getVT();
3353 assert(VT == N1.getValueType() && "Not an inreg extend!");
3354 assert(VT.isInteger() && EVT.isInteger() &&
3355 "Cannot *_EXTEND_INREG FP types");
3356 assert(EVT.isVector() == VT.isVector() &&
3357 "SIGN_EXTEND_INREG type should be vector iff the operand "
3359 assert((!EVT.isVector() ||
3360 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3361 "Vector element counts must match in SIGN_EXTEND_INREG");
3362 assert(EVT.bitsLE(VT) && "Not extending!");
3363 if (EVT == VT) return N1; // Not actually extending
3366 APInt Val = N1C->getAPIntValue();
3367 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3368 Val <<= Val.getBitWidth()-FromBits;
3369 Val = Val.ashr(Val.getBitWidth()-FromBits);
3370 return getConstant(Val, VT);
3374 case ISD::EXTRACT_VECTOR_ELT:
3375 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3376 if (N1.getOpcode() == ISD::UNDEF)
3377 return getUNDEF(VT);
3379 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3380 // expanding copies of large vectors from registers.
3382 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3383 N1.getNumOperands() > 0) {
3385 N1.getOperand(0).getValueType().getVectorNumElements();
3386 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3387 N1.getOperand(N2C->getZExtValue() / Factor),
3388 getConstant(N2C->getZExtValue() % Factor,
3389 N2.getValueType()));
3392 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3393 // expanding large vector constants.
3394 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3395 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3397 if (VT != Elt.getValueType())
3398 // If the vector element type is not legal, the BUILD_VECTOR operands
3399 // are promoted and implicitly truncated, and the result implicitly
3400 // extended. Make that explicit here.
3401 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3406 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3407 // operations are lowered to scalars.
3408 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3409 // If the indices are the same, return the inserted element else
3410 // if the indices are known different, extract the element from
3411 // the original vector.
3412 SDValue N1Op2 = N1.getOperand(2);
3413 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3415 if (N1Op2C && N2C) {
3416 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3417 if (VT == N1.getOperand(1).getValueType())
3418 return N1.getOperand(1);
3420 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3423 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3427 case ISD::EXTRACT_ELEMENT:
3428 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3429 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3430 (N1.getValueType().isInteger() == VT.isInteger()) &&
3431 N1.getValueType() != VT &&
3432 "Wrong types for EXTRACT_ELEMENT!");
3434 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3435 // 64-bit integers into 32-bit parts. Instead of building the extract of
3436 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3437 if (N1.getOpcode() == ISD::BUILD_PAIR)
3438 return N1.getOperand(N2C->getZExtValue());
3440 // EXTRACT_ELEMENT of a constant int is also very common.
3441 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3442 unsigned ElementSize = VT.getSizeInBits();
3443 unsigned Shift = ElementSize * N2C->getZExtValue();
3444 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3445 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3448 case ISD::EXTRACT_SUBVECTOR: {
3450 if (VT.isSimple() && N1.getValueType().isSimple()) {
3451 assert(VT.isVector() && N1.getValueType().isVector() &&
3452 "Extract subvector VTs must be a vectors!");
3453 assert(VT.getVectorElementType() ==
3454 N1.getValueType().getVectorElementType() &&
3455 "Extract subvector VTs must have the same element type!");
3456 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3457 "Extract subvector must be from larger vector to smaller vector!");
3459 if (isa<ConstantSDNode>(Index.getNode())) {
3460 assert((VT.getVectorNumElements() +
3461 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3462 <= N1.getValueType().getVectorNumElements())
3463 && "Extract subvector overflow!");
3466 // Trivial extraction.
3467 if (VT.getSimpleVT() == N1.getSimpleValueType())
3474 // Perform trivial constant folding.
3476 FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()))
3479 // Canonicalize constant to RHS if commutative.
3480 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3481 std::swap(N1C, N2C);
3485 // Constant fold FP operations.
3486 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3487 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3488 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3490 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3491 // Canonicalize constant to RHS if commutative.
3492 std::swap(N1CFP, N2CFP);
3495 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3496 APFloat::opStatus s;
3499 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3500 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3501 return getConstantFP(V1, VT);
3504 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3505 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3506 return getConstantFP(V1, VT);
3509 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3510 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3511 return getConstantFP(V1, VT);
3514 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3515 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3516 s!=APFloat::opDivByZero)) {
3517 return getConstantFP(V1, VT);
3521 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3522 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3523 s!=APFloat::opDivByZero)) {
3524 return getConstantFP(V1, VT);
3527 case ISD::FCOPYSIGN:
3529 return getConstantFP(V1, VT);
3534 if (Opcode == ISD::FP_ROUND) {
3535 APFloat V = N1CFP->getValueAPF(); // make copy
3537 // This can return overflow, underflow, or inexact; we don't care.
3538 // FIXME need to be more flexible about rounding mode.
3539 (void)V.convert(EVTToAPFloatSemantics(VT),
3540 APFloat::rmNearestTiesToEven, &ignored);
3541 return getConstantFP(V, VT);
3545 // Canonicalize an UNDEF to the RHS, even over a constant.
3546 if (N1.getOpcode() == ISD::UNDEF) {
3547 if (isCommutativeBinOp(Opcode)) {
3551 case ISD::FP_ROUND_INREG:
3552 case ISD::SIGN_EXTEND_INREG:
3558 return N1; // fold op(undef, arg2) -> undef
3566 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3567 // For vectors, we can't easily build an all zero vector, just return
3574 // Fold a bunch of operators when the RHS is undef.
3575 if (N2.getOpcode() == ISD::UNDEF) {
3578 if (N1.getOpcode() == ISD::UNDEF)
3579 // Handle undef ^ undef -> 0 special case. This is a common
3581 return getConstant(0, VT);
3591 return N2; // fold op(arg1, undef) -> undef
3597 if (getTarget().Options.UnsafeFPMath)
3605 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3606 // For vectors, we can't easily build an all zero vector, just return
3611 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3612 // For vectors, we can't easily build an all one vector, just return
3620 // Memoize this node if possible.
3622 SDVTList VTs = getVTList(VT);
3623 const bool BinOpHasFlags = isBinOpWithFlags(Opcode);
3624 if (VT != MVT::Glue) {
3625 SDValue Ops[] = {N1, N2};
3626 FoldingSetNodeID ID;
3627 AddNodeIDNode(ID, Opcode, VTs, Ops);
3629 AddBinaryNodeIDCustom(ID, Opcode, nuw, nsw, exact);
3631 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3632 return SDValue(E, 0);
3634 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3636 CSEMap.InsertNode(N, IP);
3638 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, nuw, nsw, exact);
3642 return SDValue(N, 0);
3645 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3646 SDValue N1, SDValue N2, SDValue N3) {
3647 // Perform various simplifications.
3648 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3651 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3652 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3653 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3654 if (N1CFP && N2CFP && N3CFP) {
3655 APFloat V1 = N1CFP->getValueAPF();
3656 const APFloat &V2 = N2CFP->getValueAPF();
3657 const APFloat &V3 = N3CFP->getValueAPF();
3658 APFloat::opStatus s =
3659 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3660 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3661 return getConstantFP(V1, VT);
3665 case ISD::CONCAT_VECTORS:
3666 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3667 // one big BUILD_VECTOR.
3668 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3669 N2.getOpcode() == ISD::BUILD_VECTOR &&
3670 N3.getOpcode() == ISD::BUILD_VECTOR) {
3671 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3672 N1.getNode()->op_end());
3673 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3674 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3675 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3679 // Use FoldSetCC to simplify SETCC's.
3680 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3681 if (Simp.getNode()) return Simp;
3686 if (N1C->getZExtValue())
3687 return N2; // select true, X, Y -> X
3688 return N3; // select false, X, Y -> Y
3691 if (N2 == N3) return N2; // select C, X, X -> X
3693 case ISD::VECTOR_SHUFFLE:
3694 llvm_unreachable("should use getVectorShuffle constructor!");
3695 case ISD::INSERT_SUBVECTOR: {
3697 if (VT.isSimple() && N1.getValueType().isSimple()
3698 && N2.getValueType().isSimple()) {
3699 assert(VT.isVector() && N1.getValueType().isVector() &&
3700 N2.getValueType().isVector() &&
3701 "Insert subvector VTs must be a vectors");
3702 assert(VT == N1.getValueType() &&
3703 "Dest and insert subvector source types must match!");
3704 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3705 "Insert subvector must be from smaller vector to larger vector!");
3706 if (isa<ConstantSDNode>(Index.getNode())) {
3707 assert((N2.getValueType().getVectorNumElements() +
3708 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3709 <= VT.getVectorNumElements())
3710 && "Insert subvector overflow!");
3713 // Trivial insertion.
3714 if (VT.getSimpleVT() == N2.getSimpleValueType())
3720 // Fold bit_convert nodes from a type to themselves.
3721 if (N1.getValueType() == VT)
3726 // Memoize node if it doesn't produce a flag.
3728 SDVTList VTs = getVTList(VT);
3729 if (VT != MVT::Glue) {
3730 SDValue Ops[] = { N1, N2, N3 };
3731 FoldingSetNodeID ID;
3732 AddNodeIDNode(ID, Opcode, VTs, Ops);
3734 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3735 return SDValue(E, 0);
3737 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3738 DL.getDebugLoc(), VTs, N1, N2, N3);
3739 CSEMap.InsertNode(N, IP);
3741 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3742 DL.getDebugLoc(), VTs, N1, N2, N3);
3746 return SDValue(N, 0);
3749 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3750 SDValue N1, SDValue N2, SDValue N3,
3752 SDValue Ops[] = { N1, N2, N3, N4 };
3753 return getNode(Opcode, DL, VT, Ops);
3756 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3757 SDValue N1, SDValue N2, SDValue N3,
3758 SDValue N4, SDValue N5) {
3759 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3760 return getNode(Opcode, DL, VT, Ops);
3763 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3764 /// the incoming stack arguments to be loaded from the stack.
3765 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3766 SmallVector<SDValue, 8> ArgChains;
3768 // Include the original chain at the beginning of the list. When this is
3769 // used by target LowerCall hooks, this helps legalize find the
3770 // CALLSEQ_BEGIN node.
3771 ArgChains.push_back(Chain);
3773 // Add a chain value for each stack argument.
3774 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3775 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3776 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3777 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3778 if (FI->getIndex() < 0)
3779 ArgChains.push_back(SDValue(L, 1));
3781 // Build a tokenfactor for all the chains.
3782 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3785 /// getMemsetValue - Vectorized representation of the memset value
3787 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3789 assert(Value.getOpcode() != ISD::UNDEF);
3791 unsigned NumBits = VT.getScalarType().getSizeInBits();
3792 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3793 assert(C->getAPIntValue().getBitWidth() == 8);
3794 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3796 return DAG.getConstant(Val, VT);
3797 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3800 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
3801 EVT IntVT = VT.getScalarType();
3802 if (!IntVT.isInteger())
3803 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
3805 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
3807 // Use a multiplication with 0x010101... to extend the input to the
3809 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3810 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
3811 DAG.getConstant(Magic, IntVT));
3814 if (VT != Value.getValueType() && !VT.isInteger())
3815 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
3816 if (VT != Value.getValueType()) {
3817 assert(VT.getVectorElementType() == Value.getValueType() &&
3818 "value type should be one vector element here");
3819 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
3820 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
3826 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3827 /// used when a memcpy is turned into a memset when the source is a constant
3829 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3830 const TargetLowering &TLI, StringRef Str) {
3831 // Handle vector with all elements zero.
3834 return DAG.getConstant(0, VT);
3835 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3836 return DAG.getConstantFP(0.0, VT);
3837 else if (VT.isVector()) {
3838 unsigned NumElts = VT.getVectorNumElements();
3839 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3840 return DAG.getNode(ISD::BITCAST, dl, VT,
3841 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3844 llvm_unreachable("Expected type!");
3847 assert(!VT.isVector() && "Can't handle vector type here!");
3848 unsigned NumVTBits = VT.getSizeInBits();
3849 unsigned NumVTBytes = NumVTBits / 8;
3850 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3852 APInt Val(NumVTBits, 0);
3853 if (TLI.isLittleEndian()) {
3854 for (unsigned i = 0; i != NumBytes; ++i)
3855 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3857 for (unsigned i = 0; i != NumBytes; ++i)
3858 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3861 // If the "cost" of materializing the integer immediate is less than the cost
3862 // of a load, then it is cost effective to turn the load into the immediate.
3863 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
3864 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
3865 return DAG.getConstant(Val, VT);
3866 return SDValue(nullptr, 0);
3869 /// getMemBasePlusOffset - Returns base and offset node for the
3871 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3872 SelectionDAG &DAG) {
3873 EVT VT = Base.getValueType();
3874 return DAG.getNode(ISD::ADD, dl,
3875 VT, Base, DAG.getConstant(Offset, VT));
3878 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3880 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3881 unsigned SrcDelta = 0;
3882 GlobalAddressSDNode *G = nullptr;
3883 if (Src.getOpcode() == ISD::GlobalAddress)
3884 G = cast<GlobalAddressSDNode>(Src);
3885 else if (Src.getOpcode() == ISD::ADD &&
3886 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3887 Src.getOperand(1).getOpcode() == ISD::Constant) {
3888 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3889 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3894 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3897 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3898 /// to replace the memset / memcpy. Return true if the number of memory ops
3899 /// is below the threshold. It returns the types of the sequence of
3900 /// memory ops to perform memset / memcpy by reference.
3901 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3902 unsigned Limit, uint64_t Size,
3903 unsigned DstAlign, unsigned SrcAlign,
3909 const TargetLowering &TLI) {
3910 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3911 "Expecting memcpy / memset source to meet alignment requirement!");
3912 // If 'SrcAlign' is zero, that means the memory operation does not need to
3913 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3914 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3915 // is the specified alignment of the memory operation. If it is zero, that
3916 // means it's possible to change the alignment of the destination.
3917 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3918 // not need to be loaded.
3919 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3920 IsMemset, ZeroMemset, MemcpyStrSrc,
3921 DAG.getMachineFunction());
3923 if (VT == MVT::Other) {
3925 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3926 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3927 VT = TLI.getPointerTy();
3929 switch (DstAlign & 7) {
3930 case 0: VT = MVT::i64; break;
3931 case 4: VT = MVT::i32; break;
3932 case 2: VT = MVT::i16; break;
3933 default: VT = MVT::i8; break;
3938 while (!TLI.isTypeLegal(LVT))
3939 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3940 assert(LVT.isInteger());
3946 unsigned NumMemOps = 0;
3948 unsigned VTSize = VT.getSizeInBits() / 8;
3949 while (VTSize > Size) {
3950 // For now, only use non-vector load / store's for the left-over pieces.
3955 if (VT.isVector() || VT.isFloatingPoint()) {
3956 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3957 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3958 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3960 else if (NewVT == MVT::i64 &&
3961 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3962 TLI.isSafeMemOpType(MVT::f64)) {
3963 // i64 is usually not legal on 32-bit targets, but f64 may be.
3971 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3972 if (NewVT == MVT::i8)
3974 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3976 NewVTSize = NewVT.getSizeInBits() / 8;
3978 // If the new VT cannot cover all of the remaining bits, then consider
3979 // issuing a (or a pair of) unaligned and overlapping load / store.
3980 // FIXME: Only does this for 64-bit or more since we don't have proper
3981 // cost model for unaligned load / store.
3984 if (NumMemOps && AllowOverlap &&
3985 VTSize >= 8 && NewVTSize < Size &&
3986 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3994 if (++NumMemOps > Limit)
3997 MemOps.push_back(VT);
4004 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4005 SDValue Chain, SDValue Dst,
4006 SDValue Src, uint64_t Size,
4007 unsigned Align, bool isVol,
4009 MachinePointerInfo DstPtrInfo,
4010 MachinePointerInfo SrcPtrInfo) {
4011 // Turn a memcpy of undef to nop.
4012 if (Src.getOpcode() == ISD::UNDEF)
4015 // Expand memcpy to a series of load and store ops if the size operand falls
4016 // below a certain threshold.
4017 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4018 // rather than maybe a humongous number of loads and stores.
4019 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4020 std::vector<EVT> MemOps;
4021 bool DstAlignCanChange = false;
4022 MachineFunction &MF = DAG.getMachineFunction();
4023 MachineFrameInfo *MFI = MF.getFrameInfo();
4024 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4025 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4026 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4027 DstAlignCanChange = true;
4028 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4029 if (Align > SrcAlign)
4032 bool CopyFromStr = isMemSrcFromString(Src, Str);
4033 bool isZeroStr = CopyFromStr && Str.empty();
4034 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4036 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4037 (DstAlignCanChange ? 0 : Align),
4038 (isZeroStr ? 0 : SrcAlign),
4039 false, false, CopyFromStr, true, DAG, TLI))
4042 if (DstAlignCanChange) {
4043 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4044 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4046 // Don't promote to an alignment that would require dynamic stack
4048 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4049 if (!TRI->needsStackRealignment(MF))
4050 while (NewAlign > Align &&
4051 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
4054 if (NewAlign > Align) {
4055 // Give the stack frame object a larger alignment if needed.
4056 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4057 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4062 SmallVector<SDValue, 8> OutChains;
4063 unsigned NumMemOps = MemOps.size();
4064 uint64_t SrcOff = 0, DstOff = 0;
4065 for (unsigned i = 0; i != NumMemOps; ++i) {
4067 unsigned VTSize = VT.getSizeInBits() / 8;
4068 SDValue Value, Store;
4070 if (VTSize > Size) {
4071 // Issuing an unaligned load / store pair that overlaps with the previous
4072 // pair. Adjust the offset accordingly.
4073 assert(i == NumMemOps-1 && i != 0);
4074 SrcOff -= VTSize - Size;
4075 DstOff -= VTSize - Size;
4079 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4080 // It's unlikely a store of a vector immediate can be done in a single
4081 // instruction. It would require a load from a constantpool first.
4082 // We only handle zero vectors here.
4083 // FIXME: Handle other cases where store of vector immediate is done in
4084 // a single instruction.
4085 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4086 if (Value.getNode())
4087 Store = DAG.getStore(Chain, dl, Value,
4088 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4089 DstPtrInfo.getWithOffset(DstOff), isVol,
4093 if (!Store.getNode()) {
4094 // The type might not be legal for the target. This should only happen
4095 // if the type is smaller than a legal type, as on PPC, so the right
4096 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4097 // to Load/Store if NVT==VT.
4098 // FIXME does the case above also need this?
4099 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4100 assert(NVT.bitsGE(VT));
4101 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4102 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4103 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4104 false, MinAlign(SrcAlign, SrcOff));
4105 Store = DAG.getTruncStore(Chain, dl, Value,
4106 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4107 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4110 OutChains.push_back(Store);
4116 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4119 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4120 SDValue Chain, SDValue Dst,
4121 SDValue Src, uint64_t Size,
4122 unsigned Align, bool isVol,
4124 MachinePointerInfo DstPtrInfo,
4125 MachinePointerInfo SrcPtrInfo) {
4126 // Turn a memmove of undef to nop.
4127 if (Src.getOpcode() == ISD::UNDEF)
4130 // Expand memmove to a series of load and store ops if the size operand falls
4131 // below a certain threshold.
4132 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4133 std::vector<EVT> MemOps;
4134 bool DstAlignCanChange = false;
4135 MachineFunction &MF = DAG.getMachineFunction();
4136 MachineFrameInfo *MFI = MF.getFrameInfo();
4137 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4138 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4139 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4140 DstAlignCanChange = true;
4141 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4142 if (Align > SrcAlign)
4144 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4146 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4147 (DstAlignCanChange ? 0 : Align), SrcAlign,
4148 false, false, false, false, DAG, TLI))
4151 if (DstAlignCanChange) {
4152 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4153 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4154 if (NewAlign > Align) {
4155 // Give the stack frame object a larger alignment if needed.
4156 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4157 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4162 uint64_t SrcOff = 0, DstOff = 0;
4163 SmallVector<SDValue, 8> LoadValues;
4164 SmallVector<SDValue, 8> LoadChains;
4165 SmallVector<SDValue, 8> OutChains;
4166 unsigned NumMemOps = MemOps.size();
4167 for (unsigned i = 0; i < NumMemOps; i++) {
4169 unsigned VTSize = VT.getSizeInBits() / 8;
4172 Value = DAG.getLoad(VT, dl, Chain,
4173 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4174 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4175 false, false, SrcAlign);
4176 LoadValues.push_back(Value);
4177 LoadChains.push_back(Value.getValue(1));
4180 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4182 for (unsigned i = 0; i < NumMemOps; i++) {
4184 unsigned VTSize = VT.getSizeInBits() / 8;
4187 Store = DAG.getStore(Chain, dl, LoadValues[i],
4188 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4189 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4190 OutChains.push_back(Store);
4194 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4197 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4200 /// \param DAG Selection DAG where lowered code is placed.
4201 /// \param dl Link to corresponding IR location.
4202 /// \param Chain Control flow dependency.
4203 /// \param Dst Pointer to destination memory location.
4204 /// \param Src Value of byte to write into the memory.
4205 /// \param Size Number of bytes to write.
4206 /// \param Align Alignment of the destination in bytes.
4207 /// \param isVol True if destination is volatile.
4208 /// \param DstPtrInfo IR information on the memory pointer.
4209 /// \returns New head in the control flow, if lowering was successful, empty
4210 /// SDValue otherwise.
4212 /// The function tries to replace 'llvm.memset' intrinsic with several store
4213 /// operations and value calculation code. This is usually profitable for small
4215 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4216 SDValue Chain, SDValue Dst,
4217 SDValue Src, uint64_t Size,
4218 unsigned Align, bool isVol,
4219 MachinePointerInfo DstPtrInfo) {
4220 // Turn a memset of undef to nop.
4221 if (Src.getOpcode() == ISD::UNDEF)
4224 // Expand memset to a series of load/store ops if the size operand
4225 // falls below a certain threshold.
4226 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4227 std::vector<EVT> MemOps;
4228 bool DstAlignCanChange = false;
4229 MachineFunction &MF = DAG.getMachineFunction();
4230 MachineFrameInfo *MFI = MF.getFrameInfo();
4231 bool OptSize = MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize);
4232 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4233 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4234 DstAlignCanChange = true;
4236 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4237 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4238 Size, (DstAlignCanChange ? 0 : Align), 0,
4239 true, IsZeroVal, false, true, DAG, TLI))
4242 if (DstAlignCanChange) {
4243 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4244 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
4245 if (NewAlign > Align) {
4246 // Give the stack frame object a larger alignment if needed.
4247 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4248 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4253 SmallVector<SDValue, 8> OutChains;
4254 uint64_t DstOff = 0;
4255 unsigned NumMemOps = MemOps.size();
4257 // Find the largest store and generate the bit pattern for it.
4258 EVT LargestVT = MemOps[0];
4259 for (unsigned i = 1; i < NumMemOps; i++)
4260 if (MemOps[i].bitsGT(LargestVT))
4261 LargestVT = MemOps[i];
4262 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4264 for (unsigned i = 0; i < NumMemOps; i++) {
4266 unsigned VTSize = VT.getSizeInBits() / 8;
4267 if (VTSize > Size) {
4268 // Issuing an unaligned load / store pair that overlaps with the previous
4269 // pair. Adjust the offset accordingly.
4270 assert(i == NumMemOps-1 && i != 0);
4271 DstOff -= VTSize - Size;
4274 // If this store is smaller than the largest store see whether we can get
4275 // the smaller value for free with a truncate.
4276 SDValue Value = MemSetValue;
4277 if (VT.bitsLT(LargestVT)) {
4278 if (!LargestVT.isVector() && !VT.isVector() &&
4279 TLI.isTruncateFree(LargestVT, VT))
4280 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4282 Value = getMemsetValue(Src, VT, DAG, dl);
4284 assert(Value.getValueType() == VT && "Value with wrong type.");
4285 SDValue Store = DAG.getStore(Chain, dl, Value,
4286 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4287 DstPtrInfo.getWithOffset(DstOff),
4288 isVol, false, Align);
4289 OutChains.push_back(Store);
4290 DstOff += VT.getSizeInBits() / 8;
4294 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4297 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4298 SDValue Src, SDValue Size,
4299 unsigned Align, bool isVol, bool AlwaysInline,
4300 bool isTailCall, MachinePointerInfo DstPtrInfo,
4301 MachinePointerInfo SrcPtrInfo) {
4302 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4304 // Check to see if we should lower the memcpy to loads and stores first.
4305 // For cases within the target-specified limits, this is the best choice.
4306 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4308 // Memcpy with size zero? Just return the original chain.
4309 if (ConstantSize->isNullValue())
4312 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4313 ConstantSize->getZExtValue(),Align,
4314 isVol, false, DstPtrInfo, SrcPtrInfo);
4315 if (Result.getNode())
4319 // Then check to see if we should lower the memcpy with target-specific
4320 // code. If the target chooses to do this, this is the next best.
4322 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4323 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4324 DstPtrInfo, SrcPtrInfo);
4325 if (Result.getNode())
4329 // If we really need inline code and the target declined to provide it,
4330 // use a (potentially long) sequence of loads and stores.
4332 assert(ConstantSize && "AlwaysInline requires a constant size!");
4333 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4334 ConstantSize->getZExtValue(), Align, isVol,
4335 true, DstPtrInfo, SrcPtrInfo);
4338 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4339 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4340 // respect volatile, so they may do things like read or write memory
4341 // beyond the given memory regions. But fixing this isn't easy, and most
4342 // people don't care.
4344 // Emit a library call.
4345 TargetLowering::ArgListTy Args;
4346 TargetLowering::ArgListEntry Entry;
4347 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4348 Entry.Node = Dst; Args.push_back(Entry);
4349 Entry.Node = Src; Args.push_back(Entry);
4350 Entry.Node = Size; Args.push_back(Entry);
4351 // FIXME: pass in SDLoc
4352 TargetLowering::CallLoweringInfo CLI(*this);
4353 CLI.setDebugLoc(dl).setChain(Chain)
4354 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4355 Type::getVoidTy(*getContext()),
4356 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4357 TLI->getPointerTy()), std::move(Args), 0)
4359 .setTailCall(isTailCall);
4361 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4362 return CallResult.second;
4365 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4366 SDValue Src, SDValue Size,
4367 unsigned Align, bool isVol, bool isTailCall,
4368 MachinePointerInfo DstPtrInfo,
4369 MachinePointerInfo SrcPtrInfo) {
4370 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4372 // Check to see if we should lower the memmove to loads and stores first.
4373 // For cases within the target-specified limits, this is the best choice.
4374 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4376 // Memmove with size zero? Just return the original chain.
4377 if (ConstantSize->isNullValue())
4381 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4382 ConstantSize->getZExtValue(), Align, isVol,
4383 false, DstPtrInfo, SrcPtrInfo);
4384 if (Result.getNode())
4388 // Then check to see if we should lower the memmove with target-specific
4389 // code. If the target chooses to do this, this is the next best.
4391 SDValue Result = TSI->EmitTargetCodeForMemmove(
4392 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4393 if (Result.getNode())
4397 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4398 // not be safe. See memcpy above for more details.
4400 // Emit a library call.
4401 TargetLowering::ArgListTy Args;
4402 TargetLowering::ArgListEntry Entry;
4403 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4404 Entry.Node = Dst; Args.push_back(Entry);
4405 Entry.Node = Src; Args.push_back(Entry);
4406 Entry.Node = Size; Args.push_back(Entry);
4407 // FIXME: pass in SDLoc
4408 TargetLowering::CallLoweringInfo CLI(*this);
4409 CLI.setDebugLoc(dl).setChain(Chain)
4410 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4411 Type::getVoidTy(*getContext()),
4412 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4413 TLI->getPointerTy()), std::move(Args), 0)
4415 .setTailCall(isTailCall);
4417 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4418 return CallResult.second;
4421 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4422 SDValue Src, SDValue Size,
4423 unsigned Align, bool isVol, bool isTailCall,
4424 MachinePointerInfo DstPtrInfo) {
4425 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4427 // Check to see if we should lower the memset to stores first.
4428 // For cases within the target-specified limits, this is the best choice.
4429 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4431 // Memset with size zero? Just return the original chain.
4432 if (ConstantSize->isNullValue())
4436 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4437 Align, isVol, DstPtrInfo);
4439 if (Result.getNode())
4443 // Then check to see if we should lower the memset with target-specific
4444 // code. If the target chooses to do this, this is the next best.
4446 SDValue Result = TSI->EmitTargetCodeForMemset(
4447 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4448 if (Result.getNode())
4452 // Emit a library call.
4453 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4454 TargetLowering::ArgListTy Args;
4455 TargetLowering::ArgListEntry Entry;
4456 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4457 Args.push_back(Entry);
4459 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4460 Args.push_back(Entry);
4462 Entry.Ty = IntPtrTy;
4463 Args.push_back(Entry);
4465 // FIXME: pass in SDLoc
4466 TargetLowering::CallLoweringInfo CLI(*this);
4467 CLI.setDebugLoc(dl).setChain(Chain)
4468 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4469 Type::getVoidTy(*getContext()),
4470 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4471 TLI->getPointerTy()), std::move(Args), 0)
4473 .setTailCall(isTailCall);
4475 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4476 return CallResult.second;
4479 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4480 SDVTList VTList, ArrayRef<SDValue> Ops,
4481 MachineMemOperand *MMO,
4482 AtomicOrdering SuccessOrdering,
4483 AtomicOrdering FailureOrdering,
4484 SynchronizationScope SynchScope) {
4485 FoldingSetNodeID ID;
4486 ID.AddInteger(MemVT.getRawBits());
4487 AddNodeIDNode(ID, Opcode, VTList, Ops);
4488 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4490 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4491 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4492 return SDValue(E, 0);
4495 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4496 // SDNode doesn't have access to it. This memory will be "leaked" when
4497 // the node is deallocated, but recovered when the allocator is released.
4498 // If the number of operands is less than 5 we use AtomicSDNode's internal
4500 unsigned NumOps = Ops.size();
4501 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4504 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4505 dl.getDebugLoc(), VTList, MemVT,
4506 Ops.data(), DynOps, NumOps, MMO,
4507 SuccessOrdering, FailureOrdering,
4509 CSEMap.InsertNode(N, IP);
4511 return SDValue(N, 0);
4514 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4515 SDVTList VTList, ArrayRef<SDValue> Ops,
4516 MachineMemOperand *MMO,
4517 AtomicOrdering Ordering,
4518 SynchronizationScope SynchScope) {
4519 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4520 Ordering, SynchScope);
4523 SDValue SelectionDAG::getAtomicCmpSwap(
4524 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4525 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4526 unsigned Alignment, AtomicOrdering SuccessOrdering,
4527 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4528 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4529 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4530 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4532 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4533 Alignment = getEVTAlignment(MemVT);
4535 MachineFunction &MF = getMachineFunction();
4537 // FIXME: Volatile isn't really correct; we should keep track of atomic
4538 // orderings in the memoperand.
4539 unsigned Flags = MachineMemOperand::MOVolatile;
4540 Flags |= MachineMemOperand::MOLoad;
4541 Flags |= MachineMemOperand::MOStore;
4543 MachineMemOperand *MMO =
4544 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4546 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4547 SuccessOrdering, FailureOrdering, SynchScope);
4550 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4551 SDVTList VTs, SDValue Chain, SDValue Ptr,
4552 SDValue Cmp, SDValue Swp,
4553 MachineMemOperand *MMO,
4554 AtomicOrdering SuccessOrdering,
4555 AtomicOrdering FailureOrdering,
4556 SynchronizationScope SynchScope) {
4557 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4558 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4559 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4561 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4562 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4563 SuccessOrdering, FailureOrdering, SynchScope);
4566 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4568 SDValue Ptr, SDValue Val,
4569 const Value* PtrVal,
4571 AtomicOrdering Ordering,
4572 SynchronizationScope SynchScope) {
4573 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4574 Alignment = getEVTAlignment(MemVT);
4576 MachineFunction &MF = getMachineFunction();
4577 // An atomic store does not load. An atomic load does not store.
4578 // (An atomicrmw obviously both loads and stores.)
4579 // For now, atomics are considered to be volatile always, and they are
4581 // FIXME: Volatile isn't really correct; we should keep track of atomic
4582 // orderings in the memoperand.
4583 unsigned Flags = MachineMemOperand::MOVolatile;
4584 if (Opcode != ISD::ATOMIC_STORE)
4585 Flags |= MachineMemOperand::MOLoad;
4586 if (Opcode != ISD::ATOMIC_LOAD)
4587 Flags |= MachineMemOperand::MOStore;
4589 MachineMemOperand *MMO =
4590 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4591 MemVT.getStoreSize(), Alignment);
4593 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4594 Ordering, SynchScope);
4597 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4599 SDValue Ptr, SDValue Val,
4600 MachineMemOperand *MMO,
4601 AtomicOrdering Ordering,
4602 SynchronizationScope SynchScope) {
4603 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4604 Opcode == ISD::ATOMIC_LOAD_SUB ||
4605 Opcode == ISD::ATOMIC_LOAD_AND ||
4606 Opcode == ISD::ATOMIC_LOAD_OR ||
4607 Opcode == ISD::ATOMIC_LOAD_XOR ||
4608 Opcode == ISD::ATOMIC_LOAD_NAND ||
4609 Opcode == ISD::ATOMIC_LOAD_MIN ||
4610 Opcode == ISD::ATOMIC_LOAD_MAX ||
4611 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4612 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4613 Opcode == ISD::ATOMIC_SWAP ||
4614 Opcode == ISD::ATOMIC_STORE) &&
4615 "Invalid Atomic Op");
4617 EVT VT = Val.getValueType();
4619 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4620 getVTList(VT, MVT::Other);
4621 SDValue Ops[] = {Chain, Ptr, Val};
4622 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4625 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4626 EVT VT, SDValue Chain,
4628 MachineMemOperand *MMO,
4629 AtomicOrdering Ordering,
4630 SynchronizationScope SynchScope) {
4631 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4633 SDVTList VTs = getVTList(VT, MVT::Other);
4634 SDValue Ops[] = {Chain, Ptr};
4635 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4638 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4639 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4640 if (Ops.size() == 1)
4643 SmallVector<EVT, 4> VTs;
4644 VTs.reserve(Ops.size());
4645 for (unsigned i = 0; i < Ops.size(); ++i)
4646 VTs.push_back(Ops[i].getValueType());
4647 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4651 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4652 ArrayRef<SDValue> Ops,
4653 EVT MemVT, MachinePointerInfo PtrInfo,
4654 unsigned Align, bool Vol,
4655 bool ReadMem, bool WriteMem, unsigned Size) {
4656 if (Align == 0) // Ensure that codegen never sees alignment 0
4657 Align = getEVTAlignment(MemVT);
4659 MachineFunction &MF = getMachineFunction();
4662 Flags |= MachineMemOperand::MOStore;
4664 Flags |= MachineMemOperand::MOLoad;
4666 Flags |= MachineMemOperand::MOVolatile;
4668 Size = MemVT.getStoreSize();
4669 MachineMemOperand *MMO =
4670 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4672 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4676 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4677 ArrayRef<SDValue> Ops, EVT MemVT,
4678 MachineMemOperand *MMO) {
4679 assert((Opcode == ISD::INTRINSIC_VOID ||
4680 Opcode == ISD::INTRINSIC_W_CHAIN ||
4681 Opcode == ISD::PREFETCH ||
4682 Opcode == ISD::LIFETIME_START ||
4683 Opcode == ISD::LIFETIME_END ||
4684 (Opcode <= INT_MAX &&
4685 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4686 "Opcode is not a memory-accessing opcode!");
4688 // Memoize the node unless it returns a flag.
4689 MemIntrinsicSDNode *N;
4690 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4691 FoldingSetNodeID ID;
4692 AddNodeIDNode(ID, Opcode, VTList, Ops);
4693 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4695 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4696 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4697 return SDValue(E, 0);
4700 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4701 dl.getDebugLoc(), VTList, Ops,
4703 CSEMap.InsertNode(N, IP);
4705 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4706 dl.getDebugLoc(), VTList, Ops,
4710 return SDValue(N, 0);
4713 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4714 /// MachinePointerInfo record from it. This is particularly useful because the
4715 /// code generator has many cases where it doesn't bother passing in a
4716 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4717 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4718 // If this is FI+Offset, we can model it.
4719 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4720 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4722 // If this is (FI+Offset1)+Offset2, we can model it.
4723 if (Ptr.getOpcode() != ISD::ADD ||
4724 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4725 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4726 return MachinePointerInfo();
4728 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4729 return MachinePointerInfo::getFixedStack(FI, Offset+
4730 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4733 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4734 /// MachinePointerInfo record from it. This is particularly useful because the
4735 /// code generator has many cases where it doesn't bother passing in a
4736 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4737 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4738 // If the 'Offset' value isn't a constant, we can't handle this.
4739 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4740 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4741 if (OffsetOp.getOpcode() == ISD::UNDEF)
4742 return InferPointerInfo(Ptr);
4743 return MachinePointerInfo();
4748 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4749 EVT VT, SDLoc dl, SDValue Chain,
4750 SDValue Ptr, SDValue Offset,
4751 MachinePointerInfo PtrInfo, EVT MemVT,
4752 bool isVolatile, bool isNonTemporal, bool isInvariant,
4753 unsigned Alignment, const AAMDNodes &AAInfo,
4754 const MDNode *Ranges) {
4755 assert(Chain.getValueType() == MVT::Other &&
4756 "Invalid chain type");
4757 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4758 Alignment = getEVTAlignment(VT);
4760 unsigned Flags = MachineMemOperand::MOLoad;
4762 Flags |= MachineMemOperand::MOVolatile;
4764 Flags |= MachineMemOperand::MONonTemporal;
4766 Flags |= MachineMemOperand::MOInvariant;
4768 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4770 if (PtrInfo.V.isNull())
4771 PtrInfo = InferPointerInfo(Ptr, Offset);
4773 MachineFunction &MF = getMachineFunction();
4774 MachineMemOperand *MMO =
4775 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4777 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4781 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4782 EVT VT, SDLoc dl, SDValue Chain,
4783 SDValue Ptr, SDValue Offset, EVT MemVT,
4784 MachineMemOperand *MMO) {
4786 ExtType = ISD::NON_EXTLOAD;
4787 } else if (ExtType == ISD::NON_EXTLOAD) {
4788 assert(VT == MemVT && "Non-extending load from different memory type!");
4791 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4792 "Should only be an extending load, not truncating!");
4793 assert(VT.isInteger() == MemVT.isInteger() &&
4794 "Cannot convert from FP to Int or Int -> FP!");
4795 assert(VT.isVector() == MemVT.isVector() &&
4796 "Cannot use an ext load to convert to or from a vector!");
4797 assert((!VT.isVector() ||
4798 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4799 "Cannot use an ext load to change the number of vector elements!");
4802 bool Indexed = AM != ISD::UNINDEXED;
4803 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4804 "Unindexed load with an offset!");
4806 SDVTList VTs = Indexed ?
4807 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4808 SDValue Ops[] = { Chain, Ptr, Offset };
4809 FoldingSetNodeID ID;
4810 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4811 ID.AddInteger(MemVT.getRawBits());
4812 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4813 MMO->isNonTemporal(),
4814 MMO->isInvariant()));
4815 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4817 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4818 cast<LoadSDNode>(E)->refineAlignment(MMO);
4819 return SDValue(E, 0);
4821 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4822 dl.getDebugLoc(), VTs, AM, ExtType,
4824 CSEMap.InsertNode(N, IP);
4826 return SDValue(N, 0);
4829 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4830 SDValue Chain, SDValue Ptr,
4831 MachinePointerInfo PtrInfo,
4832 bool isVolatile, bool isNonTemporal,
4833 bool isInvariant, unsigned Alignment,
4834 const AAMDNodes &AAInfo,
4835 const MDNode *Ranges) {
4836 SDValue Undef = getUNDEF(Ptr.getValueType());
4837 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4838 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4842 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4843 SDValue Chain, SDValue Ptr,
4844 MachineMemOperand *MMO) {
4845 SDValue Undef = getUNDEF(Ptr.getValueType());
4846 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4850 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4851 SDValue Chain, SDValue Ptr,
4852 MachinePointerInfo PtrInfo, EVT MemVT,
4853 bool isVolatile, bool isNonTemporal,
4854 bool isInvariant, unsigned Alignment,
4855 const AAMDNodes &AAInfo) {
4856 SDValue Undef = getUNDEF(Ptr.getValueType());
4857 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4858 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
4863 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4864 SDValue Chain, SDValue Ptr, EVT MemVT,
4865 MachineMemOperand *MMO) {
4866 SDValue Undef = getUNDEF(Ptr.getValueType());
4867 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4872 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4873 SDValue Offset, ISD::MemIndexedMode AM) {
4874 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4875 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4876 "Load is already a indexed load!");
4877 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4878 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4879 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4880 false, LD->getAlignment());
4883 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4884 SDValue Ptr, MachinePointerInfo PtrInfo,
4885 bool isVolatile, bool isNonTemporal,
4886 unsigned Alignment, const AAMDNodes &AAInfo) {
4887 assert(Chain.getValueType() == MVT::Other &&
4888 "Invalid chain type");
4889 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4890 Alignment = getEVTAlignment(Val.getValueType());
4892 unsigned Flags = MachineMemOperand::MOStore;
4894 Flags |= MachineMemOperand::MOVolatile;
4896 Flags |= MachineMemOperand::MONonTemporal;
4898 if (PtrInfo.V.isNull())
4899 PtrInfo = InferPointerInfo(Ptr);
4901 MachineFunction &MF = getMachineFunction();
4902 MachineMemOperand *MMO =
4903 MF.getMachineMemOperand(PtrInfo, Flags,
4904 Val.getValueType().getStoreSize(), Alignment,
4907 return getStore(Chain, dl, Val, Ptr, MMO);
4910 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4911 SDValue Ptr, MachineMemOperand *MMO) {
4912 assert(Chain.getValueType() == MVT::Other &&
4913 "Invalid chain type");
4914 EVT VT = Val.getValueType();
4915 SDVTList VTs = getVTList(MVT::Other);
4916 SDValue Undef = getUNDEF(Ptr.getValueType());
4917 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4918 FoldingSetNodeID ID;
4919 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4920 ID.AddInteger(VT.getRawBits());
4921 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4922 MMO->isNonTemporal(), MMO->isInvariant()));
4923 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4925 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4926 cast<StoreSDNode>(E)->refineAlignment(MMO);
4927 return SDValue(E, 0);
4929 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4930 dl.getDebugLoc(), VTs,
4931 ISD::UNINDEXED, false, VT, MMO);
4932 CSEMap.InsertNode(N, IP);
4934 return SDValue(N, 0);
4937 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4938 SDValue Ptr, MachinePointerInfo PtrInfo,
4939 EVT SVT,bool isVolatile, bool isNonTemporal,
4941 const AAMDNodes &AAInfo) {
4942 assert(Chain.getValueType() == MVT::Other &&
4943 "Invalid chain type");
4944 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4945 Alignment = getEVTAlignment(SVT);
4947 unsigned Flags = MachineMemOperand::MOStore;
4949 Flags |= MachineMemOperand::MOVolatile;
4951 Flags |= MachineMemOperand::MONonTemporal;
4953 if (PtrInfo.V.isNull())
4954 PtrInfo = InferPointerInfo(Ptr);
4956 MachineFunction &MF = getMachineFunction();
4957 MachineMemOperand *MMO =
4958 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4961 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4964 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4965 SDValue Ptr, EVT SVT,
4966 MachineMemOperand *MMO) {
4967 EVT VT = Val.getValueType();
4969 assert(Chain.getValueType() == MVT::Other &&
4970 "Invalid chain type");
4972 return getStore(Chain, dl, Val, Ptr, MMO);
4974 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4975 "Should only be a truncating store, not extending!");
4976 assert(VT.isInteger() == SVT.isInteger() &&
4977 "Can't do FP-INT conversion!");
4978 assert(VT.isVector() == SVT.isVector() &&
4979 "Cannot use trunc store to convert to or from a vector!");
4980 assert((!VT.isVector() ||
4981 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4982 "Cannot use trunc store to change the number of vector elements!");
4984 SDVTList VTs = getVTList(MVT::Other);
4985 SDValue Undef = getUNDEF(Ptr.getValueType());
4986 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4987 FoldingSetNodeID ID;
4988 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
4989 ID.AddInteger(SVT.getRawBits());
4990 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4991 MMO->isNonTemporal(), MMO->isInvariant()));
4992 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4994 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4995 cast<StoreSDNode>(E)->refineAlignment(MMO);
4996 return SDValue(E, 0);
4998 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4999 dl.getDebugLoc(), VTs,
5000 ISD::UNINDEXED, true, SVT, MMO);
5001 CSEMap.InsertNode(N, IP);
5003 return SDValue(N, 0);
5007 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5008 SDValue Offset, ISD::MemIndexedMode AM) {
5009 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5010 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5011 "Store is already a indexed store!");
5012 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5013 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5014 FoldingSetNodeID ID;
5015 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5016 ID.AddInteger(ST->getMemoryVT().getRawBits());
5017 ID.AddInteger(ST->getRawSubclassData());
5018 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5021 return SDValue(E, 0);
5023 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5024 dl.getDebugLoc(), VTs, AM,
5025 ST->isTruncatingStore(),
5027 ST->getMemOperand());
5028 CSEMap.InsertNode(N, IP);
5030 return SDValue(N, 0);
5034 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5035 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5036 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5038 SDVTList VTs = getVTList(VT, MVT::Other);
5039 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5040 FoldingSetNodeID ID;
5041 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5042 ID.AddInteger(VT.getRawBits());
5043 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5045 MMO->isNonTemporal(),
5046 MMO->isInvariant()));
5047 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5050 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5051 return SDValue(E, 0);
5053 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5054 dl.getDebugLoc(), Ops, 4, VTs,
5056 CSEMap.InsertNode(N, IP);
5058 return SDValue(N, 0);
5061 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5062 SDValue Ptr, SDValue Mask, EVT MemVT,
5063 MachineMemOperand *MMO, bool isTrunc) {
5064 assert(Chain.getValueType() == MVT::Other &&
5065 "Invalid chain type");
5066 EVT VT = Val.getValueType();
5067 SDVTList VTs = getVTList(MVT::Other);
5068 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5069 FoldingSetNodeID ID;
5070 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5071 ID.AddInteger(VT.getRawBits());
5072 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5073 MMO->isNonTemporal(), MMO->isInvariant()));
5074 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5077 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5078 return SDValue(E, 0);
5080 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5081 dl.getDebugLoc(), Ops, 4,
5082 VTs, isTrunc, MemVT, MMO);
5083 CSEMap.InsertNode(N, IP);
5085 return SDValue(N, 0);
5088 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5089 SDValue Chain, SDValue Ptr,
5092 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
5093 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5096 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5097 ArrayRef<SDUse> Ops) {
5098 switch (Ops.size()) {
5099 case 0: return getNode(Opcode, DL, VT);
5100 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5101 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5102 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5106 // Copy from an SDUse array into an SDValue array for use with
5107 // the regular getNode logic.
5108 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5109 return getNode(Opcode, DL, VT, NewOps);
5112 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5113 ArrayRef<SDValue> Ops) {
5114 unsigned NumOps = Ops.size();
5116 case 0: return getNode(Opcode, DL, VT);
5117 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5118 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5119 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5125 case ISD::SELECT_CC: {
5126 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5127 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5128 "LHS and RHS of condition must have same type!");
5129 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5130 "True and False arms of SelectCC must have same type!");
5131 assert(Ops[2].getValueType() == VT &&
5132 "select_cc node must be of same type as true and false value!");
5136 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5137 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5138 "LHS/RHS of comparison should match types!");
5145 SDVTList VTs = getVTList(VT);
5147 if (VT != MVT::Glue) {
5148 FoldingSetNodeID ID;
5149 AddNodeIDNode(ID, Opcode, VTs, Ops);
5152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5153 return SDValue(E, 0);
5155 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5157 CSEMap.InsertNode(N, IP);
5159 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5164 return SDValue(N, 0);
5167 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5168 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5169 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5172 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5173 ArrayRef<SDValue> Ops) {
5174 if (VTList.NumVTs == 1)
5175 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5179 // FIXME: figure out how to safely handle things like
5180 // int foo(int x) { return 1 << (x & 255); }
5181 // int bar() { return foo(256); }
5182 case ISD::SRA_PARTS:
5183 case ISD::SRL_PARTS:
5184 case ISD::SHL_PARTS:
5185 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5186 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5187 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5188 else if (N3.getOpcode() == ISD::AND)
5189 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5190 // If the and is only masking out bits that cannot effect the shift,
5191 // eliminate the and.
5192 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5193 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5194 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5200 // Memoize the node unless it returns a flag.
5202 unsigned NumOps = Ops.size();
5203 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5204 FoldingSetNodeID ID;
5205 AddNodeIDNode(ID, Opcode, VTList, Ops);
5207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5208 return SDValue(E, 0);
5211 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5212 DL.getDebugLoc(), VTList, Ops[0]);
5213 } else if (NumOps == 2) {
5214 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5215 DL.getDebugLoc(), VTList, Ops[0],
5217 } else if (NumOps == 3) {
5218 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5219 DL.getDebugLoc(), VTList, Ops[0],
5222 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5225 CSEMap.InsertNode(N, IP);
5228 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5229 DL.getDebugLoc(), VTList, Ops[0]);
5230 } else if (NumOps == 2) {
5231 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5232 DL.getDebugLoc(), VTList, Ops[0],
5234 } else if (NumOps == 3) {
5235 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5236 DL.getDebugLoc(), VTList, Ops[0],
5239 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5244 return SDValue(N, 0);
5247 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5248 return getNode(Opcode, DL, VTList, None);
5251 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5253 SDValue Ops[] = { N1 };
5254 return getNode(Opcode, DL, VTList, Ops);
5257 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5258 SDValue N1, SDValue N2) {
5259 SDValue Ops[] = { N1, N2 };
5260 return getNode(Opcode, DL, VTList, Ops);
5263 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5264 SDValue N1, SDValue N2, SDValue N3) {
5265 SDValue Ops[] = { N1, N2, N3 };
5266 return getNode(Opcode, DL, VTList, Ops);
5269 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5270 SDValue N1, SDValue N2, SDValue N3,
5272 SDValue Ops[] = { N1, N2, N3, N4 };
5273 return getNode(Opcode, DL, VTList, Ops);
5276 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5277 SDValue N1, SDValue N2, SDValue N3,
5278 SDValue N4, SDValue N5) {
5279 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5280 return getNode(Opcode, DL, VTList, Ops);
5283 SDVTList SelectionDAG::getVTList(EVT VT) {
5284 return makeVTList(SDNode::getValueTypeList(VT), 1);
5287 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5288 FoldingSetNodeID ID;
5290 ID.AddInteger(VT1.getRawBits());
5291 ID.AddInteger(VT2.getRawBits());
5294 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5296 EVT *Array = Allocator.Allocate<EVT>(2);
5299 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5300 VTListMap.InsertNode(Result, IP);
5302 return Result->getSDVTList();
5305 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5306 FoldingSetNodeID ID;
5308 ID.AddInteger(VT1.getRawBits());
5309 ID.AddInteger(VT2.getRawBits());
5310 ID.AddInteger(VT3.getRawBits());
5313 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5315 EVT *Array = Allocator.Allocate<EVT>(3);
5319 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5320 VTListMap.InsertNode(Result, IP);
5322 return Result->getSDVTList();
5325 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5326 FoldingSetNodeID ID;
5328 ID.AddInteger(VT1.getRawBits());
5329 ID.AddInteger(VT2.getRawBits());
5330 ID.AddInteger(VT3.getRawBits());
5331 ID.AddInteger(VT4.getRawBits());
5334 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5336 EVT *Array = Allocator.Allocate<EVT>(4);
5341 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5342 VTListMap.InsertNode(Result, IP);
5344 return Result->getSDVTList();
5347 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5348 unsigned NumVTs = VTs.size();
5349 FoldingSetNodeID ID;
5350 ID.AddInteger(NumVTs);
5351 for (unsigned index = 0; index < NumVTs; index++) {
5352 ID.AddInteger(VTs[index].getRawBits());
5356 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5358 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5359 std::copy(VTs.begin(), VTs.end(), Array);
5360 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5361 VTListMap.InsertNode(Result, IP);
5363 return Result->getSDVTList();
5367 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5368 /// specified operands. If the resultant node already exists in the DAG,
5369 /// this does not modify the specified node, instead it returns the node that
5370 /// already exists. If the resultant node does not exist in the DAG, the
5371 /// input node is returned. As a degenerate case, if you specify the same
5372 /// input operands as the node already has, the input node is returned.
5373 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5374 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5376 // Check to see if there is no change.
5377 if (Op == N->getOperand(0)) return N;
5379 // See if the modified node already exists.
5380 void *InsertPos = nullptr;
5381 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5384 // Nope it doesn't. Remove the node from its current place in the maps.
5386 if (!RemoveNodeFromCSEMaps(N))
5387 InsertPos = nullptr;
5389 // Now we update the operands.
5390 N->OperandList[0].set(Op);
5392 // If this gets put into a CSE map, add it.
5393 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5397 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5398 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5400 // Check to see if there is no change.
5401 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5402 return N; // No operands changed, just return the input node.
5404 // See if the modified node already exists.
5405 void *InsertPos = nullptr;
5406 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5409 // Nope it doesn't. Remove the node from its current place in the maps.
5411 if (!RemoveNodeFromCSEMaps(N))
5412 InsertPos = nullptr;
5414 // Now we update the operands.
5415 if (N->OperandList[0] != Op1)
5416 N->OperandList[0].set(Op1);
5417 if (N->OperandList[1] != Op2)
5418 N->OperandList[1].set(Op2);
5420 // If this gets put into a CSE map, add it.
5421 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5425 SDNode *SelectionDAG::
5426 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5427 SDValue Ops[] = { Op1, Op2, Op3 };
5428 return UpdateNodeOperands(N, Ops);
5431 SDNode *SelectionDAG::
5432 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5433 SDValue Op3, SDValue Op4) {
5434 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5435 return UpdateNodeOperands(N, Ops);
5438 SDNode *SelectionDAG::
5439 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5440 SDValue Op3, SDValue Op4, SDValue Op5) {
5441 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5442 return UpdateNodeOperands(N, Ops);
5445 SDNode *SelectionDAG::
5446 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5447 unsigned NumOps = Ops.size();
5448 assert(N->getNumOperands() == NumOps &&
5449 "Update with wrong number of operands");
5451 // If no operands changed just return the input node.
5452 if (Ops.empty() || std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5455 // See if the modified node already exists.
5456 void *InsertPos = nullptr;
5457 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5460 // Nope it doesn't. Remove the node from its current place in the maps.
5462 if (!RemoveNodeFromCSEMaps(N))
5463 InsertPos = nullptr;
5465 // Now we update the operands.
5466 for (unsigned i = 0; i != NumOps; ++i)
5467 if (N->OperandList[i] != Ops[i])
5468 N->OperandList[i].set(Ops[i]);
5470 // If this gets put into a CSE map, add it.
5471 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5475 /// DropOperands - Release the operands and set this node to have
5477 void SDNode::DropOperands() {
5478 // Unlike the code in MorphNodeTo that does this, we don't need to
5479 // watch for dead nodes here.
5480 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5486 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5489 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5491 SDVTList VTs = getVTList(VT);
5492 return SelectNodeTo(N, MachineOpc, VTs, None);
5495 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5496 EVT VT, SDValue Op1) {
5497 SDVTList VTs = getVTList(VT);
5498 SDValue Ops[] = { Op1 };
5499 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5502 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5503 EVT VT, SDValue Op1,
5505 SDVTList VTs = getVTList(VT);
5506 SDValue Ops[] = { Op1, Op2 };
5507 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5510 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5511 EVT VT, SDValue Op1,
5512 SDValue Op2, SDValue Op3) {
5513 SDVTList VTs = getVTList(VT);
5514 SDValue Ops[] = { Op1, Op2, Op3 };
5515 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5518 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5519 EVT VT, ArrayRef<SDValue> Ops) {
5520 SDVTList VTs = getVTList(VT);
5521 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5524 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5525 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5526 SDVTList VTs = getVTList(VT1, VT2);
5527 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5530 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5532 SDVTList VTs = getVTList(VT1, VT2);
5533 return SelectNodeTo(N, MachineOpc, VTs, None);
5536 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5537 EVT VT1, EVT VT2, EVT VT3,
5538 ArrayRef<SDValue> Ops) {
5539 SDVTList VTs = getVTList(VT1, VT2, VT3);
5540 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5543 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5544 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5545 ArrayRef<SDValue> Ops) {
5546 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5547 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5550 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5553 SDVTList VTs = getVTList(VT1, VT2);
5554 SDValue Ops[] = { Op1 };
5555 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5558 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5560 SDValue Op1, SDValue Op2) {
5561 SDVTList VTs = getVTList(VT1, VT2);
5562 SDValue Ops[] = { Op1, Op2 };
5563 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5566 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5568 SDValue Op1, SDValue Op2,
5570 SDVTList VTs = getVTList(VT1, VT2);
5571 SDValue Ops[] = { Op1, Op2, Op3 };
5572 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5575 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5576 EVT VT1, EVT VT2, EVT VT3,
5577 SDValue Op1, SDValue Op2,
5579 SDVTList VTs = getVTList(VT1, VT2, VT3);
5580 SDValue Ops[] = { Op1, Op2, Op3 };
5581 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5584 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5585 SDVTList VTs,ArrayRef<SDValue> Ops) {
5586 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5587 // Reset the NodeID to -1.
5592 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5593 /// the line number information on the merged node since it is not possible to
5594 /// preserve the information that operation is associated with multiple lines.
5595 /// This will make the debugger working better at -O0, were there is a higher
5596 /// probability having other instructions associated with that line.
5598 /// For IROrder, we keep the smaller of the two
5599 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5600 DebugLoc NLoc = N->getDebugLoc();
5601 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5602 N->setDebugLoc(DebugLoc());
5604 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5605 N->setIROrder(Order);
5609 /// MorphNodeTo - This *mutates* the specified node to have the specified
5610 /// return type, opcode, and operands.
5612 /// Note that MorphNodeTo returns the resultant node. If there is already a
5613 /// node of the specified opcode and operands, it returns that node instead of
5614 /// the current one. Note that the SDLoc need not be the same.
5616 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5617 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5618 /// node, and because it doesn't require CSE recalculation for any of
5619 /// the node's users.
5621 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5622 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5623 /// the legalizer which maintain worklists that would need to be updated when
5624 /// deleting things.
5625 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5626 SDVTList VTs, ArrayRef<SDValue> Ops) {
5627 unsigned NumOps = Ops.size();
5628 // If an identical node already exists, use it.
5630 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5631 FoldingSetNodeID ID;
5632 AddNodeIDNode(ID, Opc, VTs, Ops);
5633 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5634 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5637 if (!RemoveNodeFromCSEMaps(N))
5640 // Start the morphing.
5642 N->ValueList = VTs.VTs;
5643 N->NumValues = VTs.NumVTs;
5645 // Clear the operands list, updating used nodes to remove this from their
5646 // use list. Keep track of any operands that become dead as a result.
5647 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5648 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5650 SDNode *Used = Use.getNode();
5652 if (Used->use_empty())
5653 DeadNodeSet.insert(Used);
5656 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5657 // Initialize the memory references information.
5658 MN->setMemRefs(nullptr, nullptr);
5659 // If NumOps is larger than the # of operands we can have in a
5660 // MachineSDNode, reallocate the operand list.
5661 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5662 if (MN->OperandsNeedDelete)
5663 delete[] MN->OperandList;
5664 if (NumOps > array_lengthof(MN->LocalOperands))
5665 // We're creating a final node that will live unmorphed for the
5666 // remainder of the current SelectionDAG iteration, so we can allocate
5667 // the operands directly out of a pool with no recycling metadata.
5668 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5669 Ops.data(), NumOps);
5671 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5672 MN->OperandsNeedDelete = false;
5674 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5676 // If NumOps is larger than the # of operands we currently have, reallocate
5677 // the operand list.
5678 if (NumOps > N->NumOperands) {
5679 if (N->OperandsNeedDelete)
5680 delete[] N->OperandList;
5681 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5682 N->OperandsNeedDelete = true;
5684 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5687 // Delete any nodes that are still dead after adding the uses for the
5689 if (!DeadNodeSet.empty()) {
5690 SmallVector<SDNode *, 16> DeadNodes;
5691 for (SDNode *N : DeadNodeSet)
5693 DeadNodes.push_back(N);
5694 RemoveDeadNodes(DeadNodes);
5698 CSEMap.InsertNode(N, IP); // Memoize the new node.
5703 /// getMachineNode - These are used for target selectors to create a new node
5704 /// with specified return type(s), MachineInstr opcode, and operands.
5706 /// Note that getMachineNode returns the resultant node. If there is already a
5707 /// node of the specified opcode and operands, it returns that node instead of
5708 /// the current one.
5710 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5711 SDVTList VTs = getVTList(VT);
5712 return getMachineNode(Opcode, dl, VTs, None);
5716 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5717 SDVTList VTs = getVTList(VT);
5718 SDValue Ops[] = { Op1 };
5719 return getMachineNode(Opcode, dl, VTs, Ops);
5723 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5724 SDValue Op1, SDValue Op2) {
5725 SDVTList VTs = getVTList(VT);
5726 SDValue Ops[] = { Op1, Op2 };
5727 return getMachineNode(Opcode, dl, VTs, Ops);
5731 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5732 SDValue Op1, SDValue Op2, SDValue Op3) {
5733 SDVTList VTs = getVTList(VT);
5734 SDValue Ops[] = { Op1, Op2, Op3 };
5735 return getMachineNode(Opcode, dl, VTs, Ops);
5739 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5740 ArrayRef<SDValue> Ops) {
5741 SDVTList VTs = getVTList(VT);
5742 return getMachineNode(Opcode, dl, VTs, Ops);
5746 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5747 SDVTList VTs = getVTList(VT1, VT2);
5748 return getMachineNode(Opcode, dl, VTs, None);
5752 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5753 EVT VT1, EVT VT2, SDValue Op1) {
5754 SDVTList VTs = getVTList(VT1, VT2);
5755 SDValue Ops[] = { Op1 };
5756 return getMachineNode(Opcode, dl, VTs, Ops);
5760 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5761 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5762 SDVTList VTs = getVTList(VT1, VT2);
5763 SDValue Ops[] = { Op1, Op2 };
5764 return getMachineNode(Opcode, dl, VTs, Ops);
5768 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5769 EVT VT1, EVT VT2, SDValue Op1,
5770 SDValue Op2, SDValue Op3) {
5771 SDVTList VTs = getVTList(VT1, VT2);
5772 SDValue Ops[] = { Op1, Op2, Op3 };
5773 return getMachineNode(Opcode, dl, VTs, Ops);
5777 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5779 ArrayRef<SDValue> Ops) {
5780 SDVTList VTs = getVTList(VT1, VT2);
5781 return getMachineNode(Opcode, dl, VTs, Ops);
5785 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5786 EVT VT1, EVT VT2, EVT VT3,
5787 SDValue Op1, SDValue Op2) {
5788 SDVTList VTs = getVTList(VT1, VT2, VT3);
5789 SDValue Ops[] = { Op1, Op2 };
5790 return getMachineNode(Opcode, dl, VTs, Ops);
5794 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5795 EVT VT1, EVT VT2, EVT VT3,
5796 SDValue Op1, SDValue Op2, SDValue Op3) {
5797 SDVTList VTs = getVTList(VT1, VT2, VT3);
5798 SDValue Ops[] = { Op1, Op2, Op3 };
5799 return getMachineNode(Opcode, dl, VTs, Ops);
5803 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5804 EVT VT1, EVT VT2, EVT VT3,
5805 ArrayRef<SDValue> Ops) {
5806 SDVTList VTs = getVTList(VT1, VT2, VT3);
5807 return getMachineNode(Opcode, dl, VTs, Ops);
5811 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5812 EVT VT2, EVT VT3, EVT VT4,
5813 ArrayRef<SDValue> Ops) {
5814 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5815 return getMachineNode(Opcode, dl, VTs, Ops);
5819 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5820 ArrayRef<EVT> ResultTys,
5821 ArrayRef<SDValue> Ops) {
5822 SDVTList VTs = getVTList(ResultTys);
5823 return getMachineNode(Opcode, dl, VTs, Ops);
5827 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5828 ArrayRef<SDValue> OpsArray) {
5829 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5832 const SDValue *Ops = OpsArray.data();
5833 unsigned NumOps = OpsArray.size();
5836 FoldingSetNodeID ID;
5837 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
5839 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5840 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5844 // Allocate a new MachineSDNode.
5845 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5846 DL.getDebugLoc(), VTs);
5848 // Initialize the operands list.
5849 if (NumOps > array_lengthof(N->LocalOperands))
5850 // We're creating a final node that will live unmorphed for the
5851 // remainder of the current SelectionDAG iteration, so we can allocate
5852 // the operands directly out of a pool with no recycling metadata.
5853 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5856 N->InitOperands(N->LocalOperands, Ops, NumOps);
5857 N->OperandsNeedDelete = false;
5860 CSEMap.InsertNode(N, IP);
5866 /// getTargetExtractSubreg - A convenience function for creating
5867 /// TargetOpcode::EXTRACT_SUBREG nodes.
5869 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5871 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5872 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5873 VT, Operand, SRIdxVal);
5874 return SDValue(Subreg, 0);
5877 /// getTargetInsertSubreg - A convenience function for creating
5878 /// TargetOpcode::INSERT_SUBREG nodes.
5880 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5881 SDValue Operand, SDValue Subreg) {
5882 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5883 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5884 VT, Operand, Subreg, SRIdxVal);
5885 return SDValue(Result, 0);
5888 /// getNodeIfExists - Get the specified node if it's already available, or
5889 /// else return NULL.
5890 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5891 ArrayRef<SDValue> Ops, bool nuw, bool nsw,
5893 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
5894 FoldingSetNodeID ID;
5895 AddNodeIDNode(ID, Opcode, VTList, Ops);
5896 if (isBinOpWithFlags(Opcode))
5897 AddBinaryNodeIDCustom(ID, nuw, nsw, exact);
5899 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5905 /// getDbgValue - Creates a SDDbgValue node.
5908 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
5909 unsigned R, bool IsIndirect, uint64_t Off,
5910 DebugLoc DL, unsigned O) {
5911 assert(cast<MDLocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
5912 "Expected inlined-at fields to agree");
5913 return new (Allocator) SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
5917 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
5918 const Value *C, uint64_t Off,
5919 DebugLoc DL, unsigned O) {
5920 assert(cast<MDLocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
5921 "Expected inlined-at fields to agree");
5922 return new (Allocator) SDDbgValue(Var, Expr, C, Off, DL, O);
5926 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
5927 unsigned FI, uint64_t Off,
5928 DebugLoc DL, unsigned O) {
5929 assert(cast<MDLocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
5930 "Expected inlined-at fields to agree");
5931 return new (Allocator) SDDbgValue(Var, Expr, FI, Off, DL, O);
5936 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5937 /// pointed to by a use iterator is deleted, increment the use iterator
5938 /// so that it doesn't dangle.
5940 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5941 SDNode::use_iterator &UI;
5942 SDNode::use_iterator &UE;
5944 void NodeDeleted(SDNode *N, SDNode *E) override {
5945 // Increment the iterator as needed.
5946 while (UI != UE && N == *UI)
5951 RAUWUpdateListener(SelectionDAG &d,
5952 SDNode::use_iterator &ui,
5953 SDNode::use_iterator &ue)
5954 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5959 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5960 /// This can cause recursive merging of nodes in the DAG.
5962 /// This version assumes From has a single result value.
5964 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5965 SDNode *From = FromN.getNode();
5966 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5967 "Cannot replace with this method!");
5968 assert(From != To.getNode() && "Cannot replace uses of with self");
5970 // Iterate over all the existing uses of From. New uses will be added
5971 // to the beginning of the use list, which we avoid visiting.
5972 // This specifically avoids visiting uses of From that arise while the
5973 // replacement is happening, because any such uses would be the result
5974 // of CSE: If an existing node looks like From after one of its operands
5975 // is replaced by To, we don't want to replace of all its users with To
5976 // too. See PR3018 for more info.
5977 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5978 RAUWUpdateListener Listener(*this, UI, UE);
5982 // This node is about to morph, remove its old self from the CSE maps.
5983 RemoveNodeFromCSEMaps(User);
5985 // A user can appear in a use list multiple times, and when this
5986 // happens the uses are usually next to each other in the list.
5987 // To help reduce the number of CSE recomputations, process all
5988 // the uses of this user that we can find this way.
5990 SDUse &Use = UI.getUse();
5993 } while (UI != UE && *UI == User);
5995 // Now that we have modified User, add it back to the CSE maps. If it
5996 // already exists there, recursively merge the results together.
5997 AddModifiedNodeToCSEMaps(User);
6000 // If we just RAUW'd the root, take note.
6001 if (FromN == getRoot())
6005 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6006 /// This can cause recursive merging of nodes in the DAG.
6008 /// This version assumes that for each value of From, there is a
6009 /// corresponding value in To in the same position with the same type.
6011 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6013 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6014 assert((!From->hasAnyUseOfValue(i) ||
6015 From->getValueType(i) == To->getValueType(i)) &&
6016 "Cannot use this version of ReplaceAllUsesWith!");
6019 // Handle the trivial case.
6023 // Iterate over just the existing users of From. See the comments in
6024 // the ReplaceAllUsesWith above.
6025 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6026 RAUWUpdateListener Listener(*this, UI, UE);
6030 // This node is about to morph, remove its old self from the CSE maps.
6031 RemoveNodeFromCSEMaps(User);
6033 // A user can appear in a use list multiple times, and when this
6034 // happens the uses are usually next to each other in the list.
6035 // To help reduce the number of CSE recomputations, process all
6036 // the uses of this user that we can find this way.
6038 SDUse &Use = UI.getUse();
6041 } while (UI != UE && *UI == User);
6043 // Now that we have modified User, add it back to the CSE maps. If it
6044 // already exists there, recursively merge the results together.
6045 AddModifiedNodeToCSEMaps(User);
6048 // If we just RAUW'd the root, take note.
6049 if (From == getRoot().getNode())
6050 setRoot(SDValue(To, getRoot().getResNo()));
6053 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6054 /// This can cause recursive merging of nodes in the DAG.
6056 /// This version can replace From with any result values. To must match the
6057 /// number and types of values returned by From.
6058 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6059 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6060 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6062 // Iterate over just the existing users of From. See the comments in
6063 // the ReplaceAllUsesWith above.
6064 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6065 RAUWUpdateListener Listener(*this, UI, UE);
6069 // This node is about to morph, remove its old self from the CSE maps.
6070 RemoveNodeFromCSEMaps(User);
6072 // A user can appear in a use list multiple times, and when this
6073 // happens the uses are usually next to each other in the list.
6074 // To help reduce the number of CSE recomputations, process all
6075 // the uses of this user that we can find this way.
6077 SDUse &Use = UI.getUse();
6078 const SDValue &ToOp = To[Use.getResNo()];
6081 } while (UI != UE && *UI == User);
6083 // Now that we have modified User, add it back to the CSE maps. If it
6084 // already exists there, recursively merge the results together.
6085 AddModifiedNodeToCSEMaps(User);
6088 // If we just RAUW'd the root, take note.
6089 if (From == getRoot().getNode())
6090 setRoot(SDValue(To[getRoot().getResNo()]));
6093 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6094 /// uses of other values produced by From.getNode() alone. The Deleted
6095 /// vector is handled the same way as for ReplaceAllUsesWith.
6096 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6097 // Handle the really simple, really trivial case efficiently.
6098 if (From == To) return;
6100 // Handle the simple, trivial, case efficiently.
6101 if (From.getNode()->getNumValues() == 1) {
6102 ReplaceAllUsesWith(From, To);
6106 // Iterate over just the existing users of From. See the comments in
6107 // the ReplaceAllUsesWith above.
6108 SDNode::use_iterator UI = From.getNode()->use_begin(),
6109 UE = From.getNode()->use_end();
6110 RAUWUpdateListener Listener(*this, UI, UE);
6113 bool UserRemovedFromCSEMaps = false;
6115 // A user can appear in a use list multiple times, and when this
6116 // happens the uses are usually next to each other in the list.
6117 // To help reduce the number of CSE recomputations, process all
6118 // the uses of this user that we can find this way.
6120 SDUse &Use = UI.getUse();
6122 // Skip uses of different values from the same node.
6123 if (Use.getResNo() != From.getResNo()) {
6128 // If this node hasn't been modified yet, it's still in the CSE maps,
6129 // so remove its old self from the CSE maps.
6130 if (!UserRemovedFromCSEMaps) {
6131 RemoveNodeFromCSEMaps(User);
6132 UserRemovedFromCSEMaps = true;
6137 } while (UI != UE && *UI == User);
6139 // We are iterating over all uses of the From node, so if a use
6140 // doesn't use the specific value, no changes are made.
6141 if (!UserRemovedFromCSEMaps)
6144 // Now that we have modified User, add it back to the CSE maps. If it
6145 // already exists there, recursively merge the results together.
6146 AddModifiedNodeToCSEMaps(User);
6149 // If we just RAUW'd the root, take note.
6150 if (From == getRoot())
6155 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6156 /// to record information about a use.
6163 /// operator< - Sort Memos by User.
6164 bool operator<(const UseMemo &L, const UseMemo &R) {
6165 return (intptr_t)L.User < (intptr_t)R.User;
6169 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6170 /// uses of other values produced by From.getNode() alone. The same value
6171 /// may appear in both the From and To list. The Deleted vector is
6172 /// handled the same way as for ReplaceAllUsesWith.
6173 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6176 // Handle the simple, trivial case efficiently.
6178 return ReplaceAllUsesOfValueWith(*From, *To);
6180 // Read up all the uses and make records of them. This helps
6181 // processing new uses that are introduced during the
6182 // replacement process.
6183 SmallVector<UseMemo, 4> Uses;
6184 for (unsigned i = 0; i != Num; ++i) {
6185 unsigned FromResNo = From[i].getResNo();
6186 SDNode *FromNode = From[i].getNode();
6187 for (SDNode::use_iterator UI = FromNode->use_begin(),
6188 E = FromNode->use_end(); UI != E; ++UI) {
6189 SDUse &Use = UI.getUse();
6190 if (Use.getResNo() == FromResNo) {
6191 UseMemo Memo = { *UI, i, &Use };
6192 Uses.push_back(Memo);
6197 // Sort the uses, so that all the uses from a given User are together.
6198 std::sort(Uses.begin(), Uses.end());
6200 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6201 UseIndex != UseIndexEnd; ) {
6202 // We know that this user uses some value of From. If it is the right
6203 // value, update it.
6204 SDNode *User = Uses[UseIndex].User;
6206 // This node is about to morph, remove its old self from the CSE maps.
6207 RemoveNodeFromCSEMaps(User);
6209 // The Uses array is sorted, so all the uses for a given User
6210 // are next to each other in the list.
6211 // To help reduce the number of CSE recomputations, process all
6212 // the uses of this user that we can find this way.
6214 unsigned i = Uses[UseIndex].Index;
6215 SDUse &Use = *Uses[UseIndex].Use;
6219 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6221 // Now that we have modified User, add it back to the CSE maps. If it
6222 // already exists there, recursively merge the results together.
6223 AddModifiedNodeToCSEMaps(User);
6227 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6228 /// based on their topological order. It returns the maximum id and a vector
6229 /// of the SDNodes* in assigned order by reference.
6230 unsigned SelectionDAG::AssignTopologicalOrder() {
6232 unsigned DAGSize = 0;
6234 // SortedPos tracks the progress of the algorithm. Nodes before it are
6235 // sorted, nodes after it are unsorted. When the algorithm completes
6236 // it is at the end of the list.
6237 allnodes_iterator SortedPos = allnodes_begin();
6239 // Visit all the nodes. Move nodes with no operands to the front of
6240 // the list immediately. Annotate nodes that do have operands with their
6241 // operand count. Before we do this, the Node Id fields of the nodes
6242 // may contain arbitrary values. After, the Node Id fields for nodes
6243 // before SortedPos will contain the topological sort index, and the
6244 // Node Id fields for nodes At SortedPos and after will contain the
6245 // count of outstanding operands.
6246 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6248 checkForCycles(N, this);
6249 unsigned Degree = N->getNumOperands();
6251 // A node with no uses, add it to the result array immediately.
6252 N->setNodeId(DAGSize++);
6253 allnodes_iterator Q = N;
6255 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6256 assert(SortedPos != AllNodes.end() && "Overran node list");
6259 // Temporarily use the Node Id as scratch space for the degree count.
6260 N->setNodeId(Degree);
6264 // Visit all the nodes. As we iterate, move nodes into sorted order,
6265 // such that by the time the end is reached all nodes will be sorted.
6266 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
6268 checkForCycles(N, this);
6269 // N is in sorted position, so all its uses have one less operand
6270 // that needs to be sorted.
6271 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6274 unsigned Degree = P->getNodeId();
6275 assert(Degree != 0 && "Invalid node degree");
6278 // All of P's operands are sorted, so P may sorted now.
6279 P->setNodeId(DAGSize++);
6281 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6282 assert(SortedPos != AllNodes.end() && "Overran node list");
6285 // Update P's outstanding operand count.
6286 P->setNodeId(Degree);
6289 if (I == SortedPos) {
6292 dbgs() << "Overran sorted position:\n";
6293 S->dumprFull(this); dbgs() << "\n";
6294 dbgs() << "Checking if this is due to cycles\n";
6295 checkForCycles(this, true);
6297 llvm_unreachable(nullptr);
6301 assert(SortedPos == AllNodes.end() &&
6302 "Topological sort incomplete!");
6303 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6304 "First node in topological sort is not the entry token!");
6305 assert(AllNodes.front().getNodeId() == 0 &&
6306 "First node in topological sort has non-zero id!");
6307 assert(AllNodes.front().getNumOperands() == 0 &&
6308 "First node in topological sort has operands!");
6309 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6310 "Last node in topologic sort has unexpected id!");
6311 assert(AllNodes.back().use_empty() &&
6312 "Last node in topologic sort has users!");
6313 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6317 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6318 /// value is produced by SD.
6319 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6321 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6322 SD->setHasDebugValue(true);
6324 DbgInfo->add(DB, SD, isParameter);
6327 /// TransferDbgValues - Transfer SDDbgValues.
6328 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6329 if (From == To || !From.getNode()->getHasDebugValue())
6331 SDNode *FromNode = From.getNode();
6332 SDNode *ToNode = To.getNode();
6333 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6334 SmallVector<SDDbgValue *, 2> ClonedDVs;
6335 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6337 SDDbgValue *Dbg = *I;
6338 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6340 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6341 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6342 Dbg->getDebugLoc(), Dbg->getOrder());
6343 ClonedDVs.push_back(Clone);
6346 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6347 E = ClonedDVs.end(); I != E; ++I)
6348 AddDbgValue(*I, ToNode, false);
6351 //===----------------------------------------------------------------------===//
6353 //===----------------------------------------------------------------------===//
6355 HandleSDNode::~HandleSDNode() {
6359 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6360 DebugLoc DL, const GlobalValue *GA,
6361 EVT VT, int64_t o, unsigned char TF)
6362 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6366 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6367 SDValue X, unsigned SrcAS,
6369 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6370 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6372 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6373 EVT memvt, MachineMemOperand *mmo)
6374 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6375 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6376 MMO->isNonTemporal(), MMO->isInvariant());
6377 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6378 assert(isNonTemporal() == MMO->isNonTemporal() &&
6379 "Non-temporal encoding error!");
6380 // We check here that the size of the memory operand fits within the size of
6381 // the MMO. This is because the MMO might indicate only a possible address
6382 // range instead of specifying the affected memory addresses precisely.
6383 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6386 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6387 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6388 : SDNode(Opc, Order, dl, VTs, Ops),
6389 MemoryVT(memvt), MMO(mmo) {
6390 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6391 MMO->isNonTemporal(), MMO->isInvariant());
6392 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6393 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6396 /// Profile - Gather unique data for the node.
6398 void SDNode::Profile(FoldingSetNodeID &ID) const {
6399 AddNodeIDNode(ID, this);
6404 std::vector<EVT> VTs;
6407 VTs.reserve(MVT::LAST_VALUETYPE);
6408 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6409 VTs.push_back(MVT((MVT::SimpleValueType)i));
6414 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6415 static ManagedStatic<EVTArray> SimpleVTArray;
6416 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6418 /// getValueTypeList - Return a pointer to the specified value type.
6420 const EVT *SDNode::getValueTypeList(EVT VT) {
6421 if (VT.isExtended()) {
6422 sys::SmartScopedLock<true> Lock(*VTMutex);
6423 return &(*EVTs->insert(VT).first);
6425 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6426 "Value type out of range!");
6427 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6431 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6432 /// indicated value. This method ignores uses of other values defined by this
6434 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6435 assert(Value < getNumValues() && "Bad value!");
6437 // TODO: Only iterate over uses of a given value of the node
6438 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6439 if (UI.getUse().getResNo() == Value) {
6446 // Found exactly the right number of uses?
6451 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6452 /// value. This method ignores uses of other values defined by this operation.
6453 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6454 assert(Value < getNumValues() && "Bad value!");
6456 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6457 if (UI.getUse().getResNo() == Value)
6464 /// isOnlyUserOf - Return true if this node is the only use of N.
6466 bool SDNode::isOnlyUserOf(SDNode *N) const {
6468 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6479 /// isOperand - Return true if this node is an operand of N.
6481 bool SDValue::isOperandOf(SDNode *N) const {
6482 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6483 if (*this == N->getOperand(i))
6488 bool SDNode::isOperandOf(SDNode *N) const {
6489 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6490 if (this == N->OperandList[i].getNode())
6495 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6496 /// be a chain) reaches the specified operand without crossing any
6497 /// side-effecting instructions on any chain path. In practice, this looks
6498 /// through token factors and non-volatile loads. In order to remain efficient,
6499 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6500 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6501 unsigned Depth) const {
6502 if (*this == Dest) return true;
6504 // Don't search too deeply, we just want to be able to see through
6505 // TokenFactor's etc.
6506 if (Depth == 0) return false;
6508 // If this is a token factor, all inputs to the TF happen in parallel. If any
6509 // of the operands of the TF does not reach dest, then we cannot do the xform.
6510 if (getOpcode() == ISD::TokenFactor) {
6511 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6512 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6517 // Loads don't have side effects, look through them.
6518 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6519 if (!Ld->isVolatile())
6520 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6525 /// hasPredecessor - Return true if N is a predecessor of this node.
6526 /// N is either an operand of this node, or can be reached by recursively
6527 /// traversing up the operands.
6528 /// NOTE: This is an expensive method. Use it carefully.
6529 bool SDNode::hasPredecessor(const SDNode *N) const {
6530 SmallPtrSet<const SDNode *, 32> Visited;
6531 SmallVector<const SDNode *, 16> Worklist;
6532 return hasPredecessorHelper(N, Visited, Worklist);
6536 SDNode::hasPredecessorHelper(const SDNode *N,
6537 SmallPtrSetImpl<const SDNode *> &Visited,
6538 SmallVectorImpl<const SDNode *> &Worklist) const {
6539 if (Visited.empty()) {
6540 Worklist.push_back(this);
6542 // Take a look in the visited set. If we've already encountered this node
6543 // we needn't search further.
6544 if (Visited.count(N))
6548 // Haven't visited N yet. Continue the search.
6549 while (!Worklist.empty()) {
6550 const SDNode *M = Worklist.pop_back_val();
6551 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6552 SDNode *Op = M->getOperand(i).getNode();
6553 if (Visited.insert(Op).second)
6554 Worklist.push_back(Op);
6563 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6564 assert(Num < NumOperands && "Invalid child # of SDNode!");
6565 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6568 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6569 assert(N->getNumValues() == 1 &&
6570 "Can't unroll a vector with multiple results!");
6572 EVT VT = N->getValueType(0);
6573 unsigned NE = VT.getVectorNumElements();
6574 EVT EltVT = VT.getVectorElementType();
6577 SmallVector<SDValue, 8> Scalars;
6578 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6580 // If ResNE is 0, fully unroll the vector op.
6583 else if (NE > ResNE)
6587 for (i= 0; i != NE; ++i) {
6588 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6589 SDValue Operand = N->getOperand(j);
6590 EVT OperandVT = Operand.getValueType();
6591 if (OperandVT.isVector()) {
6592 // A vector operand; extract a single element.
6593 EVT OperandEltVT = OperandVT.getVectorElementType();
6594 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6597 getConstant(i, TLI->getVectorIdxTy()));
6599 // A scalar operand; just use it as is.
6600 Operands[j] = Operand;
6604 switch (N->getOpcode()) {
6606 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6609 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6616 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6617 getShiftAmountOperand(Operands[0].getValueType(),
6620 case ISD::SIGN_EXTEND_INREG:
6621 case ISD::FP_ROUND_INREG: {
6622 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6623 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6625 getValueType(ExtVT)));
6630 for (; i < ResNE; ++i)
6631 Scalars.push_back(getUNDEF(EltVT));
6633 return getNode(ISD::BUILD_VECTOR, dl,
6634 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6638 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6639 /// location that is 'Dist' units away from the location that the 'Base' load
6640 /// is loading from.
6641 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6642 unsigned Bytes, int Dist) const {
6643 if (LD->getChain() != Base->getChain())
6645 EVT VT = LD->getValueType(0);
6646 if (VT.getSizeInBits() / 8 != Bytes)
6649 SDValue Loc = LD->getOperand(1);
6650 SDValue BaseLoc = Base->getOperand(1);
6651 if (Loc.getOpcode() == ISD::FrameIndex) {
6652 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6654 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6655 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6656 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6657 int FS = MFI->getObjectSize(FI);
6658 int BFS = MFI->getObjectSize(BFI);
6659 if (FS != BFS || FS != (int)Bytes) return false;
6660 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6664 if (isBaseWithConstantOffset(Loc)) {
6665 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6666 if (Loc.getOperand(0) == BaseLoc) {
6667 // If the base location is a simple address with no offset itself, then
6668 // the second load's first add operand should be the base address.
6669 if (LocOffset == Dist * (int)Bytes)
6671 } else if (isBaseWithConstantOffset(BaseLoc)) {
6672 // The base location itself has an offset, so subtract that value from the
6673 // second load's offset before comparing to distance * size.
6675 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6676 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6677 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6682 const GlobalValue *GV1 = nullptr;
6683 const GlobalValue *GV2 = nullptr;
6684 int64_t Offset1 = 0;
6685 int64_t Offset2 = 0;
6686 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6687 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6688 if (isGA1 && isGA2 && GV1 == GV2)
6689 return Offset1 == (Offset2 + Dist*Bytes);
6694 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6695 /// it cannot be inferred.
6696 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6697 // If this is a GlobalAddress + cst, return the alignment.
6698 const GlobalValue *GV;
6699 int64_t GVOffset = 0;
6700 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6701 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType());
6702 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6703 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6704 *TLI->getDataLayout());
6705 unsigned AlignBits = KnownZero.countTrailingOnes();
6706 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6708 return MinAlign(Align, GVOffset);
6711 // If this is a direct reference to a stack slot, use information about the
6712 // stack slot's alignment.
6713 int FrameIdx = 1 << 31;
6714 int64_t FrameOffset = 0;
6715 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6716 FrameIdx = FI->getIndex();
6717 } else if (isBaseWithConstantOffset(Ptr) &&
6718 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6720 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6721 FrameOffset = Ptr.getConstantOperandVal(1);
6724 if (FrameIdx != (1 << 31)) {
6725 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6726 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6734 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6735 /// which is split (or expanded) into two not necessarily identical pieces.
6736 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6737 // Currently all types are split in half.
6739 if (!VT.isVector()) {
6740 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6742 unsigned NumElements = VT.getVectorNumElements();
6743 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6744 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6747 return std::make_pair(LoVT, HiVT);
6750 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6752 std::pair<SDValue, SDValue>
6753 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6755 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6756 N.getValueType().getVectorNumElements() &&
6757 "More vector elements requested than available!");
6759 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6760 getConstant(0, TLI->getVectorIdxTy()));
6761 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6762 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy()));
6763 return std::make_pair(Lo, Hi);
6766 void SelectionDAG::ExtractVectorElements(SDValue Op,
6767 SmallVectorImpl<SDValue> &Args,
6768 unsigned Start, unsigned Count) {
6769 EVT VT = Op.getValueType();
6771 Count = VT.getVectorNumElements();
6773 EVT EltVT = VT.getVectorElementType();
6774 EVT IdxTy = TLI->getVectorIdxTy();
6776 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6777 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6778 Op, getConstant(i, IdxTy)));
6782 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6783 unsigned GlobalAddressSDNode::getAddressSpace() const {
6784 return getGlobal()->getType()->getAddressSpace();
6788 Type *ConstantPoolSDNode::getType() const {
6789 if (isMachineConstantPoolEntry())
6790 return Val.MachineCPVal->getType();
6791 return Val.ConstVal->getType();
6794 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6796 unsigned &SplatBitSize,
6798 unsigned MinSplatBits,
6799 bool isBigEndian) const {
6800 EVT VT = getValueType(0);
6801 assert(VT.isVector() && "Expected a vector type");
6802 unsigned sz = VT.getSizeInBits();
6803 if (MinSplatBits > sz)
6806 SplatValue = APInt(sz, 0);
6807 SplatUndef = APInt(sz, 0);
6809 // Get the bits. Bits with undefined values (when the corresponding element
6810 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6811 // in SplatValue. If any of the values are not constant, give up and return
6813 unsigned int nOps = getNumOperands();
6814 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6815 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6817 for (unsigned j = 0; j < nOps; ++j) {
6818 unsigned i = isBigEndian ? nOps-1-j : j;
6819 SDValue OpVal = getOperand(i);
6820 unsigned BitPos = j * EltBitSize;
6822 if (OpVal.getOpcode() == ISD::UNDEF)
6823 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6824 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6825 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6826 zextOrTrunc(sz) << BitPos;
6827 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6828 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6833 // The build_vector is all constants or undefs. Find the smallest element
6834 // size that splats the vector.
6836 HasAnyUndefs = (SplatUndef != 0);
6839 unsigned HalfSize = sz / 2;
6840 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6841 APInt LowValue = SplatValue.trunc(HalfSize);
6842 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6843 APInt LowUndef = SplatUndef.trunc(HalfSize);
6845 // If the two halves do not match (ignoring undef bits), stop here.
6846 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6847 MinSplatBits > HalfSize)
6850 SplatValue = HighValue | LowValue;
6851 SplatUndef = HighUndef & LowUndef;
6860 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
6861 if (UndefElements) {
6862 UndefElements->clear();
6863 UndefElements->resize(getNumOperands());
6866 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6867 SDValue Op = getOperand(i);
6868 if (Op.getOpcode() == ISD::UNDEF) {
6870 (*UndefElements)[i] = true;
6871 } else if (!Splatted) {
6873 } else if (Splatted != Op) {
6879 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
6880 "Can only have a splat without a constant for all undefs.");
6881 return getOperand(0);
6888 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
6889 return dyn_cast_or_null<ConstantSDNode>(
6890 getSplatValue(UndefElements).getNode());
6894 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
6895 return dyn_cast_or_null<ConstantFPSDNode>(
6896 getSplatValue(UndefElements).getNode());
6899 bool BuildVectorSDNode::isConstant() const {
6900 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
6901 unsigned Opc = getOperand(i).getOpcode();
6902 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
6908 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6909 // Find the first non-undef value in the shuffle mask.
6911 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6914 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6916 // Make sure all remaining elements are either undef or the same as the first
6918 for (int Idx = Mask[i]; i != e; ++i)
6919 if (Mask[i] >= 0 && Mask[i] != Idx)
6925 static void checkForCyclesHelper(const SDNode *N,
6926 SmallPtrSetImpl<const SDNode*> &Visited,
6927 SmallPtrSetImpl<const SDNode*> &Checked,
6928 const llvm::SelectionDAG *DAG) {
6929 // If this node has already been checked, don't check it again.
6930 if (Checked.count(N))
6933 // If a node has already been visited on this depth-first walk, reject it as
6935 if (!Visited.insert(N).second) {
6936 errs() << "Detected cycle in SelectionDAG\n";
6937 dbgs() << "Offending node:\n";
6938 N->dumprFull(DAG); dbgs() << "\n";
6942 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6943 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked, DAG);
6950 void llvm::checkForCycles(const llvm::SDNode *N,
6951 const llvm::SelectionDAG *DAG,
6959 assert(N && "Checking nonexistent SDNode");
6960 SmallPtrSet<const SDNode*, 32> visited;
6961 SmallPtrSet<const SDNode*, 32> checked;
6962 checkForCyclesHelper(N, visited, checked, DAG);
6967 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
6968 checkForCycles(DAG->getRoot().getNode(), DAG, force);