1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
13 #include "llvm/CodeGen/SelectionDAG.h"
14 #include "llvm/Constants.h"
15 #include "llvm/Analysis/ValueTracking.h"
16 #include "llvm/GlobalAlias.h"
17 #include "llvm/GlobalVariable.h"
18 #include "llvm/Intrinsics.h"
19 #include "llvm/DerivedTypes.h"
20 #include "llvm/Assembly/Writer.h"
21 #include "llvm/CallingConv.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/PseudoSourceValue.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/Target/TargetLowering.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/MathExtras.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/SetVector.h"
36 #include "llvm/ADT/SmallPtrSet.h"
37 #include "llvm/ADT/SmallSet.h"
38 #include "llvm/ADT/SmallVector.h"
39 #include "llvm/ADT/StringExtras.h"
44 /// makeVTList - Return an instance of the SDVTList struct initialized with the
45 /// specified members.
46 static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
47 SDVTList Res = {VTs, NumVTs};
51 static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
52 switch (VT.getSimpleVT()) {
53 default: assert(0 && "Unknown FP format");
54 case MVT::f32: return &APFloat::IEEEsingle;
55 case MVT::f64: return &APFloat::IEEEdouble;
56 case MVT::f80: return &APFloat::x87DoubleExtended;
57 case MVT::f128: return &APFloat::IEEEquad;
58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
62 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
64 //===----------------------------------------------------------------------===//
65 // ConstantFPSDNode Class
66 //===----------------------------------------------------------------------===//
68 /// isExactlyValue - We don't rely on operator== working on double values, as
69 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
70 /// As such, this method can be used to do an exact bit-for-bit comparison of
71 /// two floating point values.
72 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
73 return getValueAPF().bitwiseIsEqual(V);
76 bool ConstantFPSDNode::isValueValidForType(MVT VT,
78 assert(VT.isFloatingPoint() && "Can only convert between FP types");
80 // PPC long double cannot be converted to any other type.
81 if (VT == MVT::ppcf128 ||
82 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
85 // convert modifies in place, so make a copy.
86 APFloat Val2 = APFloat(Val);
88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 if (N->getOpcode() == ISD::BIT_CONVERT)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
117 SDValue NotZero = N->getOperand(i);
118 if (isa<ConstantSDNode>(NotZero)) {
119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
121 } else if (isa<ConstantFPSDNode>(NotZero)) {
122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
123 bitcastToAPInt().isAllOnesValue())
128 // Okay, we have at least one ~0 value, check to see if the rest match or are
130 for (++i; i != e; ++i)
131 if (N->getOperand(i) != NotZero &&
132 N->getOperand(i).getOpcode() != ISD::UNDEF)
138 /// isBuildVectorAllZeros - Return true if the specified node is a
139 /// BUILD_VECTOR where all of the elements are 0 or undef.
140 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
141 // Look through a bit convert.
142 if (N->getOpcode() == ISD::BIT_CONVERT)
143 N = N->getOperand(0).getNode();
145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
147 unsigned i = 0, e = N->getNumOperands();
149 // Skip over all of the undef values.
150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
153 // Do not accept an all-undef vector.
154 if (i == e) return false;
156 // Do not accept build_vectors that aren't all constants or which have non-~0
158 SDValue Zero = N->getOperand(i);
159 if (isa<ConstantSDNode>(Zero)) {
160 if (!cast<ConstantSDNode>(Zero)->isNullValue())
162 } else if (isa<ConstantFPSDNode>(Zero)) {
163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
168 // Okay, we have at least one ~0 value, check to see if the rest match or are
170 for (++i; i != e; ++i)
171 if (N->getOperand(i) != Zero &&
172 N->getOperand(i).getOpcode() != ISD::UNDEF)
177 /// isScalarToVector - Return true if the specified node is a
178 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
179 /// element is not an undef.
180 bool ISD::isScalarToVector(const SDNode *N) {
181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
184 if (N->getOpcode() != ISD::BUILD_VECTOR)
186 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
188 unsigned NumElems = N->getNumOperands();
189 for (unsigned i = 1; i < NumElems; ++i) {
190 SDValue V = N->getOperand(i);
191 if (V.getOpcode() != ISD::UNDEF)
198 /// isDebugLabel - Return true if the specified node represents a debug
199 /// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
200 bool ISD::isDebugLabel(const SDNode *N) {
202 if (N->getOpcode() == ISD::DBG_LABEL)
204 if (N->isMachineOpcode() &&
205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL)
210 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211 /// when given the operation for (X op Y).
212 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213 // To perform this operation, we just need to swap the L and G bits of the
215 unsigned OldL = (Operation >> 2) & 1;
216 unsigned OldG = (Operation >> 1) & 1;
217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
218 (OldL << 1) | // New G bit
219 (OldG << 2)); // New L bit.
222 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223 /// 'op' is a valid SetCC operation.
224 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225 unsigned Operation = Op;
227 Operation ^= 7; // Flip L, G, E bits, but not U.
229 Operation ^= 15; // Flip all of the condition bits.
231 if (Operation > ISD::SETTRUE2)
232 Operation &= ~8; // Don't let N and U bits get set.
234 return ISD::CondCode(Operation);
238 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
239 /// signed operation and 2 if the result is an unsigned comparison. Return zero
240 /// if the operation does not depend on the sign of the input (setne and seteq).
241 static int isSignedOp(ISD::CondCode Opcode) {
243 default: assert(0 && "Illegal integer setcc operation!");
245 case ISD::SETNE: return 0;
249 case ISD::SETGE: return 1;
253 case ISD::SETUGE: return 2;
257 /// getSetCCOrOperation - Return the result of a logical OR between different
258 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
259 /// returns SETCC_INVALID if it is not possible to represent the resultant
261 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
264 // Cannot fold a signed integer setcc with an unsigned integer setcc.
265 return ISD::SETCC_INVALID;
267 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
269 // If the N and U bits get set then the resultant comparison DOES suddenly
270 // care about orderedness, and is true when ordered.
271 if (Op > ISD::SETTRUE2)
272 Op &= ~16; // Clear the U bit if the N bit is set.
274 // Canonicalize illegal integer setcc's.
275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
278 return ISD::CondCode(Op);
281 /// getSetCCAndOperation - Return the result of a logical AND between different
282 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
283 /// function returns zero if it is not possible to represent the resultant
285 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
288 // Cannot fold a signed setcc with an unsigned setcc.
289 return ISD::SETCC_INVALID;
291 // Combine all of the condition bits.
292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
294 // Canonicalize illegal integer setcc's.
298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
299 case ISD::SETOEQ: // SETEQ & SETU[LG]E
300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
309 const TargetMachine &SelectionDAG::getTarget() const {
310 return MF->getTarget();
313 //===----------------------------------------------------------------------===//
314 // SDNode Profile Support
315 //===----------------------------------------------------------------------===//
317 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
319 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
323 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
324 /// solely with their pointer.
325 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
326 ID.AddPointer(VTList.VTs);
329 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
331 static void AddNodeIDOperands(FoldingSetNodeID &ID,
332 const SDValue *Ops, unsigned NumOps) {
333 for (; NumOps; --NumOps, ++Ops) {
334 ID.AddPointer(Ops->getNode());
335 ID.AddInteger(Ops->getResNo());
339 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
341 static void AddNodeIDOperands(FoldingSetNodeID &ID,
342 const SDUse *Ops, unsigned NumOps) {
343 for (; NumOps; --NumOps, ++Ops) {
344 ID.AddPointer(Ops->getVal());
345 ID.AddInteger(Ops->getSDValue().getResNo());
349 static void AddNodeIDNode(FoldingSetNodeID &ID,
350 unsigned short OpC, SDVTList VTList,
351 const SDValue *OpList, unsigned N) {
352 AddNodeIDOpcode(ID, OpC);
353 AddNodeIDValueTypes(ID, VTList);
354 AddNodeIDOperands(ID, OpList, N);
357 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
359 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
360 switch (N->getOpcode()) {
361 default: break; // Normal nodes don't need extra info.
363 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
365 case ISD::TargetConstant:
367 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
369 case ISD::TargetConstantFP:
370 case ISD::ConstantFP: {
371 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
374 case ISD::TargetGlobalAddress:
375 case ISD::GlobalAddress:
376 case ISD::TargetGlobalTLSAddress:
377 case ISD::GlobalTLSAddress: {
378 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
379 ID.AddPointer(GA->getGlobal());
380 ID.AddInteger(GA->getOffset());
383 case ISD::BasicBlock:
384 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
387 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
389 case ISD::DBG_STOPPOINT: {
390 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
391 ID.AddInteger(DSP->getLine());
392 ID.AddInteger(DSP->getColumn());
393 ID.AddPointer(DSP->getCompileUnit());
397 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
399 case ISD::MEMOPERAND: {
400 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
404 case ISD::FrameIndex:
405 case ISD::TargetFrameIndex:
406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
409 case ISD::TargetJumpTable:
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
412 case ISD::ConstantPool:
413 case ISD::TargetConstantPool: {
414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
415 ID.AddInteger(CP->getAlignment());
416 ID.AddInteger(CP->getOffset());
417 if (CP->isMachineConstantPoolEntry())
418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
420 ID.AddPointer(CP->getConstVal());
424 const CallSDNode *Call = cast<CallSDNode>(N);
425 ID.AddInteger(Call->getCallingConv());
426 ID.AddInteger(Call->isVarArg());
430 const LoadSDNode *LD = cast<LoadSDNode>(N);
431 ID.AddInteger(LD->getAddressingMode());
432 ID.AddInteger(LD->getExtensionType());
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawFlags());
438 const StoreSDNode *ST = cast<StoreSDNode>(N);
439 ID.AddInteger(ST->getAddressingMode());
440 ID.AddInteger(ST->isTruncatingStore());
441 ID.AddInteger(ST->getMemoryVT().getRawBits());
442 ID.AddInteger(ST->getRawFlags());
445 case ISD::ATOMIC_CMP_SWAP_8:
446 case ISD::ATOMIC_SWAP_8:
447 case ISD::ATOMIC_LOAD_ADD_8:
448 case ISD::ATOMIC_LOAD_SUB_8:
449 case ISD::ATOMIC_LOAD_AND_8:
450 case ISD::ATOMIC_LOAD_OR_8:
451 case ISD::ATOMIC_LOAD_XOR_8:
452 case ISD::ATOMIC_LOAD_NAND_8:
453 case ISD::ATOMIC_LOAD_MIN_8:
454 case ISD::ATOMIC_LOAD_MAX_8:
455 case ISD::ATOMIC_LOAD_UMIN_8:
456 case ISD::ATOMIC_LOAD_UMAX_8:
457 case ISD::ATOMIC_CMP_SWAP_16:
458 case ISD::ATOMIC_SWAP_16:
459 case ISD::ATOMIC_LOAD_ADD_16:
460 case ISD::ATOMIC_LOAD_SUB_16:
461 case ISD::ATOMIC_LOAD_AND_16:
462 case ISD::ATOMIC_LOAD_OR_16:
463 case ISD::ATOMIC_LOAD_XOR_16:
464 case ISD::ATOMIC_LOAD_NAND_16:
465 case ISD::ATOMIC_LOAD_MIN_16:
466 case ISD::ATOMIC_LOAD_MAX_16:
467 case ISD::ATOMIC_LOAD_UMIN_16:
468 case ISD::ATOMIC_LOAD_UMAX_16:
469 case ISD::ATOMIC_CMP_SWAP_32:
470 case ISD::ATOMIC_SWAP_32:
471 case ISD::ATOMIC_LOAD_ADD_32:
472 case ISD::ATOMIC_LOAD_SUB_32:
473 case ISD::ATOMIC_LOAD_AND_32:
474 case ISD::ATOMIC_LOAD_OR_32:
475 case ISD::ATOMIC_LOAD_XOR_32:
476 case ISD::ATOMIC_LOAD_NAND_32:
477 case ISD::ATOMIC_LOAD_MIN_32:
478 case ISD::ATOMIC_LOAD_MAX_32:
479 case ISD::ATOMIC_LOAD_UMIN_32:
480 case ISD::ATOMIC_LOAD_UMAX_32:
481 case ISD::ATOMIC_CMP_SWAP_64:
482 case ISD::ATOMIC_SWAP_64:
483 case ISD::ATOMIC_LOAD_ADD_64:
484 case ISD::ATOMIC_LOAD_SUB_64:
485 case ISD::ATOMIC_LOAD_AND_64:
486 case ISD::ATOMIC_LOAD_OR_64:
487 case ISD::ATOMIC_LOAD_XOR_64:
488 case ISD::ATOMIC_LOAD_NAND_64:
489 case ISD::ATOMIC_LOAD_MIN_64:
490 case ISD::ATOMIC_LOAD_MAX_64:
491 case ISD::ATOMIC_LOAD_UMIN_64:
492 case ISD::ATOMIC_LOAD_UMAX_64: {
493 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
494 ID.AddInteger(AT->getRawFlags());
497 } // end switch (N->getOpcode())
500 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
502 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
503 AddNodeIDOpcode(ID, N->getOpcode());
504 // Add the return value info.
505 AddNodeIDValueTypes(ID, N->getVTList());
506 // Add the operand info.
507 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
509 // Handle SDNode leafs with special info.
510 AddNodeIDCustom(ID, N);
513 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
514 /// the CSE map that carries both alignment and volatility information.
516 static inline unsigned
517 encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) {
518 return isVolatile | ((Log2_32(Alignment) + 1) << 1);
521 //===----------------------------------------------------------------------===//
522 // SelectionDAG Class
523 //===----------------------------------------------------------------------===//
525 /// doNotCSE - Return true if CSE should not be performed for this node.
526 static bool doNotCSE(SDNode *N) {
527 if (N->getValueType(0) == MVT::Flag)
528 return true; // Never CSE anything that produces a flag.
530 switch (N->getOpcode()) {
532 case ISD::HANDLENODE:
534 case ISD::DBG_STOPPOINT:
537 return true; // Never CSE these nodes.
540 // Check that remaining values produced are not flags.
541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
542 if (N->getValueType(i) == MVT::Flag)
543 return true; // Never CSE anything that produces a flag.
548 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
550 void SelectionDAG::RemoveDeadNodes() {
551 // Create a dummy node (which is not added to allnodes), that adds a reference
552 // to the root node, preventing it from being deleted.
553 HandleSDNode Dummy(getRoot());
555 SmallVector<SDNode*, 128> DeadNodes;
557 // Add all obviously-dead nodes to the DeadNodes worklist.
558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
560 DeadNodes.push_back(I);
562 RemoveDeadNodes(DeadNodes);
564 // If the root changed (e.g. it was a dead load, update the root).
565 setRoot(Dummy.getValue());
568 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
569 /// given list, and any nodes that become unreachable as a result.
570 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
571 DAGUpdateListener *UpdateListener) {
573 // Process the worklist, deleting the nodes and adding their uses to the
575 while (!DeadNodes.empty()) {
576 SDNode *N = DeadNodes.back();
577 DeadNodes.pop_back();
580 UpdateListener->NodeDeleted(N, 0);
582 // Take the node out of the appropriate CSE map.
583 RemoveNodeFromCSEMaps(N);
585 // Next, brutally remove the operand list. This is safe to do, as there are
586 // no cycles in the graph.
587 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
588 SDNode *Operand = I->getVal();
589 Operand->removeUser(std::distance(N->op_begin(), I), N);
591 // Now that we removed this operand, see if there are no uses of it left.
592 if (Operand->use_empty())
593 DeadNodes.push_back(Operand);
596 if (N->OperandsNeedDelete)
597 delete[] N->OperandList;
602 // Finally, remove N itself.
603 NodeAllocator.Deallocate(AllNodes.remove(N));
607 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
608 SmallVector<SDNode*, 16> DeadNodes(1, N);
609 RemoveDeadNodes(DeadNodes, UpdateListener);
612 void SelectionDAG::DeleteNode(SDNode *N) {
613 assert(N->use_empty() && "Cannot delete a node that is not dead!");
615 // First take this out of the appropriate CSE map.
616 RemoveNodeFromCSEMaps(N);
618 // Finally, remove uses due to operands of this node, remove from the
619 // AllNodes list, and delete the node.
620 DeleteNodeNotInCSEMaps(N);
623 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
624 // Drop all of the operands and decrement used node's use counts.
625 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
626 I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
628 if (N->OperandsNeedDelete) {
629 delete[] N->OperandList;
633 assert(N != AllNodes.begin());
634 NodeAllocator.Deallocate(AllNodes.remove(N));
637 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
638 /// correspond to it. This is useful when we're about to delete or repurpose
639 /// the node. We don't want future request for structurally identical nodes
640 /// to return N anymore.
641 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
643 switch (N->getOpcode()) {
644 case ISD::EntryToken:
645 assert(0 && "EntryToken should not be in CSEMaps!");
647 case ISD::HANDLENODE: return false; // noop.
649 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
650 "Cond code doesn't exist!");
651 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
652 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
654 case ISD::ExternalSymbol:
655 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
657 case ISD::TargetExternalSymbol:
659 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
661 case ISD::VALUETYPE: {
662 MVT VT = cast<VTSDNode>(N)->getVT();
663 if (VT.isExtended()) {
664 Erased = ExtendedValueTypeNodes.erase(VT);
666 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
667 ValueTypeNodes[VT.getSimpleVT()] = 0;
672 // Remove it from the CSE Map.
673 Erased = CSEMap.RemoveNode(N);
677 // Verify that the node was actually in one of the CSE maps, unless it has a
678 // flag result (which cannot be CSE'd) or is one of the special cases that are
679 // not subject to CSE.
680 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
681 !N->isMachineOpcode() && !doNotCSE(N)) {
684 assert(0 && "Node is not in map!");
690 /// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It
691 /// has been taken out and modified in some way. If the specified node already
692 /// exists in the CSE maps, do not modify the maps, but return the existing node
693 /// instead. If it doesn't exist, add it and return null.
695 SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
696 assert(N->getNumOperands() && "This is a leaf node!");
701 SDNode *New = CSEMap.GetOrInsertNode(N);
702 if (New != N) return New; // Node already existed.
706 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
707 /// were replaced with those specified. If this node is never memoized,
708 /// return null, otherwise return a pointer to the slot it would take. If a
709 /// node already exists with these operands, the slot will be non-null.
710 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
715 SDValue Ops[] = { Op };
717 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
718 AddNodeIDCustom(ID, N);
719 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
722 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
723 /// were replaced with those specified. If this node is never memoized,
724 /// return null, otherwise return a pointer to the slot it would take. If a
725 /// node already exists with these operands, the slot will be non-null.
726 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
727 SDValue Op1, SDValue Op2,
732 SDValue Ops[] = { Op1, Op2 };
734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
735 AddNodeIDCustom(ID, N);
736 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
740 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
741 /// were replaced with those specified. If this node is never memoized,
742 /// return null, otherwise return a pointer to the slot it would take. If a
743 /// node already exists with these operands, the slot will be non-null.
744 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
745 const SDValue *Ops,unsigned NumOps,
751 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
752 AddNodeIDCustom(ID, N);
753 return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
756 /// VerifyNode - Sanity check the given node. Aborts if it is invalid.
757 void SelectionDAG::VerifyNode(SDNode *N) {
758 switch (N->getOpcode()) {
761 case ISD::BUILD_PAIR: {
762 MVT VT = N->getValueType(0);
763 assert(N->getNumValues() == 1 && "Too many results!");
764 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
765 "Wrong return type!");
766 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
767 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
768 "Mismatched operand types!");
769 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
770 "Wrong operand type!");
771 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
772 "Wrong return type size");
775 case ISD::BUILD_VECTOR: {
776 assert(N->getNumValues() == 1 && "Too many results!");
777 assert(N->getValueType(0).isVector() && "Wrong return type!");
778 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
779 "Wrong number of operands!");
780 // FIXME: Change vector_shuffle to a variadic node with mask elements being
781 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an
782 // operand, and it is not always possible to legalize it. Turning off the
783 // following checks at least makes it possible to legalize most of the time.
784 // MVT EltVT = N->getValueType(0).getVectorElementType();
785 // for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
786 // assert(I->getSDValue().getValueType() == EltVT &&
787 // "Wrong operand type!");
793 /// getMVTAlignment - Compute the default alignment value for the
796 unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
797 const Type *Ty = VT == MVT::iPTR ?
798 PointerType::get(Type::Int8Ty, 0) :
801 return TLI.getTargetData()->getABITypeAlignment(Ty);
804 SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
805 : TLI(tli), FLI(fli),
806 EntryNode(ISD::EntryToken, getVTList(MVT::Other)),
807 Root(getEntryNode()) {
808 AllNodes.push_back(&EntryNode);
811 void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) {
816 SelectionDAG::~SelectionDAG() {
820 void SelectionDAG::allnodes_clear() {
821 assert(&*AllNodes.begin() == &EntryNode);
822 AllNodes.remove(AllNodes.begin());
823 while (!AllNodes.empty()) {
824 SDNode *N = AllNodes.remove(AllNodes.begin());
825 N->SetNextInBucket(0);
827 if (N->OperandsNeedDelete) {
828 delete [] N->OperandList;
832 NodeAllocator.Deallocate(N);
836 void SelectionDAG::clear() {
838 OperandAllocator.Reset();
841 ExtendedValueTypeNodes.clear();
842 ExternalSymbols.clear();
843 TargetExternalSymbols.clear();
844 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
845 static_cast<CondCodeSDNode*>(0));
846 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
847 static_cast<SDNode*>(0));
850 AllNodes.push_back(&EntryNode);
851 Root = getEntryNode();
854 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) {
855 if (Op.getValueType() == VT) return Op;
856 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
858 return getNode(ISD::AND, Op.getValueType(), Op,
859 getConstant(Imm, Op.getValueType()));
862 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
863 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
867 SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
868 return getConstant(*ConstantInt::get(Val), VT, isT);
871 SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
872 assert(VT.isInteger() && "Cannot create FP integer constant!");
874 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
875 assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
876 "APInt size does not match type size!");
878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
886 return SDValue(N, 0);
888 N = NodeAllocator.Allocate<ConstantSDNode>();
889 new (N) ConstantSDNode(isT, &Val, EltVT);
890 CSEMap.InsertNode(N, IP);
891 AllNodes.push_back(N);
894 SDValue Result(N, 0);
896 SmallVector<SDValue, 8> Ops;
897 Ops.assign(VT.getVectorNumElements(), Result);
898 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
903 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
904 return getConstant(Val, TLI.getPointerTy(), isTarget);
908 SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
909 return getConstantFP(*ConstantFP::get(V), VT, isTarget);
912 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
913 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
916 VT.isVector() ? VT.getVectorElementType() : VT;
918 // Do the map lookup using the actual bit pattern for the floating point
919 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
920 // we don't have issues with SNANs.
921 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
923 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
927 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
929 return SDValue(N, 0);
931 N = NodeAllocator.Allocate<ConstantFPSDNode>();
932 new (N) ConstantFPSDNode(isTarget, &V, EltVT);
933 CSEMap.InsertNode(N, IP);
934 AllNodes.push_back(N);
937 SDValue Result(N, 0);
939 SmallVector<SDValue, 8> Ops;
940 Ops.assign(VT.getVectorNumElements(), Result);
941 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
946 SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
948 VT.isVector() ? VT.getVectorElementType() : VT;
950 return getConstantFP(APFloat((float)Val), VT, isTarget);
952 return getConstantFP(APFloat(Val), VT, isTarget);
955 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
956 MVT VT, int64_t Offset,
960 // Truncate (with sign-extension) the offset value to the pointer size.
961 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
963 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
965 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
967 // If GV is an alias then use the aliasee for determining thread-localness.
968 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
969 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
972 if (GVar && GVar->isThreadLocal())
973 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
975 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
978 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
980 ID.AddInteger(Offset);
982 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
983 return SDValue(E, 0);
984 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
985 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
986 CSEMap.InsertNode(N, IP);
987 AllNodes.push_back(N);
988 return SDValue(N, 0);
991 SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
992 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
994 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
998 return SDValue(E, 0);
999 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
1000 new (N) FrameIndexSDNode(FI, VT, isTarget);
1001 CSEMap.InsertNode(N, IP);
1002 AllNodes.push_back(N);
1003 return SDValue(N, 0);
1006 SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
1007 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1008 FoldingSetNodeID ID;
1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1013 return SDValue(E, 0);
1014 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
1015 new (N) JumpTableSDNode(JTI, VT, isTarget);
1016 CSEMap.InsertNode(N, IP);
1017 AllNodes.push_back(N);
1018 return SDValue(N, 0);
1021 SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
1022 unsigned Alignment, int Offset,
1026 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1027 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1028 FoldingSetNodeID ID;
1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1030 ID.AddInteger(Alignment);
1031 ID.AddInteger(Offset);
1034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1035 return SDValue(E, 0);
1036 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1037 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1038 CSEMap.InsertNode(N, IP);
1039 AllNodes.push_back(N);
1040 return SDValue(N, 0);
1044 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
1045 unsigned Alignment, int Offset,
1049 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType());
1050 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1053 ID.AddInteger(Alignment);
1054 ID.AddInteger(Offset);
1055 C->AddSelectionDAGCSEId(ID);
1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1058 return SDValue(E, 0);
1059 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
1060 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
1061 CSEMap.InsertNode(N, IP);
1062 AllNodes.push_back(N);
1063 return SDValue(N, 0);
1067 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1068 FoldingSetNodeID ID;
1069 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1073 return SDValue(E, 0);
1074 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
1075 new (N) BasicBlockSDNode(MBB);
1076 CSEMap.InsertNode(N, IP);
1077 AllNodes.push_back(N);
1078 return SDValue(N, 0);
1081 SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
1082 FoldingSetNodeID ID;
1083 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0);
1084 ID.AddInteger(Flags.getRawBits());
1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1087 return SDValue(E, 0);
1088 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>();
1089 new (N) ARG_FLAGSSDNode(Flags);
1090 CSEMap.InsertNode(N, IP);
1091 AllNodes.push_back(N);
1092 return SDValue(N, 0);
1095 SDValue SelectionDAG::getValueType(MVT VT) {
1096 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
1097 ValueTypeNodes.resize(VT.getSimpleVT()+1);
1099 SDNode *&N = VT.isExtended() ?
1100 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
1102 if (N) return SDValue(N, 0);
1103 N = NodeAllocator.Allocate<VTSDNode>();
1104 new (N) VTSDNode(VT);
1105 AllNodes.push_back(N);
1106 return SDValue(N, 0);
1109 SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
1110 SDNode *&N = ExternalSymbols[Sym];
1111 if (N) return SDValue(N, 0);
1112 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1113 new (N) ExternalSymbolSDNode(false, Sym, VT);
1114 AllNodes.push_back(N);
1115 return SDValue(N, 0);
1118 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
1119 SDNode *&N = TargetExternalSymbols[Sym];
1120 if (N) return SDValue(N, 0);
1121 N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
1122 new (N) ExternalSymbolSDNode(true, Sym, VT);
1123 AllNodes.push_back(N);
1124 return SDValue(N, 0);
1127 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1128 if ((unsigned)Cond >= CondCodeNodes.size())
1129 CondCodeNodes.resize(Cond+1);
1131 if (CondCodeNodes[Cond] == 0) {
1132 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>();
1133 new (N) CondCodeSDNode(Cond);
1134 CondCodeNodes[Cond] = N;
1135 AllNodes.push_back(N);
1137 return SDValue(CondCodeNodes[Cond], 0);
1140 SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy,
1141 SDValue STy, SDValue Rnd, SDValue Sat,
1142 ISD::CvtCode Code) {
1143 FoldingSetNodeID ID;
1145 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1146 return SDValue(E, 0);
1147 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
1148 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1149 new (N) CvtRndSatSDNode(VT, Ops, 5, Code);
1150 CSEMap.InsertNode(N, IP);
1151 AllNodes.push_back(N);
1152 return SDValue(N, 0);
1155 SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1156 FoldingSetNodeID ID;
1157 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1158 ID.AddInteger(RegNo);
1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1161 return SDValue(E, 0);
1162 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
1163 new (N) RegisterSDNode(RegNo, VT);
1164 CSEMap.InsertNode(N, IP);
1165 AllNodes.push_back(N);
1166 return SDValue(N, 0);
1169 SDValue SelectionDAG::getDbgStopPoint(SDValue Root,
1170 unsigned Line, unsigned Col,
1171 const CompileUnitDesc *CU) {
1172 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>();
1173 new (N) DbgStopPointSDNode(Root, Line, Col, CU);
1174 AllNodes.push_back(N);
1175 return SDValue(N, 0);
1178 SDValue SelectionDAG::getLabel(unsigned Opcode,
1181 FoldingSetNodeID ID;
1182 SDValue Ops[] = { Root };
1183 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
1184 ID.AddInteger(LabelID);
1186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1187 return SDValue(E, 0);
1188 SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
1189 new (N) LabelSDNode(Opcode, Root, LabelID);
1190 CSEMap.InsertNode(N, IP);
1191 AllNodes.push_back(N);
1192 return SDValue(N, 0);
1195 SDValue SelectionDAG::getSrcValue(const Value *V) {
1196 assert((!V || isa<PointerType>(V->getType())) &&
1197 "SrcValue is not a pointer?");
1199 FoldingSetNodeID ID;
1200 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1204 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1205 return SDValue(E, 0);
1207 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
1208 new (N) SrcValueSDNode(V);
1209 CSEMap.InsertNode(N, IP);
1210 AllNodes.push_back(N);
1211 return SDValue(N, 0);
1214 SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1216 const Value *v = MO.getValue();
1217 assert((!v || isa<PointerType>(v->getType())) &&
1218 "SrcValue is not a pointer?");
1221 FoldingSetNodeID ID;
1222 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
1226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1227 return SDValue(E, 0);
1229 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>();
1230 new (N) MemOperandSDNode(MO);
1231 CSEMap.InsertNode(N, IP);
1232 AllNodes.push_back(N);
1233 return SDValue(N, 0);
1236 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1237 /// specified value type.
1238 SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
1239 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1240 unsigned ByteSize = VT.getStoreSizeInBits()/8;
1241 const Type *Ty = VT.getTypeForMVT();
1242 unsigned StackAlign =
1243 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1245 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1246 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1249 SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
1250 SDValue N2, ISD::CondCode Cond) {
1251 // These setcc operations always fold.
1255 case ISD::SETFALSE2: return getConstant(0, VT);
1257 case ISD::SETTRUE2: return getConstant(1, VT);
1269 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1273 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1274 const APInt &C2 = N2C->getAPIntValue();
1275 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1276 const APInt &C1 = N1C->getAPIntValue();
1279 default: assert(0 && "Unknown integer setcc!");
1280 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1281 case ISD::SETNE: return getConstant(C1 != C2, VT);
1282 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1283 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1284 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1285 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1286 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1287 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1288 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1289 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1293 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1294 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1295 // No compile time operations on this type yet.
1296 if (N1C->getValueType(0) == MVT::ppcf128)
1299 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1302 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1303 return getNode(ISD::UNDEF, VT);
1305 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1306 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1307 return getNode(ISD::UNDEF, VT);
1309 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1310 R==APFloat::cmpLessThan, VT);
1311 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1312 return getNode(ISD::UNDEF, VT);
1314 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1315 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1316 return getNode(ISD::UNDEF, VT);
1318 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1319 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1320 return getNode(ISD::UNDEF, VT);
1322 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1323 R==APFloat::cmpEqual, VT);
1324 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1325 return getNode(ISD::UNDEF, VT);
1327 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1328 R==APFloat::cmpEqual, VT);
1329 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1330 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1331 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1332 R==APFloat::cmpEqual, VT);
1333 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1334 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1335 R==APFloat::cmpLessThan, VT);
1336 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1337 R==APFloat::cmpUnordered, VT);
1338 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1339 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1342 // Ensure that the constant occurs on the RHS.
1343 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1347 // Could not fold it.
1351 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1352 /// use this predicate to simplify operations downstream.
1353 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1354 unsigned BitWidth = Op.getValueSizeInBits();
1355 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1358 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1359 /// this predicate to simplify operations downstream. Mask is known to be zero
1360 /// for bits that V cannot have.
1361 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1362 unsigned Depth) const {
1363 APInt KnownZero, KnownOne;
1364 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1365 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1366 return (KnownZero & Mask) == Mask;
1369 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1370 /// known to be either zero or one and return them in the KnownZero/KnownOne
1371 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1373 void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask,
1374 APInt &KnownZero, APInt &KnownOne,
1375 unsigned Depth) const {
1376 unsigned BitWidth = Mask.getBitWidth();
1377 assert(BitWidth == Op.getValueType().getSizeInBits() &&
1378 "Mask size mismatches value type size!");
1380 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1381 if (Depth == 6 || Mask == 0)
1382 return; // Limit search depth.
1384 APInt KnownZero2, KnownOne2;
1386 switch (Op.getOpcode()) {
1388 // We know all of the bits for a constant!
1389 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1390 KnownZero = ~KnownOne & Mask;
1393 // If either the LHS or the RHS are Zero, the result is zero.
1394 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1395 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1396 KnownZero2, KnownOne2, Depth+1);
1397 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1398 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1400 // Output known-1 bits are only known if set in both the LHS & RHS.
1401 KnownOne &= KnownOne2;
1402 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1403 KnownZero |= KnownZero2;
1406 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1407 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1408 KnownZero2, KnownOne2, Depth+1);
1409 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1410 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1412 // Output known-0 bits are only known if clear in both the LHS & RHS.
1413 KnownZero &= KnownZero2;
1414 // Output known-1 are known to be set if set in either the LHS | RHS.
1415 KnownOne |= KnownOne2;
1418 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1419 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1420 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1421 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1423 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1424 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1425 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1426 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1427 KnownZero = KnownZeroOut;
1431 APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1432 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1433 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1434 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1435 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1437 // If low bits are zero in either operand, output low known-0 bits.
1438 // Also compute a conserative estimate for high known-0 bits.
1439 // More trickiness is possible, but this is sufficient for the
1440 // interesting case of alignment computation.
1442 unsigned TrailZ = KnownZero.countTrailingOnes() +
1443 KnownZero2.countTrailingOnes();
1444 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1445 KnownZero2.countLeadingOnes(),
1446 BitWidth) - BitWidth;
1448 TrailZ = std::min(TrailZ, BitWidth);
1449 LeadZ = std::min(LeadZ, BitWidth);
1450 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1451 APInt::getHighBitsSet(BitWidth, LeadZ);
1456 // For the purposes of computing leading zeros we can conservatively
1457 // treat a udiv as a logical right shift by the power of 2 known to
1458 // be less than the denominator.
1459 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1460 ComputeMaskedBits(Op.getOperand(0),
1461 AllOnes, KnownZero2, KnownOne2, Depth+1);
1462 unsigned LeadZ = KnownZero2.countLeadingOnes();
1466 ComputeMaskedBits(Op.getOperand(1),
1467 AllOnes, KnownZero2, KnownOne2, Depth+1);
1468 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1469 if (RHSUnknownLeadingOnes != BitWidth)
1470 LeadZ = std::min(BitWidth,
1471 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1473 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1477 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1478 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1479 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1480 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1482 // Only known if known in both the LHS and RHS.
1483 KnownOne &= KnownOne2;
1484 KnownZero &= KnownZero2;
1486 case ISD::SELECT_CC:
1487 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1488 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1489 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1490 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1492 // Only known if known in both the LHS and RHS.
1493 KnownOne &= KnownOne2;
1494 KnownZero &= KnownZero2;
1498 if (Op.getResNo() != 1)
1500 // The boolean result conforms to getBooleanContents. Fall through.
1502 // If we know the result of a setcc has the top bits zero, use this info.
1503 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent &&
1505 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1508 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1509 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1510 unsigned ShAmt = SA->getZExtValue();
1512 // If the shift count is an invalid immediate, don't do anything.
1513 if (ShAmt >= BitWidth)
1516 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1517 KnownZero, KnownOne, Depth+1);
1518 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1519 KnownZero <<= ShAmt;
1521 // low bits known zero.
1522 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1526 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1527 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1528 unsigned ShAmt = SA->getZExtValue();
1530 // If the shift count is an invalid immediate, don't do anything.
1531 if (ShAmt >= BitWidth)
1534 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1535 KnownZero, KnownOne, Depth+1);
1536 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1537 KnownZero = KnownZero.lshr(ShAmt);
1538 KnownOne = KnownOne.lshr(ShAmt);
1540 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1541 KnownZero |= HighBits; // High bits known zero.
1545 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1546 unsigned ShAmt = SA->getZExtValue();
1548 // If the shift count is an invalid immediate, don't do anything.
1549 if (ShAmt >= BitWidth)
1552 APInt InDemandedMask = (Mask << ShAmt);
1553 // If any of the demanded bits are produced by the sign extension, we also
1554 // demand the input sign bit.
1555 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1556 if (HighBits.getBoolValue())
1557 InDemandedMask |= APInt::getSignBit(BitWidth);
1559 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1561 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1562 KnownZero = KnownZero.lshr(ShAmt);
1563 KnownOne = KnownOne.lshr(ShAmt);
1565 // Handle the sign bits.
1566 APInt SignBit = APInt::getSignBit(BitWidth);
1567 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1569 if (KnownZero.intersects(SignBit)) {
1570 KnownZero |= HighBits; // New bits are known zero.
1571 } else if (KnownOne.intersects(SignBit)) {
1572 KnownOne |= HighBits; // New bits are known one.
1576 case ISD::SIGN_EXTEND_INREG: {
1577 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1578 unsigned EBits = EVT.getSizeInBits();
1580 // Sign extension. Compute the demanded bits in the result that are not
1581 // present in the input.
1582 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1584 APInt InSignBit = APInt::getSignBit(EBits);
1585 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1587 // If the sign extended bits are demanded, we know that the sign
1589 InSignBit.zext(BitWidth);
1590 if (NewBits.getBoolValue())
1591 InputDemandedBits |= InSignBit;
1593 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1594 KnownZero, KnownOne, Depth+1);
1595 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1597 // If the sign bit of the input is known set or clear, then we know the
1598 // top bits of the result.
1599 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1600 KnownZero |= NewBits;
1601 KnownOne &= ~NewBits;
1602 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1603 KnownOne |= NewBits;
1604 KnownZero &= ~NewBits;
1605 } else { // Input sign bit unknown
1606 KnownZero &= ~NewBits;
1607 KnownOne &= ~NewBits;
1614 unsigned LowBits = Log2_32(BitWidth)+1;
1615 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1620 if (ISD::isZEXTLoad(Op.getNode())) {
1621 LoadSDNode *LD = cast<LoadSDNode>(Op);
1622 MVT VT = LD->getMemoryVT();
1623 unsigned MemBits = VT.getSizeInBits();
1624 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1628 case ISD::ZERO_EXTEND: {
1629 MVT InVT = Op.getOperand(0).getValueType();
1630 unsigned InBits = InVT.getSizeInBits();
1631 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1632 APInt InMask = Mask;
1633 InMask.trunc(InBits);
1634 KnownZero.trunc(InBits);
1635 KnownOne.trunc(InBits);
1636 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1637 KnownZero.zext(BitWidth);
1638 KnownOne.zext(BitWidth);
1639 KnownZero |= NewBits;
1642 case ISD::SIGN_EXTEND: {
1643 MVT InVT = Op.getOperand(0).getValueType();
1644 unsigned InBits = InVT.getSizeInBits();
1645 APInt InSignBit = APInt::getSignBit(InBits);
1646 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1647 APInt InMask = Mask;
1648 InMask.trunc(InBits);
1650 // If any of the sign extended bits are demanded, we know that the sign
1651 // bit is demanded. Temporarily set this bit in the mask for our callee.
1652 if (NewBits.getBoolValue())
1653 InMask |= InSignBit;
1655 KnownZero.trunc(InBits);
1656 KnownOne.trunc(InBits);
1657 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1659 // Note if the sign bit is known to be zero or one.
1660 bool SignBitKnownZero = KnownZero.isNegative();
1661 bool SignBitKnownOne = KnownOne.isNegative();
1662 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1663 "Sign bit can't be known to be both zero and one!");
1665 // If the sign bit wasn't actually demanded by our caller, we don't
1666 // want it set in the KnownZero and KnownOne result values. Reset the
1667 // mask and reapply it to the result values.
1669 InMask.trunc(InBits);
1670 KnownZero &= InMask;
1673 KnownZero.zext(BitWidth);
1674 KnownOne.zext(BitWidth);
1676 // If the sign bit is known zero or one, the top bits match.
1677 if (SignBitKnownZero)
1678 KnownZero |= NewBits;
1679 else if (SignBitKnownOne)
1680 KnownOne |= NewBits;
1683 case ISD::ANY_EXTEND: {
1684 MVT InVT = Op.getOperand(0).getValueType();
1685 unsigned InBits = InVT.getSizeInBits();
1686 APInt InMask = Mask;
1687 InMask.trunc(InBits);
1688 KnownZero.trunc(InBits);
1689 KnownOne.trunc(InBits);
1690 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1691 KnownZero.zext(BitWidth);
1692 KnownOne.zext(BitWidth);
1695 case ISD::TRUNCATE: {
1696 MVT InVT = Op.getOperand(0).getValueType();
1697 unsigned InBits = InVT.getSizeInBits();
1698 APInt InMask = Mask;
1699 InMask.zext(InBits);
1700 KnownZero.zext(InBits);
1701 KnownOne.zext(InBits);
1702 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 KnownZero.trunc(BitWidth);
1705 KnownOne.trunc(BitWidth);
1708 case ISD::AssertZext: {
1709 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1710 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1711 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1713 KnownZero |= (~InMask) & Mask;
1717 // All bits are zero except the low bit.
1718 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1722 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1723 // We know that the top bits of C-X are clear if X contains less bits
1724 // than C (i.e. no wrap-around can happen). For example, 20-X is
1725 // positive if we can prove that X is >= 0 and < 16.
1726 if (CLHS->getAPIntValue().isNonNegative()) {
1727 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1728 // NLZ can't be BitWidth with no sign bit
1729 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1730 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1733 // If all of the MaskV bits are known to be zero, then we know the
1734 // output top bits are zero, because we now know that the output is
1736 if ((KnownZero2 & MaskV) == MaskV) {
1737 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1738 // Top bits known zero.
1739 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1746 // Output known-0 bits are known if clear or set in both the low clear bits
1747 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1748 // low 3 bits clear.
1749 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1750 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1751 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1752 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1754 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1755 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1756 KnownZeroOut = std::min(KnownZeroOut,
1757 KnownZero2.countTrailingOnes());
1759 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1763 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1764 const APInt &RA = Rem->getAPIntValue();
1765 if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1766 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1767 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1768 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1770 // If the sign bit of the first operand is zero, the sign bit of
1771 // the result is zero. If the first operand has no one bits below
1772 // the second operand's single 1 bit, its sign will be zero.
1773 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1774 KnownZero2 |= ~LowBits;
1776 KnownZero |= KnownZero2 & Mask;
1778 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1783 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1784 const APInt &RA = Rem->getAPIntValue();
1785 if (RA.isPowerOf2()) {
1786 APInt LowBits = (RA - 1);
1787 APInt Mask2 = LowBits & Mask;
1788 KnownZero |= ~LowBits & Mask;
1789 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1790 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1795 // Since the result is less than or equal to either operand, any leading
1796 // zero bits in either operand must also exist in the result.
1797 APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1798 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1800 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1803 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1804 KnownZero2.countLeadingOnes());
1806 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1810 // Allow the target to implement this method for its nodes.
1811 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1812 case ISD::INTRINSIC_WO_CHAIN:
1813 case ISD::INTRINSIC_W_CHAIN:
1814 case ISD::INTRINSIC_VOID:
1815 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1821 /// ComputeNumSignBits - Return the number of times the sign bit of the
1822 /// register is replicated into the other bits. We know that at least 1 bit
1823 /// is always equal to the sign bit (itself), but other cases can give us
1824 /// information. For example, immediately after an "SRA X, 2", we know that
1825 /// the top 3 bits are all equal to each other, so we return 3.
1826 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
1827 MVT VT = Op.getValueType();
1828 assert(VT.isInteger() && "Invalid VT!");
1829 unsigned VTBits = VT.getSizeInBits();
1831 unsigned FirstAnswer = 1;
1834 return 1; // Limit search depth.
1836 switch (Op.getOpcode()) {
1838 case ISD::AssertSext:
1839 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1840 return VTBits-Tmp+1;
1841 case ISD::AssertZext:
1842 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1845 case ISD::Constant: {
1846 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1847 // If negative, return # leading ones.
1848 if (Val.isNegative())
1849 return Val.countLeadingOnes();
1851 // Return # leading zeros.
1852 return Val.countLeadingZeros();
1855 case ISD::SIGN_EXTEND:
1856 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1857 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1859 case ISD::SIGN_EXTEND_INREG:
1860 // Max of the input and what this extends.
1861 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1864 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1865 return std::max(Tmp, Tmp2);
1868 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1869 // SRA X, C -> adds C sign bits.
1870 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1871 Tmp += C->getZExtValue();
1872 if (Tmp > VTBits) Tmp = VTBits;
1876 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1877 // shl destroys sign bits.
1878 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1879 if (C->getZExtValue() >= VTBits || // Bad shift.
1880 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
1881 return Tmp - C->getZExtValue();
1886 case ISD::XOR: // NOT is handled here.
1887 // Logical binary ops preserve the number of sign bits at the worst.
1888 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1890 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1891 FirstAnswer = std::min(Tmp, Tmp2);
1892 // We computed what we know about the sign bits as our first
1893 // answer. Now proceed to the generic code that uses
1894 // ComputeMaskedBits, and pick whichever answer is better.
1899 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1900 if (Tmp == 1) return 1; // Early out.
1901 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1902 return std::min(Tmp, Tmp2);
1906 if (Op.getResNo() != 1)
1908 // The boolean result conforms to getBooleanContents. Fall through.
1910 // If setcc returns 0/-1, all bits are sign bits.
1911 if (TLI.getBooleanContents() ==
1912 TargetLowering::ZeroOrNegativeOneBooleanContent)
1917 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1918 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
1920 // Handle rotate right by N like a rotate left by 32-N.
1921 if (Op.getOpcode() == ISD::ROTR)
1922 RotAmt = (VTBits-RotAmt) & (VTBits-1);
1924 // If we aren't rotating out all of the known-in sign bits, return the
1925 // number that are left. This handles rotl(sext(x), 1) for example.
1926 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1927 if (Tmp > RotAmt+1) return Tmp-RotAmt;
1931 // Add can have at most one carry bit. Thus we know that the output
1932 // is, at worst, one more bit than the inputs.
1933 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1934 if (Tmp == 1) return 1; // Early out.
1936 // Special case decrementing a value (ADD X, -1):
1937 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1938 if (CRHS->isAllOnesValue()) {
1939 APInt KnownZero, KnownOne;
1940 APInt Mask = APInt::getAllOnesValue(VTBits);
1941 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1943 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1945 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1948 // If we are subtracting one from a positive number, there is no carry
1949 // out of the result.
1950 if (KnownZero.isNegative())
1954 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1955 if (Tmp2 == 1) return 1;
1956 return std::min(Tmp, Tmp2)-1;
1960 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1961 if (Tmp2 == 1) return 1;
1964 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1965 if (CLHS->isNullValue()) {
1966 APInt KnownZero, KnownOne;
1967 APInt Mask = APInt::getAllOnesValue(VTBits);
1968 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1969 // If the input is known to be 0 or 1, the output is 0/-1, which is all
1971 if ((KnownZero | APInt(VTBits, 1)) == Mask)
1974 // If the input is known to be positive (the sign bit is known clear),
1975 // the output of the NEG has the same number of sign bits as the input.
1976 if (KnownZero.isNegative())
1979 // Otherwise, we treat this like a SUB.
1982 // Sub can have at most one carry bit. Thus we know that the output
1983 // is, at worst, one more bit than the inputs.
1984 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1985 if (Tmp == 1) return 1; // Early out.
1986 return std::min(Tmp, Tmp2)-1;
1989 // FIXME: it's tricky to do anything useful for this, but it is an important
1990 // case for targets like X86.
1994 // Handle LOADX separately here. EXTLOAD case will fallthrough.
1995 if (Op.getOpcode() == ISD::LOAD) {
1996 LoadSDNode *LD = cast<LoadSDNode>(Op);
1997 unsigned ExtType = LD->getExtensionType();
2000 case ISD::SEXTLOAD: // '17' bits known
2001 Tmp = LD->getMemoryVT().getSizeInBits();
2002 return VTBits-Tmp+1;
2003 case ISD::ZEXTLOAD: // '16' bits known
2004 Tmp = LD->getMemoryVT().getSizeInBits();
2009 // Allow the target to implement this method for its nodes.
2010 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2011 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2012 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2013 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2014 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2015 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2018 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2019 // use this information.
2020 APInt KnownZero, KnownOne;
2021 APInt Mask = APInt::getAllOnesValue(VTBits);
2022 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
2024 if (KnownZero.isNegative()) { // sign bit is 0
2026 } else if (KnownOne.isNegative()) { // sign bit is 1;
2033 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2034 // the number of identical bits in the top of the input value.
2036 Mask <<= Mask.getBitWidth()-VTBits;
2037 // Return # leading zeros. We use 'min' here in case Val was zero before
2038 // shifting. We don't want to return '64' as for an i32 "0".
2039 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2043 bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const {
2044 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2045 if (!GA) return false;
2046 if (GA->getOffset() != 0) return false;
2047 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
2048 if (!GV) return false;
2049 MachineModuleInfo *MMI = getMachineModuleInfo();
2050 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
2054 /// getShuffleScalarElt - Returns the scalar element that will make up the ith
2055 /// element of the result of the vector shuffle.
2056 SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
2057 MVT VT = N->getValueType(0);
2058 SDValue PermMask = N->getOperand(2);
2059 SDValue Idx = PermMask.getOperand(i);
2060 if (Idx.getOpcode() == ISD::UNDEF)
2061 return getNode(ISD::UNDEF, VT.getVectorElementType());
2062 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue();
2063 unsigned NumElems = PermMask.getNumOperands();
2064 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
2067 if (V.getOpcode() == ISD::BIT_CONVERT) {
2068 V = V.getOperand(0);
2069 if (V.getValueType().getVectorNumElements() != NumElems)
2072 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
2073 return (Index == 0) ? V.getOperand(0)
2074 : getNode(ISD::UNDEF, VT.getVectorElementType());
2075 if (V.getOpcode() == ISD::BUILD_VECTOR)
2076 return V.getOperand(Index);
2077 if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
2078 return getShuffleScalarElt(V.getNode(), Index);
2083 /// getNode - Gets or creates the specified node.
2085 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) {
2086 FoldingSetNodeID ID;
2087 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2089 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2090 return SDValue(E, 0);
2091 SDNode *N = NodeAllocator.Allocate<SDNode>();
2092 new (N) SDNode(Opcode, SDNode::getSDVTList(VT));
2093 CSEMap.InsertNode(N, IP);
2095 AllNodes.push_back(N);
2099 return SDValue(N, 0);
2102 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) {
2103 // Constant fold unary operations with an integer constant operand.
2104 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2105 const APInt &Val = C->getAPIntValue();
2106 unsigned BitWidth = VT.getSizeInBits();
2109 case ISD::SIGN_EXTEND:
2110 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
2111 case ISD::ANY_EXTEND:
2112 case ISD::ZERO_EXTEND:
2114 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
2115 case ISD::UINT_TO_FP:
2116 case ISD::SINT_TO_FP: {
2117 const uint64_t zero[] = {0, 0};
2118 // No compile time operations on this type.
2119 if (VT==MVT::ppcf128)
2121 APFloat apf = APFloat(APInt(BitWidth, 2, zero));
2122 (void)apf.convertFromAPInt(Val,
2123 Opcode==ISD::SINT_TO_FP,
2124 APFloat::rmNearestTiesToEven);
2125 return getConstantFP(apf, VT);
2127 case ISD::BIT_CONVERT:
2128 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2129 return getConstantFP(Val.bitsToFloat(), VT);
2130 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2131 return getConstantFP(Val.bitsToDouble(), VT);
2134 return getConstant(Val.byteSwap(), VT);
2136 return getConstant(Val.countPopulation(), VT);
2138 return getConstant(Val.countLeadingZeros(), VT);
2140 return getConstant(Val.countTrailingZeros(), VT);
2144 // Constant fold unary operations with a floating point constant operand.
2145 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2146 APFloat V = C->getValueAPF(); // make copy
2147 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2151 return getConstantFP(V, VT);
2154 return getConstantFP(V, VT);
2156 case ISD::FP_EXTEND: {
2158 // This can return overflow, underflow, or inexact; we don't care.
2159 // FIXME need to be more flexible about rounding mode.
2160 (void)V.convert(*MVTToAPFloatSemantics(VT),
2161 APFloat::rmNearestTiesToEven, &ignored);
2162 return getConstantFP(V, VT);
2164 case ISD::FP_TO_SINT:
2165 case ISD::FP_TO_UINT: {
2168 assert(integerPartWidth >= 64);
2169 // FIXME need to be more flexible about rounding mode.
2170 APFloat::opStatus s = V.convertToInteger(&x, 64U,
2171 Opcode==ISD::FP_TO_SINT,
2172 APFloat::rmTowardZero, &ignored);
2173 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2175 return getConstant(x, VT);
2177 case ISD::BIT_CONVERT:
2178 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2179 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2180 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2181 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2187 unsigned OpOpcode = Operand.getNode()->getOpcode();
2189 case ISD::TokenFactor:
2190 case ISD::MERGE_VALUES:
2191 case ISD::CONCAT_VECTORS:
2192 return Operand; // Factor, merge or concat of one node? No need.
2193 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
2194 case ISD::FP_EXTEND:
2195 assert(VT.isFloatingPoint() &&
2196 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2197 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2198 if (Operand.getOpcode() == ISD::UNDEF)
2199 return getNode(ISD::UNDEF, VT);
2201 case ISD::SIGN_EXTEND:
2202 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2203 "Invalid SIGN_EXTEND!");
2204 if (Operand.getValueType() == VT) return Operand; // noop extension
2205 assert(Operand.getValueType().bitsLT(VT)
2206 && "Invalid sext node, dst < src!");
2207 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2208 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2210 case ISD::ZERO_EXTEND:
2211 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2212 "Invalid ZERO_EXTEND!");
2213 if (Operand.getValueType() == VT) return Operand; // noop extension
2214 assert(Operand.getValueType().bitsLT(VT)
2215 && "Invalid zext node, dst < src!");
2216 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2217 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0));
2219 case ISD::ANY_EXTEND:
2220 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2221 "Invalid ANY_EXTEND!");
2222 if (Operand.getValueType() == VT) return Operand; // noop extension
2223 assert(Operand.getValueType().bitsLT(VT)
2224 && "Invalid anyext node, dst < src!");
2225 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2226 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2227 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2230 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2231 "Invalid TRUNCATE!");
2232 if (Operand.getValueType() == VT) return Operand; // noop truncate
2233 assert(Operand.getValueType().bitsGT(VT)
2234 && "Invalid truncate node, src < dst!");
2235 if (OpOpcode == ISD::TRUNCATE)
2236 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2237 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2238 OpOpcode == ISD::ANY_EXTEND) {
2239 // If the source is smaller than the dest, we still need an extend.
2240 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT))
2241 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0));
2242 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2243 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0));
2245 return Operand.getNode()->getOperand(0);
2248 case ISD::BIT_CONVERT:
2249 // Basic sanity checking.
2250 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2251 && "Cannot BIT_CONVERT between types of different sizes!");
2252 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2253 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x)
2254 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2255 if (OpOpcode == ISD::UNDEF)
2256 return getNode(ISD::UNDEF, VT);
2258 case ISD::SCALAR_TO_VECTOR:
2259 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2260 VT.getVectorElementType() == Operand.getValueType() &&
2261 "Illegal SCALAR_TO_VECTOR node!");
2262 if (OpOpcode == ISD::UNDEF)
2263 return getNode(ISD::UNDEF, VT);
2264 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2265 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2266 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2267 Operand.getConstantOperandVal(1) == 0 &&
2268 Operand.getOperand(0).getValueType() == VT)
2269 return Operand.getOperand(0);
2272 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X)
2273 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1),
2274 Operand.getNode()->getOperand(0));
2275 if (OpOpcode == ISD::FNEG) // --X -> X
2276 return Operand.getNode()->getOperand(0);
2279 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2280 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0));
2285 SDVTList VTs = getVTList(VT);
2286 if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2287 FoldingSetNodeID ID;
2288 SDValue Ops[1] = { Operand };
2289 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2292 return SDValue(E, 0);
2293 N = NodeAllocator.Allocate<UnarySDNode>();
2294 new (N) UnarySDNode(Opcode, VTs, Operand);
2295 CSEMap.InsertNode(N, IP);
2297 N = NodeAllocator.Allocate<UnarySDNode>();
2298 new (N) UnarySDNode(Opcode, VTs, Operand);
2301 AllNodes.push_back(N);
2305 return SDValue(N, 0);
2308 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2310 ConstantSDNode *Cst1,
2311 ConstantSDNode *Cst2) {
2312 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2315 case ISD::ADD: return getConstant(C1 + C2, VT);
2316 case ISD::SUB: return getConstant(C1 - C2, VT);
2317 case ISD::MUL: return getConstant(C1 * C2, VT);
2319 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2322 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2325 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2328 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2330 case ISD::AND: return getConstant(C1 & C2, VT);
2331 case ISD::OR: return getConstant(C1 | C2, VT);
2332 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2333 case ISD::SHL: return getConstant(C1 << C2, VT);
2334 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2335 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2336 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2337 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2344 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2345 SDValue N1, SDValue N2) {
2346 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2347 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2350 case ISD::TokenFactor:
2351 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2352 N2.getValueType() == MVT::Other && "Invalid token factor!");
2353 // Fold trivial token factors.
2354 if (N1.getOpcode() == ISD::EntryToken) return N2;
2355 if (N2.getOpcode() == ISD::EntryToken) return N1;
2356 if (N1 == N2) return N1;
2358 case ISD::CONCAT_VECTORS:
2359 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2360 // one big BUILD_VECTOR.
2361 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2362 N2.getOpcode() == ISD::BUILD_VECTOR) {
2363 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2364 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2365 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2369 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2370 N1.getValueType() == VT && "Binary operator types must match!");
2371 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2372 // worth handling here.
2373 if (N2C && N2C->isNullValue())
2375 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2382 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2383 N1.getValueType() == VT && "Binary operator types must match!");
2384 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2385 // it's worth handling here.
2386 if (N2C && N2C->isNullValue())
2393 assert(VT.isInteger() && "This operator does not apply to FP types!");
2403 assert(N1.getValueType() == N2.getValueType() &&
2404 N1.getValueType() == VT && "Binary operator types must match!");
2406 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2407 assert(N1.getValueType() == VT &&
2408 N1.getValueType().isFloatingPoint() &&
2409 N2.getValueType().isFloatingPoint() &&
2410 "Invalid FCOPYSIGN!");
2417 assert(VT == N1.getValueType() &&
2418 "Shift operators return type must be the same as their first arg");
2419 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2420 "Shifts only work on integers");
2421 assert(N2.getValueType() == TLI.getShiftAmountTy() &&
2422 "Wrong type for shift amount");
2424 // Always fold shifts of i1 values so the code generator doesn't need to
2425 // handle them. Since we know the size of the shift has to be less than the
2426 // size of the value, the shift/rotate count is guaranteed to be zero.
2430 case ISD::FP_ROUND_INREG: {
2431 MVT EVT = cast<VTSDNode>(N2)->getVT();
2432 assert(VT == N1.getValueType() && "Not an inreg round!");
2433 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2434 "Cannot FP_ROUND_INREG integer types");
2435 assert(EVT.bitsLE(VT) && "Not rounding down!");
2436 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2440 assert(VT.isFloatingPoint() &&
2441 N1.getValueType().isFloatingPoint() &&
2442 VT.bitsLE(N1.getValueType()) &&
2443 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2444 if (N1.getValueType() == VT) return N1; // noop conversion.
2446 case ISD::AssertSext:
2447 case ISD::AssertZext: {
2448 MVT EVT = cast<VTSDNode>(N2)->getVT();
2449 assert(VT == N1.getValueType() && "Not an inreg extend!");
2450 assert(VT.isInteger() && EVT.isInteger() &&
2451 "Cannot *_EXTEND_INREG FP types");
2452 assert(EVT.bitsLE(VT) && "Not extending!");
2453 if (VT == EVT) return N1; // noop assertion.
2456 case ISD::SIGN_EXTEND_INREG: {
2457 MVT EVT = cast<VTSDNode>(N2)->getVT();
2458 assert(VT == N1.getValueType() && "Not an inreg extend!");
2459 assert(VT.isInteger() && EVT.isInteger() &&
2460 "Cannot *_EXTEND_INREG FP types");
2461 assert(EVT.bitsLE(VT) && "Not extending!");
2462 if (EVT == VT) return N1; // Not actually extending
2465 APInt Val = N1C->getAPIntValue();
2466 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2467 Val <<= Val.getBitWidth()-FromBits;
2468 Val = Val.ashr(Val.getBitWidth()-FromBits);
2469 return getConstant(Val, VT);
2473 case ISD::EXTRACT_VECTOR_ELT:
2474 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2475 if (N1.getOpcode() == ISD::UNDEF)
2476 return getNode(ISD::UNDEF, VT);
2478 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2479 // expanding copies of large vectors from registers.
2481 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2482 N1.getNumOperands() > 0) {
2484 N1.getOperand(0).getValueType().getVectorNumElements();
2485 return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2486 N1.getOperand(N2C->getZExtValue() / Factor),
2487 getConstant(N2C->getZExtValue() % Factor,
2488 N2.getValueType()));
2491 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2492 // expanding large vector constants.
2493 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR)
2494 return N1.getOperand(N2C->getZExtValue());
2496 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2497 // operations are lowered to scalars.
2498 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2499 if (N1.getOperand(2) == N2)
2500 return N1.getOperand(1);
2502 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2505 case ISD::EXTRACT_ELEMENT:
2506 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2507 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2508 (N1.getValueType().isInteger() == VT.isInteger()) &&
2509 "Wrong types for EXTRACT_ELEMENT!");
2511 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2512 // 64-bit integers into 32-bit parts. Instead of building the extract of
2513 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2514 if (N1.getOpcode() == ISD::BUILD_PAIR)
2515 return N1.getOperand(N2C->getZExtValue());
2517 // EXTRACT_ELEMENT of a constant int is also very common.
2518 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2519 unsigned ElementSize = VT.getSizeInBits();
2520 unsigned Shift = ElementSize * N2C->getZExtValue();
2521 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2522 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2525 case ISD::EXTRACT_SUBVECTOR:
2526 if (N1.getValueType() == VT) // Trivial extraction.
2533 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2534 if (SV.getNode()) return SV;
2535 } else { // Cannonicalize constant to RHS if commutative
2536 if (isCommutativeBinOp(Opcode)) {
2537 std::swap(N1C, N2C);
2543 // Constant fold FP operations.
2544 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2545 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2547 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2548 // Cannonicalize constant to RHS if commutative
2549 std::swap(N1CFP, N2CFP);
2551 } else if (N2CFP && VT != MVT::ppcf128) {
2552 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2553 APFloat::opStatus s;
2556 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2557 if (s != APFloat::opInvalidOp)
2558 return getConstantFP(V1, VT);
2561 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2562 if (s!=APFloat::opInvalidOp)
2563 return getConstantFP(V1, VT);
2566 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2567 if (s!=APFloat::opInvalidOp)
2568 return getConstantFP(V1, VT);
2571 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2572 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2573 return getConstantFP(V1, VT);
2576 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2577 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2578 return getConstantFP(V1, VT);
2580 case ISD::FCOPYSIGN:
2582 return getConstantFP(V1, VT);
2588 // Canonicalize an UNDEF to the RHS, even over a constant.
2589 if (N1.getOpcode() == ISD::UNDEF) {
2590 if (isCommutativeBinOp(Opcode)) {
2594 case ISD::FP_ROUND_INREG:
2595 case ISD::SIGN_EXTEND_INREG:
2601 return N1; // fold op(undef, arg2) -> undef
2609 return getConstant(0, VT); // fold op(undef, arg2) -> 0
2610 // For vectors, we can't easily build an all zero vector, just return
2617 // Fold a bunch of operators when the RHS is undef.
2618 if (N2.getOpcode() == ISD::UNDEF) {
2621 if (N1.getOpcode() == ISD::UNDEF)
2622 // Handle undef ^ undef -> 0 special case. This is a common
2624 return getConstant(0, VT);
2639 return N2; // fold op(arg1, undef) -> undef
2645 return getConstant(0, VT); // fold op(arg1, undef) -> 0
2646 // For vectors, we can't easily build an all zero vector, just return
2651 return getConstant(VT.getIntegerVTBitMask(), VT);
2652 // For vectors, we can't easily build an all one vector, just return
2660 // Memoize this node if possible.
2662 SDVTList VTs = getVTList(VT);
2663 if (VT != MVT::Flag) {
2664 SDValue Ops[] = { N1, N2 };
2665 FoldingSetNodeID ID;
2666 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2668 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2669 return SDValue(E, 0);
2670 N = NodeAllocator.Allocate<BinarySDNode>();
2671 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2672 CSEMap.InsertNode(N, IP);
2674 N = NodeAllocator.Allocate<BinarySDNode>();
2675 new (N) BinarySDNode(Opcode, VTs, N1, N2);
2678 AllNodes.push_back(N);
2682 return SDValue(N, 0);
2685 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2686 SDValue N1, SDValue N2, SDValue N3) {
2687 // Perform various simplifications.
2688 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2689 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2691 case ISD::CONCAT_VECTORS:
2692 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2693 // one big BUILD_VECTOR.
2694 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2695 N2.getOpcode() == ISD::BUILD_VECTOR &&
2696 N3.getOpcode() == ISD::BUILD_VECTOR) {
2697 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end());
2698 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end());
2699 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end());
2700 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size());
2704 // Use FoldSetCC to simplify SETCC's.
2705 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2706 if (Simp.getNode()) return Simp;
2711 if (N1C->getZExtValue())
2712 return N2; // select true, X, Y -> X
2714 return N3; // select false, X, Y -> Y
2717 if (N2 == N3) return N2; // select C, X, X -> X
2721 if (N2C->getZExtValue()) // Unconditional branch
2722 return getNode(ISD::BR, MVT::Other, N1, N3);
2724 return N1; // Never-taken branch
2727 case ISD::VECTOR_SHUFFLE:
2728 assert(N1.getValueType() == N2.getValueType() &&
2729 N1.getValueType().isVector() &&
2730 VT.isVector() && N3.getValueType().isVector() &&
2731 N3.getOpcode() == ISD::BUILD_VECTOR &&
2732 VT.getVectorNumElements() == N3.getNumOperands() &&
2733 "Illegal VECTOR_SHUFFLE node!");
2735 case ISD::BIT_CONVERT:
2736 // Fold bit_convert nodes from a type to themselves.
2737 if (N1.getValueType() == VT)
2742 // Memoize node if it doesn't produce a flag.
2744 SDVTList VTs = getVTList(VT);
2745 if (VT != MVT::Flag) {
2746 SDValue Ops[] = { N1, N2, N3 };
2747 FoldingSetNodeID ID;
2748 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2750 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2751 return SDValue(E, 0);
2752 N = NodeAllocator.Allocate<TernarySDNode>();
2753 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2754 CSEMap.InsertNode(N, IP);
2756 N = NodeAllocator.Allocate<TernarySDNode>();
2757 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3);
2759 AllNodes.push_back(N);
2763 return SDValue(N, 0);
2766 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2767 SDValue N1, SDValue N2, SDValue N3,
2769 SDValue Ops[] = { N1, N2, N3, N4 };
2770 return getNode(Opcode, VT, Ops, 4);
2773 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
2774 SDValue N1, SDValue N2, SDValue N3,
2775 SDValue N4, SDValue N5) {
2776 SDValue Ops[] = { N1, N2, N3, N4, N5 };
2777 return getNode(Opcode, VT, Ops, 5);
2780 /// getMemsetValue - Vectorized representation of the memset value
2782 static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) {
2783 unsigned NumBits = VT.isVector() ?
2784 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2785 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2786 APInt Val = APInt(NumBits, C->getZExtValue() & 255);
2788 for (unsigned i = NumBits; i > 8; i >>= 1) {
2789 Val = (Val << Shift) | Val;
2793 return DAG.getConstant(Val, VT);
2794 return DAG.getConstantFP(APFloat(Val), VT);
2797 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2798 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2800 for (unsigned i = NumBits; i > 8; i >>= 1) {
2801 Value = DAG.getNode(ISD::OR, VT,
2802 DAG.getNode(ISD::SHL, VT, Value,
2803 DAG.getConstant(Shift,
2804 TLI.getShiftAmountTy())),
2812 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2813 /// used when a memcpy is turned into a memset when the source is a constant
2815 static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2816 const TargetLowering &TLI,
2817 std::string &Str, unsigned Offset) {
2818 // Handle vector with all elements zero.
2821 return DAG.getConstant(0, VT);
2822 unsigned NumElts = VT.getVectorNumElements();
2823 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
2824 return DAG.getNode(ISD::BIT_CONVERT, VT,
2825 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
2828 assert(!VT.isVector() && "Can't handle vector type here!");
2829 unsigned NumBits = VT.getSizeInBits();
2830 unsigned MSB = NumBits / 8;
2832 if (TLI.isLittleEndian())
2833 Offset = Offset + MSB - 1;
2834 for (unsigned i = 0; i != MSB; ++i) {
2835 Val = (Val << 8) | (unsigned char)Str[Offset];
2836 Offset += TLI.isLittleEndian() ? -1 : 1;
2838 return DAG.getConstant(Val, VT);
2841 /// getMemBasePlusOffset - Returns base and offset node for the
2843 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
2844 SelectionDAG &DAG) {
2845 MVT VT = Base.getValueType();
2846 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2849 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
2851 static bool isMemSrcFromString(SDValue Src, std::string &Str) {
2852 unsigned SrcDelta = 0;
2853 GlobalAddressSDNode *G = NULL;
2854 if (Src.getOpcode() == ISD::GlobalAddress)
2855 G = cast<GlobalAddressSDNode>(Src);
2856 else if (Src.getOpcode() == ISD::ADD &&
2857 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2858 Src.getOperand(1).getOpcode() == ISD::Constant) {
2859 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2860 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
2865 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2866 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2872 /// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2873 /// to replace the memset / memcpy is below the threshold. It also returns the
2874 /// types of the sequence of memory ops to perform memset / memcpy.
2876 bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2877 SDValue Dst, SDValue Src,
2878 unsigned Limit, uint64_t Size, unsigned &Align,
2879 std::string &Str, bool &isSrcStr,
2881 const TargetLowering &TLI) {
2882 isSrcStr = isMemSrcFromString(Src, Str);
2883 bool isSrcConst = isa<ConstantSDNode>(Src);
2884 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2885 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2886 if (VT != MVT::iAny) {
2887 unsigned NewAlign = (unsigned)
2888 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2889 // If source is a string constant, this will require an unaligned load.
2890 if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2891 if (Dst.getOpcode() != ISD::FrameIndex) {
2892 // Can't change destination alignment. It requires a unaligned store.
2896 int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2897 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2898 if (MFI->isFixedObjectIndex(FI)) {
2899 // Can't change destination alignment. It requires a unaligned store.
2903 // Give the stack frame object a larger alignment if needed.
2904 if (MFI->getObjectAlignment(FI) < NewAlign)
2905 MFI->setObjectAlignment(FI, NewAlign);
2912 if (VT == MVT::iAny) {
2916 switch (Align & 7) {
2917 case 0: VT = MVT::i64; break;
2918 case 4: VT = MVT::i32; break;
2919 case 2: VT = MVT::i16; break;
2920 default: VT = MVT::i8; break;
2925 while (!TLI.isTypeLegal(LVT))
2926 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2927 assert(LVT.isInteger());
2933 unsigned NumMemOps = 0;
2935 unsigned VTSize = VT.getSizeInBits() / 8;
2936 while (VTSize > Size) {
2937 // For now, only use non-vector load / store's for the left-over pieces.
2938 if (VT.isVector()) {
2940 while (!TLI.isTypeLegal(VT))
2941 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2942 VTSize = VT.getSizeInBits() / 8;
2944 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2949 if (++NumMemOps > Limit)
2951 MemOps.push_back(VT);
2958 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG,
2959 SDValue Chain, SDValue Dst,
2960 SDValue Src, uint64_t Size,
2961 unsigned Align, bool AlwaysInline,
2962 const Value *DstSV, uint64_t DstSVOff,
2963 const Value *SrcSV, uint64_t SrcSVOff){
2964 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2966 // Expand memcpy to a series of load and store ops if the size operand falls
2967 // below a certain threshold.
2968 std::vector<MVT> MemOps;
2969 uint64_t Limit = -1ULL;
2971 Limit = TLI.getMaxStoresPerMemcpy();
2972 unsigned DstAlign = Align; // Destination alignment can change.
2975 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2976 Str, CopyFromStr, DAG, TLI))
2980 bool isZeroStr = CopyFromStr && Str.empty();
2981 SmallVector<SDValue, 8> OutChains;
2982 unsigned NumMemOps = MemOps.size();
2983 uint64_t SrcOff = 0, DstOff = 0;
2984 for (unsigned i = 0; i < NumMemOps; i++) {
2986 unsigned VTSize = VT.getSizeInBits() / 8;
2987 SDValue Value, Store;
2989 if (CopyFromStr && (isZeroStr || !VT.isVector())) {
2990 // It's unlikely a store of a vector immediate can be done in a single
2991 // instruction. It would require a load from a constantpool first.
2992 // We also handle store a vector with all zero's.
2993 // FIXME: Handle other cases where store of vector immediate is done in
2994 // a single instruction.
2995 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2996 Store = DAG.getStore(Chain, Value,
2997 getMemBasePlusOffset(Dst, DstOff, DAG),
2998 DstSV, DstSVOff + DstOff, false, DstAlign);
3000 Value = DAG.getLoad(VT, Chain,
3001 getMemBasePlusOffset(Src, SrcOff, DAG),
3002 SrcSV, SrcSVOff + SrcOff, false, Align);
3003 Store = DAG.getStore(Chain, Value,
3004 getMemBasePlusOffset(Dst, DstOff, DAG),
3005 DstSV, DstSVOff + DstOff, false, DstAlign);
3007 OutChains.push_back(Store);
3012 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3013 &OutChains[0], OutChains.size());
3016 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG,
3017 SDValue Chain, SDValue Dst,
3018 SDValue Src, uint64_t Size,
3019 unsigned Align, bool AlwaysInline,
3020 const Value *DstSV, uint64_t DstSVOff,
3021 const Value *SrcSV, uint64_t SrcSVOff){
3022 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3024 // Expand memmove to a series of load and store ops if the size operand falls
3025 // below a certain threshold.
3026 std::vector<MVT> MemOps;
3027 uint64_t Limit = -1ULL;
3029 Limit = TLI.getMaxStoresPerMemmove();
3030 unsigned DstAlign = Align; // Destination alignment can change.
3033 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
3034 Str, CopyFromStr, DAG, TLI))
3037 uint64_t SrcOff = 0, DstOff = 0;
3039 SmallVector<SDValue, 8> LoadValues;
3040 SmallVector<SDValue, 8> LoadChains;
3041 SmallVector<SDValue, 8> OutChains;
3042 unsigned NumMemOps = MemOps.size();
3043 for (unsigned i = 0; i < NumMemOps; i++) {
3045 unsigned VTSize = VT.getSizeInBits() / 8;
3046 SDValue Value, Store;
3048 Value = DAG.getLoad(VT, Chain,
3049 getMemBasePlusOffset(Src, SrcOff, DAG),
3050 SrcSV, SrcSVOff + SrcOff, false, Align);
3051 LoadValues.push_back(Value);
3052 LoadChains.push_back(Value.getValue(1));
3055 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
3056 &LoadChains[0], LoadChains.size());
3058 for (unsigned i = 0; i < NumMemOps; i++) {
3060 unsigned VTSize = VT.getSizeInBits() / 8;
3061 SDValue Value, Store;
3063 Store = DAG.getStore(Chain, LoadValues[i],
3064 getMemBasePlusOffset(Dst, DstOff, DAG),
3065 DstSV, DstSVOff + DstOff, false, DstAlign);
3066 OutChains.push_back(Store);
3070 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3071 &OutChains[0], OutChains.size());
3074 static SDValue getMemsetStores(SelectionDAG &DAG,
3075 SDValue Chain, SDValue Dst,
3076 SDValue Src, uint64_t Size,
3078 const Value *DstSV, uint64_t DstSVOff) {
3079 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3081 // Expand memset to a series of load/store ops if the size operand
3082 // falls below a certain threshold.
3083 std::vector<MVT> MemOps;
3086 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
3087 Size, Align, Str, CopyFromStr, DAG, TLI))
3090 SmallVector<SDValue, 8> OutChains;
3091 uint64_t DstOff = 0;
3093 unsigned NumMemOps = MemOps.size();
3094 for (unsigned i = 0; i < NumMemOps; i++) {
3096 unsigned VTSize = VT.getSizeInBits() / 8;
3097 SDValue Value = getMemsetValue(Src, VT, DAG);
3098 SDValue Store = DAG.getStore(Chain, Value,
3099 getMemBasePlusOffset(Dst, DstOff, DAG),
3100 DstSV, DstSVOff + DstOff);
3101 OutChains.push_back(Store);
3105 return DAG.getNode(ISD::TokenFactor, MVT::Other,
3106 &OutChains[0], OutChains.size());
3109 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst,
3110 SDValue Src, SDValue Size,
3111 unsigned Align, bool AlwaysInline,
3112 const Value *DstSV, uint64_t DstSVOff,
3113 const Value *SrcSV, uint64_t SrcSVOff) {
3115 // Check to see if we should lower the memcpy to loads and stores first.
3116 // For cases within the target-specified limits, this is the best choice.
3117 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3119 // Memcpy with size zero? Just return the original chain.
3120 if (ConstantSize->isNullValue())
3124 getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3125 ConstantSize->getZExtValue(),
3126 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3127 if (Result.getNode())
3131 // Then check to see if we should lower the memcpy with target-specific
3132 // code. If the target chooses to do this, this is the next best.
3134 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
3136 DstSV, DstSVOff, SrcSV, SrcSVOff);
3137 if (Result.getNode())
3140 // If we really need inline code and the target declined to provide it,
3141 // use a (potentially long) sequence of loads and stores.
3143 assert(ConstantSize && "AlwaysInline requires a constant size!");
3144 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
3145 ConstantSize->getZExtValue(), Align, true,
3146 DstSV, DstSVOff, SrcSV, SrcSVOff);
3149 // Emit a library call.
3150 TargetLowering::ArgListTy Args;
3151 TargetLowering::ArgListEntry Entry;
3152 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3153 Entry.Node = Dst; Args.push_back(Entry);
3154 Entry.Node = Src; Args.push_back(Entry);
3155 Entry.Node = Size; Args.push_back(Entry);
3156 std::pair<SDValue,SDValue> CallResult =
3157 TLI.LowerCallTo(Chain, Type::VoidTy,
3158 false, false, false, false, CallingConv::C, false,
3159 getExternalSymbol("memcpy", TLI.getPointerTy()),
3161 return CallResult.second;
3164 SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst,
3165 SDValue Src, SDValue Size,
3167 const Value *DstSV, uint64_t DstSVOff,
3168 const Value *SrcSV, uint64_t SrcSVOff) {
3170 // Check to see if we should lower the memmove to loads and stores first.
3171 // For cases within the target-specified limits, this is the best choice.
3172 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3174 // Memmove with size zero? Just return the original chain.
3175 if (ConstantSize->isNullValue())
3179 getMemmoveLoadsAndStores(*this, Chain, Dst, Src,
3180 ConstantSize->getZExtValue(),
3181 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
3182 if (Result.getNode())
3186 // Then check to see if we should lower the memmove with target-specific
3187 // code. If the target chooses to do this, this is the next best.
3189 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
3190 DstSV, DstSVOff, SrcSV, SrcSVOff);
3191 if (Result.getNode())
3194 // Emit a library call.
3195 TargetLowering::ArgListTy Args;
3196 TargetLowering::ArgListEntry Entry;
3197 Entry.Ty = TLI.getTargetData()->getIntPtrType();
3198 Entry.Node = Dst; Args.push_back(Entry);
3199 Entry.Node = Src; Args.push_back(Entry);
3200 Entry.Node = Size; Args.push_back(Entry);
3201 std::pair<SDValue,SDValue> CallResult =
3202 TLI.LowerCallTo(Chain, Type::VoidTy,
3203 false, false, false, false, CallingConv::C, false,
3204 getExternalSymbol("memmove", TLI.getPointerTy()),
3206 return CallResult.second;
3209 SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst,
3210 SDValue Src, SDValue Size,
3212 const Value *DstSV, uint64_t DstSVOff) {
3214 // Check to see if we should lower the memset to stores first.
3215 // For cases within the target-specified limits, this is the best choice.
3216 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3218 // Memset with size zero? Just return the original chain.
3219 if (ConstantSize->isNullValue())
3223 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(),
3224 Align, DstSV, DstSVOff);
3225 if (Result.getNode())
3229 // Then check to see if we should lower the memset with target-specific
3230 // code. If the target chooses to do this, this is the next best.
3232 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
3234 if (Result.getNode())
3237 // Emit a library call.
3238 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
3239 TargetLowering::ArgListTy Args;
3240 TargetLowering::ArgListEntry Entry;
3241 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3242 Args.push_back(Entry);
3243 // Extend or truncate the argument to be an i32 value for the call.
3244 if (Src.getValueType().bitsGT(MVT::i32))
3245 Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
3247 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
3248 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
3249 Args.push_back(Entry);
3250 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
3251 Args.push_back(Entry);
3252 std::pair<SDValue,SDValue> CallResult =
3253 TLI.LowerCallTo(Chain, Type::VoidTy,
3254 false, false, false, false, CallingConv::C, false,
3255 getExternalSymbol("memset", TLI.getPointerTy()),
3257 return CallResult.second;
3260 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3261 SDValue Ptr, SDValue Cmp,
3262 SDValue Swp, const Value* PtrVal,
3263 unsigned Alignment) {
3264 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 ||
3265 Opcode == ISD::ATOMIC_CMP_SWAP_16 ||
3266 Opcode == ISD::ATOMIC_CMP_SWAP_32 ||
3267 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op");
3268 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3270 MVT VT = Cmp.getValueType();
3272 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3273 Alignment = getMVTAlignment(VT);
3275 SDVTList VTs = getVTList(VT, MVT::Other);
3276 FoldingSetNodeID ID;
3277 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3278 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3280 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3281 return SDValue(E, 0);
3282 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3283 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment);
3284 CSEMap.InsertNode(N, IP);
3285 AllNodes.push_back(N);
3286 return SDValue(N, 0);
3289 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain,
3290 SDValue Ptr, SDValue Val,
3291 const Value* PtrVal,
3292 unsigned Alignment) {
3293 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 ||
3294 Opcode == ISD::ATOMIC_LOAD_SUB_8 ||
3295 Opcode == ISD::ATOMIC_LOAD_AND_8 ||
3296 Opcode == ISD::ATOMIC_LOAD_OR_8 ||
3297 Opcode == ISD::ATOMIC_LOAD_XOR_8 ||
3298 Opcode == ISD::ATOMIC_LOAD_NAND_8 ||
3299 Opcode == ISD::ATOMIC_LOAD_MIN_8 ||
3300 Opcode == ISD::ATOMIC_LOAD_MAX_8 ||
3301 Opcode == ISD::ATOMIC_LOAD_UMIN_8 ||
3302 Opcode == ISD::ATOMIC_LOAD_UMAX_8 ||
3303 Opcode == ISD::ATOMIC_SWAP_8 ||
3304 Opcode == ISD::ATOMIC_LOAD_ADD_16 ||
3305 Opcode == ISD::ATOMIC_LOAD_SUB_16 ||
3306 Opcode == ISD::ATOMIC_LOAD_AND_16 ||
3307 Opcode == ISD::ATOMIC_LOAD_OR_16 ||
3308 Opcode == ISD::ATOMIC_LOAD_XOR_16 ||
3309 Opcode == ISD::ATOMIC_LOAD_NAND_16 ||
3310 Opcode == ISD::ATOMIC_LOAD_MIN_16 ||
3311 Opcode == ISD::ATOMIC_LOAD_MAX_16 ||
3312 Opcode == ISD::ATOMIC_LOAD_UMIN_16 ||
3313 Opcode == ISD::ATOMIC_LOAD_UMAX_16 ||
3314 Opcode == ISD::ATOMIC_SWAP_16 ||
3315 Opcode == ISD::ATOMIC_LOAD_ADD_32 ||
3316 Opcode == ISD::ATOMIC_LOAD_SUB_32 ||
3317 Opcode == ISD::ATOMIC_LOAD_AND_32 ||
3318 Opcode == ISD::ATOMIC_LOAD_OR_32 ||
3319 Opcode == ISD::ATOMIC_LOAD_XOR_32 ||
3320 Opcode == ISD::ATOMIC_LOAD_NAND_32 ||
3321 Opcode == ISD::ATOMIC_LOAD_MIN_32 ||
3322 Opcode == ISD::ATOMIC_LOAD_MAX_32 ||
3323 Opcode == ISD::ATOMIC_LOAD_UMIN_32 ||
3324 Opcode == ISD::ATOMIC_LOAD_UMAX_32 ||
3325 Opcode == ISD::ATOMIC_SWAP_32 ||
3326 Opcode == ISD::ATOMIC_LOAD_ADD_64 ||
3327 Opcode == ISD::ATOMIC_LOAD_SUB_64 ||
3328 Opcode == ISD::ATOMIC_LOAD_AND_64 ||
3329 Opcode == ISD::ATOMIC_LOAD_OR_64 ||
3330 Opcode == ISD::ATOMIC_LOAD_XOR_64 ||
3331 Opcode == ISD::ATOMIC_LOAD_NAND_64 ||
3332 Opcode == ISD::ATOMIC_LOAD_MIN_64 ||
3333 Opcode == ISD::ATOMIC_LOAD_MAX_64 ||
3334 Opcode == ISD::ATOMIC_LOAD_UMIN_64 ||
3335 Opcode == ISD::ATOMIC_LOAD_UMAX_64 ||
3336 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op");
3338 MVT VT = Val.getValueType();
3340 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3341 Alignment = getMVTAlignment(VT);
3343 SDVTList VTs = getVTList(VT, MVT::Other);
3344 FoldingSetNodeID ID;
3345 SDValue Ops[] = {Chain, Ptr, Val};
3346 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3349 return SDValue(E, 0);
3350 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
3351 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment);
3352 CSEMap.InsertNode(N, IP);
3353 AllNodes.push_back(N);
3354 return SDValue(N, 0);
3357 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
3358 /// Allowed to return something different (and simpler) if Simplify is true.
3359 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) {
3363 SmallVector<MVT, 4> VTs;
3364 VTs.reserve(NumOps);
3365 for (unsigned i = 0; i < NumOps; ++i)
3366 VTs.push_back(Ops[i].getValueType());
3367 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps);
3371 SelectionDAG::getMemIntrinsicNode(unsigned Opcode,
3372 const MVT *VTs, unsigned NumVTs,
3373 const SDValue *Ops, unsigned NumOps,
3374 MVT MemVT, const Value *srcValue, int SVOff,
3375 unsigned Align, bool Vol,
3376 bool ReadMem, bool WriteMem) {
3377 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps,
3378 MemVT, srcValue, SVOff, Align, Vol,
3383 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList,
3384 const SDValue *Ops, unsigned NumOps,
3385 MVT MemVT, const Value *srcValue, int SVOff,
3386 unsigned Align, bool Vol,
3387 bool ReadMem, bool WriteMem) {
3388 // Memoize the node unless it returns a flag.
3389 MemIntrinsicSDNode *N;
3390 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3391 FoldingSetNodeID ID;
3392 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3394 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3395 return SDValue(E, 0);
3397 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3398 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3399 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3400 CSEMap.InsertNode(N, IP);
3402 N = NodeAllocator.Allocate<MemIntrinsicSDNode>();
3403 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT,
3404 srcValue, SVOff, Align, Vol, ReadMem, WriteMem);
3406 AllNodes.push_back(N);
3407 return SDValue(N, 0);
3411 SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall,
3412 bool IsInreg, SDVTList VTs,
3413 const SDValue *Operands, unsigned NumOperands) {
3414 // Do not include isTailCall in the folding set profile.
3415 FoldingSetNodeID ID;
3416 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands);
3417 ID.AddInteger(CallingConv);
3418 ID.AddInteger(IsVarArgs);
3420 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3421 // Instead of including isTailCall in the folding set, we just
3422 // set the flag of the existing node.
3424 cast<CallSDNode>(E)->setNotTailCall();
3425 return SDValue(E, 0);
3427 SDNode *N = NodeAllocator.Allocate<CallSDNode>();
3428 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg,
3429 VTs, Operands, NumOperands);
3430 CSEMap.InsertNode(N, IP);
3431 AllNodes.push_back(N);
3432 return SDValue(N, 0);
3436 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3437 MVT VT, SDValue Chain,
3438 SDValue Ptr, SDValue Offset,
3439 const Value *SV, int SVOffset, MVT EVT,
3440 bool isVolatile, unsigned Alignment) {
3441 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3442 Alignment = getMVTAlignment(VT);
3445 ExtType = ISD::NON_EXTLOAD;
3446 } else if (ExtType == ISD::NON_EXTLOAD) {
3447 assert(VT == EVT && "Non-extending load from different memory type!");
3451 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() &&
3452 "Invalid vector extload!");
3454 assert(EVT.bitsLT(VT) &&
3455 "Should only be an extending load, not truncating!");
3456 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3457 "Cannot sign/zero extend a FP/Vector load!");
3458 assert(VT.isInteger() == EVT.isInteger() &&
3459 "Cannot convert from FP to Int or Int -> FP!");
3462 bool Indexed = AM != ISD::UNINDEXED;
3463 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3464 "Unindexed load with an offset!");
3466 SDVTList VTs = Indexed ?
3467 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3468 SDValue Ops[] = { Chain, Ptr, Offset };
3469 FoldingSetNodeID ID;
3470 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3472 ID.AddInteger(ExtType);
3473 ID.AddInteger(EVT.getRawBits());
3474 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3476 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3477 return SDValue(E, 0);
3478 SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
3479 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3480 Alignment, isVolatile);
3481 CSEMap.InsertNode(N, IP);
3482 AllNodes.push_back(N);
3483 return SDValue(N, 0);
3486 SDValue SelectionDAG::getLoad(MVT VT,
3487 SDValue Chain, SDValue Ptr,
3488 const Value *SV, int SVOffset,
3489 bool isVolatile, unsigned Alignment) {
3490 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3491 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3492 SV, SVOffset, VT, isVolatile, Alignment);
3495 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3496 SDValue Chain, SDValue Ptr,
3498 int SVOffset, MVT EVT,
3499 bool isVolatile, unsigned Alignment) {
3500 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3501 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3502 SV, SVOffset, EVT, isVolatile, Alignment);
3506 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base,
3507 SDValue Offset, ISD::MemIndexedMode AM) {
3508 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3509 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3510 "Load is already a indexed load!");
3511 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3512 LD->getChain(), Base, Offset, LD->getSrcValue(),
3513 LD->getSrcValueOffset(), LD->getMemoryVT(),
3514 LD->isVolatile(), LD->getAlignment());
3517 SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val,
3518 SDValue Ptr, const Value *SV, int SVOffset,
3519 bool isVolatile, unsigned Alignment) {
3520 MVT VT = Val.getValueType();
3522 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3523 Alignment = getMVTAlignment(VT);
3525 SDVTList VTs = getVTList(MVT::Other);
3526 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3527 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3528 FoldingSetNodeID ID;
3529 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3530 ID.AddInteger(ISD::UNINDEXED);
3531 ID.AddInteger(false);
3532 ID.AddInteger(VT.getRawBits());
3533 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3535 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3536 return SDValue(E, 0);
3537 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3538 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3539 VT, SV, SVOffset, Alignment, isVolatile);
3540 CSEMap.InsertNode(N, IP);
3541 AllNodes.push_back(N);
3542 return SDValue(N, 0);
3545 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val,
3546 SDValue Ptr, const Value *SV,
3547 int SVOffset, MVT SVT,
3548 bool isVolatile, unsigned Alignment) {
3549 MVT VT = Val.getValueType();
3552 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3554 assert(VT.bitsGT(SVT) && "Not a truncation?");
3555 assert(VT.isInteger() == SVT.isInteger() &&
3556 "Can't do FP-INT conversion!");
3558 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3559 Alignment = getMVTAlignment(VT);
3561 SDVTList VTs = getVTList(MVT::Other);
3562 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3563 SDValue Ops[] = { Chain, Val, Ptr, Undef };
3564 FoldingSetNodeID ID;
3565 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3566 ID.AddInteger(ISD::UNINDEXED);
3568 ID.AddInteger(SVT.getRawBits());
3569 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment));
3571 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3572 return SDValue(E, 0);
3573 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3574 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3575 SVT, SV, SVOffset, Alignment, isVolatile);
3576 CSEMap.InsertNode(N, IP);
3577 AllNodes.push_back(N);
3578 return SDValue(N, 0);
3582 SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base,
3583 SDValue Offset, ISD::MemIndexedMode AM) {
3584 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3585 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3586 "Store is already a indexed store!");
3587 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3588 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3589 FoldingSetNodeID ID;
3590 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3592 ID.AddInteger(ST->isTruncatingStore());
3593 ID.AddInteger(ST->getMemoryVT().getRawBits());
3594 ID.AddInteger(ST->getRawFlags());
3596 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3597 return SDValue(E, 0);
3598 SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
3599 new (N) StoreSDNode(Ops, VTs, AM,
3600 ST->isTruncatingStore(), ST->getMemoryVT(),
3601 ST->getSrcValue(), ST->getSrcValueOffset(),
3602 ST->getAlignment(), ST->isVolatile());
3603 CSEMap.InsertNode(N, IP);
3604 AllNodes.push_back(N);
3605 return SDValue(N, 0);
3608 SDValue SelectionDAG::getVAArg(MVT VT,
3609 SDValue Chain, SDValue Ptr,
3611 SDValue Ops[] = { Chain, Ptr, SV };
3612 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3615 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3616 const SDUse *Ops, unsigned NumOps) {
3618 case 0: return getNode(Opcode, VT);
3619 case 1: return getNode(Opcode, VT, Ops[0]);
3620 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3621 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3625 // Copy from an SDUse array into an SDValue array for use with
3626 // the regular getNode logic.
3627 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
3628 return getNode(Opcode, VT, &NewOps[0], NumOps);
3631 SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT,
3632 const SDValue *Ops, unsigned NumOps) {
3634 case 0: return getNode(Opcode, VT);
3635 case 1: return getNode(Opcode, VT, Ops[0]);
3636 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3637 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3643 case ISD::SELECT_CC: {
3644 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3645 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3646 "LHS and RHS of condition must have same type!");
3647 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3648 "True and False arms of SelectCC must have same type!");
3649 assert(Ops[2].getValueType() == VT &&
3650 "select_cc node must be of same type as true and false value!");
3654 assert(NumOps == 5 && "BR_CC takes 5 operands!");
3655 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3656 "LHS/RHS of comparison should match types!");
3663 SDVTList VTs = getVTList(VT);
3664 if (VT != MVT::Flag) {
3665 FoldingSetNodeID ID;
3666 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3668 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3669 return SDValue(E, 0);
3670 N = NodeAllocator.Allocate<SDNode>();
3671 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3672 CSEMap.InsertNode(N, IP);
3674 N = NodeAllocator.Allocate<SDNode>();
3675 new (N) SDNode(Opcode, VTs, Ops, NumOps);
3677 AllNodes.push_back(N);
3681 return SDValue(N, 0);
3684 SDValue SelectionDAG::getNode(unsigned Opcode,
3685 const std::vector<MVT> &ResultTys,
3686 const SDValue *Ops, unsigned NumOps) {
3687 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3691 SDValue SelectionDAG::getNode(unsigned Opcode,
3692 const MVT *VTs, unsigned NumVTs,
3693 const SDValue *Ops, unsigned NumOps) {
3695 return getNode(Opcode, VTs[0], Ops, NumOps);
3696 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3699 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3700 const SDValue *Ops, unsigned NumOps) {
3701 if (VTList.NumVTs == 1)
3702 return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3705 // FIXME: figure out how to safely handle things like
3706 // int foo(int x) { return 1 << (x & 255); }
3707 // int bar() { return foo(256); }
3709 case ISD::SRA_PARTS:
3710 case ISD::SRL_PARTS:
3711 case ISD::SHL_PARTS:
3712 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3713 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3714 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3715 else if (N3.getOpcode() == ISD::AND)
3716 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3717 // If the and is only masking out bits that cannot effect the shift,
3718 // eliminate the and.
3719 unsigned NumBits = VT.getSizeInBits()*2;
3720 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3721 return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3727 // Memoize the node unless it returns a flag.
3729 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3730 FoldingSetNodeID ID;
3731 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3733 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3734 return SDValue(E, 0);
3736 N = NodeAllocator.Allocate<UnarySDNode>();
3737 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3738 } else if (NumOps == 2) {
3739 N = NodeAllocator.Allocate<BinarySDNode>();
3740 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3741 } else if (NumOps == 3) {
3742 N = NodeAllocator.Allocate<TernarySDNode>();
3743 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3745 N = NodeAllocator.Allocate<SDNode>();
3746 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3748 CSEMap.InsertNode(N, IP);
3751 N = NodeAllocator.Allocate<UnarySDNode>();
3752 new (N) UnarySDNode(Opcode, VTList, Ops[0]);
3753 } else if (NumOps == 2) {
3754 N = NodeAllocator.Allocate<BinarySDNode>();
3755 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3756 } else if (NumOps == 3) {
3757 N = NodeAllocator.Allocate<TernarySDNode>();
3758 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3760 N = NodeAllocator.Allocate<SDNode>();
3761 new (N) SDNode(Opcode, VTList, Ops, NumOps);
3764 AllNodes.push_back(N);
3768 return SDValue(N, 0);
3771 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3772 return getNode(Opcode, VTList, 0, 0);
3775 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3777 SDValue Ops[] = { N1 };
3778 return getNode(Opcode, VTList, Ops, 1);
3781 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3782 SDValue N1, SDValue N2) {
3783 SDValue Ops[] = { N1, N2 };
3784 return getNode(Opcode, VTList, Ops, 2);
3787 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3788 SDValue N1, SDValue N2, SDValue N3) {
3789 SDValue Ops[] = { N1, N2, N3 };
3790 return getNode(Opcode, VTList, Ops, 3);
3793 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3794 SDValue N1, SDValue N2, SDValue N3,
3796 SDValue Ops[] = { N1, N2, N3, N4 };
3797 return getNode(Opcode, VTList, Ops, 4);
3800 SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3801 SDValue N1, SDValue N2, SDValue N3,
3802 SDValue N4, SDValue N5) {
3803 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3804 return getNode(Opcode, VTList, Ops, 5);
3807 SDVTList SelectionDAG::getVTList(MVT VT) {
3808 return makeVTList(SDNode::getValueTypeList(VT), 1);
3811 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3812 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3813 E = VTList.rend(); I != E; ++I)
3814 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
3817 MVT *Array = Allocator.Allocate<MVT>(2);
3820 SDVTList Result = makeVTList(Array, 2);
3821 VTList.push_back(Result);
3825 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
3826 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3827 E = VTList.rend(); I != E; ++I)
3828 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3832 MVT *Array = Allocator.Allocate<MVT>(3);
3836 SDVTList Result = makeVTList(Array, 3);
3837 VTList.push_back(Result);
3841 SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
3842 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3843 E = VTList.rend(); I != E; ++I)
3844 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
3845 I->VTs[2] == VT3 && I->VTs[3] == VT4)
3848 MVT *Array = Allocator.Allocate<MVT>(3);
3853 SDVTList Result = makeVTList(Array, 4);
3854 VTList.push_back(Result);
3858 SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3860 case 0: assert(0 && "Cannot have nodes without results!");
3861 case 1: return getVTList(VTs[0]);
3862 case 2: return getVTList(VTs[0], VTs[1]);
3863 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3867 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
3868 E = VTList.rend(); I != E; ++I) {
3869 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
3872 bool NoMatch = false;
3873 for (unsigned i = 2; i != NumVTs; ++i)
3874 if (VTs[i] != I->VTs[i]) {
3882 MVT *Array = Allocator.Allocate<MVT>(NumVTs);
3883 std::copy(VTs, VTs+NumVTs, Array);
3884 SDVTList Result = makeVTList(Array, NumVTs);
3885 VTList.push_back(Result);
3890 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3891 /// specified operands. If the resultant node already exists in the DAG,
3892 /// this does not modify the specified node, instead it returns the node that
3893 /// already exists. If the resultant node does not exist in the DAG, the
3894 /// input node is returned. As a degenerate case, if you specify the same
3895 /// input operands as the node already has, the input node is returned.
3896 SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) {
3897 SDNode *N = InN.getNode();
3898 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3900 // Check to see if there is no change.
3901 if (Op == N->getOperand(0)) return InN;
3903 // See if the modified node already exists.
3904 void *InsertPos = 0;
3905 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3906 return SDValue(Existing, InN.getResNo());
3908 // Nope it doesn't. Remove the node from its current place in the maps.
3910 if (!RemoveNodeFromCSEMaps(N))
3913 // Now we update the operands.
3914 N->OperandList[0].getVal()->removeUser(0, N);
3915 N->OperandList[0] = Op;
3916 N->OperandList[0].setUser(N);
3917 Op.getNode()->addUser(0, N);
3919 // If this gets put into a CSE map, add it.
3920 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3924 SDValue SelectionDAG::
3925 UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) {
3926 SDNode *N = InN.getNode();
3927 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3929 // Check to see if there is no change.
3930 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3931 return InN; // No operands changed, just return the input node.
3933 // See if the modified node already exists.
3934 void *InsertPos = 0;
3935 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3936 return SDValue(Existing, InN.getResNo());
3938 // Nope it doesn't. Remove the node from its current place in the maps.
3940 if (!RemoveNodeFromCSEMaps(N))
3943 // Now we update the operands.
3944 if (N->OperandList[0] != Op1) {
3945 N->OperandList[0].getVal()->removeUser(0, N);
3946 N->OperandList[0] = Op1;
3947 N->OperandList[0].setUser(N);
3948 Op1.getNode()->addUser(0, N);
3950 if (N->OperandList[1] != Op2) {
3951 N->OperandList[1].getVal()->removeUser(1, N);
3952 N->OperandList[1] = Op2;
3953 N->OperandList[1].setUser(N);
3954 Op2.getNode()->addUser(1, N);
3957 // If this gets put into a CSE map, add it.
3958 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3962 SDValue SelectionDAG::
3963 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) {
3964 SDValue Ops[] = { Op1, Op2, Op3 };
3965 return UpdateNodeOperands(N, Ops, 3);
3968 SDValue SelectionDAG::
3969 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3970 SDValue Op3, SDValue Op4) {
3971 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
3972 return UpdateNodeOperands(N, Ops, 4);
3975 SDValue SelectionDAG::
3976 UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2,
3977 SDValue Op3, SDValue Op4, SDValue Op5) {
3978 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3979 return UpdateNodeOperands(N, Ops, 5);
3982 SDValue SelectionDAG::
3983 UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) {
3984 SDNode *N = InN.getNode();
3985 assert(N->getNumOperands() == NumOps &&
3986 "Update with wrong number of operands");
3988 // Check to see if there is no change.
3989 bool AnyChange = false;
3990 for (unsigned i = 0; i != NumOps; ++i) {
3991 if (Ops[i] != N->getOperand(i)) {
3997 // No operands changed, just return the input node.
3998 if (!AnyChange) return InN;
4000 // See if the modified node already exists.
4001 void *InsertPos = 0;
4002 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4003 return SDValue(Existing, InN.getResNo());
4005 // Nope it doesn't. Remove the node from its current place in the maps.
4007 if (!RemoveNodeFromCSEMaps(N))
4010 // Now we update the operands.
4011 for (unsigned i = 0; i != NumOps; ++i) {
4012 if (N->OperandList[i] != Ops[i]) {
4013 N->OperandList[i].getVal()->removeUser(i, N);
4014 N->OperandList[i] = Ops[i];
4015 N->OperandList[i].setUser(N);
4016 Ops[i].getNode()->addUser(i, N);
4020 // If this gets put into a CSE map, add it.
4021 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4025 /// DropOperands - Release the operands and set this node to have
4027 void SDNode::DropOperands() {
4028 // Unlike the code in MorphNodeTo that does this, we don't need to
4029 // watch for dead nodes here.
4030 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
4031 I->getVal()->removeUser(std::distance(op_begin(), I), this);
4036 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4039 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4041 SDVTList VTs = getVTList(VT);
4042 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4045 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4046 MVT VT, SDValue Op1) {
4047 SDVTList VTs = getVTList(VT);
4048 SDValue Ops[] = { Op1 };
4049 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4052 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4053 MVT VT, SDValue Op1,
4055 SDVTList VTs = getVTList(VT);
4056 SDValue Ops[] = { Op1, Op2 };
4057 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4060 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4061 MVT VT, SDValue Op1,
4062 SDValue Op2, SDValue Op3) {
4063 SDVTList VTs = getVTList(VT);
4064 SDValue Ops[] = { Op1, Op2, Op3 };
4065 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4068 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4069 MVT VT, const SDValue *Ops,
4071 SDVTList VTs = getVTList(VT);
4072 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4075 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4076 MVT VT1, MVT VT2, const SDValue *Ops,
4078 SDVTList VTs = getVTList(VT1, VT2);
4079 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4082 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4084 SDVTList VTs = getVTList(VT1, VT2);
4085 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4088 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4089 MVT VT1, MVT VT2, MVT VT3,
4090 const SDValue *Ops, unsigned NumOps) {
4091 SDVTList VTs = getVTList(VT1, VT2, VT3);
4092 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4095 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4096 MVT VT1, MVT VT2, MVT VT3, MVT VT4,
4097 const SDValue *Ops, unsigned NumOps) {
4098 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4099 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4102 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4105 SDVTList VTs = getVTList(VT1, VT2);
4106 SDValue Ops[] = { Op1 };
4107 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4110 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4112 SDValue Op1, SDValue Op2) {
4113 SDVTList VTs = getVTList(VT1, VT2);
4114 SDValue Ops[] = { Op1, Op2 };
4115 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4118 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4120 SDValue Op1, SDValue Op2,
4122 SDVTList VTs = getVTList(VT1, VT2);
4123 SDValue Ops[] = { Op1, Op2, Op3 };
4124 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4127 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4128 MVT VT1, MVT VT2, MVT VT3,
4129 SDValue Op1, SDValue Op2,
4131 SDVTList VTs = getVTList(VT1, VT2, VT3);
4132 SDValue Ops[] = { Op1, Op2, Op3 };
4133 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4136 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4137 SDVTList VTs, const SDValue *Ops,
4139 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4142 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4144 SDVTList VTs = getVTList(VT);
4145 return MorphNodeTo(N, Opc, VTs, 0, 0);
4148 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4149 MVT VT, SDValue Op1) {
4150 SDVTList VTs = getVTList(VT);
4151 SDValue Ops[] = { Op1 };
4152 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4155 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4156 MVT VT, SDValue Op1,
4158 SDVTList VTs = getVTList(VT);
4159 SDValue Ops[] = { Op1, Op2 };
4160 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4163 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4164 MVT VT, SDValue Op1,
4165 SDValue Op2, SDValue Op3) {
4166 SDVTList VTs = getVTList(VT);
4167 SDValue Ops[] = { Op1, Op2, Op3 };
4168 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4171 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4172 MVT VT, const SDValue *Ops,
4174 SDVTList VTs = getVTList(VT);
4175 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4178 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4179 MVT VT1, MVT VT2, const SDValue *Ops,
4181 SDVTList VTs = getVTList(VT1, VT2);
4182 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4185 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4187 SDVTList VTs = getVTList(VT1, VT2);
4188 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
4191 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4192 MVT VT1, MVT VT2, MVT VT3,
4193 const SDValue *Ops, unsigned NumOps) {
4194 SDVTList VTs = getVTList(VT1, VT2, VT3);
4195 return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
4198 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4201 SDVTList VTs = getVTList(VT1, VT2);
4202 SDValue Ops[] = { Op1 };
4203 return MorphNodeTo(N, Opc, VTs, Ops, 1);
4206 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4208 SDValue Op1, SDValue Op2) {
4209 SDVTList VTs = getVTList(VT1, VT2);
4210 SDValue Ops[] = { Op1, Op2 };
4211 return MorphNodeTo(N, Opc, VTs, Ops, 2);
4214 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4216 SDValue Op1, SDValue Op2,
4218 SDVTList VTs = getVTList(VT1, VT2);
4219 SDValue Ops[] = { Op1, Op2, Op3 };
4220 return MorphNodeTo(N, Opc, VTs, Ops, 3);
4223 /// MorphNodeTo - These *mutate* the specified node to have the specified
4224 /// return type, opcode, and operands.
4226 /// Note that MorphNodeTo returns the resultant node. If there is already a
4227 /// node of the specified opcode and operands, it returns that node instead of
4228 /// the current one.
4230 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4231 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4232 /// node, and because it doesn't require CSE recalculation for any of
4233 /// the node's users.
4235 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4236 SDVTList VTs, const SDValue *Ops,
4238 // If an identical node already exists, use it.
4240 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
4241 FoldingSetNodeID ID;
4242 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4243 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4247 if (!RemoveNodeFromCSEMaps(N))
4250 // Start the morphing.
4252 N->ValueList = VTs.VTs;
4253 N->NumValues = VTs.NumVTs;
4255 // Clear the operands list, updating used nodes to remove this from their
4256 // use list. Keep track of any operands that become dead as a result.
4257 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4258 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end();
4260 SDNode *Used = I->getVal();
4261 Used->removeUser(std::distance(B, I), N);
4262 if (Used->use_empty())
4263 DeadNodeSet.insert(Used);
4266 // If NumOps is larger than the # of operands we currently have, reallocate
4267 // the operand list.
4268 if (NumOps > N->NumOperands) {
4269 if (N->OperandsNeedDelete)
4270 delete[] N->OperandList;
4272 if (N->isMachineOpcode()) {
4273 // We're creating a final node that will live unmorphed for the
4274 // remainder of the current SelectionDAG iteration, so we can allocate
4275 // the operands directly out of a pool with no recycling metadata.
4276 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps);
4277 N->OperandsNeedDelete = false;
4279 N->OperandList = new SDUse[NumOps];
4280 N->OperandsNeedDelete = true;
4284 // Assign the new operands.
4285 N->NumOperands = NumOps;
4286 for (unsigned i = 0, e = NumOps; i != e; ++i) {
4287 N->OperandList[i] = Ops[i];
4288 N->OperandList[i].setUser(N);
4289 SDNode *ToUse = N->OperandList[i].getVal();
4290 ToUse->addUser(i, N);
4293 // Delete any nodes that are still dead after adding the uses for the
4295 SmallVector<SDNode *, 16> DeadNodes;
4296 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4297 E = DeadNodeSet.end(); I != E; ++I)
4298 if ((*I)->use_empty())
4299 DeadNodes.push_back(*I);
4300 RemoveDeadNodes(DeadNodes);
4303 CSEMap.InsertNode(N, IP); // Memoize the new node.
4308 /// getTargetNode - These are used for target selectors to create a new node
4309 /// with specified return type(s), target opcode, and operands.
4311 /// Note that getTargetNode returns the resultant node. If there is already a
4312 /// node of the specified opcode and operands, it returns that node instead of
4313 /// the current one.
4314 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
4315 return getNode(~Opcode, VT).getNode();
4317 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) {
4318 return getNode(~Opcode, VT, Op1).getNode();
4320 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4321 SDValue Op1, SDValue Op2) {
4322 return getNode(~Opcode, VT, Op1, Op2).getNode();
4324 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4325 SDValue Op1, SDValue Op2,
4327 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode();
4329 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
4330 const SDValue *Ops, unsigned NumOps) {
4331 return getNode(~Opcode, VT, Ops, NumOps).getNode();
4333 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
4334 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4336 return getNode(~Opcode, VTs, 2, &Op, 0).getNode();
4338 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4339 MVT VT2, SDValue Op1) {
4340 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4341 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode();
4343 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4344 MVT VT2, SDValue Op1,
4346 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4347 SDValue Ops[] = { Op1, Op2 };
4348 return getNode(~Opcode, VTs, 2, Ops, 2).getNode();
4350 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4351 MVT VT2, SDValue Op1,
4352 SDValue Op2, SDValue Op3) {
4353 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4354 SDValue Ops[] = { Op1, Op2, Op3 };
4355 return getNode(~Opcode, VTs, 2, Ops, 3).getNode();
4357 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
4358 const SDValue *Ops, unsigned NumOps) {
4359 const MVT *VTs = getNodeValueTypes(VT1, VT2);
4360 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode();
4362 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4363 SDValue Op1, SDValue Op2) {
4364 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4365 SDValue Ops[] = { Op1, Op2 };
4366 return getNode(~Opcode, VTs, 3, Ops, 2).getNode();
4368 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4369 SDValue Op1, SDValue Op2,
4371 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4372 SDValue Ops[] = { Op1, Op2, Op3 };
4373 return getNode(~Opcode, VTs, 3, Ops, 3).getNode();
4375 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
4376 const SDValue *Ops, unsigned NumOps) {
4377 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
4378 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode();
4380 SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
4381 MVT VT2, MVT VT3, MVT VT4,
4382 const SDValue *Ops, unsigned NumOps) {
4383 std::vector<MVT> VTList;
4384 VTList.push_back(VT1);
4385 VTList.push_back(VT2);
4386 VTList.push_back(VT3);
4387 VTList.push_back(VT4);
4388 const MVT *VTs = getNodeValueTypes(VTList);
4389 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode();
4391 SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
4392 const std::vector<MVT> &ResultTys,
4393 const SDValue *Ops, unsigned NumOps) {
4394 const MVT *VTs = getNodeValueTypes(ResultTys);
4395 return getNode(~Opcode, VTs, ResultTys.size(),
4396 Ops, NumOps).getNode();
4399 /// getNodeIfExists - Get the specified node if it's already available, or
4400 /// else return NULL.
4401 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
4402 const SDValue *Ops, unsigned NumOps) {
4403 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
4404 FoldingSetNodeID ID;
4405 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4414 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4415 /// This can cause recursive merging of nodes in the DAG.
4417 /// This version assumes From has a single result value.
4419 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
4420 DAGUpdateListener *UpdateListener) {
4421 SDNode *From = FromN.getNode();
4422 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
4423 "Cannot replace with this method!");
4424 assert(From != To.getNode() && "Cannot replace uses of with self");
4426 while (!From->use_empty()) {
4427 SDNode::use_iterator UI = From->use_begin();
4430 // This node is about to morph, remove its old self from the CSE maps.
4431 RemoveNodeFromCSEMaps(U);
4433 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4434 I != E; ++I, ++operandNum)
4435 if (I->getVal() == From) {
4436 From->removeUser(operandNum, U);
4439 To.getNode()->addUser(operandNum, U);
4442 // Now that we have modified U, add it back to the CSE maps. If it already
4443 // exists there, recursively merge the results together.
4444 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4445 ReplaceAllUsesWith(U, Existing, UpdateListener);
4446 // U is now dead. Inform the listener if it exists and delete it.
4448 UpdateListener->NodeDeleted(U, Existing);
4449 DeleteNodeNotInCSEMaps(U);
4451 // If the node doesn't already exist, we updated it. Inform a listener if
4454 UpdateListener->NodeUpdated(U);
4459 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4460 /// This can cause recursive merging of nodes in the DAG.
4462 /// This version assumes From/To have matching types and numbers of result
4465 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
4466 DAGUpdateListener *UpdateListener) {
4467 assert(From->getVTList().VTs == To->getVTList().VTs &&
4468 From->getNumValues() == To->getNumValues() &&
4469 "Cannot use this version of ReplaceAllUsesWith!");
4471 // Handle the trivial case.
4475 while (!From->use_empty()) {
4476 SDNode::use_iterator UI = From->use_begin();
4479 // This node is about to morph, remove its old self from the CSE maps.
4480 RemoveNodeFromCSEMaps(U);
4482 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4483 I != E; ++I, ++operandNum)
4484 if (I->getVal() == From) {
4485 From->removeUser(operandNum, U);
4486 I->getSDValue().setNode(To);
4487 To->addUser(operandNum, U);
4490 // Now that we have modified U, add it back to the CSE maps. If it already
4491 // exists there, recursively merge the results together.
4492 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4493 ReplaceAllUsesWith(U, Existing, UpdateListener);
4494 // U is now dead. Inform the listener if it exists and delete it.
4496 UpdateListener->NodeDeleted(U, Existing);
4497 DeleteNodeNotInCSEMaps(U);
4499 // If the node doesn't already exist, we updated it. Inform a listener if
4502 UpdateListener->NodeUpdated(U);
4507 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
4508 /// This can cause recursive merging of nodes in the DAG.
4510 /// This version can replace From with any result values. To must match the
4511 /// number and types of values returned by From.
4512 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
4514 DAGUpdateListener *UpdateListener) {
4515 if (From->getNumValues() == 1) // Handle the simple case efficiently.
4516 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
4518 while (!From->use_empty()) {
4519 SDNode::use_iterator UI = From->use_begin();
4522 // This node is about to morph, remove its old self from the CSE maps.
4523 RemoveNodeFromCSEMaps(U);
4525 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
4526 I != E; ++I, ++operandNum)
4527 if (I->getVal() == From) {
4528 const SDValue &ToOp = To[I->getSDValue().getResNo()];
4529 From->removeUser(operandNum, U);
4532 ToOp.getNode()->addUser(operandNum, U);
4535 // Now that we have modified U, add it back to the CSE maps. If it already
4536 // exists there, recursively merge the results together.
4537 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
4538 ReplaceAllUsesWith(U, Existing, UpdateListener);
4539 // U is now dead. Inform the listener if it exists and delete it.
4541 UpdateListener->NodeDeleted(U, Existing);
4542 DeleteNodeNotInCSEMaps(U);
4544 // If the node doesn't already exist, we updated it. Inform a listener if
4547 UpdateListener->NodeUpdated(U);
4552 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4553 /// uses of other values produced by From.getVal() alone. The Deleted vector is
4554 /// handled the same way as for ReplaceAllUsesWith.
4555 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
4556 DAGUpdateListener *UpdateListener){
4557 // Handle the really simple, really trivial case efficiently.
4558 if (From == To) return;
4560 // Handle the simple, trivial, case efficiently.
4561 if (From.getNode()->getNumValues() == 1) {
4562 ReplaceAllUsesWith(From, To, UpdateListener);
4566 // Get all of the users of From.getNode(). We want these in a nice,
4567 // deterministically ordered and uniqued set, so we use a SmallSetVector.
4568 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end());
4570 while (!Users.empty()) {
4571 // We know that this user uses some value of From. If it is the right
4572 // value, update it.
4573 SDNode *User = Users.back();
4576 // Scan for an operand that matches From.
4577 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4578 for (; Op != E; ++Op)
4579 if (*Op == From) break;
4581 // If there are no matches, the user must use some other result of From.
4582 if (Op == E) continue;
4584 // Okay, we know this user needs to be updated. Remove its old self
4585 // from the CSE maps.
4586 RemoveNodeFromCSEMaps(User);
4588 // Update all operands that match "From" in case there are multiple uses.
4589 for (; Op != E; ++Op) {
4591 From.getNode()->removeUser(Op-User->op_begin(), User);
4594 To.getNode()->addUser(Op-User->op_begin(), User);
4598 // Now that we have modified User, add it back to the CSE maps. If it
4599 // already exists there, recursively merge the results together.
4600 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4602 if (UpdateListener) UpdateListener->NodeUpdated(User);
4603 continue; // Continue on to next user.
4606 // If there was already an existing matching node, use ReplaceAllUsesWith
4607 // to replace the dead one with the existing one. This can cause
4608 // recursive merging of other unrelated nodes down the line.
4609 ReplaceAllUsesWith(User, Existing, UpdateListener);
4611 // User is now dead. Notify a listener if present.
4612 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4613 DeleteNodeNotInCSEMaps(User);
4617 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
4618 /// uses of other values produced by From.getVal() alone. The same value may
4619 /// appear in both the From and To list. The Deleted vector is
4620 /// handled the same way as for ReplaceAllUsesWith.
4621 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
4624 DAGUpdateListener *UpdateListener){
4625 // Handle the simple, trivial case efficiently.
4627 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
4629 SmallVector<std::pair<SDNode *, unsigned>, 16> Users;
4630 for (unsigned i = 0; i != Num; ++i)
4631 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(),
4632 E = From[i].getNode()->use_end(); UI != E; ++UI)
4633 Users.push_back(std::make_pair(*UI, i));
4635 while (!Users.empty()) {
4636 // We know that this user uses some value of From. If it is the right
4637 // value, update it.
4638 SDNode *User = Users.back().first;
4639 unsigned i = Users.back().second;
4642 // Scan for an operand that matches From.
4643 SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4644 for (; Op != E; ++Op)
4645 if (*Op == From[i]) break;
4647 // If there are no matches, the user must use some other result of From.
4648 if (Op == E) continue;
4650 // Okay, we know this user needs to be updated. Remove its old self
4651 // from the CSE maps.
4652 RemoveNodeFromCSEMaps(User);
4654 // Update all operands that match "From" in case there are multiple uses.
4655 for (; Op != E; ++Op) {
4656 if (*Op == From[i]) {
4657 From[i].getNode()->removeUser(Op-User->op_begin(), User);
4660 To[i].getNode()->addUser(Op-User->op_begin(), User);
4664 // Now that we have modified User, add it back to the CSE maps. If it
4665 // already exists there, recursively merge the results together.
4666 SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4668 if (UpdateListener) UpdateListener->NodeUpdated(User);
4669 continue; // Continue on to next user.
4672 // If there was already an existing matching node, use ReplaceAllUsesWith
4673 // to replace the dead one with the existing one. This can cause
4674 // recursive merging of other unrelated nodes down the line.
4675 ReplaceAllUsesWith(User, Existing, UpdateListener);
4677 // User is now dead. Notify a listener if present.
4678 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4679 DeleteNodeNotInCSEMaps(User);
4683 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4684 /// based on their topological order. It returns the maximum id and a vector
4685 /// of the SDNodes* in assigned order by reference.
4686 unsigned SelectionDAG::AssignTopologicalOrder() {
4688 unsigned DAGSize = 0;
4690 // SortedPos tracks the progress of the algorithm. Nodes before it are
4691 // sorted, nodes after it are unsorted. When the algorithm completes
4692 // it is at the end of the list.
4693 allnodes_iterator SortedPos = allnodes_begin();
4695 // Visit all the nodes. Move nodes with no operands to the front of
4696 // the list immediately. Annotate nodes that do have operands with their
4697 // operand count. Before we do this, the Node Id fields of the nodes
4698 // may contain arbitrary values. After, the Node Id fields for nodes
4699 // before SortedPos will contain the topological sort index, and the
4700 // Node Id fields for nodes At SortedPos and after will contain the
4701 // count of outstanding operands.
4702 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
4704 unsigned Degree = N->getNumOperands();
4706 // A node with no uses, add it to the result array immediately.
4707 N->setNodeId(DAGSize++);
4708 allnodes_iterator Q = N;
4710 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
4713 // Temporarily use the Node Id as scratch space for the degree count.
4714 N->setNodeId(Degree);
4718 // Visit all the nodes. As we iterate, moves nodes into sorted order,
4719 // such that by the time the end is reached all nodes will be sorted.
4720 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
4722 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
4725 unsigned Degree = P->getNodeId();
4728 // All of P's operands are sorted, so P may sorted now.
4729 P->setNodeId(DAGSize++);
4731 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
4734 // Update P's outstanding operand count.
4735 P->setNodeId(Degree);
4740 assert(SortedPos == AllNodes.end() &&
4741 "Topological sort incomplete!");
4742 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
4743 "First node in topological sort is not the entry token!");
4744 assert(AllNodes.front().getNodeId() == 0 &&
4745 "First node in topological sort has non-zero id!");
4746 assert(AllNodes.front().getNumOperands() == 0 &&
4747 "First node in topological sort has operands!");
4748 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
4749 "Last node in topologic sort has unexpected id!");
4750 assert(AllNodes.back().use_empty() &&
4751 "Last node in topologic sort has users!");
4752 assert(DAGSize == allnodes_size() && "Node count mismatch!");
4758 //===----------------------------------------------------------------------===//
4760 //===----------------------------------------------------------------------===//
4762 // Out-of-line virtual method to give class a home.
4763 void SDNode::ANCHOR() {}
4764 void UnarySDNode::ANCHOR() {}
4765 void BinarySDNode::ANCHOR() {}
4766 void TernarySDNode::ANCHOR() {}
4767 void HandleSDNode::ANCHOR() {}
4768 void ConstantSDNode::ANCHOR() {}
4769 void ConstantFPSDNode::ANCHOR() {}
4770 void GlobalAddressSDNode::ANCHOR() {}
4771 void FrameIndexSDNode::ANCHOR() {}
4772 void JumpTableSDNode::ANCHOR() {}
4773 void ConstantPoolSDNode::ANCHOR() {}
4774 void BasicBlockSDNode::ANCHOR() {}
4775 void SrcValueSDNode::ANCHOR() {}
4776 void MemOperandSDNode::ANCHOR() {}
4777 void RegisterSDNode::ANCHOR() {}
4778 void DbgStopPointSDNode::ANCHOR() {}
4779 void LabelSDNode::ANCHOR() {}
4780 void ExternalSymbolSDNode::ANCHOR() {}
4781 void CondCodeSDNode::ANCHOR() {}
4782 void ARG_FLAGSSDNode::ANCHOR() {}
4783 void VTSDNode::ANCHOR() {}
4784 void MemSDNode::ANCHOR() {}
4785 void LoadSDNode::ANCHOR() {}
4786 void StoreSDNode::ANCHOR() {}
4787 void AtomicSDNode::ANCHOR() {}
4788 void MemIntrinsicSDNode::ANCHOR() {}
4789 void CallSDNode::ANCHOR() {}
4790 void CvtRndSatSDNode::ANCHOR() {}
4792 HandleSDNode::~HandleSDNode() {
4796 GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4798 : SDNode(isa<GlobalVariable>(GA) &&
4799 cast<GlobalVariable>(GA)->isThreadLocal() ?
4801 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4803 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4804 getSDVTList(VT)), Offset(o) {
4805 TheGlobal = const_cast<GlobalValue*>(GA);
4808 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt,
4809 const Value *srcValue, int SVO,
4810 unsigned alignment, bool vol)
4811 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4812 Flags(encodeMemSDNodeFlags(vol, alignment)) {
4814 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4815 assert(getAlignment() == alignment && "Alignment representation error!");
4816 assert(isVolatile() == vol && "Volatile representation error!");
4819 MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops,
4820 unsigned NumOps, MVT memvt, const Value *srcValue,
4821 int SVO, unsigned alignment, bool vol)
4822 : SDNode(Opc, VTs, Ops, NumOps),
4823 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
4824 Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
4825 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
4826 assert(getAlignment() == alignment && "Alignment representation error!");
4827 assert(isVolatile() == vol && "Volatile representation error!");
4830 /// getMemOperand - Return a MachineMemOperand object describing the memory
4831 /// reference performed by this memory reference.
4832 MachineMemOperand MemSDNode::getMemOperand() const {
4834 if (isa<LoadSDNode>(this))
4835 Flags = MachineMemOperand::MOLoad;
4836 else if (isa<StoreSDNode>(this))
4837 Flags = MachineMemOperand::MOStore;
4838 else if (isa<AtomicSDNode>(this)) {
4839 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4842 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this);
4843 assert(MemIntrinNode && "Unknown MemSDNode opcode!");
4844 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad;
4845 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore;
4848 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4849 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4851 // Check if the memory reference references a frame index
4852 const FrameIndexSDNode *FI =
4853 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode());
4854 if (!getSrcValue() && FI)
4855 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()),
4856 Flags, 0, Size, getAlignment());
4858 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4859 Size, getAlignment());
4862 /// Profile - Gather unique data for the node.
4864 void SDNode::Profile(FoldingSetNodeID &ID) const {
4865 AddNodeIDNode(ID, this);
4868 /// getValueTypeList - Return a pointer to the specified value type.
4870 const MVT *SDNode::getValueTypeList(MVT VT) {
4871 if (VT.isExtended()) {
4872 static std::set<MVT, MVT::compareRawBits> EVTs;
4873 return &(*EVTs.insert(VT).first);
4875 static MVT VTs[MVT::LAST_VALUETYPE];
4876 VTs[VT.getSimpleVT()] = VT;
4877 return &VTs[VT.getSimpleVT()];
4881 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4882 /// indicated value. This method ignores uses of other values defined by this
4884 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4885 assert(Value < getNumValues() && "Bad value!");
4887 // TODO: Only iterate over uses of a given value of the node
4888 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4889 if (UI.getUse().getSDValue().getResNo() == Value) {
4896 // Found exactly the right number of uses?
4901 /// hasAnyUseOfValue - Return true if there are any use of the indicated
4902 /// value. This method ignores uses of other values defined by this operation.
4903 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4904 assert(Value < getNumValues() && "Bad value!");
4906 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
4907 if (UI.getUse().getSDValue().getResNo() == Value)
4914 /// isOnlyUserOf - Return true if this node is the only use of N.
4916 bool SDNode::isOnlyUserOf(SDNode *N) const {
4918 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4929 /// isOperand - Return true if this node is an operand of N.
4931 bool SDValue::isOperandOf(SDNode *N) const {
4932 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4933 if (*this == N->getOperand(i))
4938 bool SDNode::isOperandOf(SDNode *N) const {
4939 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4940 if (this == N->OperandList[i].getVal())
4945 /// reachesChainWithoutSideEffects - Return true if this operand (which must
4946 /// be a chain) reaches the specified operand without crossing any
4947 /// side-effecting instructions. In practice, this looks through token
4948 /// factors and non-volatile loads. In order to remain efficient, this only
4949 /// looks a couple of nodes in, it does not do an exhaustive search.
4950 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
4951 unsigned Depth) const {
4952 if (*this == Dest) return true;
4954 // Don't search too deeply, we just want to be able to see through
4955 // TokenFactor's etc.
4956 if (Depth == 0) return false;
4958 // If this is a token factor, all inputs to the TF happen in parallel. If any
4959 // of the operands of the TF reach dest, then we can do the xform.
4960 if (getOpcode() == ISD::TokenFactor) {
4961 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4962 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4967 // Loads don't have side effects, look through them.
4968 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4969 if (!Ld->isVolatile())
4970 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4976 static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4977 SmallPtrSet<SDNode *, 32> &Visited) {
4978 if (found || !Visited.insert(N))
4981 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4982 SDNode *Op = N->getOperand(i).getNode();
4987 findPredecessor(Op, P, found, Visited);
4991 /// isPredecessorOf - Return true if this node is a predecessor of N. This node
4992 /// is either an operand of N or it can be reached by recursively traversing
4993 /// up the operands.
4994 /// NOTE: this is an expensive method. Use it carefully.
4995 bool SDNode::isPredecessorOf(SDNode *N) const {
4996 SmallPtrSet<SDNode *, 32> Visited;
4998 findPredecessor(N, this, found, Visited);
5002 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5003 assert(Num < NumOperands && "Invalid child # of SDNode!");
5004 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5007 std::string SDNode::getOperationName(const SelectionDAG *G) const {
5008 switch (getOpcode()) {
5010 if (getOpcode() < ISD::BUILTIN_OP_END)
5011 return "<<Unknown DAG Node>>";
5012 if (isMachineOpcode()) {
5014 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
5015 if (getMachineOpcode() < TII->getNumOpcodes())
5016 return TII->get(getMachineOpcode()).getName();
5017 return "<<Unknown Machine Node>>";
5020 TargetLowering &TLI = G->getTargetLoweringInfo();
5021 const char *Name = TLI.getTargetNodeName(getOpcode());
5022 if (Name) return Name;
5023 return "<<Unknown Target Node>>";
5025 return "<<Unknown Node>>";
5028 case ISD::DELETED_NODE:
5029 return "<<Deleted Node!>>";
5031 case ISD::PREFETCH: return "Prefetch";
5032 case ISD::MEMBARRIER: return "MemBarrier";
5033 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8";
5034 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8";
5035 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8";
5036 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8";
5037 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8";
5038 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8";
5039 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8";
5040 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8";
5041 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8";
5042 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8";
5043 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8";
5044 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8";
5045 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16";
5046 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16";
5047 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16";
5048 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16";
5049 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16";
5050 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16";
5051 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16";
5052 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16";
5053 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16";
5054 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16";
5055 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16";
5056 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16";
5057 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32";
5058 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32";
5059 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32";
5060 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32";
5061 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32";
5062 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32";
5063 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32";
5064 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32";
5065 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32";
5066 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32";
5067 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32";
5068 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32";
5069 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64";
5070 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64";
5071 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64";
5072 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64";
5073 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64";
5074 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64";
5075 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64";
5076 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64";
5077 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64";
5078 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64";
5079 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64";
5080 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64";
5081 case ISD::PCMARKER: return "PCMarker";
5082 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
5083 case ISD::SRCVALUE: return "SrcValue";
5084 case ISD::MEMOPERAND: return "MemOperand";
5085 case ISD::EntryToken: return "EntryToken";
5086 case ISD::TokenFactor: return "TokenFactor";
5087 case ISD::AssertSext: return "AssertSext";
5088 case ISD::AssertZext: return "AssertZext";
5090 case ISD::BasicBlock: return "BasicBlock";
5091 case ISD::ARG_FLAGS: return "ArgFlags";
5092 case ISD::VALUETYPE: return "ValueType";
5093 case ISD::Register: return "Register";
5095 case ISD::Constant: return "Constant";
5096 case ISD::ConstantFP: return "ConstantFP";
5097 case ISD::GlobalAddress: return "GlobalAddress";
5098 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
5099 case ISD::FrameIndex: return "FrameIndex";
5100 case ISD::JumpTable: return "JumpTable";
5101 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
5102 case ISD::RETURNADDR: return "RETURNADDR";
5103 case ISD::FRAMEADDR: return "FRAMEADDR";
5104 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
5105 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
5106 case ISD::EHSELECTION: return "EHSELECTION";
5107 case ISD::EH_RETURN: return "EH_RETURN";
5108 case ISD::ConstantPool: return "ConstantPool";
5109 case ISD::ExternalSymbol: return "ExternalSymbol";
5110 case ISD::INTRINSIC_WO_CHAIN: {
5111 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue();
5112 return Intrinsic::getName((Intrinsic::ID)IID);
5114 case ISD::INTRINSIC_VOID:
5115 case ISD::INTRINSIC_W_CHAIN: {
5116 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue();
5117 return Intrinsic::getName((Intrinsic::ID)IID);
5120 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
5121 case ISD::TargetConstant: return "TargetConstant";
5122 case ISD::TargetConstantFP:return "TargetConstantFP";
5123 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
5124 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
5125 case ISD::TargetFrameIndex: return "TargetFrameIndex";
5126 case ISD::TargetJumpTable: return "TargetJumpTable";
5127 case ISD::TargetConstantPool: return "TargetConstantPool";
5128 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
5130 case ISD::CopyToReg: return "CopyToReg";
5131 case ISD::CopyFromReg: return "CopyFromReg";
5132 case ISD::UNDEF: return "undef";
5133 case ISD::MERGE_VALUES: return "merge_values";
5134 case ISD::INLINEASM: return "inlineasm";
5135 case ISD::DBG_LABEL: return "dbg_label";
5136 case ISD::EH_LABEL: return "eh_label";
5137 case ISD::DECLARE: return "declare";
5138 case ISD::HANDLENODE: return "handlenode";
5139 case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
5140 case ISD::CALL: return "call";
5143 case ISD::FABS: return "fabs";
5144 case ISD::FNEG: return "fneg";
5145 case ISD::FSQRT: return "fsqrt";
5146 case ISD::FSIN: return "fsin";
5147 case ISD::FCOS: return "fcos";
5148 case ISD::FPOWI: return "fpowi";
5149 case ISD::FPOW: return "fpow";
5150 case ISD::FTRUNC: return "ftrunc";
5151 case ISD::FFLOOR: return "ffloor";
5152 case ISD::FCEIL: return "fceil";
5153 case ISD::FRINT: return "frint";
5154 case ISD::FNEARBYINT: return "fnearbyint";
5157 case ISD::ADD: return "add";
5158 case ISD::SUB: return "sub";
5159 case ISD::MUL: return "mul";
5160 case ISD::MULHU: return "mulhu";
5161 case ISD::MULHS: return "mulhs";
5162 case ISD::SDIV: return "sdiv";
5163 case ISD::UDIV: return "udiv";
5164 case ISD::SREM: return "srem";
5165 case ISD::UREM: return "urem";
5166 case ISD::SMUL_LOHI: return "smul_lohi";
5167 case ISD::UMUL_LOHI: return "umul_lohi";
5168 case ISD::SDIVREM: return "sdivrem";
5169 case ISD::UDIVREM: return "udivrem";
5170 case ISD::AND: return "and";
5171 case ISD::OR: return "or";
5172 case ISD::XOR: return "xor";
5173 case ISD::SHL: return "shl";
5174 case ISD::SRA: return "sra";
5175 case ISD::SRL: return "srl";
5176 case ISD::ROTL: return "rotl";
5177 case ISD::ROTR: return "rotr";
5178 case ISD::FADD: return "fadd";
5179 case ISD::FSUB: return "fsub";
5180 case ISD::FMUL: return "fmul";
5181 case ISD::FDIV: return "fdiv";
5182 case ISD::FREM: return "frem";
5183 case ISD::FCOPYSIGN: return "fcopysign";
5184 case ISD::FGETSIGN: return "fgetsign";
5186 case ISD::SETCC: return "setcc";
5187 case ISD::VSETCC: return "vsetcc";
5188 case ISD::SELECT: return "select";
5189 case ISD::SELECT_CC: return "select_cc";
5190 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
5191 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
5192 case ISD::CONCAT_VECTORS: return "concat_vectors";
5193 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
5194 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
5195 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
5196 case ISD::CARRY_FALSE: return "carry_false";
5197 case ISD::ADDC: return "addc";
5198 case ISD::ADDE: return "adde";
5199 case ISD::SADDO: return "saddo";
5200 case ISD::UADDO: return "uaddo";
5201 case ISD::SUBC: return "subc";
5202 case ISD::SUBE: return "sube";
5203 case ISD::SHL_PARTS: return "shl_parts";
5204 case ISD::SRA_PARTS: return "sra_parts";
5205 case ISD::SRL_PARTS: return "srl_parts";
5207 case ISD::EXTRACT_SUBREG: return "extract_subreg";
5208 case ISD::INSERT_SUBREG: return "insert_subreg";
5210 // Conversion operators.
5211 case ISD::SIGN_EXTEND: return "sign_extend";
5212 case ISD::ZERO_EXTEND: return "zero_extend";
5213 case ISD::ANY_EXTEND: return "any_extend";
5214 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
5215 case ISD::TRUNCATE: return "truncate";
5216 case ISD::FP_ROUND: return "fp_round";
5217 case ISD::FLT_ROUNDS_: return "flt_rounds";
5218 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
5219 case ISD::FP_EXTEND: return "fp_extend";
5221 case ISD::SINT_TO_FP: return "sint_to_fp";
5222 case ISD::UINT_TO_FP: return "uint_to_fp";
5223 case ISD::FP_TO_SINT: return "fp_to_sint";
5224 case ISD::FP_TO_UINT: return "fp_to_uint";
5225 case ISD::BIT_CONVERT: return "bit_convert";
5227 case ISD::CONVERT_RNDSAT: {
5228 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) {
5229 default: assert(0 && "Unknown cvt code!");
5230 case ISD::CVT_FF: return "cvt_ff";
5231 case ISD::CVT_FS: return "cvt_fs";
5232 case ISD::CVT_FU: return "cvt_fu";
5233 case ISD::CVT_SF: return "cvt_sf";
5234 case ISD::CVT_UF: return "cvt_uf";
5235 case ISD::CVT_SS: return "cvt_ss";
5236 case ISD::CVT_SU: return "cvt_su";
5237 case ISD::CVT_US: return "cvt_us";
5238 case ISD::CVT_UU: return "cvt_uu";
5242 // Control flow instructions
5243 case ISD::BR: return "br";
5244 case ISD::BRIND: return "brind";
5245 case ISD::BR_JT: return "br_jt";
5246 case ISD::BRCOND: return "brcond";
5247 case ISD::BR_CC: return "br_cc";
5248 case ISD::RET: return "ret";
5249 case ISD::CALLSEQ_START: return "callseq_start";
5250 case ISD::CALLSEQ_END: return "callseq_end";
5253 case ISD::LOAD: return "load";
5254 case ISD::STORE: return "store";
5255 case ISD::VAARG: return "vaarg";
5256 case ISD::VACOPY: return "vacopy";
5257 case ISD::VAEND: return "vaend";
5258 case ISD::VASTART: return "vastart";
5259 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
5260 case ISD::EXTRACT_ELEMENT: return "extract_element";
5261 case ISD::BUILD_PAIR: return "build_pair";
5262 case ISD::STACKSAVE: return "stacksave";
5263 case ISD::STACKRESTORE: return "stackrestore";
5264 case ISD::TRAP: return "trap";
5267 case ISD::BSWAP: return "bswap";
5268 case ISD::CTPOP: return "ctpop";
5269 case ISD::CTTZ: return "cttz";
5270 case ISD::CTLZ: return "ctlz";
5273 case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
5274 case ISD::DEBUG_LOC: return "debug_loc";
5277 case ISD::TRAMPOLINE: return "trampoline";
5280 switch (cast<CondCodeSDNode>(this)->get()) {
5281 default: assert(0 && "Unknown setcc condition!");
5282 case ISD::SETOEQ: return "setoeq";
5283 case ISD::SETOGT: return "setogt";
5284 case ISD::SETOGE: return "setoge";
5285 case ISD::SETOLT: return "setolt";
5286 case ISD::SETOLE: return "setole";
5287 case ISD::SETONE: return "setone";
5289 case ISD::SETO: return "seto";
5290 case ISD::SETUO: return "setuo";
5291 case ISD::SETUEQ: return "setue";
5292 case ISD::SETUGT: return "setugt";
5293 case ISD::SETUGE: return "setuge";
5294 case ISD::SETULT: return "setult";
5295 case ISD::SETULE: return "setule";
5296 case ISD::SETUNE: return "setune";
5298 case ISD::SETEQ: return "seteq";
5299 case ISD::SETGT: return "setgt";
5300 case ISD::SETGE: return "setge";
5301 case ISD::SETLT: return "setlt";
5302 case ISD::SETLE: return "setle";
5303 case ISD::SETNE: return "setne";
5308 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
5317 return "<post-inc>";
5319 return "<post-dec>";
5323 std::string ISD::ArgFlagsTy::getArgFlagsString() {
5324 std::string S = "< ";
5338 if (getByValAlign())
5339 S += "byval-align:" + utostr(getByValAlign()) + " ";
5341 S += "orig-align:" + utostr(getOrigAlign()) + " ";
5343 S += "byval-size:" + utostr(getByValSize()) + " ";
5347 void SDNode::dump() const { dump(0); }
5348 void SDNode::dump(const SelectionDAG *G) const {
5353 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
5354 OS << (void*)this << ": ";
5356 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
5358 if (getValueType(i) == MVT::Other)
5361 OS << getValueType(i).getMVTString();
5363 OS << " = " << getOperationName(G);
5366 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
5368 OS << (void*)getOperand(i).getNode();
5369 if (unsigned RN = getOperand(i).getResNo())
5373 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
5374 SDNode *Mask = getOperand(2).getNode();
5376 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
5378 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
5381 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue();
5386 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
5387 OS << '<' << CSDN->getAPIntValue() << '>';
5388 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
5389 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
5390 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
5391 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
5392 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
5395 CSDN->getValueAPF().bitcastToAPInt().dump();
5398 } else if (const GlobalAddressSDNode *GADN =
5399 dyn_cast<GlobalAddressSDNode>(this)) {
5400 int64_t offset = GADN->getOffset();
5402 WriteAsOperand(OS, GADN->getGlobal());
5405 OS << " + " << offset;
5407 OS << " " << offset;
5408 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
5409 OS << "<" << FIDN->getIndex() << ">";
5410 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
5411 OS << "<" << JTDN->getIndex() << ">";
5412 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
5413 int offset = CP->getOffset();
5414 if (CP->isMachineConstantPoolEntry())
5415 OS << "<" << *CP->getMachineCPVal() << ">";
5417 OS << "<" << *CP->getConstVal() << ">";
5419 OS << " + " << offset;
5421 OS << " " << offset;
5422 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
5424 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
5426 OS << LBB->getName() << " ";
5427 OS << (const void*)BBDN->getBasicBlock() << ">";
5428 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
5429 if (G && R->getReg() &&
5430 TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
5431 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
5433 OS << " #" << R->getReg();
5435 } else if (const ExternalSymbolSDNode *ES =
5436 dyn_cast<ExternalSymbolSDNode>(this)) {
5437 OS << "'" << ES->getSymbol() << "'";
5438 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
5440 OS << "<" << M->getValue() << ">";
5443 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
5444 if (M->MO.getValue())
5445 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
5447 OS << "<null:" << M->MO.getOffset() << ">";
5448 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
5449 OS << N->getArgFlags().getArgFlagsString();
5450 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
5451 OS << ":" << N->getVT().getMVTString();
5453 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
5454 const Value *SrcValue = LD->getSrcValue();
5455 int SrcOffset = LD->getSrcValueOffset();
5461 OS << ":" << SrcOffset << ">";
5464 switch (LD->getExtensionType()) {
5465 default: doExt = false; break;
5466 case ISD::EXTLOAD: OS << " <anyext "; break;
5467 case ISD::SEXTLOAD: OS << " <sext "; break;
5468 case ISD::ZEXTLOAD: OS << " <zext "; break;
5471 OS << LD->getMemoryVT().getMVTString() << ">";
5473 const char *AM = getIndexedModeName(LD->getAddressingMode());
5476 if (LD->isVolatile())
5477 OS << " <volatile>";
5478 OS << " alignment=" << LD->getAlignment();
5479 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
5480 const Value *SrcValue = ST->getSrcValue();
5481 int SrcOffset = ST->getSrcValueOffset();
5487 OS << ":" << SrcOffset << ">";
5489 if (ST->isTruncatingStore())
5490 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
5492 const char *AM = getIndexedModeName(ST->getAddressingMode());
5495 if (ST->isVolatile())
5496 OS << " <volatile>";
5497 OS << " alignment=" << ST->getAlignment();
5498 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
5499 const Value *SrcValue = AT->getSrcValue();
5500 int SrcOffset = AT->getSrcValueOffset();
5506 OS << ":" << SrcOffset << ">";
5507 if (AT->isVolatile())
5508 OS << " <volatile>";
5509 OS << " alignment=" << AT->getAlignment();
5513 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
5514 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5515 if (N->getOperand(i).getNode()->hasOneUse())
5516 DumpNodes(N->getOperand(i).getNode(), indent+2, G);
5518 cerr << "\n" << std::string(indent+2, ' ')
5519 << (void*)N->getOperand(i).getNode() << ": <multiple use>";
5522 cerr << "\n" << std::string(indent, ' ');
5526 void SelectionDAG::dump() const {
5527 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
5529 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
5531 const SDNode *N = I;
5532 if (!N->hasOneUse() && N != getRoot().getNode())
5533 DumpNodes(N, 2, this);
5536 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
5541 const Type *ConstantPoolSDNode::getType() const {
5542 if (isMachineConstantPoolEntry())
5543 return Val.MachineCPVal->getType();
5544 return Val.ConstVal->getType();