1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DebugInfo.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalAlias.h"
33 #include "llvm/IR/GlobalVariable.h"
34 #include "llvm/IR/Intrinsics.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Debug.h"
37 #include "llvm/Support/ErrorHandling.h"
38 #include "llvm/Support/ManagedStatic.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/Mutex.h"
41 #include "llvm/Support/raw_ostream.h"
42 #include "llvm/Target/TargetInstrInfo.h"
43 #include "llvm/Target/TargetIntrinsicInfo.h"
44 #include "llvm/Target/TargetLowering.h"
45 #include "llvm/Target/TargetMachine.h"
46 #include "llvm/Target/TargetOptions.h"
47 #include "llvm/Target/TargetRegisterInfo.h"
48 #include "llvm/Target/TargetSelectionDAGInfo.h"
49 #include "llvm/Target/TargetSubtargetInfo.h"
56 /// makeVTList - Return an instance of the SDVTList struct initialized with the
57 /// specified members.
58 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
59 SDVTList Res = {VTs, NumVTs};
63 // Default null implementations of the callbacks.
64 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
65 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
67 //===----------------------------------------------------------------------===//
68 // ConstantFPSDNode Class
69 //===----------------------------------------------------------------------===//
71 /// isExactlyValue - We don't rely on operator== working on double values, as
72 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
73 /// As such, this method can be used to do an exact bit-for-bit comparison of
74 /// two floating point values.
75 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
76 return getValueAPF().bitwiseIsEqual(V);
79 bool ConstantFPSDNode::isValueValidForType(EVT VT,
81 assert(VT.isFloatingPoint() && "Can only convert between FP types");
83 // convert modifies in place, so make a copy.
84 APFloat Val2 = APFloat(Val);
86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
87 APFloat::rmNearestTiesToEven,
92 //===----------------------------------------------------------------------===//
94 //===----------------------------------------------------------------------===//
96 /// isBuildVectorAllOnes - Return true if the specified node is a
97 /// BUILD_VECTOR where all of the elements are ~0 or undef.
98 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
99 // Look through a bit convert.
100 while (N->getOpcode() == ISD::BITCAST)
101 N = N->getOperand(0).getNode();
103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
105 unsigned i = 0, e = N->getNumOperands();
107 // Skip over all of the undef values.
108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
111 // Do not accept an all-undef vector.
112 if (i == e) return false;
114 // Do not accept build_vectors that aren't all constants or which have non-~0
115 // elements. We have to be a bit careful here, as the type of the constant
116 // may not be the same as the type of the vector elements due to type
117 // legalization (the elements are promoted to a legal type for the target and
118 // a vector of a type may be legal when the base element type is not).
119 // We only want to check enough bits to cover the vector elements, because
120 // we care if the resultant vector is all ones, not whether the individual
122 SDValue NotZero = N->getOperand(i);
123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
133 // Okay, we have at least one ~0 value, check to see if the rest match or are
134 // undefs. Even with the above element type twiddling, this should be OK, as
135 // the same type legalization should have applied to all the elements.
136 for (++i; i != e; ++i)
137 if (N->getOperand(i) != NotZero &&
138 N->getOperand(i).getOpcode() != ISD::UNDEF)
144 /// isBuildVectorAllZeros - Return true if the specified node is a
145 /// BUILD_VECTOR where all of the elements are 0 or undef.
146 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
147 // Look through a bit convert.
148 while (N->getOpcode() == ISD::BITCAST)
149 N = N->getOperand(0).getNode();
151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 bool IsAllUndef = true;
154 for (const SDValue &Op : N->op_values()) {
155 if (Op.getOpcode() == ISD::UNDEF)
158 // Do not accept build_vectors that aren't all constants or which have non-0
159 // elements. We have to be a bit careful here, as the type of the constant
160 // may not be the same as the type of the vector elements due to type
161 // legalization (the elements are promoted to a legal type for the target
162 // and a vector of a type may be legal when the base element type is not).
163 // We only want to check enough bits to cover the vector elements, because
164 // we care if the resultant vector is all zeros, not whether the individual
166 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
167 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
170 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
177 // Do not accept an all-undef vector.
183 /// \brief Return true if the specified node is a BUILD_VECTOR node of
184 /// all ConstantSDNode or undef.
185 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
186 if (N->getOpcode() != ISD::BUILD_VECTOR)
189 for (const SDValue &Op : N->op_values()) {
190 if (Op.getOpcode() == ISD::UNDEF)
192 if (!isa<ConstantSDNode>(Op))
198 /// \brief Return true if the specified node is a BUILD_VECTOR node of
199 /// all ConstantFPSDNode or undef.
200 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
201 if (N->getOpcode() != ISD::BUILD_VECTOR)
204 for (const SDValue &Op : N->op_values()) {
205 if (Op.getOpcode() == ISD::UNDEF)
207 if (!isa<ConstantFPSDNode>(Op))
213 /// isScalarToVector - Return true if the specified node is a
214 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
215 /// element is not an undef.
216 bool ISD::isScalarToVector(const SDNode *N) {
217 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
220 if (N->getOpcode() != ISD::BUILD_VECTOR)
222 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
224 unsigned NumElems = N->getNumOperands();
227 for (unsigned i = 1; i < NumElems; ++i) {
228 SDValue V = N->getOperand(i);
229 if (V.getOpcode() != ISD::UNDEF)
235 /// allOperandsUndef - Return true if the node has at least one operand
236 /// and all operands of the specified node are ISD::UNDEF.
237 bool ISD::allOperandsUndef(const SDNode *N) {
238 // Return false if the node has no operands.
239 // This is "logically inconsistent" with the definition of "all" but
240 // is probably the desired behavior.
241 if (N->getNumOperands() == 0)
244 for (const SDValue &Op : N->op_values())
245 if (Op.getOpcode() != ISD::UNDEF)
251 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
254 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
256 return ISD::SIGN_EXTEND;
258 return ISD::ZERO_EXTEND;
263 llvm_unreachable("Invalid LoadExtType");
266 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
267 /// when given the operation for (X op Y).
268 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
269 // To perform this operation, we just need to swap the L and G bits of the
271 unsigned OldL = (Operation >> 2) & 1;
272 unsigned OldG = (Operation >> 1) & 1;
273 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
274 (OldL << 1) | // New G bit
275 (OldG << 2)); // New L bit.
278 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
279 /// 'op' is a valid SetCC operation.
280 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
281 unsigned Operation = Op;
283 Operation ^= 7; // Flip L, G, E bits, but not U.
285 Operation ^= 15; // Flip all of the condition bits.
287 if (Operation > ISD::SETTRUE2)
288 Operation &= ~8; // Don't let N and U bits get set.
290 return ISD::CondCode(Operation);
294 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
295 /// signed operation and 2 if the result is an unsigned comparison. Return zero
296 /// if the operation does not depend on the sign of the input (setne and seteq).
297 static int isSignedOp(ISD::CondCode Opcode) {
299 default: llvm_unreachable("Illegal integer setcc operation!");
301 case ISD::SETNE: return 0;
305 case ISD::SETGE: return 1;
309 case ISD::SETUGE: return 2;
313 /// getSetCCOrOperation - Return the result of a logical OR between different
314 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
315 /// returns SETCC_INVALID if it is not possible to represent the resultant
317 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
319 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
320 // Cannot fold a signed integer setcc with an unsigned integer setcc.
321 return ISD::SETCC_INVALID;
323 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
325 // If the N and U bits get set then the resultant comparison DOES suddenly
326 // care about orderedness, and is true when ordered.
327 if (Op > ISD::SETTRUE2)
328 Op &= ~16; // Clear the U bit if the N bit is set.
330 // Canonicalize illegal integer setcc's.
331 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
334 return ISD::CondCode(Op);
337 /// getSetCCAndOperation - Return the result of a logical AND between different
338 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
339 /// function returns zero if it is not possible to represent the resultant
341 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
343 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
344 // Cannot fold a signed setcc with an unsigned setcc.
345 return ISD::SETCC_INVALID;
347 // Combine all of the condition bits.
348 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
350 // Canonicalize illegal integer setcc's.
354 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
355 case ISD::SETOEQ: // SETEQ & SETU[LG]E
356 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
357 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
358 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
365 //===----------------------------------------------------------------------===//
366 // SDNode Profile Support
367 //===----------------------------------------------------------------------===//
369 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
371 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
375 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
376 /// solely with their pointer.
377 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
378 ID.AddPointer(VTList.VTs);
381 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
383 static void AddNodeIDOperands(FoldingSetNodeID &ID,
384 ArrayRef<SDValue> Ops) {
385 for (auto& Op : Ops) {
386 ID.AddPointer(Op.getNode());
387 ID.AddInteger(Op.getResNo());
391 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
393 static void AddNodeIDOperands(FoldingSetNodeID &ID,
394 ArrayRef<SDUse> Ops) {
395 for (auto& Op : Ops) {
396 ID.AddPointer(Op.getNode());
397 ID.AddInteger(Op.getResNo());
400 /// Add logical or fast math flag values to FoldingSetNodeID value.
401 static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode,
402 const SDNodeFlags *Flags) {
403 if (!Flags || !isBinOpWithFlags(Opcode))
406 unsigned RawFlags = Flags->getRawFlags();
407 // If no flags are set, do not alter the ID. We must match the ID of nodes
408 // that were created without explicitly specifying flags. This also saves time
409 // and allows a gradual increase in API usage of the optional optimization
412 ID.AddInteger(RawFlags);
415 static void AddNodeIDFlags(FoldingSetNodeID &ID, const SDNode *N) {
416 if (auto *Node = dyn_cast<BinaryWithFlagsSDNode>(N))
417 AddNodeIDFlags(ID, Node->getOpcode(), &Node->Flags);
420 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
421 SDVTList VTList, ArrayRef<SDValue> OpList) {
422 AddNodeIDOpcode(ID, OpC);
423 AddNodeIDValueTypes(ID, VTList);
424 AddNodeIDOperands(ID, OpList);
427 /// If this is an SDNode with special info, add this info to the NodeID data.
428 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
429 switch (N->getOpcode()) {
430 case ISD::TargetExternalSymbol:
431 case ISD::ExternalSymbol:
433 llvm_unreachable("Should only be used on nodes with operands");
434 default: break; // Normal nodes don't need extra info.
435 case ISD::TargetConstant:
436 case ISD::Constant: {
437 const ConstantSDNode *C = cast<ConstantSDNode>(N);
438 ID.AddPointer(C->getConstantIntValue());
439 ID.AddBoolean(C->isOpaque());
442 case ISD::TargetConstantFP:
443 case ISD::ConstantFP: {
444 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
447 case ISD::TargetGlobalAddress:
448 case ISD::GlobalAddress:
449 case ISD::TargetGlobalTLSAddress:
450 case ISD::GlobalTLSAddress: {
451 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
452 ID.AddPointer(GA->getGlobal());
453 ID.AddInteger(GA->getOffset());
454 ID.AddInteger(GA->getTargetFlags());
455 ID.AddInteger(GA->getAddressSpace());
458 case ISD::BasicBlock:
459 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
462 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
464 case ISD::RegisterMask:
465 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
468 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
470 case ISD::FrameIndex:
471 case ISD::TargetFrameIndex:
472 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
475 case ISD::TargetJumpTable:
476 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
477 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
479 case ISD::ConstantPool:
480 case ISD::TargetConstantPool: {
481 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
482 ID.AddInteger(CP->getAlignment());
483 ID.AddInteger(CP->getOffset());
484 if (CP->isMachineConstantPoolEntry())
485 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
487 ID.AddPointer(CP->getConstVal());
488 ID.AddInteger(CP->getTargetFlags());
491 case ISD::TargetIndex: {
492 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
493 ID.AddInteger(TI->getIndex());
494 ID.AddInteger(TI->getOffset());
495 ID.AddInteger(TI->getTargetFlags());
499 const LoadSDNode *LD = cast<LoadSDNode>(N);
500 ID.AddInteger(LD->getMemoryVT().getRawBits());
501 ID.AddInteger(LD->getRawSubclassData());
502 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
506 const StoreSDNode *ST = cast<StoreSDNode>(N);
507 ID.AddInteger(ST->getMemoryVT().getRawBits());
508 ID.AddInteger(ST->getRawSubclassData());
509 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
512 case ISD::ATOMIC_CMP_SWAP:
513 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
514 case ISD::ATOMIC_SWAP:
515 case ISD::ATOMIC_LOAD_ADD:
516 case ISD::ATOMIC_LOAD_SUB:
517 case ISD::ATOMIC_LOAD_AND:
518 case ISD::ATOMIC_LOAD_OR:
519 case ISD::ATOMIC_LOAD_XOR:
520 case ISD::ATOMIC_LOAD_NAND:
521 case ISD::ATOMIC_LOAD_MIN:
522 case ISD::ATOMIC_LOAD_MAX:
523 case ISD::ATOMIC_LOAD_UMIN:
524 case ISD::ATOMIC_LOAD_UMAX:
525 case ISD::ATOMIC_LOAD:
526 case ISD::ATOMIC_STORE: {
527 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
528 ID.AddInteger(AT->getMemoryVT().getRawBits());
529 ID.AddInteger(AT->getRawSubclassData());
530 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
533 case ISD::PREFETCH: {
534 const MemSDNode *PF = cast<MemSDNode>(N);
535 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
538 case ISD::VECTOR_SHUFFLE: {
539 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
540 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
542 ID.AddInteger(SVN->getMaskElt(i));
545 case ISD::TargetBlockAddress:
546 case ISD::BlockAddress: {
547 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
548 ID.AddPointer(BA->getBlockAddress());
549 ID.AddInteger(BA->getOffset());
550 ID.AddInteger(BA->getTargetFlags());
553 } // end switch (N->getOpcode())
555 AddNodeIDFlags(ID, N);
557 // Target specific memory nodes could also have address spaces to check.
558 if (N->isTargetMemoryOpcode())
559 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
562 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
564 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
565 AddNodeIDOpcode(ID, N->getOpcode());
566 // Add the return value info.
567 AddNodeIDValueTypes(ID, N->getVTList());
568 // Add the operand info.
569 AddNodeIDOperands(ID, N->ops());
571 // Handle SDNode leafs with special info.
572 AddNodeIDCustom(ID, N);
575 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
576 /// the CSE map that carries volatility, temporalness, indexing mode, and
577 /// extension/truncation information.
579 static inline unsigned
580 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
581 bool isNonTemporal, bool isInvariant) {
582 assert((ConvType & 3) == ConvType &&
583 "ConvType may not require more than 2 bits!");
584 assert((AM & 7) == AM &&
585 "AM may not require more than 3 bits!");
589 (isNonTemporal << 6) |
593 //===----------------------------------------------------------------------===//
594 // SelectionDAG Class
595 //===----------------------------------------------------------------------===//
597 /// doNotCSE - Return true if CSE should not be performed for this node.
598 static bool doNotCSE(SDNode *N) {
599 if (N->getValueType(0) == MVT::Glue)
600 return true; // Never CSE anything that produces a flag.
602 switch (N->getOpcode()) {
604 case ISD::HANDLENODE:
606 return true; // Never CSE these nodes.
609 // Check that remaining values produced are not flags.
610 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
611 if (N->getValueType(i) == MVT::Glue)
612 return true; // Never CSE anything that produces a flag.
617 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
619 void SelectionDAG::RemoveDeadNodes() {
620 // Create a dummy node (which is not added to allnodes), that adds a reference
621 // to the root node, preventing it from being deleted.
622 HandleSDNode Dummy(getRoot());
624 SmallVector<SDNode*, 128> DeadNodes;
626 // Add all obviously-dead nodes to the DeadNodes worklist.
627 for (SDNode &Node : allnodes())
628 if (Node.use_empty())
629 DeadNodes.push_back(&Node);
631 RemoveDeadNodes(DeadNodes);
633 // If the root changed (e.g. it was a dead load, update the root).
634 setRoot(Dummy.getValue());
637 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
638 /// given list, and any nodes that become unreachable as a result.
639 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
641 // Process the worklist, deleting the nodes and adding their uses to the
643 while (!DeadNodes.empty()) {
644 SDNode *N = DeadNodes.pop_back_val();
646 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
647 DUL->NodeDeleted(N, nullptr);
649 // Take the node out of the appropriate CSE map.
650 RemoveNodeFromCSEMaps(N);
652 // Next, brutally remove the operand list. This is safe to do, as there are
653 // no cycles in the graph.
654 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
656 SDNode *Operand = Use.getNode();
659 // Now that we removed this operand, see if there are no uses of it left.
660 if (Operand->use_empty())
661 DeadNodes.push_back(Operand);
668 void SelectionDAG::RemoveDeadNode(SDNode *N){
669 SmallVector<SDNode*, 16> DeadNodes(1, N);
671 // Create a dummy node that adds a reference to the root node, preventing
672 // it from being deleted. (This matters if the root is an operand of the
674 HandleSDNode Dummy(getRoot());
676 RemoveDeadNodes(DeadNodes);
679 void SelectionDAG::DeleteNode(SDNode *N) {
680 // First take this out of the appropriate CSE map.
681 RemoveNodeFromCSEMaps(N);
683 // Finally, remove uses due to operands of this node, remove from the
684 // AllNodes list, and delete the node.
685 DeleteNodeNotInCSEMaps(N);
688 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
689 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
690 assert(N->use_empty() && "Cannot delete a node that is not dead!");
692 // Drop all of the operands and decrement used node's use counts.
698 void SDDbgInfo::erase(const SDNode *Node) {
699 DbgValMapType::iterator I = DbgValMap.find(Node);
700 if (I == DbgValMap.end())
702 for (auto &Val: I->second)
703 Val->setIsInvalidated();
707 void SelectionDAG::DeallocateNode(SDNode *N) {
708 if (N->OperandsNeedDelete)
709 delete[] N->OperandList;
711 // Set the opcode to DELETED_NODE to help catch bugs when node
712 // memory is reallocated.
713 N->NodeType = ISD::DELETED_NODE;
715 NodeAllocator.Deallocate(AllNodes.remove(N));
717 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
718 // them and forget about that node.
723 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
724 static void VerifySDNode(SDNode *N) {
725 switch (N->getOpcode()) {
728 case ISD::BUILD_PAIR: {
729 EVT VT = N->getValueType(0);
730 assert(N->getNumValues() == 1 && "Too many results!");
731 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
732 "Wrong return type!");
733 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
734 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
735 "Mismatched operand types!");
736 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
737 "Wrong operand type!");
738 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
739 "Wrong return type size");
742 case ISD::BUILD_VECTOR: {
743 assert(N->getNumValues() == 1 && "Too many results!");
744 assert(N->getValueType(0).isVector() && "Wrong return type!");
745 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
746 "Wrong number of operands!");
747 EVT EltVT = N->getValueType(0).getVectorElementType();
748 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
749 assert((I->getValueType() == EltVT ||
750 (EltVT.isInteger() && I->getValueType().isInteger() &&
751 EltVT.bitsLE(I->getValueType()))) &&
752 "Wrong operand type!");
753 assert(I->getValueType() == N->getOperand(0).getValueType() &&
754 "Operands must all have the same type");
762 /// \brief Insert a newly allocated node into the DAG.
764 /// Handles insertion into the all nodes list and CSE map, as well as
765 /// verification and other common operations when a new node is allocated.
766 void SelectionDAG::InsertNode(SDNode *N) {
767 AllNodes.push_back(N);
773 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
774 /// correspond to it. This is useful when we're about to delete or repurpose
775 /// the node. We don't want future request for structurally identical nodes
776 /// to return N anymore.
777 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
779 switch (N->getOpcode()) {
780 case ISD::HANDLENODE: return false; // noop.
782 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
783 "Cond code doesn't exist!");
784 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
785 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
787 case ISD::ExternalSymbol:
788 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
790 case ISD::TargetExternalSymbol: {
791 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
792 Erased = TargetExternalSymbols.erase(
793 std::pair<std::string,unsigned char>(ESN->getSymbol(),
794 ESN->getTargetFlags()));
797 case ISD::MCSymbol: {
798 auto *MCSN = cast<MCSymbolSDNode>(N);
799 Erased = MCSymbols.erase(MCSN->getMCSymbol());
802 case ISD::VALUETYPE: {
803 EVT VT = cast<VTSDNode>(N)->getVT();
804 if (VT.isExtended()) {
805 Erased = ExtendedValueTypeNodes.erase(VT);
807 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
808 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
813 // Remove it from the CSE Map.
814 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
815 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
816 Erased = CSEMap.RemoveNode(N);
820 // Verify that the node was actually in one of the CSE maps, unless it has a
821 // flag result (which cannot be CSE'd) or is one of the special cases that are
822 // not subject to CSE.
823 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
824 !N->isMachineOpcode() && !doNotCSE(N)) {
827 llvm_unreachable("Node is not in map!");
833 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
834 /// maps and modified in place. Add it back to the CSE maps, unless an identical
835 /// node already exists, in which case transfer all its users to the existing
836 /// node. This transfer can potentially trigger recursive merging.
839 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
840 // For node types that aren't CSE'd, just act as if no identical node
843 SDNode *Existing = CSEMap.GetOrInsertNode(N);
845 // If there was already an existing matching node, use ReplaceAllUsesWith
846 // to replace the dead one with the existing one. This can cause
847 // recursive merging of other unrelated nodes down the line.
848 ReplaceAllUsesWith(N, Existing);
850 // N is now dead. Inform the listeners and delete it.
851 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
852 DUL->NodeDeleted(N, Existing);
853 DeleteNodeNotInCSEMaps(N);
858 // If the node doesn't already exist, we updated it. Inform listeners.
859 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
863 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
864 /// were replaced with those specified. If this node is never memoized,
865 /// return null, otherwise return a pointer to the slot it would take. If a
866 /// node already exists with these operands, the slot will be non-null.
867 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
872 SDValue Ops[] = { Op };
874 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
875 AddNodeIDCustom(ID, N);
876 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
880 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
881 /// were replaced with those specified. If this node is never memoized,
882 /// return null, otherwise return a pointer to the slot it would take. If a
883 /// node already exists with these operands, the slot will be non-null.
884 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
885 SDValue Op1, SDValue Op2,
890 SDValue Ops[] = { Op1, Op2 };
892 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
893 AddNodeIDCustom(ID, N);
894 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
899 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
900 /// were replaced with those specified. If this node is never memoized,
901 /// return null, otherwise return a pointer to the slot it would take. If a
902 /// node already exists with these operands, the slot will be non-null.
903 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
909 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
910 AddNodeIDCustom(ID, N);
911 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
915 /// getEVTAlignment - Compute the default alignment value for the
918 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
919 Type *Ty = VT == MVT::iPTR ?
920 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
921 VT.getTypeForEVT(*getContext());
923 return getDataLayout().getABITypeAlignment(Ty);
926 // EntryNode could meaningfully have debug info if we can find it...
927 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
928 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
929 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
930 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
931 UpdateListeners(nullptr) {
932 AllNodes.push_back(&EntryNode);
933 DbgInfo = new SDDbgInfo();
936 void SelectionDAG::init(MachineFunction &mf) {
938 TLI = getSubtarget().getTargetLowering();
939 TSI = getSubtarget().getSelectionDAGInfo();
940 Context = &mf.getFunction()->getContext();
943 SelectionDAG::~SelectionDAG() {
944 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
949 void SelectionDAG::allnodes_clear() {
950 assert(&*AllNodes.begin() == &EntryNode);
951 AllNodes.remove(AllNodes.begin());
952 while (!AllNodes.empty())
953 DeallocateNode(AllNodes.begin());
956 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
957 SDVTList VTs, SDValue N1,
959 const SDNodeFlags *Flags) {
960 if (isBinOpWithFlags(Opcode)) {
961 // If no flags were passed in, use a default flags object.
963 if (Flags == nullptr)
966 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
967 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, *Flags);
972 BinarySDNode *N = new (NodeAllocator)
973 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
977 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
979 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
981 switch (N->getOpcode()) {
984 case ISD::ConstantFP:
985 llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
986 "debug location. Use another overload.");
992 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
993 DebugLoc DL, void *&InsertPos) {
994 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
996 switch (N->getOpcode()) {
997 default: break; // Process only regular (non-target) constant nodes.
999 case ISD::ConstantFP:
1000 // Erase debug location from the node if the node is used at several
1001 // different places to do not propagate one location to all uses as it
1002 // leads to incorrect debug info.
1003 if (N->getDebugLoc() != DL)
1004 N->setDebugLoc(DebugLoc());
1011 void SelectionDAG::clear() {
1013 OperandAllocator.Reset();
1016 ExtendedValueTypeNodes.clear();
1017 ExternalSymbols.clear();
1018 TargetExternalSymbols.clear();
1020 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1021 static_cast<CondCodeSDNode*>(nullptr));
1022 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1023 static_cast<SDNode*>(nullptr));
1025 EntryNode.UseList = nullptr;
1026 AllNodes.push_back(&EntryNode);
1027 Root = getEntryNode();
1031 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1032 return VT.bitsGT(Op.getValueType()) ?
1033 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1034 getNode(ISD::TRUNCATE, DL, VT, Op);
1037 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1038 return VT.bitsGT(Op.getValueType()) ?
1039 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1040 getNode(ISD::TRUNCATE, DL, VT, Op);
1043 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1044 return VT.bitsGT(Op.getValueType()) ?
1045 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1046 getNode(ISD::TRUNCATE, DL, VT, Op);
1049 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1051 if (VT.bitsLE(Op.getValueType()))
1052 return getNode(ISD::TRUNCATE, SL, VT, Op);
1054 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1055 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1058 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1059 assert(!VT.isVector() &&
1060 "getZeroExtendInReg should use the vector element type instead of "
1061 "the vector type!");
1062 if (Op.getValueType() == VT) return Op;
1063 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1064 APInt Imm = APInt::getLowBitsSet(BitWidth,
1065 VT.getSizeInBits());
1066 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1067 getConstant(Imm, DL, Op.getValueType()));
1070 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1071 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1072 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1073 "The sizes of the input and result must match in order to perform the "
1074 "extend in-register.");
1075 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1076 "The destination vector type must have fewer lanes than the input.");
1077 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1080 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1081 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1082 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1083 "The sizes of the input and result must match in order to perform the "
1084 "extend in-register.");
1085 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1086 "The destination vector type must have fewer lanes than the input.");
1087 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1090 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1091 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1092 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1093 "The sizes of the input and result must match in order to perform the "
1094 "extend in-register.");
1095 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1096 "The destination vector type must have fewer lanes than the input.");
1097 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1100 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1102 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1103 EVT EltVT = VT.getScalarType();
1105 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1106 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1109 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1110 EVT EltVT = VT.getScalarType();
1112 switch (TLI->getBooleanContents(VT)) {
1113 case TargetLowering::ZeroOrOneBooleanContent:
1114 case TargetLowering::UndefinedBooleanContent:
1115 TrueValue = getConstant(1, DL, VT);
1117 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1118 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL,
1122 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1125 SDValue SelectionDAG::getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isT,
1127 EVT EltVT = VT.getScalarType();
1128 assert((EltVT.getSizeInBits() >= 64 ||
1129 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1130 "getConstant with a uint64_t value that doesn't fit in the type!");
1131 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1134 SDValue SelectionDAG::getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isT,
1137 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1140 SDValue SelectionDAG::getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
1141 bool isT, bool isO) {
1142 assert(VT.isInteger() && "Cannot create FP integer constant!");
1144 EVT EltVT = VT.getScalarType();
1145 const ConstantInt *Elt = &Val;
1147 // In some cases the vector type is legal but the element type is illegal and
1148 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1149 // inserted value (the type does not need to match the vector element type).
1150 // Any extra bits introduced will be truncated away.
1151 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1152 TargetLowering::TypePromoteInteger) {
1153 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1154 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1155 Elt = ConstantInt::get(*getContext(), NewVal);
1157 // In other cases the element type is illegal and needs to be expanded, for
1158 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1159 // the value into n parts and use a vector type with n-times the elements.
1160 // Then bitcast to the type requested.
1161 // Legalizing constants too early makes the DAGCombiner's job harder so we
1162 // only legalize if the DAG tells us we must produce legal types.
1163 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1164 TLI->getTypeAction(*getContext(), EltVT) ==
1165 TargetLowering::TypeExpandInteger) {
1166 APInt NewVal = Elt->getValue();
1167 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1168 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1169 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1170 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1172 // Check the temporary vector is the correct size. If this fails then
1173 // getTypeToTransformTo() probably returned a type whose size (in bits)
1174 // isn't a power-of-2 factor of the requested type size.
1175 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1177 SmallVector<SDValue, 2> EltParts;
1178 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1179 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1180 .trunc(ViaEltSizeInBits), DL,
1181 ViaEltVT, isT, isO));
1184 // EltParts is currently in little endian order. If we actually want
1185 // big-endian order then reverse it now.
1186 if (getDataLayout().isBigEndian())
1187 std::reverse(EltParts.begin(), EltParts.end());
1189 // The elements must be reversed when the element order is different
1190 // to the endianness of the elements (because the BITCAST is itself a
1191 // vector shuffle in this situation). However, we do not need any code to
1192 // perform this reversal because getConstant() is producing a vector
1194 // This situation occurs in MIPS MSA.
1196 SmallVector<SDValue, 8> Ops;
1197 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1198 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1200 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1201 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1206 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1207 "APInt size does not match type size!");
1208 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1209 FoldingSetNodeID ID;
1210 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1214 SDNode *N = nullptr;
1215 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1217 return SDValue(N, 0);
1220 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, DL.getDebugLoc(),
1222 CSEMap.InsertNode(N, IP);
1226 SDValue Result(N, 0);
1227 if (VT.isVector()) {
1228 SmallVector<SDValue, 8> Ops;
1229 Ops.assign(VT.getVectorNumElements(), Result);
1230 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1235 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1236 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1239 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
1241 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1244 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, SDLoc DL, EVT VT,
1246 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1248 EVT EltVT = VT.getScalarType();
1250 // Do the map lookup using the actual bit pattern for the floating point
1251 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1252 // we don't have issues with SNANs.
1253 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1254 FoldingSetNodeID ID;
1255 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1258 SDNode *N = nullptr;
1259 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1261 return SDValue(N, 0);
1264 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, DL.getDebugLoc(),
1266 CSEMap.InsertNode(N, IP);
1270 SDValue Result(N, 0);
1271 if (VT.isVector()) {
1272 SmallVector<SDValue, 8> Ops;
1273 Ops.assign(VT.getVectorNumElements(), Result);
1274 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1279 SDValue SelectionDAG::getConstantFP(double Val, SDLoc DL, EVT VT,
1281 EVT EltVT = VT.getScalarType();
1282 if (EltVT==MVT::f32)
1283 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1284 else if (EltVT==MVT::f64)
1285 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1286 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1289 APFloat apf = APFloat(Val);
1290 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1292 return getConstantFP(apf, DL, VT, isTarget);
1294 llvm_unreachable("Unsupported type in getConstantFP");
1297 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1298 EVT VT, int64_t Offset,
1300 unsigned char TargetFlags) {
1301 assert((TargetFlags == 0 || isTargetGA) &&
1302 "Cannot set target flags on target-independent globals");
1304 // Truncate (with sign-extension) the offset value to the pointer size.
1305 unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
1307 Offset = SignExtend64(Offset, BitWidth);
1310 if (GV->isThreadLocal())
1311 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1313 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1315 FoldingSetNodeID ID;
1316 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1318 ID.AddInteger(Offset);
1319 ID.AddInteger(TargetFlags);
1320 ID.AddInteger(GV->getType()->getAddressSpace());
1322 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
1323 return SDValue(E, 0);
1325 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1326 DL.getDebugLoc(), GV, VT,
1327 Offset, TargetFlags);
1328 CSEMap.InsertNode(N, IP);
1330 return SDValue(N, 0);
1333 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1334 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1335 FoldingSetNodeID ID;
1336 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1339 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1340 return SDValue(E, 0);
1342 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1343 CSEMap.InsertNode(N, IP);
1345 return SDValue(N, 0);
1348 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1349 unsigned char TargetFlags) {
1350 assert((TargetFlags == 0 || isTarget) &&
1351 "Cannot set target flags on target-independent jump tables");
1352 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1353 FoldingSetNodeID ID;
1354 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1356 ID.AddInteger(TargetFlags);
1358 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1359 return SDValue(E, 0);
1361 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1363 CSEMap.InsertNode(N, IP);
1365 return SDValue(N, 0);
1368 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1369 unsigned Alignment, int Offset,
1371 unsigned char TargetFlags) {
1372 assert((TargetFlags == 0 || isTarget) &&
1373 "Cannot set target flags on target-independent globals");
1375 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1376 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1377 FoldingSetNodeID ID;
1378 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1379 ID.AddInteger(Alignment);
1380 ID.AddInteger(Offset);
1382 ID.AddInteger(TargetFlags);
1384 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1385 return SDValue(E, 0);
1387 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1388 Alignment, TargetFlags);
1389 CSEMap.InsertNode(N, IP);
1391 return SDValue(N, 0);
1395 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1396 unsigned Alignment, int Offset,
1398 unsigned char TargetFlags) {
1399 assert((TargetFlags == 0 || isTarget) &&
1400 "Cannot set target flags on target-independent globals");
1402 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1403 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1404 FoldingSetNodeID ID;
1405 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1406 ID.AddInteger(Alignment);
1407 ID.AddInteger(Offset);
1408 C->addSelectionDAGCSEId(ID);
1409 ID.AddInteger(TargetFlags);
1411 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1412 return SDValue(E, 0);
1414 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1415 Alignment, TargetFlags);
1416 CSEMap.InsertNode(N, IP);
1418 return SDValue(N, 0);
1421 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1422 unsigned char TargetFlags) {
1423 FoldingSetNodeID ID;
1424 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1425 ID.AddInteger(Index);
1426 ID.AddInteger(Offset);
1427 ID.AddInteger(TargetFlags);
1429 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1430 return SDValue(E, 0);
1432 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1434 CSEMap.InsertNode(N, IP);
1436 return SDValue(N, 0);
1439 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1440 FoldingSetNodeID ID;
1441 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1444 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1445 return SDValue(E, 0);
1447 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1448 CSEMap.InsertNode(N, IP);
1450 return SDValue(N, 0);
1453 SDValue SelectionDAG::getValueType(EVT VT) {
1454 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1455 ValueTypeNodes.size())
1456 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1458 SDNode *&N = VT.isExtended() ?
1459 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1461 if (N) return SDValue(N, 0);
1462 N = new (NodeAllocator) VTSDNode(VT);
1464 return SDValue(N, 0);
1467 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1468 SDNode *&N = ExternalSymbols[Sym];
1469 if (N) return SDValue(N, 0);
1470 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1472 return SDValue(N, 0);
1475 SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
1476 SDNode *&N = MCSymbols[Sym];
1478 return SDValue(N, 0);
1479 N = new (NodeAllocator) MCSymbolSDNode(Sym, VT);
1481 return SDValue(N, 0);
1484 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1485 unsigned char TargetFlags) {
1487 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1489 if (N) return SDValue(N, 0);
1490 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1492 return SDValue(N, 0);
1495 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1496 if ((unsigned)Cond >= CondCodeNodes.size())
1497 CondCodeNodes.resize(Cond+1);
1499 if (!CondCodeNodes[Cond]) {
1500 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1501 CondCodeNodes[Cond] = N;
1505 return SDValue(CondCodeNodes[Cond], 0);
1508 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1509 // the shuffle mask M that point at N1 to point at N2, and indices that point
1510 // N2 to point at N1.
1511 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1513 ShuffleVectorSDNode::commuteMask(M);
1516 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1517 SDValue N2, const int *Mask) {
1518 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1519 "Invalid VECTOR_SHUFFLE");
1521 // Canonicalize shuffle undef, undef -> undef
1522 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1523 return getUNDEF(VT);
1525 // Validate that all indices in Mask are within the range of the elements
1526 // input to the shuffle.
1527 unsigned NElts = VT.getVectorNumElements();
1528 SmallVector<int, 8> MaskVec;
1529 for (unsigned i = 0; i != NElts; ++i) {
1530 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1531 MaskVec.push_back(Mask[i]);
1534 // Canonicalize shuffle v, v -> v, undef
1537 for (unsigned i = 0; i != NElts; ++i)
1538 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1541 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1542 if (N1.getOpcode() == ISD::UNDEF)
1543 commuteShuffle(N1, N2, MaskVec);
1545 // If shuffling a splat, try to blend the splat instead. We do this here so
1546 // that even when this arises during lowering we don't have to re-handle it.
1547 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1548 BitVector UndefElements;
1549 SDValue Splat = BV->getSplatValue(&UndefElements);
1553 for (int i = 0; i < (int)NElts; ++i) {
1554 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1557 // If this input comes from undef, mark it as such.
1558 if (UndefElements[MaskVec[i] - Offset]) {
1563 // If we can blend a non-undef lane, use that instead.
1564 if (!UndefElements[i])
1565 MaskVec[i] = i + Offset;
1568 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1569 BlendSplat(N1BV, 0);
1570 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1571 BlendSplat(N2BV, NElts);
1573 // Canonicalize all index into lhs, -> shuffle lhs, undef
1574 // Canonicalize all index into rhs, -> shuffle rhs, undef
1575 bool AllLHS = true, AllRHS = true;
1576 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1577 for (unsigned i = 0; i != NElts; ++i) {
1578 if (MaskVec[i] >= (int)NElts) {
1583 } else if (MaskVec[i] >= 0) {
1587 if (AllLHS && AllRHS)
1588 return getUNDEF(VT);
1589 if (AllLHS && !N2Undef)
1593 commuteShuffle(N1, N2, MaskVec);
1595 // Reset our undef status after accounting for the mask.
1596 N2Undef = N2.getOpcode() == ISD::UNDEF;
1597 // Re-check whether both sides ended up undef.
1598 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1599 return getUNDEF(VT);
1601 // If Identity shuffle return that node.
1602 bool Identity = true, AllSame = true;
1603 for (unsigned i = 0; i != NElts; ++i) {
1604 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1605 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1607 if (Identity && NElts)
1610 // Shuffling a constant splat doesn't change the result.
1614 // Look through any bitcasts. We check that these don't change the number
1615 // (and size) of elements and just changes their types.
1616 while (V.getOpcode() == ISD::BITCAST)
1617 V = V->getOperand(0);
1619 // A splat should always show up as a build vector node.
1620 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1621 BitVector UndefElements;
1622 SDValue Splat = BV->getSplatValue(&UndefElements);
1623 // If this is a splat of an undef, shuffling it is also undef.
1624 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1625 return getUNDEF(VT);
1628 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1630 // We only have a splat which can skip shuffles if there is a splatted
1631 // value and no undef lanes rearranged by the shuffle.
1632 if (Splat && UndefElements.none()) {
1633 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1634 // number of elements match or the value splatted is a zero constant.
1637 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1638 if (C->isNullValue())
1642 // If the shuffle itself creates a splat, build the vector directly.
1643 if (AllSame && SameNumElts) {
1644 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1645 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1647 EVT BuildVT = BV->getValueType(0);
1648 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1650 // We may have jumped through bitcasts, so the type of the
1651 // BUILD_VECTOR may not match the type of the shuffle.
1653 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1659 FoldingSetNodeID ID;
1660 SDValue Ops[2] = { N1, N2 };
1661 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1662 for (unsigned i = 0; i != NElts; ++i)
1663 ID.AddInteger(MaskVec[i]);
1666 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1667 return SDValue(E, 0);
1669 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1670 // SDNode doesn't have access to it. This memory will be "leaked" when
1671 // the node is deallocated, but recovered when the NodeAllocator is released.
1672 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1673 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1675 ShuffleVectorSDNode *N =
1676 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1677 dl.getDebugLoc(), N1, N2,
1679 CSEMap.InsertNode(N, IP);
1681 return SDValue(N, 0);
1684 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1685 MVT VT = SV.getSimpleValueType(0);
1686 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1687 ShuffleVectorSDNode::commuteMask(MaskVec);
1689 SDValue Op0 = SV.getOperand(0);
1690 SDValue Op1 = SV.getOperand(1);
1691 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1694 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1695 SDValue Val, SDValue DTy,
1696 SDValue STy, SDValue Rnd, SDValue Sat,
1697 ISD::CvtCode Code) {
1698 // If the src and dest types are the same and the conversion is between
1699 // integer types of the same sign or two floats, no conversion is necessary.
1701 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1704 FoldingSetNodeID ID;
1705 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1706 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1708 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1709 return SDValue(E, 0);
1711 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1714 CSEMap.InsertNode(N, IP);
1716 return SDValue(N, 0);
1719 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1720 FoldingSetNodeID ID;
1721 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1722 ID.AddInteger(RegNo);
1724 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1725 return SDValue(E, 0);
1727 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1728 CSEMap.InsertNode(N, IP);
1730 return SDValue(N, 0);
1733 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1734 FoldingSetNodeID ID;
1735 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1736 ID.AddPointer(RegMask);
1738 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1739 return SDValue(E, 0);
1741 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1742 CSEMap.InsertNode(N, IP);
1744 return SDValue(N, 0);
1747 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1748 FoldingSetNodeID ID;
1749 SDValue Ops[] = { Root };
1750 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1751 ID.AddPointer(Label);
1753 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1754 return SDValue(E, 0);
1756 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1757 dl.getDebugLoc(), Root, Label);
1758 CSEMap.InsertNode(N, IP);
1760 return SDValue(N, 0);
1764 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1767 unsigned char TargetFlags) {
1768 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1770 FoldingSetNodeID ID;
1771 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1773 ID.AddInteger(Offset);
1774 ID.AddInteger(TargetFlags);
1776 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1777 return SDValue(E, 0);
1779 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1781 CSEMap.InsertNode(N, IP);
1783 return SDValue(N, 0);
1786 SDValue SelectionDAG::getSrcValue(const Value *V) {
1787 assert((!V || V->getType()->isPointerTy()) &&
1788 "SrcValue is not a pointer?");
1790 FoldingSetNodeID ID;
1791 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1795 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1796 return SDValue(E, 0);
1798 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1799 CSEMap.InsertNode(N, IP);
1801 return SDValue(N, 0);
1804 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1805 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1806 FoldingSetNodeID ID;
1807 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1811 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1812 return SDValue(E, 0);
1814 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1815 CSEMap.InsertNode(N, IP);
1817 return SDValue(N, 0);
1820 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
1821 if (VT == V.getValueType())
1824 return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1827 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1828 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1829 unsigned SrcAS, unsigned DestAS) {
1830 SDValue Ops[] = {Ptr};
1831 FoldingSetNodeID ID;
1832 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1833 ID.AddInteger(SrcAS);
1834 ID.AddInteger(DestAS);
1837 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1838 return SDValue(E, 0);
1840 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1842 VT, Ptr, SrcAS, DestAS);
1843 CSEMap.InsertNode(N, IP);
1845 return SDValue(N, 0);
1848 /// getShiftAmountOperand - Return the specified value casted to
1849 /// the target's desired shift amount type.
1850 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1851 EVT OpTy = Op.getValueType();
1852 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
1853 if (OpTy == ShTy || OpTy.isVector()) return Op;
1855 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1858 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1859 /// specified value type.
1860 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1861 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1862 unsigned ByteSize = VT.getStoreSize();
1863 Type *Ty = VT.getTypeForEVT(*getContext());
1864 unsigned StackAlign =
1865 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1867 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1868 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1871 /// CreateStackTemporary - Create a stack temporary suitable for holding
1872 /// either of the specified value types.
1873 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1874 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
1875 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1876 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1877 const DataLayout &DL = getDataLayout();
1879 std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
1881 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1882 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1883 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1886 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1887 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1888 // These setcc operations always fold.
1892 case ISD::SETFALSE2: return getConstant(0, dl, VT);
1894 case ISD::SETTRUE2: {
1895 TargetLowering::BooleanContent Cnt =
1896 TLI->getBooleanContents(N1->getValueType(0));
1898 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, dl,
1912 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1916 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
1917 const APInt &C2 = N2C->getAPIntValue();
1918 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
1919 const APInt &C1 = N1C->getAPIntValue();
1922 default: llvm_unreachable("Unknown integer setcc!");
1923 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1924 case ISD::SETNE: return getConstant(C1 != C2, dl, VT);
1925 case ISD::SETULT: return getConstant(C1.ult(C2), dl, VT);
1926 case ISD::SETUGT: return getConstant(C1.ugt(C2), dl, VT);
1927 case ISD::SETULE: return getConstant(C1.ule(C2), dl, VT);
1928 case ISD::SETUGE: return getConstant(C1.uge(C2), dl, VT);
1929 case ISD::SETLT: return getConstant(C1.slt(C2), dl, VT);
1930 case ISD::SETGT: return getConstant(C1.sgt(C2), dl, VT);
1931 case ISD::SETLE: return getConstant(C1.sle(C2), dl, VT);
1932 case ISD::SETGE: return getConstant(C1.sge(C2), dl, VT);
1936 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
1937 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
1938 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1941 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1942 return getUNDEF(VT);
1944 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, dl, VT);
1945 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1946 return getUNDEF(VT);
1948 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1949 R==APFloat::cmpLessThan, dl, VT);
1950 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1951 return getUNDEF(VT);
1953 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, dl, VT);
1954 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1955 return getUNDEF(VT);
1957 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT);
1958 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1959 return getUNDEF(VT);
1961 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1962 R==APFloat::cmpEqual, dl, VT);
1963 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1964 return getUNDEF(VT);
1966 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1967 R==APFloat::cmpEqual, dl, VT);
1968 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
1969 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, dl, VT);
1970 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1971 R==APFloat::cmpEqual, dl, VT);
1972 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, dl, VT);
1973 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1974 R==APFloat::cmpLessThan, dl, VT);
1975 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1976 R==APFloat::cmpUnordered, dl, VT);
1977 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, dl, VT);
1978 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, dl, VT);
1981 // Ensure that the constant occurs on the RHS.
1982 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
1983 MVT CompVT = N1.getValueType().getSimpleVT();
1984 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
1987 return getSetCC(dl, VT, N2, N1, SwappedCond);
1991 // Could not fold it.
1995 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1996 /// use this predicate to simplify operations downstream.
1997 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1998 // This predicate is not safe for vector operations.
1999 if (Op.getValueType().isVector())
2002 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2003 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
2006 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2007 /// this predicate to simplify operations downstream. Mask is known to be zero
2008 /// for bits that V cannot have.
2009 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
2010 unsigned Depth) const {
2011 APInt KnownZero, KnownOne;
2012 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2013 return (KnownZero & Mask) == Mask;
2016 /// Determine which bits of Op are known to be either zero or one and return
2017 /// them in the KnownZero/KnownOne bitsets.
2018 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
2019 APInt &KnownOne, unsigned Depth) const {
2020 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2022 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
2024 return; // Limit search depth.
2026 APInt KnownZero2, KnownOne2;
2028 switch (Op.getOpcode()) {
2030 // We know all of the bits for a constant!
2031 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2032 KnownZero = ~KnownOne;
2035 // If either the LHS or the RHS are Zero, the result is zero.
2036 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2037 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2039 // Output known-1 bits are only known if set in both the LHS & RHS.
2040 KnownOne &= KnownOne2;
2041 // Output known-0 are known to be clear if zero in either the LHS | RHS.
2042 KnownZero |= KnownZero2;
2045 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2046 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2048 // Output known-0 bits are only known if clear in both the LHS & RHS.
2049 KnownZero &= KnownZero2;
2050 // Output known-1 are known to be set if set in either the LHS | RHS.
2051 KnownOne |= KnownOne2;
2054 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2055 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2057 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2058 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2059 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2060 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2061 KnownZero = KnownZeroOut;
2065 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2066 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2068 // If low bits are zero in either operand, output low known-0 bits.
2069 // Also compute a conserative estimate for high known-0 bits.
2070 // More trickiness is possible, but this is sufficient for the
2071 // interesting case of alignment computation.
2072 KnownOne.clearAllBits();
2073 unsigned TrailZ = KnownZero.countTrailingOnes() +
2074 KnownZero2.countTrailingOnes();
2075 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2076 KnownZero2.countLeadingOnes(),
2077 BitWidth) - BitWidth;
2079 TrailZ = std::min(TrailZ, BitWidth);
2080 LeadZ = std::min(LeadZ, BitWidth);
2081 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2082 APInt::getHighBitsSet(BitWidth, LeadZ);
2086 // For the purposes of computing leading zeros we can conservatively
2087 // treat a udiv as a logical right shift by the power of 2 known to
2088 // be less than the denominator.
2089 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2090 unsigned LeadZ = KnownZero2.countLeadingOnes();
2092 KnownOne2.clearAllBits();
2093 KnownZero2.clearAllBits();
2094 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2095 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2096 if (RHSUnknownLeadingOnes != BitWidth)
2097 LeadZ = std::min(BitWidth,
2098 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2100 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2104 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2105 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2107 // Only known if known in both the LHS and RHS.
2108 KnownOne &= KnownOne2;
2109 KnownZero &= KnownZero2;
2111 case ISD::SELECT_CC:
2112 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2113 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2115 // Only known if known in both the LHS and RHS.
2116 KnownOne &= KnownOne2;
2117 KnownZero &= KnownZero2;
2125 if (Op.getResNo() != 1)
2127 // The boolean result conforms to getBooleanContents.
2128 // If we know the result of a setcc has the top bits zero, use this info.
2129 // We know that we have an integer-based boolean since these operations
2130 // are only available for integer.
2131 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2132 TargetLowering::ZeroOrOneBooleanContent &&
2134 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2137 // If we know the result of a setcc has the top bits zero, use this info.
2138 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2139 TargetLowering::ZeroOrOneBooleanContent &&
2141 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2144 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2145 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2146 unsigned ShAmt = SA->getZExtValue();
2148 // If the shift count is an invalid immediate, don't do anything.
2149 if (ShAmt >= BitWidth)
2152 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2153 KnownZero <<= ShAmt;
2155 // low bits known zero.
2156 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2160 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2161 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2162 unsigned ShAmt = SA->getZExtValue();
2164 // If the shift count is an invalid immediate, don't do anything.
2165 if (ShAmt >= BitWidth)
2168 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2169 KnownZero = KnownZero.lshr(ShAmt);
2170 KnownOne = KnownOne.lshr(ShAmt);
2172 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2173 KnownZero |= HighBits; // High bits known zero.
2177 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2178 unsigned ShAmt = SA->getZExtValue();
2180 // If the shift count is an invalid immediate, don't do anything.
2181 if (ShAmt >= BitWidth)
2184 // If any of the demanded bits are produced by the sign extension, we also
2185 // demand the input sign bit.
2186 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2188 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2189 KnownZero = KnownZero.lshr(ShAmt);
2190 KnownOne = KnownOne.lshr(ShAmt);
2192 // Handle the sign bits.
2193 APInt SignBit = APInt::getSignBit(BitWidth);
2194 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2196 if (KnownZero.intersects(SignBit)) {
2197 KnownZero |= HighBits; // New bits are known zero.
2198 } else if (KnownOne.intersects(SignBit)) {
2199 KnownOne |= HighBits; // New bits are known one.
2203 case ISD::SIGN_EXTEND_INREG: {
2204 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2205 unsigned EBits = EVT.getScalarType().getSizeInBits();
2207 // Sign extension. Compute the demanded bits in the result that are not
2208 // present in the input.
2209 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2211 APInt InSignBit = APInt::getSignBit(EBits);
2212 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2214 // If the sign extended bits are demanded, we know that the sign
2216 InSignBit = InSignBit.zext(BitWidth);
2217 if (NewBits.getBoolValue())
2218 InputDemandedBits |= InSignBit;
2220 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2221 KnownOne &= InputDemandedBits;
2222 KnownZero &= InputDemandedBits;
2224 // If the sign bit of the input is known set or clear, then we know the
2225 // top bits of the result.
2226 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2227 KnownZero |= NewBits;
2228 KnownOne &= ~NewBits;
2229 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2230 KnownOne |= NewBits;
2231 KnownZero &= ~NewBits;
2232 } else { // Input sign bit unknown
2233 KnownZero &= ~NewBits;
2234 KnownOne &= ~NewBits;
2239 case ISD::CTTZ_ZERO_UNDEF:
2241 case ISD::CTLZ_ZERO_UNDEF:
2243 unsigned LowBits = Log2_32(BitWidth)+1;
2244 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2245 KnownOne.clearAllBits();
2249 LoadSDNode *LD = cast<LoadSDNode>(Op);
2250 // If this is a ZEXTLoad and we are looking at the loaded value.
2251 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2252 EVT VT = LD->getMemoryVT();
2253 unsigned MemBits = VT.getScalarType().getSizeInBits();
2254 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2255 } else if (const MDNode *Ranges = LD->getRanges()) {
2256 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero);
2260 case ISD::ZERO_EXTEND: {
2261 EVT InVT = Op.getOperand(0).getValueType();
2262 unsigned InBits = InVT.getScalarType().getSizeInBits();
2263 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2264 KnownZero = KnownZero.trunc(InBits);
2265 KnownOne = KnownOne.trunc(InBits);
2266 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2267 KnownZero = KnownZero.zext(BitWidth);
2268 KnownOne = KnownOne.zext(BitWidth);
2269 KnownZero |= NewBits;
2272 case ISD::SIGN_EXTEND: {
2273 EVT InVT = Op.getOperand(0).getValueType();
2274 unsigned InBits = InVT.getScalarType().getSizeInBits();
2275 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2277 KnownZero = KnownZero.trunc(InBits);
2278 KnownOne = KnownOne.trunc(InBits);
2279 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2281 // Note if the sign bit is known to be zero or one.
2282 bool SignBitKnownZero = KnownZero.isNegative();
2283 bool SignBitKnownOne = KnownOne.isNegative();
2285 KnownZero = KnownZero.zext(BitWidth);
2286 KnownOne = KnownOne.zext(BitWidth);
2288 // If the sign bit is known zero or one, the top bits match.
2289 if (SignBitKnownZero)
2290 KnownZero |= NewBits;
2291 else if (SignBitKnownOne)
2292 KnownOne |= NewBits;
2295 case ISD::ANY_EXTEND: {
2296 EVT InVT = Op.getOperand(0).getValueType();
2297 unsigned InBits = InVT.getScalarType().getSizeInBits();
2298 KnownZero = KnownZero.trunc(InBits);
2299 KnownOne = KnownOne.trunc(InBits);
2300 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2301 KnownZero = KnownZero.zext(BitWidth);
2302 KnownOne = KnownOne.zext(BitWidth);
2305 case ISD::TRUNCATE: {
2306 EVT InVT = Op.getOperand(0).getValueType();
2307 unsigned InBits = InVT.getScalarType().getSizeInBits();
2308 KnownZero = KnownZero.zext(InBits);
2309 KnownOne = KnownOne.zext(InBits);
2310 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2311 KnownZero = KnownZero.trunc(BitWidth);
2312 KnownOne = KnownOne.trunc(BitWidth);
2315 case ISD::AssertZext: {
2316 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2317 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2318 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2319 KnownZero |= (~InMask);
2320 KnownOne &= (~KnownZero);
2324 // All bits are zero except the low bit.
2325 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2329 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2330 // We know that the top bits of C-X are clear if X contains less bits
2331 // than C (i.e. no wrap-around can happen). For example, 20-X is
2332 // positive if we can prove that X is >= 0 and < 16.
2333 if (CLHS->getAPIntValue().isNonNegative()) {
2334 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2335 // NLZ can't be BitWidth with no sign bit
2336 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2337 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2339 // If all of the MaskV bits are known to be zero, then we know the
2340 // output top bits are zero, because we now know that the output is
2342 if ((KnownZero2 & MaskV) == MaskV) {
2343 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2344 // Top bits known zero.
2345 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2353 // Output known-0 bits are known if clear or set in both the low clear bits
2354 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2355 // low 3 bits clear.
2356 // Output known-0 bits are also known if the top bits of each input are
2357 // known to be clear. For example, if one input has the top 10 bits clear
2358 // and the other has the top 8 bits clear, we know the top 7 bits of the
2359 // output must be clear.
2360 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2361 unsigned KnownZeroHigh = KnownZero2.countLeadingOnes();
2362 unsigned KnownZeroLow = KnownZero2.countTrailingOnes();
2364 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2365 KnownZeroHigh = std::min(KnownZeroHigh,
2366 KnownZero2.countLeadingOnes());
2367 KnownZeroLow = std::min(KnownZeroLow,
2368 KnownZero2.countTrailingOnes());
2370 if (Op.getOpcode() == ISD::ADD) {
2371 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroLow);
2372 if (KnownZeroHigh > 1)
2373 KnownZero |= APInt::getHighBitsSet(BitWidth, KnownZeroHigh - 1);
2377 // With ADDE, a carry bit may be added in, so we can only use this
2378 // information if we know (at least) that the low two bits are clear. We
2379 // then return to the caller that the low bit is unknown but that other bits
2381 if (KnownZeroLow >= 2) // ADDE
2382 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroLow);
2386 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2387 const APInt &RA = Rem->getAPIntValue().abs();
2388 if (RA.isPowerOf2()) {
2389 APInt LowBits = RA - 1;
2390 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2392 // The low bits of the first operand are unchanged by the srem.
2393 KnownZero = KnownZero2 & LowBits;
2394 KnownOne = KnownOne2 & LowBits;
2396 // If the first operand is non-negative or has all low bits zero, then
2397 // the upper bits are all zero.
2398 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2399 KnownZero |= ~LowBits;
2401 // If the first operand is negative and not all low bits are zero, then
2402 // the upper bits are all one.
2403 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2404 KnownOne |= ~LowBits;
2405 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2410 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2411 const APInt &RA = Rem->getAPIntValue();
2412 if (RA.isPowerOf2()) {
2413 APInt LowBits = (RA - 1);
2414 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2416 // The upper bits are all zero, the lower ones are unchanged.
2417 KnownZero = KnownZero2 | ~LowBits;
2418 KnownOne = KnownOne2 & LowBits;
2423 // Since the result is less than or equal to either operand, any leading
2424 // zero bits in either operand must also exist in the result.
2425 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2426 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2428 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2429 KnownZero2.countLeadingOnes());
2430 KnownOne.clearAllBits();
2431 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2434 case ISD::EXTRACT_ELEMENT: {
2435 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2436 const unsigned Index =
2437 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2438 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2440 // Remove low part of known bits mask
2441 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2442 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2444 // Remove high part of known bit mask
2445 KnownZero = KnownZero.trunc(BitWidth);
2446 KnownOne = KnownOne.trunc(BitWidth);
2453 APInt Op0Zero, Op0One;
2454 APInt Op1Zero, Op1One;
2455 computeKnownBits(Op.getOperand(0), Op0Zero, Op0One, Depth);
2456 computeKnownBits(Op.getOperand(1), Op1Zero, Op1One, Depth);
2458 KnownZero = Op0Zero & Op1Zero;
2459 KnownOne = Op0One & Op1One;
2462 case ISD::FrameIndex:
2463 case ISD::TargetFrameIndex:
2464 if (unsigned Align = InferPtrAlignment(Op)) {
2465 // The low bits are known zero if the pointer is aligned.
2466 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2472 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2475 case ISD::INTRINSIC_WO_CHAIN:
2476 case ISD::INTRINSIC_W_CHAIN:
2477 case ISD::INTRINSIC_VOID:
2478 // Allow the target to implement this method for its nodes.
2479 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2483 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2486 /// ComputeNumSignBits - Return the number of times the sign bit of the
2487 /// register is replicated into the other bits. We know that at least 1 bit
2488 /// is always equal to the sign bit (itself), but other cases can give us
2489 /// information. For example, immediately after an "SRA X, 2", we know that
2490 /// the top 3 bits are all equal to each other, so we return 3.
2491 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2492 EVT VT = Op.getValueType();
2493 assert(VT.isInteger() && "Invalid VT!");
2494 unsigned VTBits = VT.getScalarType().getSizeInBits();
2496 unsigned FirstAnswer = 1;
2499 return 1; // Limit search depth.
2501 switch (Op.getOpcode()) {
2503 case ISD::AssertSext:
2504 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2505 return VTBits-Tmp+1;
2506 case ISD::AssertZext:
2507 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2510 case ISD::Constant: {
2511 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2512 return Val.getNumSignBits();
2515 case ISD::SIGN_EXTEND:
2517 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2518 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2520 case ISD::SIGN_EXTEND_INREG:
2521 // Max of the input and what this extends.
2523 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2526 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2527 return std::max(Tmp, Tmp2);
2530 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2531 // SRA X, C -> adds C sign bits.
2532 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2533 Tmp += C->getZExtValue();
2534 if (Tmp > VTBits) Tmp = VTBits;
2538 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2539 // shl destroys sign bits.
2540 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2541 if (C->getZExtValue() >= VTBits || // Bad shift.
2542 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2543 return Tmp - C->getZExtValue();
2548 case ISD::XOR: // NOT is handled here.
2549 // Logical binary ops preserve the number of sign bits at the worst.
2550 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2552 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2553 FirstAnswer = std::min(Tmp, Tmp2);
2554 // We computed what we know about the sign bits as our first
2555 // answer. Now proceed to the generic code that uses
2556 // computeKnownBits, and pick whichever answer is better.
2561 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2562 if (Tmp == 1) return 1; // Early out.
2563 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2564 return std::min(Tmp, Tmp2);
2569 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
2571 return 1; // Early out.
2572 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
2573 return std::min(Tmp, Tmp2);
2580 if (Op.getResNo() != 1)
2582 // The boolean result conforms to getBooleanContents. Fall through.
2583 // If setcc returns 0/-1, all bits are sign bits.
2584 // We know that we have an integer-based boolean since these operations
2585 // are only available for integer.
2586 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2587 TargetLowering::ZeroOrNegativeOneBooleanContent)
2591 // If setcc returns 0/-1, all bits are sign bits.
2592 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2593 TargetLowering::ZeroOrNegativeOneBooleanContent)
2598 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2599 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2601 // Handle rotate right by N like a rotate left by 32-N.
2602 if (Op.getOpcode() == ISD::ROTR)
2603 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2605 // If we aren't rotating out all of the known-in sign bits, return the
2606 // number that are left. This handles rotl(sext(x), 1) for example.
2607 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2608 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2612 // Add can have at most one carry bit. Thus we know that the output
2613 // is, at worst, one more bit than the inputs.
2614 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2615 if (Tmp == 1) return 1; // Early out.
2617 // Special case decrementing a value (ADD X, -1):
2618 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2619 if (CRHS->isAllOnesValue()) {
2620 APInt KnownZero, KnownOne;
2621 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2623 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2625 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2628 // If we are subtracting one from a positive number, there is no carry
2629 // out of the result.
2630 if (KnownZero.isNegative())
2634 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2635 if (Tmp2 == 1) return 1;
2636 return std::min(Tmp, Tmp2)-1;
2639 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2640 if (Tmp2 == 1) return 1;
2643 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2644 if (CLHS->isNullValue()) {
2645 APInt KnownZero, KnownOne;
2646 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2647 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2649 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2652 // If the input is known to be positive (the sign bit is known clear),
2653 // the output of the NEG has the same number of sign bits as the input.
2654 if (KnownZero.isNegative())
2657 // Otherwise, we treat this like a SUB.
2660 // Sub can have at most one carry bit. Thus we know that the output
2661 // is, at worst, one more bit than the inputs.
2662 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2663 if (Tmp == 1) return 1; // Early out.
2664 return std::min(Tmp, Tmp2)-1;
2666 // FIXME: it's tricky to do anything useful for this, but it is an important
2667 // case for targets like X86.
2669 case ISD::EXTRACT_ELEMENT: {
2670 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2671 const int BitWidth = Op.getValueType().getSizeInBits();
2673 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2675 // Get reverse index (starting from 1), Op1 value indexes elements from
2676 // little end. Sign starts at big end.
2677 const int rIndex = Items - 1 -
2678 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2680 // If the sign portion ends in our element the subtraction gives correct
2681 // result. Otherwise it gives either negative or > bitwidth result
2682 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2686 // If we are looking at the loaded value of the SDNode.
2687 if (Op.getResNo() == 0) {
2688 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2689 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2690 unsigned ExtType = LD->getExtensionType();
2693 case ISD::SEXTLOAD: // '17' bits known
2694 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2695 return VTBits-Tmp+1;
2696 case ISD::ZEXTLOAD: // '16' bits known
2697 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2703 // Allow the target to implement this method for its nodes.
2704 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2705 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2706 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2707 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2708 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2709 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2712 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2713 // use this information.
2714 APInt KnownZero, KnownOne;
2715 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2718 if (KnownZero.isNegative()) { // sign bit is 0
2720 } else if (KnownOne.isNegative()) { // sign bit is 1;
2727 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2728 // the number of identical bits in the top of the input value.
2730 Mask <<= Mask.getBitWidth()-VTBits;
2731 // Return # leading zeros. We use 'min' here in case Val was zero before
2732 // shifting. We don't want to return '64' as for an i32 "0".
2733 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2736 /// isBaseWithConstantOffset - Return true if the specified operand is an
2737 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2738 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2739 /// semantics as an ADD. This handles the equivalence:
2740 /// X|Cst == X+Cst iff X&Cst = 0.
2741 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2742 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2743 !isa<ConstantSDNode>(Op.getOperand(1)))
2746 if (Op.getOpcode() == ISD::OR &&
2747 !MaskedValueIsZero(Op.getOperand(0),
2748 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2755 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2756 // If we're told that NaNs won't happen, assume they won't.
2757 if (getTarget().Options.NoNaNsFPMath)
2760 // If the value is a constant, we can obviously see if it is a NaN or not.
2761 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2762 return !C->getValueAPF().isNaN();
2764 // TODO: Recognize more cases here.
2769 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2770 // If the value is a constant, we can obviously see if it is a zero or not.
2771 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2772 return !C->isZero();
2774 // TODO: Recognize more cases here.
2775 switch (Op.getOpcode()) {
2778 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2779 return !C->isNullValue();
2786 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2787 // Check the obvious case.
2788 if (A == B) return true;
2790 // For for negative and positive zero.
2791 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2792 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2793 if (CA->isZero() && CB->isZero()) return true;
2795 // Otherwise they may not be equal.
2799 /// getNode - Gets or creates the specified node.
2801 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2802 FoldingSetNodeID ID;
2803 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2805 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
2806 return SDValue(E, 0);
2808 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2809 DL.getDebugLoc(), getVTList(VT));
2810 CSEMap.InsertNode(N, IP);
2813 return SDValue(N, 0);
2816 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2817 EVT VT, SDValue Operand) {
2818 // Constant fold unary operations with an integer constant operand. Even
2819 // opaque constant will be folded, because the folding of unary operations
2820 // doesn't create new constants with different values. Nevertheless, the
2821 // opaque flag is preserved during folding to prevent future folding with
2823 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
2824 const APInt &Val = C->getAPIntValue();
2827 case ISD::SIGN_EXTEND:
2828 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
2829 C->isTargetOpcode(), C->isOpaque());
2830 case ISD::ANY_EXTEND:
2831 case ISD::ZERO_EXTEND:
2833 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
2834 C->isTargetOpcode(), C->isOpaque());
2835 case ISD::UINT_TO_FP:
2836 case ISD::SINT_TO_FP: {
2837 APFloat apf(EVTToAPFloatSemantics(VT),
2838 APInt::getNullValue(VT.getSizeInBits()));
2839 (void)apf.convertFromAPInt(Val,
2840 Opcode==ISD::SINT_TO_FP,
2841 APFloat::rmNearestTiesToEven);
2842 return getConstantFP(apf, DL, VT);
2845 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2846 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), DL, VT);
2847 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2848 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), DL, VT);
2849 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2850 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), DL, VT);
2853 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
2856 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
2859 case ISD::CTLZ_ZERO_UNDEF:
2860 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
2863 case ISD::CTTZ_ZERO_UNDEF:
2864 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
2869 // Constant fold unary operations with a floating point constant operand.
2870 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
2871 APFloat V = C->getValueAPF(); // make copy
2875 return getConstantFP(V, DL, VT);
2878 return getConstantFP(V, DL, VT);
2880 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2881 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2882 return getConstantFP(V, DL, VT);
2886 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2887 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2888 return getConstantFP(V, DL, VT);
2892 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2893 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2894 return getConstantFP(V, DL, VT);
2897 case ISD::FP_EXTEND: {
2899 // This can return overflow, underflow, or inexact; we don't care.
2900 // FIXME need to be more flexible about rounding mode.
2901 (void)V.convert(EVTToAPFloatSemantics(VT),
2902 APFloat::rmNearestTiesToEven, &ignored);
2903 return getConstantFP(V, DL, VT);
2905 case ISD::FP_TO_SINT:
2906 case ISD::FP_TO_UINT: {
2909 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2910 // FIXME need to be more flexible about rounding mode.
2911 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2912 Opcode==ISD::FP_TO_SINT,
2913 APFloat::rmTowardZero, &ignored);
2914 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2916 APInt api(VT.getSizeInBits(), x);
2917 return getConstant(api, DL, VT);
2920 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2921 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2922 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2923 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2924 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2925 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
2930 // Constant fold unary operations with a vector integer or float operand.
2931 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
2932 if (BV->isConstant()) {
2935 // FIXME: Entirely reasonable to perform folding of other unary
2936 // operations here as the need arises.
2943 case ISD::FP_EXTEND:
2944 case ISD::FP_TO_SINT:
2945 case ISD::FP_TO_UINT:
2947 case ISD::UINT_TO_FP:
2948 case ISD::SINT_TO_FP:
2951 case ISD::CTLZ_ZERO_UNDEF:
2953 case ISD::CTTZ_ZERO_UNDEF:
2955 EVT SVT = VT.getScalarType();
2956 EVT InVT = BV->getValueType(0);
2957 EVT InSVT = InVT.getScalarType();
2959 // Find legal integer scalar type for constant promotion and
2960 // ensure that its scalar size is at least as large as source.
2962 if (SVT.isInteger()) {
2963 LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
2964 if (LegalSVT.bitsLT(SVT)) break;
2967 // Let the above scalar folding handle the folding of each element.
2968 SmallVector<SDValue, 8> Ops;
2969 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
2970 SDValue OpN = BV->getOperand(i);
2971 EVT OpVT = OpN.getValueType();
2973 // Build vector (integer) scalar operands may need implicit
2974 // truncation - do this before constant folding.
2975 if (OpVT.isInteger() && OpVT.bitsGT(InSVT))
2976 OpN = getNode(ISD::TRUNCATE, DL, InSVT, OpN);
2978 OpN = getNode(Opcode, DL, SVT, OpN);
2980 // Legalize the (integer) scalar constant if necessary.
2981 if (LegalSVT != SVT)
2982 OpN = getNode(ISD::ANY_EXTEND, DL, LegalSVT, OpN);
2984 if (OpN.getOpcode() != ISD::UNDEF &&
2985 OpN.getOpcode() != ISD::Constant &&
2986 OpN.getOpcode() != ISD::ConstantFP)
2990 if (Ops.size() == VT.getVectorNumElements())
2991 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
2998 unsigned OpOpcode = Operand.getNode()->getOpcode();
3000 case ISD::TokenFactor:
3001 case ISD::MERGE_VALUES:
3002 case ISD::CONCAT_VECTORS:
3003 return Operand; // Factor, merge or concat of one node? No need.
3004 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
3005 case ISD::FP_EXTEND:
3006 assert(VT.isFloatingPoint() &&
3007 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
3008 if (Operand.getValueType() == VT) return Operand; // noop conversion.
3009 assert((!VT.isVector() ||
3010 VT.getVectorNumElements() ==
3011 Operand.getValueType().getVectorNumElements()) &&
3012 "Vector element count mismatch!");
3013 if (Operand.getOpcode() == ISD::UNDEF)
3014 return getUNDEF(VT);
3016 case ISD::SIGN_EXTEND:
3017 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3018 "Invalid SIGN_EXTEND!");
3019 if (Operand.getValueType() == VT) return Operand; // noop extension
3020 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
3021 "Invalid sext node, dst < src!");
3022 assert((!VT.isVector() ||
3023 VT.getVectorNumElements() ==
3024 Operand.getValueType().getVectorNumElements()) &&
3025 "Vector element count mismatch!");
3026 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
3027 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3028 else if (OpOpcode == ISD::UNDEF)
3029 // sext(undef) = 0, because the top bits will all be the same.
3030 return getConstant(0, DL, VT);
3032 case ISD::ZERO_EXTEND:
3033 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3034 "Invalid ZERO_EXTEND!");
3035 if (Operand.getValueType() == VT) return Operand; // noop extension
3036 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
3037 "Invalid zext node, dst < src!");
3038 assert((!VT.isVector() ||
3039 VT.getVectorNumElements() ==
3040 Operand.getValueType().getVectorNumElements()) &&
3041 "Vector element count mismatch!");
3042 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
3043 return getNode(ISD::ZERO_EXTEND, DL, VT,
3044 Operand.getNode()->getOperand(0));
3045 else if (OpOpcode == ISD::UNDEF)
3046 // zext(undef) = 0, because the top bits will be zero.
3047 return getConstant(0, DL, VT);
3049 case ISD::ANY_EXTEND:
3050 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3051 "Invalid ANY_EXTEND!");
3052 if (Operand.getValueType() == VT) return Operand; // noop extension
3053 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
3054 "Invalid anyext node, dst < src!");
3055 assert((!VT.isVector() ||
3056 VT.getVectorNumElements() ==
3057 Operand.getValueType().getVectorNumElements()) &&
3058 "Vector element count mismatch!");
3060 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3061 OpOpcode == ISD::ANY_EXTEND)
3062 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
3063 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3064 else if (OpOpcode == ISD::UNDEF)
3065 return getUNDEF(VT);
3067 // (ext (trunx x)) -> x
3068 if (OpOpcode == ISD::TRUNCATE) {
3069 SDValue OpOp = Operand.getNode()->getOperand(0);
3070 if (OpOp.getValueType() == VT)
3075 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3076 "Invalid TRUNCATE!");
3077 if (Operand.getValueType() == VT) return Operand; // noop truncate
3078 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
3079 "Invalid truncate node, src < dst!");
3080 assert((!VT.isVector() ||
3081 VT.getVectorNumElements() ==
3082 Operand.getValueType().getVectorNumElements()) &&
3083 "Vector element count mismatch!");
3084 if (OpOpcode == ISD::TRUNCATE)
3085 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3086 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3087 OpOpcode == ISD::ANY_EXTEND) {
3088 // If the source is smaller than the dest, we still need an extend.
3089 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
3090 .bitsLT(VT.getScalarType()))
3091 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3092 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
3093 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3094 return Operand.getNode()->getOperand(0);
3096 if (OpOpcode == ISD::UNDEF)
3097 return getUNDEF(VT);
3100 assert(VT.isInteger() && VT == Operand.getValueType() &&
3102 assert((VT.getScalarSizeInBits() % 16 == 0) &&
3103 "BSWAP types must be a multiple of 16 bits!");
3104 if (OpOpcode == ISD::UNDEF)
3105 return getUNDEF(VT);
3108 // Basic sanity checking.
3109 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
3110 && "Cannot BITCAST between types of different sizes!");
3111 if (VT == Operand.getValueType()) return Operand; // noop conversion.
3112 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
3113 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
3114 if (OpOpcode == ISD::UNDEF)
3115 return getUNDEF(VT);
3117 case ISD::SCALAR_TO_VECTOR:
3118 assert(VT.isVector() && !Operand.getValueType().isVector() &&
3119 (VT.getVectorElementType() == Operand.getValueType() ||
3120 (VT.getVectorElementType().isInteger() &&
3121 Operand.getValueType().isInteger() &&
3122 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3123 "Illegal SCALAR_TO_VECTOR node!");
3124 if (OpOpcode == ISD::UNDEF)
3125 return getUNDEF(VT);
3126 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3127 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3128 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3129 Operand.getConstantOperandVal(1) == 0 &&
3130 Operand.getOperand(0).getValueType() == VT)
3131 return Operand.getOperand(0);
3134 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3135 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3136 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3137 Operand.getNode()->getOperand(0));
3138 if (OpOpcode == ISD::FNEG) // --X -> X
3139 return Operand.getNode()->getOperand(0);
3142 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3143 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3148 SDVTList VTs = getVTList(VT);
3149 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3150 FoldingSetNodeID ID;
3151 SDValue Ops[1] = { Operand };
3152 AddNodeIDNode(ID, Opcode, VTs, Ops);
3154 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3155 return SDValue(E, 0);
3157 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3158 DL.getDebugLoc(), VTs, Operand);
3159 CSEMap.InsertNode(N, IP);
3161 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3162 DL.getDebugLoc(), VTs, Operand);
3166 return SDValue(N, 0);
3169 static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
3172 case ISD::ADD: return std::make_pair(C1 + C2, true);
3173 case ISD::SUB: return std::make_pair(C1 - C2, true);
3174 case ISD::MUL: return std::make_pair(C1 * C2, true);
3175 case ISD::AND: return std::make_pair(C1 & C2, true);
3176 case ISD::OR: return std::make_pair(C1 | C2, true);
3177 case ISD::XOR: return std::make_pair(C1 ^ C2, true);
3178 case ISD::SHL: return std::make_pair(C1 << C2, true);
3179 case ISD::SRL: return std::make_pair(C1.lshr(C2), true);
3180 case ISD::SRA: return std::make_pair(C1.ashr(C2), true);
3181 case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
3182 case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
3184 if (!C2.getBoolValue())
3186 return std::make_pair(C1.udiv(C2), true);
3188 if (!C2.getBoolValue())
3190 return std::make_pair(C1.urem(C2), true);
3192 if (!C2.getBoolValue())
3194 return std::make_pair(C1.sdiv(C2), true);
3196 if (!C2.getBoolValue())
3198 return std::make_pair(C1.srem(C2), true);
3200 return std::make_pair(APInt(1, 0), false);
3203 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3204 const ConstantSDNode *Cst1,
3205 const ConstantSDNode *Cst2) {
3206 if (Cst1->isOpaque() || Cst2->isOpaque())
3209 std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
3210 Cst2->getAPIntValue());
3213 return getConstant(Folded.first, DL, VT);
3216 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3217 SDNode *Cst1, SDNode *Cst2) {
3218 // If the opcode is a target-specific ISD node, there's nothing we can
3219 // do here and the operand rules may not line up with the below, so
3221 if (Opcode >= ISD::BUILTIN_OP_END)
3224 // Handle the case of two scalars.
3225 if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3226 if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3227 if (SDValue Folded =
3228 FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2)) {
3231 SmallVector<SDValue, 4> Outputs;
3232 // We may have a vector type but a scalar result. Create a splat.
3233 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3234 // Build a big vector out of the scalar elements we generated.
3235 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3242 // For vectors extract each constant element into Inputs so we can constant
3243 // fold them individually.
3244 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3245 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3249 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3251 EVT SVT = VT.getScalarType();
3252 SmallVector<SDValue, 4> Outputs;
3253 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3254 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3255 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3256 if (!V1 || !V2) // Not a constant, bail.
3259 if (V1->isOpaque() || V2->isOpaque())
3262 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3263 // FIXME: This is valid and could be handled by truncating the APInts.
3264 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3267 // Fold one vector element.
3268 std::pair<APInt, bool> Folded = FoldValue(Opcode, V1->getAPIntValue(),
3269 V2->getAPIntValue());
3272 Outputs.push_back(getConstant(Folded.first, DL, SVT));
3275 assert(VT.getVectorNumElements() == Outputs.size() &&
3276 "Vector size mismatch!");
3278 // We may have a vector type but a scalar result. Create a splat.
3279 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3281 // Build a big vector out of the scalar elements we generated.
3282 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3285 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3286 SDValue N2, const SDNodeFlags *Flags) {
3287 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3288 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
3291 case ISD::TokenFactor:
3292 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3293 N2.getValueType() == MVT::Other && "Invalid token factor!");
3294 // Fold trivial token factors.
3295 if (N1.getOpcode() == ISD::EntryToken) return N2;
3296 if (N2.getOpcode() == ISD::EntryToken) return N1;
3297 if (N1 == N2) return N1;
3299 case ISD::CONCAT_VECTORS:
3300 // Concat of UNDEFs is UNDEF.
3301 if (N1.getOpcode() == ISD::UNDEF &&
3302 N2.getOpcode() == ISD::UNDEF)
3303 return getUNDEF(VT);
3305 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3306 // one big BUILD_VECTOR.
3307 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3308 N2.getOpcode() == ISD::BUILD_VECTOR) {
3309 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3310 N1.getNode()->op_end());
3311 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3313 // BUILD_VECTOR requires all inputs to be of the same type, find the
3314 // maximum type and extend them all.
3315 EVT SVT = VT.getScalarType();
3316 for (SDValue Op : Elts)
3317 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3318 if (SVT.bitsGT(VT.getScalarType()))
3319 for (SDValue &Op : Elts)
3320 Op = TLI->isZExtFree(Op.getValueType(), SVT)
3321 ? getZExtOrTrunc(Op, DL, SVT)
3322 : getSExtOrTrunc(Op, DL, SVT);
3324 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3328 assert(VT.isInteger() && "This operator does not apply to FP types!");
3329 assert(N1.getValueType() == N2.getValueType() &&
3330 N1.getValueType() == VT && "Binary operator types must match!");
3331 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3332 // worth handling here.
3333 if (N2C && N2C->isNullValue())
3335 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3342 assert(VT.isInteger() && "This operator does not apply to FP types!");
3343 assert(N1.getValueType() == N2.getValueType() &&
3344 N1.getValueType() == VT && "Binary operator types must match!");
3345 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3346 // it's worth handling here.
3347 if (N2C && N2C->isNullValue())
3357 assert(VT.isInteger() && "This operator does not apply to FP types!");
3358 assert(N1.getValueType() == N2.getValueType() &&
3359 N1.getValueType() == VT && "Binary operator types must match!");
3366 if (getTarget().Options.UnsafeFPMath) {
3367 if (Opcode == ISD::FADD) {
3369 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
3370 if (CFP->getValueAPF().isZero())
3373 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3374 if (CFP->getValueAPF().isZero())
3376 } else if (Opcode == ISD::FSUB) {
3378 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
3379 if (CFP->getValueAPF().isZero())
3381 } else if (Opcode == ISD::FMUL) {
3382 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
3385 // If the first operand isn't the constant, try the second
3387 CFP = dyn_cast<ConstantFPSDNode>(N2);
3394 return SDValue(CFP,0);
3396 if (CFP->isExactlyValue(1.0))
3401 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3402 assert(N1.getValueType() == N2.getValueType() &&
3403 N1.getValueType() == VT && "Binary operator types must match!");
3405 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3406 assert(N1.getValueType() == VT &&
3407 N1.getValueType().isFloatingPoint() &&
3408 N2.getValueType().isFloatingPoint() &&
3409 "Invalid FCOPYSIGN!");
3416 assert(VT == N1.getValueType() &&
3417 "Shift operators return type must be the same as their first arg");
3418 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3419 "Shifts only work on integers");
3420 assert((!VT.isVector() || VT == N2.getValueType()) &&
3421 "Vector shift amounts must be in the same as their first arg");
3422 // Verify that the shift amount VT is bit enough to hold valid shift
3423 // amounts. This catches things like trying to shift an i1024 value by an
3424 // i8, which is easy to fall into in generic code that uses
3425 // TLI.getShiftAmount().
3426 assert(N2.getValueType().getSizeInBits() >=
3427 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3428 "Invalid use of small shift amount with oversized value!");
3430 // Always fold shifts of i1 values so the code generator doesn't need to
3431 // handle them. Since we know the size of the shift has to be less than the
3432 // size of the value, the shift/rotate count is guaranteed to be zero.
3435 if (N2C && N2C->isNullValue())
3438 case ISD::FP_ROUND_INREG: {
3439 EVT EVT = cast<VTSDNode>(N2)->getVT();
3440 assert(VT == N1.getValueType() && "Not an inreg round!");
3441 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3442 "Cannot FP_ROUND_INREG integer types");
3443 assert(EVT.isVector() == VT.isVector() &&
3444 "FP_ROUND_INREG type should be vector iff the operand "
3446 assert((!EVT.isVector() ||
3447 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3448 "Vector element counts must match in FP_ROUND_INREG");
3449 assert(EVT.bitsLE(VT) && "Not rounding down!");
3451 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3455 assert(VT.isFloatingPoint() &&
3456 N1.getValueType().isFloatingPoint() &&
3457 VT.bitsLE(N1.getValueType()) &&
3458 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
3459 if (N1.getValueType() == VT) return N1; // noop conversion.
3461 case ISD::AssertSext:
3462 case ISD::AssertZext: {
3463 EVT EVT = cast<VTSDNode>(N2)->getVT();
3464 assert(VT == N1.getValueType() && "Not an inreg extend!");
3465 assert(VT.isInteger() && EVT.isInteger() &&
3466 "Cannot *_EXTEND_INREG FP types");
3467 assert(!EVT.isVector() &&
3468 "AssertSExt/AssertZExt type should be the vector element type "
3469 "rather than the vector type!");
3470 assert(EVT.bitsLE(VT) && "Not extending!");
3471 if (VT == EVT) return N1; // noop assertion.
3474 case ISD::SIGN_EXTEND_INREG: {
3475 EVT EVT = cast<VTSDNode>(N2)->getVT();
3476 assert(VT == N1.getValueType() && "Not an inreg extend!");
3477 assert(VT.isInteger() && EVT.isInteger() &&
3478 "Cannot *_EXTEND_INREG FP types");
3479 assert(EVT.isVector() == VT.isVector() &&
3480 "SIGN_EXTEND_INREG type should be vector iff the operand "
3482 assert((!EVT.isVector() ||
3483 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3484 "Vector element counts must match in SIGN_EXTEND_INREG");
3485 assert(EVT.bitsLE(VT) && "Not extending!");
3486 if (EVT == VT) return N1; // Not actually extending
3488 auto SignExtendInReg = [&](APInt Val) {
3489 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3490 Val <<= Val.getBitWidth() - FromBits;
3491 Val = Val.ashr(Val.getBitWidth() - FromBits);
3492 return getConstant(Val, DL, VT.getScalarType());
3496 APInt Val = N1C->getAPIntValue();
3497 return SignExtendInReg(Val);
3499 if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
3500 SmallVector<SDValue, 8> Ops;
3501 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3502 SDValue Op = N1.getOperand(i);
3503 if (Op.getValueType() != VT.getScalarType()) break;
3504 if (Op.getOpcode() == ISD::UNDEF) {
3508 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
3509 APInt Val = C->getAPIntValue();
3510 Ops.push_back(SignExtendInReg(Val));
3515 if (Ops.size() == VT.getVectorNumElements())
3516 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3520 case ISD::EXTRACT_VECTOR_ELT:
3521 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3522 if (N1.getOpcode() == ISD::UNDEF)
3523 return getUNDEF(VT);
3525 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
3526 if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
3527 return getUNDEF(VT);
3529 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3530 // expanding copies of large vectors from registers.
3532 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3533 N1.getNumOperands() > 0) {
3535 N1.getOperand(0).getValueType().getVectorNumElements();
3536 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3537 N1.getOperand(N2C->getZExtValue() / Factor),
3538 getConstant(N2C->getZExtValue() % Factor, DL,
3539 N2.getValueType()));
3542 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3543 // expanding large vector constants.
3544 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3545 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3547 if (VT != Elt.getValueType())
3548 // If the vector element type is not legal, the BUILD_VECTOR operands
3549 // are promoted and implicitly truncated, and the result implicitly
3550 // extended. Make that explicit here.
3551 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3556 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3557 // operations are lowered to scalars.
3558 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3559 // If the indices are the same, return the inserted element else
3560 // if the indices are known different, extract the element from
3561 // the original vector.
3562 SDValue N1Op2 = N1.getOperand(2);
3563 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
3565 if (N1Op2C && N2C) {
3566 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3567 if (VT == N1.getOperand(1).getValueType())
3568 return N1.getOperand(1);
3570 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3573 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3577 case ISD::EXTRACT_ELEMENT:
3578 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3579 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3580 (N1.getValueType().isInteger() == VT.isInteger()) &&
3581 N1.getValueType() != VT &&
3582 "Wrong types for EXTRACT_ELEMENT!");
3584 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3585 // 64-bit integers into 32-bit parts. Instead of building the extract of
3586 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3587 if (N1.getOpcode() == ISD::BUILD_PAIR)
3588 return N1.getOperand(N2C->getZExtValue());
3590 // EXTRACT_ELEMENT of a constant int is also very common.
3591 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3592 unsigned ElementSize = VT.getSizeInBits();
3593 unsigned Shift = ElementSize * N2C->getZExtValue();
3594 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3595 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
3598 case ISD::EXTRACT_SUBVECTOR: {
3600 if (VT.isSimple() && N1.getValueType().isSimple()) {
3601 assert(VT.isVector() && N1.getValueType().isVector() &&
3602 "Extract subvector VTs must be a vectors!");
3603 assert(VT.getVectorElementType() ==
3604 N1.getValueType().getVectorElementType() &&
3605 "Extract subvector VTs must have the same element type!");
3606 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3607 "Extract subvector must be from larger vector to smaller vector!");
3609 if (isa<ConstantSDNode>(Index)) {
3610 assert((VT.getVectorNumElements() +
3611 cast<ConstantSDNode>(Index)->getZExtValue()
3612 <= N1.getValueType().getVectorNumElements())
3613 && "Extract subvector overflow!");
3616 // Trivial extraction.
3617 if (VT.getSimpleVT() == N1.getSimpleValueType())
3624 // Perform trivial constant folding.
3626 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
3629 // Canonicalize constant to RHS if commutative.
3630 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3631 std::swap(N1C, N2C);
3635 // Constant fold FP operations.
3636 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3637 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3638 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3640 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3641 // Canonicalize constant to RHS if commutative.
3642 std::swap(N1CFP, N2CFP);
3645 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3646 APFloat::opStatus s;
3649 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3650 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3651 return getConstantFP(V1, DL, VT);
3654 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3655 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3656 return getConstantFP(V1, DL, VT);
3659 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3660 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3661 return getConstantFP(V1, DL, VT);
3664 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3665 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3666 s!=APFloat::opDivByZero)) {
3667 return getConstantFP(V1, DL, VT);
3671 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3672 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3673 s!=APFloat::opDivByZero)) {
3674 return getConstantFP(V1, DL, VT);
3677 case ISD::FCOPYSIGN:
3679 return getConstantFP(V1, DL, VT);
3684 if (Opcode == ISD::FP_ROUND) {
3685 APFloat V = N1CFP->getValueAPF(); // make copy
3687 // This can return overflow, underflow, or inexact; we don't care.
3688 // FIXME need to be more flexible about rounding mode.
3689 (void)V.convert(EVTToAPFloatSemantics(VT),
3690 APFloat::rmNearestTiesToEven, &ignored);
3691 return getConstantFP(V, DL, VT);
3695 // Canonicalize an UNDEF to the RHS, even over a constant.
3696 if (N1.getOpcode() == ISD::UNDEF) {
3697 if (isCommutativeBinOp(Opcode)) {
3701 case ISD::FP_ROUND_INREG:
3702 case ISD::SIGN_EXTEND_INREG:
3708 return N1; // fold op(undef, arg2) -> undef
3716 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3717 // For vectors, we can't easily build an all zero vector, just return
3724 // Fold a bunch of operators when the RHS is undef.
3725 if (N2.getOpcode() == ISD::UNDEF) {
3728 if (N1.getOpcode() == ISD::UNDEF)
3729 // Handle undef ^ undef -> 0 special case. This is a common
3731 return getConstant(0, DL, VT);
3741 return N2; // fold op(arg1, undef) -> undef
3747 if (getTarget().Options.UnsafeFPMath)
3755 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
3756 // For vectors, we can't easily build an all zero vector, just return
3761 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), DL, VT);
3762 // For vectors, we can't easily build an all one vector, just return
3770 // Memoize this node if possible.
3772 SDVTList VTs = getVTList(VT);
3773 if (VT != MVT::Glue) {
3774 SDValue Ops[] = {N1, N2};
3775 FoldingSetNodeID ID;
3776 AddNodeIDNode(ID, Opcode, VTs, Ops);
3777 AddNodeIDFlags(ID, Opcode, Flags);
3779 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3780 return SDValue(E, 0);
3782 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3784 CSEMap.InsertNode(N, IP);
3786 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3790 return SDValue(N, 0);
3793 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3794 SDValue N1, SDValue N2, SDValue N3) {
3795 // Perform various simplifications.
3796 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3799 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3800 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3801 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3802 if (N1CFP && N2CFP && N3CFP) {
3803 APFloat V1 = N1CFP->getValueAPF();
3804 const APFloat &V2 = N2CFP->getValueAPF();
3805 const APFloat &V3 = N3CFP->getValueAPF();
3806 APFloat::opStatus s =
3807 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3808 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3809 return getConstantFP(V1, DL, VT);
3813 case ISD::CONCAT_VECTORS:
3814 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3815 // one big BUILD_VECTOR.
3816 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3817 N2.getOpcode() == ISD::BUILD_VECTOR &&
3818 N3.getOpcode() == ISD::BUILD_VECTOR) {
3819 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3820 N1.getNode()->op_end());
3821 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3822 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3823 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3827 // Use FoldSetCC to simplify SETCC's.
3828 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3829 if (Simp.getNode()) return Simp;
3834 if (N1C->getZExtValue())
3835 return N2; // select true, X, Y -> X
3836 return N3; // select false, X, Y -> Y
3839 if (N2 == N3) return N2; // select C, X, X -> X
3841 case ISD::VECTOR_SHUFFLE:
3842 llvm_unreachable("should use getVectorShuffle constructor!");
3843 case ISD::INSERT_SUBVECTOR: {
3845 if (VT.isSimple() && N1.getValueType().isSimple()
3846 && N2.getValueType().isSimple()) {
3847 assert(VT.isVector() && N1.getValueType().isVector() &&
3848 N2.getValueType().isVector() &&
3849 "Insert subvector VTs must be a vectors");
3850 assert(VT == N1.getValueType() &&
3851 "Dest and insert subvector source types must match!");
3852 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3853 "Insert subvector must be from smaller vector to larger vector!");
3854 if (isa<ConstantSDNode>(Index)) {
3855 assert((N2.getValueType().getVectorNumElements() +
3856 cast<ConstantSDNode>(Index)->getZExtValue()
3857 <= VT.getVectorNumElements())
3858 && "Insert subvector overflow!");
3861 // Trivial insertion.
3862 if (VT.getSimpleVT() == N2.getSimpleValueType())
3868 // Fold bit_convert nodes from a type to themselves.
3869 if (N1.getValueType() == VT)
3874 // Memoize node if it doesn't produce a flag.
3876 SDVTList VTs = getVTList(VT);
3877 if (VT != MVT::Glue) {
3878 SDValue Ops[] = { N1, N2, N3 };
3879 FoldingSetNodeID ID;
3880 AddNodeIDNode(ID, Opcode, VTs, Ops);
3882 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3883 return SDValue(E, 0);
3885 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3886 DL.getDebugLoc(), VTs, N1, N2, N3);
3887 CSEMap.InsertNode(N, IP);
3889 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3890 DL.getDebugLoc(), VTs, N1, N2, N3);
3894 return SDValue(N, 0);
3897 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3898 SDValue N1, SDValue N2, SDValue N3,
3900 SDValue Ops[] = { N1, N2, N3, N4 };
3901 return getNode(Opcode, DL, VT, Ops);
3904 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3905 SDValue N1, SDValue N2, SDValue N3,
3906 SDValue N4, SDValue N5) {
3907 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3908 return getNode(Opcode, DL, VT, Ops);
3911 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3912 /// the incoming stack arguments to be loaded from the stack.
3913 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3914 SmallVector<SDValue, 8> ArgChains;
3916 // Include the original chain at the beginning of the list. When this is
3917 // used by target LowerCall hooks, this helps legalize find the
3918 // CALLSEQ_BEGIN node.
3919 ArgChains.push_back(Chain);
3921 // Add a chain value for each stack argument.
3922 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3923 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3924 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3925 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3926 if (FI->getIndex() < 0)
3927 ArgChains.push_back(SDValue(L, 1));
3929 // Build a tokenfactor for all the chains.
3930 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
3933 /// getMemsetValue - Vectorized representation of the memset value
3935 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3937 assert(Value.getOpcode() != ISD::UNDEF);
3939 unsigned NumBits = VT.getScalarType().getSizeInBits();
3940 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3941 assert(C->getAPIntValue().getBitWidth() == 8);
3942 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3944 return DAG.getConstant(Val, dl, VT);
3945 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
3949 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
3950 EVT IntVT = VT.getScalarType();
3951 if (!IntVT.isInteger())
3952 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
3954 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
3956 // Use a multiplication with 0x010101... to extend the input to the
3958 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3959 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
3960 DAG.getConstant(Magic, dl, IntVT));
3963 if (VT != Value.getValueType() && !VT.isInteger())
3964 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
3965 if (VT != Value.getValueType()) {
3966 assert(VT.getVectorElementType() == Value.getValueType() &&
3967 "value type should be one vector element here");
3968 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
3969 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
3975 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3976 /// used when a memcpy is turned into a memset when the source is a constant
3978 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3979 const TargetLowering &TLI, StringRef Str) {
3980 // Handle vector with all elements zero.
3983 return DAG.getConstant(0, dl, VT);
3984 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
3985 return DAG.getConstantFP(0.0, dl, VT);
3986 else if (VT.isVector()) {
3987 unsigned NumElts = VT.getVectorNumElements();
3988 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3989 return DAG.getNode(ISD::BITCAST, dl, VT,
3990 DAG.getConstant(0, dl,
3991 EVT::getVectorVT(*DAG.getContext(),
3994 llvm_unreachable("Expected type!");
3997 assert(!VT.isVector() && "Can't handle vector type here!");
3998 unsigned NumVTBits = VT.getSizeInBits();
3999 unsigned NumVTBytes = NumVTBits / 8;
4000 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
4002 APInt Val(NumVTBits, 0);
4003 if (DAG.getDataLayout().isLittleEndian()) {
4004 for (unsigned i = 0; i != NumBytes; ++i)
4005 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
4007 for (unsigned i = 0; i != NumBytes; ++i)
4008 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
4011 // If the "cost" of materializing the integer immediate is less than the cost
4012 // of a load, then it is cost effective to turn the load into the immediate.
4013 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
4014 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
4015 return DAG.getConstant(Val, dl, VT);
4016 return SDValue(nullptr, 0);
4019 /// getMemBasePlusOffset - Returns base and offset node for the
4021 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
4022 SelectionDAG &DAG) {
4023 EVT VT = Base.getValueType();
4024 return DAG.getNode(ISD::ADD, dl,
4025 VT, Base, DAG.getConstant(Offset, dl, VT));
4028 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
4030 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
4031 unsigned SrcDelta = 0;
4032 GlobalAddressSDNode *G = nullptr;
4033 if (Src.getOpcode() == ISD::GlobalAddress)
4034 G = cast<GlobalAddressSDNode>(Src);
4035 else if (Src.getOpcode() == ISD::ADD &&
4036 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
4037 Src.getOperand(1).getOpcode() == ISD::Constant) {
4038 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
4039 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
4044 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
4047 /// Determines the optimal series of memory ops to replace the memset / memcpy.
4048 /// Return true if the number of memory ops is below the threshold (Limit).
4049 /// It returns the types of the sequence of memory ops to perform
4050 /// memset / memcpy by reference.
4051 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
4052 unsigned Limit, uint64_t Size,
4053 unsigned DstAlign, unsigned SrcAlign,
4059 const TargetLowering &TLI) {
4060 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4061 "Expecting memcpy / memset source to meet alignment requirement!");
4062 // If 'SrcAlign' is zero, that means the memory operation does not need to
4063 // load the value, i.e. memset or memcpy from constant string. Otherwise,
4064 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
4065 // is the specified alignment of the memory operation. If it is zero, that
4066 // means it's possible to change the alignment of the destination.
4067 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
4068 // not need to be loaded.
4069 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
4070 IsMemset, ZeroMemset, MemcpyStrSrc,
4071 DAG.getMachineFunction());
4073 if (VT == MVT::Other) {
4075 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(AS) ||
4076 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
4077 VT = TLI.getPointerTy(DAG.getDataLayout());
4079 switch (DstAlign & 7) {
4080 case 0: VT = MVT::i64; break;
4081 case 4: VT = MVT::i32; break;
4082 case 2: VT = MVT::i16; break;
4083 default: VT = MVT::i8; break;
4088 while (!TLI.isTypeLegal(LVT))
4089 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
4090 assert(LVT.isInteger());
4096 unsigned NumMemOps = 0;
4098 unsigned VTSize = VT.getSizeInBits() / 8;
4099 while (VTSize > Size) {
4100 // For now, only use non-vector load / store's for the left-over pieces.
4105 if (VT.isVector() || VT.isFloatingPoint()) {
4106 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
4107 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
4108 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
4110 else if (NewVT == MVT::i64 &&
4111 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
4112 TLI.isSafeMemOpType(MVT::f64)) {
4113 // i64 is usually not legal on 32-bit targets, but f64 may be.
4121 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
4122 if (NewVT == MVT::i8)
4124 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
4126 NewVTSize = NewVT.getSizeInBits() / 8;
4128 // If the new VT cannot cover all of the remaining bits, then consider
4129 // issuing a (or a pair of) unaligned and overlapping load / store.
4130 // FIXME: Only does this for 64-bit or more since we don't have proper
4131 // cost model for unaligned load / store.
4134 if (NumMemOps && AllowOverlap &&
4135 VTSize >= 8 && NewVTSize < Size &&
4136 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
4144 if (++NumMemOps > Limit)
4147 MemOps.push_back(VT);
4154 static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
4155 // On Darwin, -Os means optimize for size without hurting performance, so
4156 // only really optimize for size when -Oz (MinSize) is used.
4157 if (MF.getTarget().getTargetTriple().isOSDarwin())
4158 return MF.getFunction()->optForMinSize();
4159 return MF.getFunction()->optForSize();
4162 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4163 SDValue Chain, SDValue Dst,
4164 SDValue Src, uint64_t Size,
4165 unsigned Align, bool isVol,
4167 MachinePointerInfo DstPtrInfo,
4168 MachinePointerInfo SrcPtrInfo) {
4169 // Turn a memcpy of undef to nop.
4170 if (Src.getOpcode() == ISD::UNDEF)
4173 // Expand memcpy to a series of load and store ops if the size operand falls
4174 // below a certain threshold.
4175 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4176 // rather than maybe a humongous number of loads and stores.
4177 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4178 std::vector<EVT> MemOps;
4179 bool DstAlignCanChange = false;
4180 MachineFunction &MF = DAG.getMachineFunction();
4181 MachineFrameInfo *MFI = MF.getFrameInfo();
4182 bool OptSize = shouldLowerMemFuncForSize(MF);
4183 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4184 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4185 DstAlignCanChange = true;
4186 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4187 if (Align > SrcAlign)
4190 bool CopyFromStr = isMemSrcFromString(Src, Str);
4191 bool isZeroStr = CopyFromStr && Str.empty();
4192 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4194 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4195 (DstAlignCanChange ? 0 : Align),
4196 (isZeroStr ? 0 : SrcAlign),
4197 false, false, CopyFromStr, true, DAG, TLI))
4200 if (DstAlignCanChange) {
4201 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4202 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4204 // Don't promote to an alignment that would require dynamic stack
4206 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4207 if (!TRI->needsStackRealignment(MF))
4208 while (NewAlign > Align &&
4209 DAG.getDataLayout().exceedsNaturalStackAlignment(NewAlign))
4212 if (NewAlign > Align) {
4213 // Give the stack frame object a larger alignment if needed.
4214 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4215 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4220 SmallVector<SDValue, 8> OutChains;
4221 unsigned NumMemOps = MemOps.size();
4222 uint64_t SrcOff = 0, DstOff = 0;
4223 for (unsigned i = 0; i != NumMemOps; ++i) {
4225 unsigned VTSize = VT.getSizeInBits() / 8;
4226 SDValue Value, Store;
4228 if (VTSize > Size) {
4229 // Issuing an unaligned load / store pair that overlaps with the previous
4230 // pair. Adjust the offset accordingly.
4231 assert(i == NumMemOps-1 && i != 0);
4232 SrcOff -= VTSize - Size;
4233 DstOff -= VTSize - Size;
4237 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4238 // It's unlikely a store of a vector immediate can be done in a single
4239 // instruction. It would require a load from a constantpool first.
4240 // We only handle zero vectors here.
4241 // FIXME: Handle other cases where store of vector immediate is done in
4242 // a single instruction.
4243 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4244 if (Value.getNode())
4245 Store = DAG.getStore(Chain, dl, Value,
4246 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4247 DstPtrInfo.getWithOffset(DstOff), isVol,
4251 if (!Store.getNode()) {
4252 // The type might not be legal for the target. This should only happen
4253 // if the type is smaller than a legal type, as on PPC, so the right
4254 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4255 // to Load/Store if NVT==VT.
4256 // FIXME does the case above also need this?
4257 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4258 assert(NVT.bitsGE(VT));
4259 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4260 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4261 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4262 false, MinAlign(SrcAlign, SrcOff));
4263 Store = DAG.getTruncStore(Chain, dl, Value,
4264 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4265 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4268 OutChains.push_back(Store);
4274 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4277 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4278 SDValue Chain, SDValue Dst,
4279 SDValue Src, uint64_t Size,
4280 unsigned Align, bool isVol,
4282 MachinePointerInfo DstPtrInfo,
4283 MachinePointerInfo SrcPtrInfo) {
4284 // Turn a memmove of undef to nop.
4285 if (Src.getOpcode() == ISD::UNDEF)
4288 // Expand memmove to a series of load and store ops if the size operand falls
4289 // below a certain threshold.
4290 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4291 std::vector<EVT> MemOps;
4292 bool DstAlignCanChange = false;
4293 MachineFunction &MF = DAG.getMachineFunction();
4294 MachineFrameInfo *MFI = MF.getFrameInfo();
4295 bool OptSize = shouldLowerMemFuncForSize(MF);
4296 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4297 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4298 DstAlignCanChange = true;
4299 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4300 if (Align > SrcAlign)
4302 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4304 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4305 (DstAlignCanChange ? 0 : Align), SrcAlign,
4306 false, false, false, false, DAG, TLI))
4309 if (DstAlignCanChange) {
4310 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4311 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4312 if (NewAlign > Align) {
4313 // Give the stack frame object a larger alignment if needed.
4314 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4315 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4320 uint64_t SrcOff = 0, DstOff = 0;
4321 SmallVector<SDValue, 8> LoadValues;
4322 SmallVector<SDValue, 8> LoadChains;
4323 SmallVector<SDValue, 8> OutChains;
4324 unsigned NumMemOps = MemOps.size();
4325 for (unsigned i = 0; i < NumMemOps; i++) {
4327 unsigned VTSize = VT.getSizeInBits() / 8;
4330 Value = DAG.getLoad(VT, dl, Chain,
4331 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4332 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4333 false, false, SrcAlign);
4334 LoadValues.push_back(Value);
4335 LoadChains.push_back(Value.getValue(1));
4338 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4340 for (unsigned i = 0; i < NumMemOps; i++) {
4342 unsigned VTSize = VT.getSizeInBits() / 8;
4345 Store = DAG.getStore(Chain, dl, LoadValues[i],
4346 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4347 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4348 OutChains.push_back(Store);
4352 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4355 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4358 /// \param DAG Selection DAG where lowered code is placed.
4359 /// \param dl Link to corresponding IR location.
4360 /// \param Chain Control flow dependency.
4361 /// \param Dst Pointer to destination memory location.
4362 /// \param Src Value of byte to write into the memory.
4363 /// \param Size Number of bytes to write.
4364 /// \param Align Alignment of the destination in bytes.
4365 /// \param isVol True if destination is volatile.
4366 /// \param DstPtrInfo IR information on the memory pointer.
4367 /// \returns New head in the control flow, if lowering was successful, empty
4368 /// SDValue otherwise.
4370 /// The function tries to replace 'llvm.memset' intrinsic with several store
4371 /// operations and value calculation code. This is usually profitable for small
4373 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4374 SDValue Chain, SDValue Dst,
4375 SDValue Src, uint64_t Size,
4376 unsigned Align, bool isVol,
4377 MachinePointerInfo DstPtrInfo) {
4378 // Turn a memset of undef to nop.
4379 if (Src.getOpcode() == ISD::UNDEF)
4382 // Expand memset to a series of load/store ops if the size operand
4383 // falls below a certain threshold.
4384 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4385 std::vector<EVT> MemOps;
4386 bool DstAlignCanChange = false;
4387 MachineFunction &MF = DAG.getMachineFunction();
4388 MachineFrameInfo *MFI = MF.getFrameInfo();
4389 bool OptSize = shouldLowerMemFuncForSize(MF);
4390 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4391 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4392 DstAlignCanChange = true;
4394 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4395 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4396 Size, (DstAlignCanChange ? 0 : Align), 0,
4397 true, IsZeroVal, false, true, DAG, TLI))
4400 if (DstAlignCanChange) {
4401 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4402 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4403 if (NewAlign > Align) {
4404 // Give the stack frame object a larger alignment if needed.
4405 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4406 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4411 SmallVector<SDValue, 8> OutChains;
4412 uint64_t DstOff = 0;
4413 unsigned NumMemOps = MemOps.size();
4415 // Find the largest store and generate the bit pattern for it.
4416 EVT LargestVT = MemOps[0];
4417 for (unsigned i = 1; i < NumMemOps; i++)
4418 if (MemOps[i].bitsGT(LargestVT))
4419 LargestVT = MemOps[i];
4420 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4422 for (unsigned i = 0; i < NumMemOps; i++) {
4424 unsigned VTSize = VT.getSizeInBits() / 8;
4425 if (VTSize > Size) {
4426 // Issuing an unaligned load / store pair that overlaps with the previous
4427 // pair. Adjust the offset accordingly.
4428 assert(i == NumMemOps-1 && i != 0);
4429 DstOff -= VTSize - Size;
4432 // If this store is smaller than the largest store see whether we can get
4433 // the smaller value for free with a truncate.
4434 SDValue Value = MemSetValue;
4435 if (VT.bitsLT(LargestVT)) {
4436 if (!LargestVT.isVector() && !VT.isVector() &&
4437 TLI.isTruncateFree(LargestVT, VT))
4438 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4440 Value = getMemsetValue(Src, VT, DAG, dl);
4442 assert(Value.getValueType() == VT && "Value with wrong type.");
4443 SDValue Store = DAG.getStore(Chain, dl, Value,
4444 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4445 DstPtrInfo.getWithOffset(DstOff),
4446 isVol, false, Align);
4447 OutChains.push_back(Store);
4448 DstOff += VT.getSizeInBits() / 8;
4452 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4455 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4456 SDValue Src, SDValue Size,
4457 unsigned Align, bool isVol, bool AlwaysInline,
4458 bool isTailCall, MachinePointerInfo DstPtrInfo,
4459 MachinePointerInfo SrcPtrInfo) {
4460 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4462 // Check to see if we should lower the memcpy to loads and stores first.
4463 // For cases within the target-specified limits, this is the best choice.
4464 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4466 // Memcpy with size zero? Just return the original chain.
4467 if (ConstantSize->isNullValue())
4470 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4471 ConstantSize->getZExtValue(),Align,
4472 isVol, false, DstPtrInfo, SrcPtrInfo);
4473 if (Result.getNode())
4477 // Then check to see if we should lower the memcpy with target-specific
4478 // code. If the target chooses to do this, this is the next best.
4480 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4481 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4482 DstPtrInfo, SrcPtrInfo);
4483 if (Result.getNode())
4487 // If we really need inline code and the target declined to provide it,
4488 // use a (potentially long) sequence of loads and stores.
4490 assert(ConstantSize && "AlwaysInline requires a constant size!");
4491 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4492 ConstantSize->getZExtValue(), Align, isVol,
4493 true, DstPtrInfo, SrcPtrInfo);
4496 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4497 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4498 // respect volatile, so they may do things like read or write memory
4499 // beyond the given memory regions. But fixing this isn't easy, and most
4500 // people don't care.
4502 // Emit a library call.
4503 TargetLowering::ArgListTy Args;
4504 TargetLowering::ArgListEntry Entry;
4505 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4506 Entry.Node = Dst; Args.push_back(Entry);
4507 Entry.Node = Src; Args.push_back(Entry);
4508 Entry.Node = Size; Args.push_back(Entry);
4509 // FIXME: pass in SDLoc
4510 TargetLowering::CallLoweringInfo CLI(*this);
4513 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4514 Type::getVoidTy(*getContext()),
4515 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4516 TLI->getPointerTy(getDataLayout())),
4519 .setTailCall(isTailCall);
4521 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4522 return CallResult.second;
4525 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4526 SDValue Src, SDValue Size,
4527 unsigned Align, bool isVol, bool isTailCall,
4528 MachinePointerInfo DstPtrInfo,
4529 MachinePointerInfo SrcPtrInfo) {
4530 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4532 // Check to see if we should lower the memmove to loads and stores first.
4533 // For cases within the target-specified limits, this is the best choice.
4534 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4536 // Memmove with size zero? Just return the original chain.
4537 if (ConstantSize->isNullValue())
4541 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4542 ConstantSize->getZExtValue(), Align, isVol,
4543 false, DstPtrInfo, SrcPtrInfo);
4544 if (Result.getNode())
4548 // Then check to see if we should lower the memmove with target-specific
4549 // code. If the target chooses to do this, this is the next best.
4551 SDValue Result = TSI->EmitTargetCodeForMemmove(
4552 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4553 if (Result.getNode())
4557 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4558 // not be safe. See memcpy above for more details.
4560 // Emit a library call.
4561 TargetLowering::ArgListTy Args;
4562 TargetLowering::ArgListEntry Entry;
4563 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4564 Entry.Node = Dst; Args.push_back(Entry);
4565 Entry.Node = Src; Args.push_back(Entry);
4566 Entry.Node = Size; Args.push_back(Entry);
4567 // FIXME: pass in SDLoc
4568 TargetLowering::CallLoweringInfo CLI(*this);
4571 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4572 Type::getVoidTy(*getContext()),
4573 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4574 TLI->getPointerTy(getDataLayout())),
4577 .setTailCall(isTailCall);
4579 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4580 return CallResult.second;
4583 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4584 SDValue Src, SDValue Size,
4585 unsigned Align, bool isVol, bool isTailCall,
4586 MachinePointerInfo DstPtrInfo) {
4587 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4589 // Check to see if we should lower the memset to stores first.
4590 // For cases within the target-specified limits, this is the best choice.
4591 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4593 // Memset with size zero? Just return the original chain.
4594 if (ConstantSize->isNullValue())
4598 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4599 Align, isVol, DstPtrInfo);
4601 if (Result.getNode())
4605 // Then check to see if we should lower the memset with target-specific
4606 // code. If the target chooses to do this, this is the next best.
4608 SDValue Result = TSI->EmitTargetCodeForMemset(
4609 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4610 if (Result.getNode())
4614 // Emit a library call.
4615 Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
4616 TargetLowering::ArgListTy Args;
4617 TargetLowering::ArgListEntry Entry;
4618 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4619 Args.push_back(Entry);
4621 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4622 Args.push_back(Entry);
4624 Entry.Ty = IntPtrTy;
4625 Args.push_back(Entry);
4627 // FIXME: pass in SDLoc
4628 TargetLowering::CallLoweringInfo CLI(*this);
4631 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4632 Type::getVoidTy(*getContext()),
4633 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4634 TLI->getPointerTy(getDataLayout())),
4637 .setTailCall(isTailCall);
4639 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4640 return CallResult.second;
4643 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4644 SDVTList VTList, ArrayRef<SDValue> Ops,
4645 MachineMemOperand *MMO,
4646 AtomicOrdering SuccessOrdering,
4647 AtomicOrdering FailureOrdering,
4648 SynchronizationScope SynchScope) {
4649 FoldingSetNodeID ID;
4650 ID.AddInteger(MemVT.getRawBits());
4651 AddNodeIDNode(ID, Opcode, VTList, Ops);
4652 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4654 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4655 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4656 return SDValue(E, 0);
4659 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4660 // SDNode doesn't have access to it. This memory will be "leaked" when
4661 // the node is deallocated, but recovered when the allocator is released.
4662 // If the number of operands is less than 5 we use AtomicSDNode's internal
4664 unsigned NumOps = Ops.size();
4665 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4668 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4669 dl.getDebugLoc(), VTList, MemVT,
4670 Ops.data(), DynOps, NumOps, MMO,
4671 SuccessOrdering, FailureOrdering,
4673 CSEMap.InsertNode(N, IP);
4675 return SDValue(N, 0);
4678 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4679 SDVTList VTList, ArrayRef<SDValue> Ops,
4680 MachineMemOperand *MMO,
4681 AtomicOrdering Ordering,
4682 SynchronizationScope SynchScope) {
4683 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4684 Ordering, SynchScope);
4687 SDValue SelectionDAG::getAtomicCmpSwap(
4688 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4689 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4690 unsigned Alignment, AtomicOrdering SuccessOrdering,
4691 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4692 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4693 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4694 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4696 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4697 Alignment = getEVTAlignment(MemVT);
4699 MachineFunction &MF = getMachineFunction();
4701 // FIXME: Volatile isn't really correct; we should keep track of atomic
4702 // orderings in the memoperand.
4703 unsigned Flags = MachineMemOperand::MOVolatile;
4704 Flags |= MachineMemOperand::MOLoad;
4705 Flags |= MachineMemOperand::MOStore;
4707 MachineMemOperand *MMO =
4708 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4710 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4711 SuccessOrdering, FailureOrdering, SynchScope);
4714 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4715 SDVTList VTs, SDValue Chain, SDValue Ptr,
4716 SDValue Cmp, SDValue Swp,
4717 MachineMemOperand *MMO,
4718 AtomicOrdering SuccessOrdering,
4719 AtomicOrdering FailureOrdering,
4720 SynchronizationScope SynchScope) {
4721 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4722 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4723 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4725 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4726 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4727 SuccessOrdering, FailureOrdering, SynchScope);
4730 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4732 SDValue Ptr, SDValue Val,
4733 const Value* PtrVal,
4735 AtomicOrdering Ordering,
4736 SynchronizationScope SynchScope) {
4737 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4738 Alignment = getEVTAlignment(MemVT);
4740 MachineFunction &MF = getMachineFunction();
4741 // An atomic store does not load. An atomic load does not store.
4742 // (An atomicrmw obviously both loads and stores.)
4743 // For now, atomics are considered to be volatile always, and they are
4745 // FIXME: Volatile isn't really correct; we should keep track of atomic
4746 // orderings in the memoperand.
4747 unsigned Flags = MachineMemOperand::MOVolatile;
4748 if (Opcode != ISD::ATOMIC_STORE)
4749 Flags |= MachineMemOperand::MOLoad;
4750 if (Opcode != ISD::ATOMIC_LOAD)
4751 Flags |= MachineMemOperand::MOStore;
4753 MachineMemOperand *MMO =
4754 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4755 MemVT.getStoreSize(), Alignment);
4757 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4758 Ordering, SynchScope);
4761 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4763 SDValue Ptr, SDValue Val,
4764 MachineMemOperand *MMO,
4765 AtomicOrdering Ordering,
4766 SynchronizationScope SynchScope) {
4767 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4768 Opcode == ISD::ATOMIC_LOAD_SUB ||
4769 Opcode == ISD::ATOMIC_LOAD_AND ||
4770 Opcode == ISD::ATOMIC_LOAD_OR ||
4771 Opcode == ISD::ATOMIC_LOAD_XOR ||
4772 Opcode == ISD::ATOMIC_LOAD_NAND ||
4773 Opcode == ISD::ATOMIC_LOAD_MIN ||
4774 Opcode == ISD::ATOMIC_LOAD_MAX ||
4775 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4776 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4777 Opcode == ISD::ATOMIC_SWAP ||
4778 Opcode == ISD::ATOMIC_STORE) &&
4779 "Invalid Atomic Op");
4781 EVT VT = Val.getValueType();
4783 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4784 getVTList(VT, MVT::Other);
4785 SDValue Ops[] = {Chain, Ptr, Val};
4786 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4789 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4790 EVT VT, SDValue Chain,
4792 MachineMemOperand *MMO,
4793 AtomicOrdering Ordering,
4794 SynchronizationScope SynchScope) {
4795 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4797 SDVTList VTs = getVTList(VT, MVT::Other);
4798 SDValue Ops[] = {Chain, Ptr};
4799 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4802 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4803 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4804 if (Ops.size() == 1)
4807 SmallVector<EVT, 4> VTs;
4808 VTs.reserve(Ops.size());
4809 for (unsigned i = 0; i < Ops.size(); ++i)
4810 VTs.push_back(Ops[i].getValueType());
4811 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4815 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4816 ArrayRef<SDValue> Ops,
4817 EVT MemVT, MachinePointerInfo PtrInfo,
4818 unsigned Align, bool Vol,
4819 bool ReadMem, bool WriteMem, unsigned Size) {
4820 if (Align == 0) // Ensure that codegen never sees alignment 0
4821 Align = getEVTAlignment(MemVT);
4823 MachineFunction &MF = getMachineFunction();
4826 Flags |= MachineMemOperand::MOStore;
4828 Flags |= MachineMemOperand::MOLoad;
4830 Flags |= MachineMemOperand::MOVolatile;
4832 Size = MemVT.getStoreSize();
4833 MachineMemOperand *MMO =
4834 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4836 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4840 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4841 ArrayRef<SDValue> Ops, EVT MemVT,
4842 MachineMemOperand *MMO) {
4843 assert((Opcode == ISD::INTRINSIC_VOID ||
4844 Opcode == ISD::INTRINSIC_W_CHAIN ||
4845 Opcode == ISD::PREFETCH ||
4846 Opcode == ISD::LIFETIME_START ||
4847 Opcode == ISD::LIFETIME_END ||
4848 (Opcode <= INT_MAX &&
4849 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4850 "Opcode is not a memory-accessing opcode!");
4852 // Memoize the node unless it returns a flag.
4853 MemIntrinsicSDNode *N;
4854 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4855 FoldingSetNodeID ID;
4856 AddNodeIDNode(ID, Opcode, VTList, Ops);
4857 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4859 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4860 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4861 return SDValue(E, 0);
4864 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4865 dl.getDebugLoc(), VTList, Ops,
4867 CSEMap.InsertNode(N, IP);
4869 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4870 dl.getDebugLoc(), VTList, Ops,
4874 return SDValue(N, 0);
4877 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4878 /// MachinePointerInfo record from it. This is particularly useful because the
4879 /// code generator has many cases where it doesn't bother passing in a
4880 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4881 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4882 // If this is FI+Offset, we can model it.
4883 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4884 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4886 // If this is (FI+Offset1)+Offset2, we can model it.
4887 if (Ptr.getOpcode() != ISD::ADD ||
4888 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4889 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4890 return MachinePointerInfo();
4892 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4893 return MachinePointerInfo::getFixedStack(FI, Offset+
4894 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4897 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4898 /// MachinePointerInfo record from it. This is particularly useful because the
4899 /// code generator has many cases where it doesn't bother passing in a
4900 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4901 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4902 // If the 'Offset' value isn't a constant, we can't handle this.
4903 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4904 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4905 if (OffsetOp.getOpcode() == ISD::UNDEF)
4906 return InferPointerInfo(Ptr);
4907 return MachinePointerInfo();
4912 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4913 EVT VT, SDLoc dl, SDValue Chain,
4914 SDValue Ptr, SDValue Offset,
4915 MachinePointerInfo PtrInfo, EVT MemVT,
4916 bool isVolatile, bool isNonTemporal, bool isInvariant,
4917 unsigned Alignment, const AAMDNodes &AAInfo,
4918 const MDNode *Ranges) {
4919 assert(Chain.getValueType() == MVT::Other &&
4920 "Invalid chain type");
4921 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4922 Alignment = getEVTAlignment(VT);
4924 unsigned Flags = MachineMemOperand::MOLoad;
4926 Flags |= MachineMemOperand::MOVolatile;
4928 Flags |= MachineMemOperand::MONonTemporal;
4930 Flags |= MachineMemOperand::MOInvariant;
4932 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4934 if (PtrInfo.V.isNull())
4935 PtrInfo = InferPointerInfo(Ptr, Offset);
4937 MachineFunction &MF = getMachineFunction();
4938 MachineMemOperand *MMO =
4939 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4941 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4945 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4946 EVT VT, SDLoc dl, SDValue Chain,
4947 SDValue Ptr, SDValue Offset, EVT MemVT,
4948 MachineMemOperand *MMO) {
4950 ExtType = ISD::NON_EXTLOAD;
4951 } else if (ExtType == ISD::NON_EXTLOAD) {
4952 assert(VT == MemVT && "Non-extending load from different memory type!");
4955 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4956 "Should only be an extending load, not truncating!");
4957 assert(VT.isInteger() == MemVT.isInteger() &&
4958 "Cannot convert from FP to Int or Int -> FP!");
4959 assert(VT.isVector() == MemVT.isVector() &&
4960 "Cannot use an ext load to convert to or from a vector!");
4961 assert((!VT.isVector() ||
4962 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4963 "Cannot use an ext load to change the number of vector elements!");
4966 bool Indexed = AM != ISD::UNINDEXED;
4967 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4968 "Unindexed load with an offset!");
4970 SDVTList VTs = Indexed ?
4971 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4972 SDValue Ops[] = { Chain, Ptr, Offset };
4973 FoldingSetNodeID ID;
4974 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
4975 ID.AddInteger(MemVT.getRawBits());
4976 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4977 MMO->isNonTemporal(),
4978 MMO->isInvariant()));
4979 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4981 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4982 cast<LoadSDNode>(E)->refineAlignment(MMO);
4983 return SDValue(E, 0);
4985 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4986 dl.getDebugLoc(), VTs, AM, ExtType,
4988 CSEMap.InsertNode(N, IP);
4990 return SDValue(N, 0);
4993 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4994 SDValue Chain, SDValue Ptr,
4995 MachinePointerInfo PtrInfo,
4996 bool isVolatile, bool isNonTemporal,
4997 bool isInvariant, unsigned Alignment,
4998 const AAMDNodes &AAInfo,
4999 const MDNode *Ranges) {
5000 SDValue Undef = getUNDEF(Ptr.getValueType());
5001 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5002 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
5006 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5007 SDValue Chain, SDValue Ptr,
5008 MachineMemOperand *MMO) {
5009 SDValue Undef = getUNDEF(Ptr.getValueType());
5010 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5014 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5015 SDValue Chain, SDValue Ptr,
5016 MachinePointerInfo PtrInfo, EVT MemVT,
5017 bool isVolatile, bool isNonTemporal,
5018 bool isInvariant, unsigned Alignment,
5019 const AAMDNodes &AAInfo) {
5020 SDValue Undef = getUNDEF(Ptr.getValueType());
5021 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5022 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
5027 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5028 SDValue Chain, SDValue Ptr, EVT MemVT,
5029 MachineMemOperand *MMO) {
5030 SDValue Undef = getUNDEF(Ptr.getValueType());
5031 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5036 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
5037 SDValue Offset, ISD::MemIndexedMode AM) {
5038 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
5039 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
5040 "Load is already a indexed load!");
5041 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
5042 LD->getChain(), Base, Offset, LD->getPointerInfo(),
5043 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
5044 false, LD->getAlignment());
5047 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5048 SDValue Ptr, MachinePointerInfo PtrInfo,
5049 bool isVolatile, bool isNonTemporal,
5050 unsigned Alignment, const AAMDNodes &AAInfo) {
5051 assert(Chain.getValueType() == MVT::Other &&
5052 "Invalid chain type");
5053 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5054 Alignment = getEVTAlignment(Val.getValueType());
5056 unsigned Flags = MachineMemOperand::MOStore;
5058 Flags |= MachineMemOperand::MOVolatile;
5060 Flags |= MachineMemOperand::MONonTemporal;
5062 if (PtrInfo.V.isNull())
5063 PtrInfo = InferPointerInfo(Ptr);
5065 MachineFunction &MF = getMachineFunction();
5066 MachineMemOperand *MMO =
5067 MF.getMachineMemOperand(PtrInfo, Flags,
5068 Val.getValueType().getStoreSize(), Alignment,
5071 return getStore(Chain, dl, Val, Ptr, MMO);
5074 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5075 SDValue Ptr, MachineMemOperand *MMO) {
5076 assert(Chain.getValueType() == MVT::Other &&
5077 "Invalid chain type");
5078 EVT VT = Val.getValueType();
5079 SDVTList VTs = getVTList(MVT::Other);
5080 SDValue Undef = getUNDEF(Ptr.getValueType());
5081 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5082 FoldingSetNodeID ID;
5083 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5084 ID.AddInteger(VT.getRawBits());
5085 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5086 MMO->isNonTemporal(), MMO->isInvariant()));
5087 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5089 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5090 cast<StoreSDNode>(E)->refineAlignment(MMO);
5091 return SDValue(E, 0);
5093 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5094 dl.getDebugLoc(), VTs,
5095 ISD::UNINDEXED, false, VT, MMO);
5096 CSEMap.InsertNode(N, IP);
5098 return SDValue(N, 0);
5101 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5102 SDValue Ptr, MachinePointerInfo PtrInfo,
5103 EVT SVT,bool isVolatile, bool isNonTemporal,
5105 const AAMDNodes &AAInfo) {
5106 assert(Chain.getValueType() == MVT::Other &&
5107 "Invalid chain type");
5108 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5109 Alignment = getEVTAlignment(SVT);
5111 unsigned Flags = MachineMemOperand::MOStore;
5113 Flags |= MachineMemOperand::MOVolatile;
5115 Flags |= MachineMemOperand::MONonTemporal;
5117 if (PtrInfo.V.isNull())
5118 PtrInfo = InferPointerInfo(Ptr);
5120 MachineFunction &MF = getMachineFunction();
5121 MachineMemOperand *MMO =
5122 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
5125 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
5128 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5129 SDValue Ptr, EVT SVT,
5130 MachineMemOperand *MMO) {
5131 EVT VT = Val.getValueType();
5133 assert(Chain.getValueType() == MVT::Other &&
5134 "Invalid chain type");
5136 return getStore(Chain, dl, Val, Ptr, MMO);
5138 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
5139 "Should only be a truncating store, not extending!");
5140 assert(VT.isInteger() == SVT.isInteger() &&
5141 "Can't do FP-INT conversion!");
5142 assert(VT.isVector() == SVT.isVector() &&
5143 "Cannot use trunc store to convert to or from a vector!");
5144 assert((!VT.isVector() ||
5145 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
5146 "Cannot use trunc store to change the number of vector elements!");
5148 SDVTList VTs = getVTList(MVT::Other);
5149 SDValue Undef = getUNDEF(Ptr.getValueType());
5150 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5151 FoldingSetNodeID ID;
5152 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5153 ID.AddInteger(SVT.getRawBits());
5154 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
5155 MMO->isNonTemporal(), MMO->isInvariant()));
5156 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5158 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5159 cast<StoreSDNode>(E)->refineAlignment(MMO);
5160 return SDValue(E, 0);
5162 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5163 dl.getDebugLoc(), VTs,
5164 ISD::UNINDEXED, true, SVT, MMO);
5165 CSEMap.InsertNode(N, IP);
5167 return SDValue(N, 0);
5171 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5172 SDValue Offset, ISD::MemIndexedMode AM) {
5173 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5174 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5175 "Store is already a indexed store!");
5176 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5177 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5178 FoldingSetNodeID ID;
5179 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5180 ID.AddInteger(ST->getMemoryVT().getRawBits());
5181 ID.AddInteger(ST->getRawSubclassData());
5182 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5184 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
5185 return SDValue(E, 0);
5187 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5188 dl.getDebugLoc(), VTs, AM,
5189 ST->isTruncatingStore(),
5191 ST->getMemOperand());
5192 CSEMap.InsertNode(N, IP);
5194 return SDValue(N, 0);
5198 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5199 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5200 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5202 SDVTList VTs = getVTList(VT, MVT::Other);
5203 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5204 FoldingSetNodeID ID;
5205 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5206 ID.AddInteger(VT.getRawBits());
5207 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5209 MMO->isNonTemporal(),
5210 MMO->isInvariant()));
5211 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5213 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5214 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5215 return SDValue(E, 0);
5217 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5218 dl.getDebugLoc(), Ops, 4, VTs,
5220 CSEMap.InsertNode(N, IP);
5222 return SDValue(N, 0);
5225 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5226 SDValue Ptr, SDValue Mask, EVT MemVT,
5227 MachineMemOperand *MMO, bool isTrunc) {
5228 assert(Chain.getValueType() == MVT::Other &&
5229 "Invalid chain type");
5230 EVT VT = Val.getValueType();
5231 SDVTList VTs = getVTList(MVT::Other);
5232 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5233 FoldingSetNodeID ID;
5234 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5235 ID.AddInteger(VT.getRawBits());
5236 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5237 MMO->isNonTemporal(), MMO->isInvariant()));
5238 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5240 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5241 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5242 return SDValue(E, 0);
5244 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5245 dl.getDebugLoc(), Ops, 4,
5246 VTs, isTrunc, MemVT, MMO);
5247 CSEMap.InsertNode(N, IP);
5249 return SDValue(N, 0);
5253 SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl,
5254 ArrayRef<SDValue> Ops,
5255 MachineMemOperand *MMO) {
5257 FoldingSetNodeID ID;
5258 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
5259 ID.AddInteger(VT.getRawBits());
5260 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
5262 MMO->isNonTemporal(),
5263 MMO->isInvariant()));
5264 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5266 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5267 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5268 return SDValue(E, 0);
5270 MaskedGatherSDNode *N =
5271 new (NodeAllocator) MaskedGatherSDNode(dl.getIROrder(), dl.getDebugLoc(),
5273 CSEMap.InsertNode(N, IP);
5275 return SDValue(N, 0);
5278 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl,
5279 ArrayRef<SDValue> Ops,
5280 MachineMemOperand *MMO) {
5281 FoldingSetNodeID ID;
5282 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
5283 ID.AddInteger(VT.getRawBits());
5284 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5285 MMO->isNonTemporal(),
5286 MMO->isInvariant()));
5287 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5289 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5290 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5291 return SDValue(E, 0);
5294 new (NodeAllocator) MaskedScatterSDNode(dl.getIROrder(), dl.getDebugLoc(),
5296 CSEMap.InsertNode(N, IP);
5298 return SDValue(N, 0);
5301 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5302 SDValue Chain, SDValue Ptr,
5305 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
5306 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5309 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5310 ArrayRef<SDUse> Ops) {
5311 switch (Ops.size()) {
5312 case 0: return getNode(Opcode, DL, VT);
5313 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5314 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5315 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5319 // Copy from an SDUse array into an SDValue array for use with
5320 // the regular getNode logic.
5321 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5322 return getNode(Opcode, DL, VT, NewOps);
5325 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5326 ArrayRef<SDValue> Ops) {
5327 unsigned NumOps = Ops.size();
5329 case 0: return getNode(Opcode, DL, VT);
5330 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5331 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5332 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5338 case ISD::SELECT_CC: {
5339 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5340 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5341 "LHS and RHS of condition must have same type!");
5342 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5343 "True and False arms of SelectCC must have same type!");
5344 assert(Ops[2].getValueType() == VT &&
5345 "select_cc node must be of same type as true and false value!");
5349 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5350 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5351 "LHS/RHS of comparison should match types!");
5358 SDVTList VTs = getVTList(VT);
5360 if (VT != MVT::Glue) {
5361 FoldingSetNodeID ID;
5362 AddNodeIDNode(ID, Opcode, VTs, Ops);
5365 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5366 return SDValue(E, 0);
5368 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5370 CSEMap.InsertNode(N, IP);
5372 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5377 return SDValue(N, 0);
5380 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5381 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5382 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5385 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5386 ArrayRef<SDValue> Ops) {
5387 if (VTList.NumVTs == 1)
5388 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5392 // FIXME: figure out how to safely handle things like
5393 // int foo(int x) { return 1 << (x & 255); }
5394 // int bar() { return foo(256); }
5395 case ISD::SRA_PARTS:
5396 case ISD::SRL_PARTS:
5397 case ISD::SHL_PARTS:
5398 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5399 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5400 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5401 else if (N3.getOpcode() == ISD::AND)
5402 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5403 // If the and is only masking out bits that cannot effect the shift,
5404 // eliminate the and.
5405 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5406 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5407 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5413 // Memoize the node unless it returns a flag.
5415 unsigned NumOps = Ops.size();
5416 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5417 FoldingSetNodeID ID;
5418 AddNodeIDNode(ID, Opcode, VTList, Ops);
5420 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5421 return SDValue(E, 0);
5424 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5425 DL.getDebugLoc(), VTList, Ops[0]);
5426 } else if (NumOps == 2) {
5427 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5428 DL.getDebugLoc(), VTList, Ops[0],
5430 } else if (NumOps == 3) {
5431 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5432 DL.getDebugLoc(), VTList, Ops[0],
5435 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5438 CSEMap.InsertNode(N, IP);
5441 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5442 DL.getDebugLoc(), VTList, Ops[0]);
5443 } else if (NumOps == 2) {
5444 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5445 DL.getDebugLoc(), VTList, Ops[0],
5447 } else if (NumOps == 3) {
5448 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5449 DL.getDebugLoc(), VTList, Ops[0],
5452 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5457 return SDValue(N, 0);
5460 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5461 return getNode(Opcode, DL, VTList, None);
5464 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5466 SDValue Ops[] = { N1 };
5467 return getNode(Opcode, DL, VTList, Ops);
5470 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5471 SDValue N1, SDValue N2) {
5472 SDValue Ops[] = { N1, N2 };
5473 return getNode(Opcode, DL, VTList, Ops);
5476 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5477 SDValue N1, SDValue N2, SDValue N3) {
5478 SDValue Ops[] = { N1, N2, N3 };
5479 return getNode(Opcode, DL, VTList, Ops);
5482 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5483 SDValue N1, SDValue N2, SDValue N3,
5485 SDValue Ops[] = { N1, N2, N3, N4 };
5486 return getNode(Opcode, DL, VTList, Ops);
5489 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5490 SDValue N1, SDValue N2, SDValue N3,
5491 SDValue N4, SDValue N5) {
5492 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5493 return getNode(Opcode, DL, VTList, Ops);
5496 SDVTList SelectionDAG::getVTList(EVT VT) {
5497 return makeVTList(SDNode::getValueTypeList(VT), 1);
5500 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5501 FoldingSetNodeID ID;
5503 ID.AddInteger(VT1.getRawBits());
5504 ID.AddInteger(VT2.getRawBits());
5507 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5509 EVT *Array = Allocator.Allocate<EVT>(2);
5512 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5513 VTListMap.InsertNode(Result, IP);
5515 return Result->getSDVTList();
5518 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5519 FoldingSetNodeID ID;
5521 ID.AddInteger(VT1.getRawBits());
5522 ID.AddInteger(VT2.getRawBits());
5523 ID.AddInteger(VT3.getRawBits());
5526 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5528 EVT *Array = Allocator.Allocate<EVT>(3);
5532 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5533 VTListMap.InsertNode(Result, IP);
5535 return Result->getSDVTList();
5538 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5539 FoldingSetNodeID ID;
5541 ID.AddInteger(VT1.getRawBits());
5542 ID.AddInteger(VT2.getRawBits());
5543 ID.AddInteger(VT3.getRawBits());
5544 ID.AddInteger(VT4.getRawBits());
5547 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5549 EVT *Array = Allocator.Allocate<EVT>(4);
5554 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5555 VTListMap.InsertNode(Result, IP);
5557 return Result->getSDVTList();
5560 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5561 unsigned NumVTs = VTs.size();
5562 FoldingSetNodeID ID;
5563 ID.AddInteger(NumVTs);
5564 for (unsigned index = 0; index < NumVTs; index++) {
5565 ID.AddInteger(VTs[index].getRawBits());
5569 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5571 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5572 std::copy(VTs.begin(), VTs.end(), Array);
5573 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5574 VTListMap.InsertNode(Result, IP);
5576 return Result->getSDVTList();
5580 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5581 /// specified operands. If the resultant node already exists in the DAG,
5582 /// this does not modify the specified node, instead it returns the node that
5583 /// already exists. If the resultant node does not exist in the DAG, the
5584 /// input node is returned. As a degenerate case, if you specify the same
5585 /// input operands as the node already has, the input node is returned.
5586 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5587 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5589 // Check to see if there is no change.
5590 if (Op == N->getOperand(0)) return N;
5592 // See if the modified node already exists.
5593 void *InsertPos = nullptr;
5594 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5597 // Nope it doesn't. Remove the node from its current place in the maps.
5599 if (!RemoveNodeFromCSEMaps(N))
5600 InsertPos = nullptr;
5602 // Now we update the operands.
5603 N->OperandList[0].set(Op);
5605 // If this gets put into a CSE map, add it.
5606 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5610 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5611 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5613 // Check to see if there is no change.
5614 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5615 return N; // No operands changed, just return the input node.
5617 // See if the modified node already exists.
5618 void *InsertPos = nullptr;
5619 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5622 // Nope it doesn't. Remove the node from its current place in the maps.
5624 if (!RemoveNodeFromCSEMaps(N))
5625 InsertPos = nullptr;
5627 // Now we update the operands.
5628 if (N->OperandList[0] != Op1)
5629 N->OperandList[0].set(Op1);
5630 if (N->OperandList[1] != Op2)
5631 N->OperandList[1].set(Op2);
5633 // If this gets put into a CSE map, add it.
5634 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5638 SDNode *SelectionDAG::
5639 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5640 SDValue Ops[] = { Op1, Op2, Op3 };
5641 return UpdateNodeOperands(N, Ops);
5644 SDNode *SelectionDAG::
5645 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5646 SDValue Op3, SDValue Op4) {
5647 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5648 return UpdateNodeOperands(N, Ops);
5651 SDNode *SelectionDAG::
5652 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5653 SDValue Op3, SDValue Op4, SDValue Op5) {
5654 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5655 return UpdateNodeOperands(N, Ops);
5658 SDNode *SelectionDAG::
5659 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5660 unsigned NumOps = Ops.size();
5661 assert(N->getNumOperands() == NumOps &&
5662 "Update with wrong number of operands");
5664 // If no operands changed just return the input node.
5665 if (Ops.empty() || std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5668 // See if the modified node already exists.
5669 void *InsertPos = nullptr;
5670 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5673 // Nope it doesn't. Remove the node from its current place in the maps.
5675 if (!RemoveNodeFromCSEMaps(N))
5676 InsertPos = nullptr;
5678 // Now we update the operands.
5679 for (unsigned i = 0; i != NumOps; ++i)
5680 if (N->OperandList[i] != Ops[i])
5681 N->OperandList[i].set(Ops[i]);
5683 // If this gets put into a CSE map, add it.
5684 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5688 /// DropOperands - Release the operands and set this node to have
5690 void SDNode::DropOperands() {
5691 // Unlike the code in MorphNodeTo that does this, we don't need to
5692 // watch for dead nodes here.
5693 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5699 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5702 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5704 SDVTList VTs = getVTList(VT);
5705 return SelectNodeTo(N, MachineOpc, VTs, None);
5708 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5709 EVT VT, SDValue Op1) {
5710 SDVTList VTs = getVTList(VT);
5711 SDValue Ops[] = { Op1 };
5712 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5715 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5716 EVT VT, SDValue Op1,
5718 SDVTList VTs = getVTList(VT);
5719 SDValue Ops[] = { Op1, Op2 };
5720 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5723 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5724 EVT VT, SDValue Op1,
5725 SDValue Op2, SDValue Op3) {
5726 SDVTList VTs = getVTList(VT);
5727 SDValue Ops[] = { Op1, Op2, Op3 };
5728 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5731 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5732 EVT VT, ArrayRef<SDValue> Ops) {
5733 SDVTList VTs = getVTList(VT);
5734 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5737 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5738 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5739 SDVTList VTs = getVTList(VT1, VT2);
5740 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5743 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5745 SDVTList VTs = getVTList(VT1, VT2);
5746 return SelectNodeTo(N, MachineOpc, VTs, None);
5749 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5750 EVT VT1, EVT VT2, EVT VT3,
5751 ArrayRef<SDValue> Ops) {
5752 SDVTList VTs = getVTList(VT1, VT2, VT3);
5753 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5756 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5757 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5758 ArrayRef<SDValue> Ops) {
5759 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5760 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5763 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5766 SDVTList VTs = getVTList(VT1, VT2);
5767 SDValue Ops[] = { Op1 };
5768 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5771 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5773 SDValue Op1, SDValue Op2) {
5774 SDVTList VTs = getVTList(VT1, VT2);
5775 SDValue Ops[] = { Op1, Op2 };
5776 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5779 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5781 SDValue Op1, SDValue Op2,
5783 SDVTList VTs = getVTList(VT1, VT2);
5784 SDValue Ops[] = { Op1, Op2, Op3 };
5785 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5788 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5789 EVT VT1, EVT VT2, EVT VT3,
5790 SDValue Op1, SDValue Op2,
5792 SDVTList VTs = getVTList(VT1, VT2, VT3);
5793 SDValue Ops[] = { Op1, Op2, Op3 };
5794 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5797 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5798 SDVTList VTs,ArrayRef<SDValue> Ops) {
5799 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5800 // Reset the NodeID to -1.
5805 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5806 /// the line number information on the merged node since it is not possible to
5807 /// preserve the information that operation is associated with multiple lines.
5808 /// This will make the debugger working better at -O0, were there is a higher
5809 /// probability having other instructions associated with that line.
5811 /// For IROrder, we keep the smaller of the two
5812 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5813 DebugLoc NLoc = N->getDebugLoc();
5814 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5815 N->setDebugLoc(DebugLoc());
5817 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5818 N->setIROrder(Order);
5822 /// MorphNodeTo - This *mutates* the specified node to have the specified
5823 /// return type, opcode, and operands.
5825 /// Note that MorphNodeTo returns the resultant node. If there is already a
5826 /// node of the specified opcode and operands, it returns that node instead of
5827 /// the current one. Note that the SDLoc need not be the same.
5829 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5830 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5831 /// node, and because it doesn't require CSE recalculation for any of
5832 /// the node's users.
5834 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5835 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5836 /// the legalizer which maintain worklists that would need to be updated when
5837 /// deleting things.
5838 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5839 SDVTList VTs, ArrayRef<SDValue> Ops) {
5840 unsigned NumOps = Ops.size();
5841 // If an identical node already exists, use it.
5843 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5844 FoldingSetNodeID ID;
5845 AddNodeIDNode(ID, Opc, VTs, Ops);
5846 if (SDNode *ON = FindNodeOrInsertPos(ID, N->getDebugLoc(), IP))
5847 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5850 if (!RemoveNodeFromCSEMaps(N))
5853 // Start the morphing.
5855 N->ValueList = VTs.VTs;
5856 N->NumValues = VTs.NumVTs;
5858 // Clear the operands list, updating used nodes to remove this from their
5859 // use list. Keep track of any operands that become dead as a result.
5860 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5861 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5863 SDNode *Used = Use.getNode();
5865 if (Used->use_empty())
5866 DeadNodeSet.insert(Used);
5869 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5870 // Initialize the memory references information.
5871 MN->setMemRefs(nullptr, nullptr);
5872 // If NumOps is larger than the # of operands we can have in a
5873 // MachineSDNode, reallocate the operand list.
5874 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5875 if (MN->OperandsNeedDelete)
5876 delete[] MN->OperandList;
5877 if (NumOps > array_lengthof(MN->LocalOperands))
5878 // We're creating a final node that will live unmorphed for the
5879 // remainder of the current SelectionDAG iteration, so we can allocate
5880 // the operands directly out of a pool with no recycling metadata.
5881 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5882 Ops.data(), NumOps);
5884 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5885 MN->OperandsNeedDelete = false;
5887 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5889 // If NumOps is larger than the # of operands we currently have, reallocate
5890 // the operand list.
5891 if (NumOps > N->NumOperands) {
5892 if (N->OperandsNeedDelete)
5893 delete[] N->OperandList;
5894 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5895 N->OperandsNeedDelete = true;
5897 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5900 // Delete any nodes that are still dead after adding the uses for the
5902 if (!DeadNodeSet.empty()) {
5903 SmallVector<SDNode *, 16> DeadNodes;
5904 for (SDNode *N : DeadNodeSet)
5906 DeadNodes.push_back(N);
5907 RemoveDeadNodes(DeadNodes);
5911 CSEMap.InsertNode(N, IP); // Memoize the new node.
5916 /// getMachineNode - These are used for target selectors to create a new node
5917 /// with specified return type(s), MachineInstr opcode, and operands.
5919 /// Note that getMachineNode returns the resultant node. If there is already a
5920 /// node of the specified opcode and operands, it returns that node instead of
5921 /// the current one.
5923 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5924 SDVTList VTs = getVTList(VT);
5925 return getMachineNode(Opcode, dl, VTs, None);
5929 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5930 SDVTList VTs = getVTList(VT);
5931 SDValue Ops[] = { Op1 };
5932 return getMachineNode(Opcode, dl, VTs, Ops);
5936 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5937 SDValue Op1, SDValue Op2) {
5938 SDVTList VTs = getVTList(VT);
5939 SDValue Ops[] = { Op1, Op2 };
5940 return getMachineNode(Opcode, dl, VTs, Ops);
5944 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5945 SDValue Op1, SDValue Op2, SDValue Op3) {
5946 SDVTList VTs = getVTList(VT);
5947 SDValue Ops[] = { Op1, Op2, Op3 };
5948 return getMachineNode(Opcode, dl, VTs, Ops);
5952 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5953 ArrayRef<SDValue> Ops) {
5954 SDVTList VTs = getVTList(VT);
5955 return getMachineNode(Opcode, dl, VTs, Ops);
5959 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5960 SDVTList VTs = getVTList(VT1, VT2);
5961 return getMachineNode(Opcode, dl, VTs, None);
5965 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5966 EVT VT1, EVT VT2, SDValue Op1) {
5967 SDVTList VTs = getVTList(VT1, VT2);
5968 SDValue Ops[] = { Op1 };
5969 return getMachineNode(Opcode, dl, VTs, Ops);
5973 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5974 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5975 SDVTList VTs = getVTList(VT1, VT2);
5976 SDValue Ops[] = { Op1, Op2 };
5977 return getMachineNode(Opcode, dl, VTs, Ops);
5981 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5982 EVT VT1, EVT VT2, SDValue Op1,
5983 SDValue Op2, SDValue Op3) {
5984 SDVTList VTs = getVTList(VT1, VT2);
5985 SDValue Ops[] = { Op1, Op2, Op3 };
5986 return getMachineNode(Opcode, dl, VTs, Ops);
5990 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5992 ArrayRef<SDValue> Ops) {
5993 SDVTList VTs = getVTList(VT1, VT2);
5994 return getMachineNode(Opcode, dl, VTs, Ops);
5998 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5999 EVT VT1, EVT VT2, EVT VT3,
6000 SDValue Op1, SDValue Op2) {
6001 SDVTList VTs = getVTList(VT1, VT2, VT3);
6002 SDValue Ops[] = { Op1, Op2 };
6003 return getMachineNode(Opcode, dl, VTs, Ops);
6007 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6008 EVT VT1, EVT VT2, EVT VT3,
6009 SDValue Op1, SDValue Op2, SDValue Op3) {
6010 SDVTList VTs = getVTList(VT1, VT2, VT3);
6011 SDValue Ops[] = { Op1, Op2, Op3 };
6012 return getMachineNode(Opcode, dl, VTs, Ops);
6016 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6017 EVT VT1, EVT VT2, EVT VT3,
6018 ArrayRef<SDValue> Ops) {
6019 SDVTList VTs = getVTList(VT1, VT2, VT3);
6020 return getMachineNode(Opcode, dl, VTs, Ops);
6024 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
6025 EVT VT2, EVT VT3, EVT VT4,
6026 ArrayRef<SDValue> Ops) {
6027 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
6028 return getMachineNode(Opcode, dl, VTs, Ops);
6032 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6033 ArrayRef<EVT> ResultTys,
6034 ArrayRef<SDValue> Ops) {
6035 SDVTList VTs = getVTList(ResultTys);
6036 return getMachineNode(Opcode, dl, VTs, Ops);
6040 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
6041 ArrayRef<SDValue> OpsArray) {
6042 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
6045 const SDValue *Ops = OpsArray.data();
6046 unsigned NumOps = OpsArray.size();
6049 FoldingSetNodeID ID;
6050 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
6052 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)) {
6053 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
6057 // Allocate a new MachineSDNode.
6058 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
6059 DL.getDebugLoc(), VTs);
6061 // Initialize the operands list.
6062 if (NumOps > array_lengthof(N->LocalOperands))
6063 // We're creating a final node that will live unmorphed for the
6064 // remainder of the current SelectionDAG iteration, so we can allocate
6065 // the operands directly out of a pool with no recycling metadata.
6066 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
6069 N->InitOperands(N->LocalOperands, Ops, NumOps);
6070 N->OperandsNeedDelete = false;
6073 CSEMap.InsertNode(N, IP);
6079 /// getTargetExtractSubreg - A convenience function for creating
6080 /// TargetOpcode::EXTRACT_SUBREG nodes.
6082 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
6084 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6085 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
6086 VT, Operand, SRIdxVal);
6087 return SDValue(Subreg, 0);
6090 /// getTargetInsertSubreg - A convenience function for creating
6091 /// TargetOpcode::INSERT_SUBREG nodes.
6093 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
6094 SDValue Operand, SDValue Subreg) {
6095 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6096 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
6097 VT, Operand, Subreg, SRIdxVal);
6098 return SDValue(Result, 0);
6101 /// getNodeIfExists - Get the specified node if it's already available, or
6102 /// else return NULL.
6103 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
6104 ArrayRef<SDValue> Ops,
6105 const SDNodeFlags *Flags) {
6106 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
6107 FoldingSetNodeID ID;
6108 AddNodeIDNode(ID, Opcode, VTList, Ops);
6109 AddNodeIDFlags(ID, Opcode, Flags);
6111 if (SDNode *E = FindNodeOrInsertPos(ID, DebugLoc(), IP))
6117 /// getDbgValue - Creates a SDDbgValue node.
6120 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
6121 unsigned R, bool IsIndirect, uint64_t Off,
6122 DebugLoc DL, unsigned O) {
6123 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6124 "Expected inlined-at fields to agree");
6125 return new (DbgInfo->getAlloc())
6126 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6130 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
6131 const Value *C, uint64_t Off,
6132 DebugLoc DL, unsigned O) {
6133 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6134 "Expected inlined-at fields to agree");
6135 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, Off, DL, O);
6139 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
6140 unsigned FI, uint64_t Off,
6141 DebugLoc DL, unsigned O) {
6142 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6143 "Expected inlined-at fields to agree");
6144 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, FI, Off, DL, O);
6149 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
6150 /// pointed to by a use iterator is deleted, increment the use iterator
6151 /// so that it doesn't dangle.
6153 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
6154 SDNode::use_iterator &UI;
6155 SDNode::use_iterator &UE;
6157 void NodeDeleted(SDNode *N, SDNode *E) override {
6158 // Increment the iterator as needed.
6159 while (UI != UE && N == *UI)
6164 RAUWUpdateListener(SelectionDAG &d,
6165 SDNode::use_iterator &ui,
6166 SDNode::use_iterator &ue)
6167 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6172 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6173 /// This can cause recursive merging of nodes in the DAG.
6175 /// This version assumes From has a single result value.
6177 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
6178 SDNode *From = FromN.getNode();
6179 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6180 "Cannot replace with this method!");
6181 assert(From != To.getNode() && "Cannot replace uses of with self");
6183 // Iterate over all the existing uses of From. New uses will be added
6184 // to the beginning of the use list, which we avoid visiting.
6185 // This specifically avoids visiting uses of From that arise while the
6186 // replacement is happening, because any such uses would be the result
6187 // of CSE: If an existing node looks like From after one of its operands
6188 // is replaced by To, we don't want to replace of all its users with To
6189 // too. See PR3018 for more info.
6190 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6191 RAUWUpdateListener Listener(*this, UI, UE);
6195 // This node is about to morph, remove its old self from the CSE maps.
6196 RemoveNodeFromCSEMaps(User);
6198 // A user can appear in a use list multiple times, and when this
6199 // happens the uses are usually next to each other in the list.
6200 // To help reduce the number of CSE recomputations, process all
6201 // the uses of this user that we can find this way.
6203 SDUse &Use = UI.getUse();
6206 } while (UI != UE && *UI == User);
6208 // Now that we have modified User, add it back to the CSE maps. If it
6209 // already exists there, recursively merge the results together.
6210 AddModifiedNodeToCSEMaps(User);
6213 // If we just RAUW'd the root, take note.
6214 if (FromN == getRoot())
6218 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6219 /// This can cause recursive merging of nodes in the DAG.
6221 /// This version assumes that for each value of From, there is a
6222 /// corresponding value in To in the same position with the same type.
6224 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6226 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6227 assert((!From->hasAnyUseOfValue(i) ||
6228 From->getValueType(i) == To->getValueType(i)) &&
6229 "Cannot use this version of ReplaceAllUsesWith!");
6232 // Handle the trivial case.
6236 // Iterate over just the existing users of From. See the comments in
6237 // the ReplaceAllUsesWith above.
6238 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6239 RAUWUpdateListener Listener(*this, UI, UE);
6243 // This node is about to morph, remove its old self from the CSE maps.
6244 RemoveNodeFromCSEMaps(User);
6246 // A user can appear in a use list multiple times, and when this
6247 // happens the uses are usually next to each other in the list.
6248 // To help reduce the number of CSE recomputations, process all
6249 // the uses of this user that we can find this way.
6251 SDUse &Use = UI.getUse();
6254 } while (UI != UE && *UI == User);
6256 // Now that we have modified User, add it back to the CSE maps. If it
6257 // already exists there, recursively merge the results together.
6258 AddModifiedNodeToCSEMaps(User);
6261 // If we just RAUW'd the root, take note.
6262 if (From == getRoot().getNode())
6263 setRoot(SDValue(To, getRoot().getResNo()));
6266 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6267 /// This can cause recursive merging of nodes in the DAG.
6269 /// This version can replace From with any result values. To must match the
6270 /// number and types of values returned by From.
6271 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6272 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6273 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6275 // Iterate over just the existing users of From. See the comments in
6276 // the ReplaceAllUsesWith above.
6277 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6278 RAUWUpdateListener Listener(*this, UI, UE);
6282 // This node is about to morph, remove its old self from the CSE maps.
6283 RemoveNodeFromCSEMaps(User);
6285 // A user can appear in a use list multiple times, and when this
6286 // happens the uses are usually next to each other in the list.
6287 // To help reduce the number of CSE recomputations, process all
6288 // the uses of this user that we can find this way.
6290 SDUse &Use = UI.getUse();
6291 const SDValue &ToOp = To[Use.getResNo()];
6294 } while (UI != UE && *UI == User);
6296 // Now that we have modified User, add it back to the CSE maps. If it
6297 // already exists there, recursively merge the results together.
6298 AddModifiedNodeToCSEMaps(User);
6301 // If we just RAUW'd the root, take note.
6302 if (From == getRoot().getNode())
6303 setRoot(SDValue(To[getRoot().getResNo()]));
6306 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6307 /// uses of other values produced by From.getNode() alone. The Deleted
6308 /// vector is handled the same way as for ReplaceAllUsesWith.
6309 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6310 // Handle the really simple, really trivial case efficiently.
6311 if (From == To) return;
6313 // Handle the simple, trivial, case efficiently.
6314 if (From.getNode()->getNumValues() == 1) {
6315 ReplaceAllUsesWith(From, To);
6319 // Iterate over just the existing users of From. See the comments in
6320 // the ReplaceAllUsesWith above.
6321 SDNode::use_iterator UI = From.getNode()->use_begin(),
6322 UE = From.getNode()->use_end();
6323 RAUWUpdateListener Listener(*this, UI, UE);
6326 bool UserRemovedFromCSEMaps = false;
6328 // A user can appear in a use list multiple times, and when this
6329 // happens the uses are usually next to each other in the list.
6330 // To help reduce the number of CSE recomputations, process all
6331 // the uses of this user that we can find this way.
6333 SDUse &Use = UI.getUse();
6335 // Skip uses of different values from the same node.
6336 if (Use.getResNo() != From.getResNo()) {
6341 // If this node hasn't been modified yet, it's still in the CSE maps,
6342 // so remove its old self from the CSE maps.
6343 if (!UserRemovedFromCSEMaps) {
6344 RemoveNodeFromCSEMaps(User);
6345 UserRemovedFromCSEMaps = true;
6350 } while (UI != UE && *UI == User);
6352 // We are iterating over all uses of the From node, so if a use
6353 // doesn't use the specific value, no changes are made.
6354 if (!UserRemovedFromCSEMaps)
6357 // Now that we have modified User, add it back to the CSE maps. If it
6358 // already exists there, recursively merge the results together.
6359 AddModifiedNodeToCSEMaps(User);
6362 // If we just RAUW'd the root, take note.
6363 if (From == getRoot())
6368 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6369 /// to record information about a use.
6376 /// operator< - Sort Memos by User.
6377 bool operator<(const UseMemo &L, const UseMemo &R) {
6378 return (intptr_t)L.User < (intptr_t)R.User;
6382 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6383 /// uses of other values produced by From.getNode() alone. The same value
6384 /// may appear in both the From and To list. The Deleted vector is
6385 /// handled the same way as for ReplaceAllUsesWith.
6386 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6389 // Handle the simple, trivial case efficiently.
6391 return ReplaceAllUsesOfValueWith(*From, *To);
6393 // Read up all the uses and make records of them. This helps
6394 // processing new uses that are introduced during the
6395 // replacement process.
6396 SmallVector<UseMemo, 4> Uses;
6397 for (unsigned i = 0; i != Num; ++i) {
6398 unsigned FromResNo = From[i].getResNo();
6399 SDNode *FromNode = From[i].getNode();
6400 for (SDNode::use_iterator UI = FromNode->use_begin(),
6401 E = FromNode->use_end(); UI != E; ++UI) {
6402 SDUse &Use = UI.getUse();
6403 if (Use.getResNo() == FromResNo) {
6404 UseMemo Memo = { *UI, i, &Use };
6405 Uses.push_back(Memo);
6410 // Sort the uses, so that all the uses from a given User are together.
6411 std::sort(Uses.begin(), Uses.end());
6413 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6414 UseIndex != UseIndexEnd; ) {
6415 // We know that this user uses some value of From. If it is the right
6416 // value, update it.
6417 SDNode *User = Uses[UseIndex].User;
6419 // This node is about to morph, remove its old self from the CSE maps.
6420 RemoveNodeFromCSEMaps(User);
6422 // The Uses array is sorted, so all the uses for a given User
6423 // are next to each other in the list.
6424 // To help reduce the number of CSE recomputations, process all
6425 // the uses of this user that we can find this way.
6427 unsigned i = Uses[UseIndex].Index;
6428 SDUse &Use = *Uses[UseIndex].Use;
6432 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6434 // Now that we have modified User, add it back to the CSE maps. If it
6435 // already exists there, recursively merge the results together.
6436 AddModifiedNodeToCSEMaps(User);
6440 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6441 /// based on their topological order. It returns the maximum id and a vector
6442 /// of the SDNodes* in assigned order by reference.
6443 unsigned SelectionDAG::AssignTopologicalOrder() {
6445 unsigned DAGSize = 0;
6447 // SortedPos tracks the progress of the algorithm. Nodes before it are
6448 // sorted, nodes after it are unsorted. When the algorithm completes
6449 // it is at the end of the list.
6450 allnodes_iterator SortedPos = allnodes_begin();
6452 // Visit all the nodes. Move nodes with no operands to the front of
6453 // the list immediately. Annotate nodes that do have operands with their
6454 // operand count. Before we do this, the Node Id fields of the nodes
6455 // may contain arbitrary values. After, the Node Id fields for nodes
6456 // before SortedPos will contain the topological sort index, and the
6457 // Node Id fields for nodes At SortedPos and after will contain the
6458 // count of outstanding operands.
6459 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6461 checkForCycles(N, this);
6462 unsigned Degree = N->getNumOperands();
6464 // A node with no uses, add it to the result array immediately.
6465 N->setNodeId(DAGSize++);
6466 allnodes_iterator Q = N;
6468 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6469 assert(SortedPos != AllNodes.end() && "Overran node list");
6472 // Temporarily use the Node Id as scratch space for the degree count.
6473 N->setNodeId(Degree);
6477 // Visit all the nodes. As we iterate, move nodes into sorted order,
6478 // such that by the time the end is reached all nodes will be sorted.
6479 for (SDNode &Node : allnodes()) {
6481 checkForCycles(N, this);
6482 // N is in sorted position, so all its uses have one less operand
6483 // that needs to be sorted.
6484 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6487 unsigned Degree = P->getNodeId();
6488 assert(Degree != 0 && "Invalid node degree");
6491 // All of P's operands are sorted, so P may sorted now.
6492 P->setNodeId(DAGSize++);
6494 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6495 assert(SortedPos != AllNodes.end() && "Overran node list");
6498 // Update P's outstanding operand count.
6499 P->setNodeId(Degree);
6502 if (&Node == SortedPos) {
6504 allnodes_iterator I = N;
6506 dbgs() << "Overran sorted position:\n";
6507 S->dumprFull(this); dbgs() << "\n";
6508 dbgs() << "Checking if this is due to cycles\n";
6509 checkForCycles(this, true);
6511 llvm_unreachable(nullptr);
6515 assert(SortedPos == AllNodes.end() &&
6516 "Topological sort incomplete!");
6517 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6518 "First node in topological sort is not the entry token!");
6519 assert(AllNodes.front().getNodeId() == 0 &&
6520 "First node in topological sort has non-zero id!");
6521 assert(AllNodes.front().getNumOperands() == 0 &&
6522 "First node in topological sort has operands!");
6523 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6524 "Last node in topologic sort has unexpected id!");
6525 assert(AllNodes.back().use_empty() &&
6526 "Last node in topologic sort has users!");
6527 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6531 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6532 /// value is produced by SD.
6533 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6535 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6536 SD->setHasDebugValue(true);
6538 DbgInfo->add(DB, SD, isParameter);
6541 /// TransferDbgValues - Transfer SDDbgValues.
6542 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6543 if (From == To || !From.getNode()->getHasDebugValue())
6545 SDNode *FromNode = From.getNode();
6546 SDNode *ToNode = To.getNode();
6547 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6548 SmallVector<SDDbgValue *, 2> ClonedDVs;
6549 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6551 SDDbgValue *Dbg = *I;
6552 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6554 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6555 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6556 Dbg->getDebugLoc(), Dbg->getOrder());
6557 ClonedDVs.push_back(Clone);
6560 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6561 E = ClonedDVs.end(); I != E; ++I)
6562 AddDbgValue(*I, ToNode, false);
6565 //===----------------------------------------------------------------------===//
6567 //===----------------------------------------------------------------------===//
6569 HandleSDNode::~HandleSDNode() {
6573 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6574 DebugLoc DL, const GlobalValue *GA,
6575 EVT VT, int64_t o, unsigned char TF)
6576 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6580 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6581 SDValue X, unsigned SrcAS,
6583 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6584 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6586 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6587 EVT memvt, MachineMemOperand *mmo)
6588 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6589 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6590 MMO->isNonTemporal(), MMO->isInvariant());
6591 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6592 assert(isNonTemporal() == MMO->isNonTemporal() &&
6593 "Non-temporal encoding error!");
6594 // We check here that the size of the memory operand fits within the size of
6595 // the MMO. This is because the MMO might indicate only a possible address
6596 // range instead of specifying the affected memory addresses precisely.
6597 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6600 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6601 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6602 : SDNode(Opc, Order, dl, VTs, Ops),
6603 MemoryVT(memvt), MMO(mmo) {
6604 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6605 MMO->isNonTemporal(), MMO->isInvariant());
6606 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6607 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6610 /// Profile - Gather unique data for the node.
6612 void SDNode::Profile(FoldingSetNodeID &ID) const {
6613 AddNodeIDNode(ID, this);
6618 std::vector<EVT> VTs;
6621 VTs.reserve(MVT::LAST_VALUETYPE);
6622 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6623 VTs.push_back(MVT((MVT::SimpleValueType)i));
6628 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6629 static ManagedStatic<EVTArray> SimpleVTArray;
6630 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6632 /// getValueTypeList - Return a pointer to the specified value type.
6634 const EVT *SDNode::getValueTypeList(EVT VT) {
6635 if (VT.isExtended()) {
6636 sys::SmartScopedLock<true> Lock(*VTMutex);
6637 return &(*EVTs->insert(VT).first);
6639 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6640 "Value type out of range!");
6641 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6645 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6646 /// indicated value. This method ignores uses of other values defined by this
6648 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6649 assert(Value < getNumValues() && "Bad value!");
6651 // TODO: Only iterate over uses of a given value of the node
6652 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6653 if (UI.getUse().getResNo() == Value) {
6660 // Found exactly the right number of uses?
6665 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6666 /// value. This method ignores uses of other values defined by this operation.
6667 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6668 assert(Value < getNumValues() && "Bad value!");
6670 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6671 if (UI.getUse().getResNo() == Value)
6678 /// isOnlyUserOf - Return true if this node is the only use of N.
6680 bool SDNode::isOnlyUserOf(const SDNode *N) const {
6682 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6693 /// isOperand - Return true if this node is an operand of N.
6695 bool SDValue::isOperandOf(const SDNode *N) const {
6696 for (const SDValue &Op : N->op_values())
6702 bool SDNode::isOperandOf(const SDNode *N) const {
6703 for (const SDValue &Op : N->op_values())
6704 if (this == Op.getNode())
6709 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6710 /// be a chain) reaches the specified operand without crossing any
6711 /// side-effecting instructions on any chain path. In practice, this looks
6712 /// through token factors and non-volatile loads. In order to remain efficient,
6713 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6714 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6715 unsigned Depth) const {
6716 if (*this == Dest) return true;
6718 // Don't search too deeply, we just want to be able to see through
6719 // TokenFactor's etc.
6720 if (Depth == 0) return false;
6722 // If this is a token factor, all inputs to the TF happen in parallel. If any
6723 // of the operands of the TF does not reach dest, then we cannot do the xform.
6724 if (getOpcode() == ISD::TokenFactor) {
6725 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6726 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6731 // Loads don't have side effects, look through them.
6732 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6733 if (!Ld->isVolatile())
6734 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6739 /// hasPredecessor - Return true if N is a predecessor of this node.
6740 /// N is either an operand of this node, or can be reached by recursively
6741 /// traversing up the operands.
6742 /// NOTE: This is an expensive method. Use it carefully.
6743 bool SDNode::hasPredecessor(const SDNode *N) const {
6744 SmallPtrSet<const SDNode *, 32> Visited;
6745 SmallVector<const SDNode *, 16> Worklist;
6746 return hasPredecessorHelper(N, Visited, Worklist);
6750 SDNode::hasPredecessorHelper(const SDNode *N,
6751 SmallPtrSetImpl<const SDNode *> &Visited,
6752 SmallVectorImpl<const SDNode *> &Worklist) const {
6753 if (Visited.empty()) {
6754 Worklist.push_back(this);
6756 // Take a look in the visited set. If we've already encountered this node
6757 // we needn't search further.
6758 if (Visited.count(N))
6762 // Haven't visited N yet. Continue the search.
6763 while (!Worklist.empty()) {
6764 const SDNode *M = Worklist.pop_back_val();
6765 for (const SDValue &OpV : M->op_values()) {
6766 SDNode *Op = OpV.getNode();
6767 if (Visited.insert(Op).second)
6768 Worklist.push_back(Op);
6777 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6778 assert(Num < NumOperands && "Invalid child # of SDNode!");
6779 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6782 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6783 assert(N->getNumValues() == 1 &&
6784 "Can't unroll a vector with multiple results!");
6786 EVT VT = N->getValueType(0);
6787 unsigned NE = VT.getVectorNumElements();
6788 EVT EltVT = VT.getVectorElementType();
6791 SmallVector<SDValue, 8> Scalars;
6792 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6794 // If ResNE is 0, fully unroll the vector op.
6797 else if (NE > ResNE)
6801 for (i= 0; i != NE; ++i) {
6802 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6803 SDValue Operand = N->getOperand(j);
6804 EVT OperandVT = Operand.getValueType();
6805 if (OperandVT.isVector()) {
6806 // A vector operand; extract a single element.
6807 EVT OperandEltVT = OperandVT.getVectorElementType();
6809 getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
6810 getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
6812 // A scalar operand; just use it as is.
6813 Operands[j] = Operand;
6817 switch (N->getOpcode()) {
6819 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands));
6822 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6829 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6830 getShiftAmountOperand(Operands[0].getValueType(),
6833 case ISD::SIGN_EXTEND_INREG:
6834 case ISD::FP_ROUND_INREG: {
6835 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6836 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6838 getValueType(ExtVT)));
6843 for (; i < ResNE; ++i)
6844 Scalars.push_back(getUNDEF(EltVT));
6846 return getNode(ISD::BUILD_VECTOR, dl,
6847 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6851 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6852 /// location that is 'Dist' units away from the location that the 'Base' load
6853 /// is loading from.
6854 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6855 unsigned Bytes, int Dist) const {
6856 if (LD->getChain() != Base->getChain())
6858 EVT VT = LD->getValueType(0);
6859 if (VT.getSizeInBits() / 8 != Bytes)
6862 SDValue Loc = LD->getOperand(1);
6863 SDValue BaseLoc = Base->getOperand(1);
6864 if (Loc.getOpcode() == ISD::FrameIndex) {
6865 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6867 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6868 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6869 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6870 int FS = MFI->getObjectSize(FI);
6871 int BFS = MFI->getObjectSize(BFI);
6872 if (FS != BFS || FS != (int)Bytes) return false;
6873 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6877 if (isBaseWithConstantOffset(Loc)) {
6878 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6879 if (Loc.getOperand(0) == BaseLoc) {
6880 // If the base location is a simple address with no offset itself, then
6881 // the second load's first add operand should be the base address.
6882 if (LocOffset == Dist * (int)Bytes)
6884 } else if (isBaseWithConstantOffset(BaseLoc)) {
6885 // The base location itself has an offset, so subtract that value from the
6886 // second load's offset before comparing to distance * size.
6888 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6889 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6890 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6895 const GlobalValue *GV1 = nullptr;
6896 const GlobalValue *GV2 = nullptr;
6897 int64_t Offset1 = 0;
6898 int64_t Offset2 = 0;
6899 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6900 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6901 if (isGA1 && isGA2 && GV1 == GV2)
6902 return Offset1 == (Offset2 + Dist*Bytes);
6907 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6908 /// it cannot be inferred.
6909 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6910 // If this is a GlobalAddress + cst, return the alignment.
6911 const GlobalValue *GV;
6912 int64_t GVOffset = 0;
6913 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6914 unsigned PtrWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
6915 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6916 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
6918 unsigned AlignBits = KnownZero.countTrailingOnes();
6919 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6921 return MinAlign(Align, GVOffset);
6924 // If this is a direct reference to a stack slot, use information about the
6925 // stack slot's alignment.
6926 int FrameIdx = 1 << 31;
6927 int64_t FrameOffset = 0;
6928 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6929 FrameIdx = FI->getIndex();
6930 } else if (isBaseWithConstantOffset(Ptr) &&
6931 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6933 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6934 FrameOffset = Ptr.getConstantOperandVal(1);
6937 if (FrameIdx != (1 << 31)) {
6938 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6939 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6947 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
6948 /// which is split (or expanded) into two not necessarily identical pieces.
6949 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
6950 // Currently all types are split in half.
6952 if (!VT.isVector()) {
6953 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
6955 unsigned NumElements = VT.getVectorNumElements();
6956 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
6957 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
6960 return std::make_pair(LoVT, HiVT);
6963 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
6965 std::pair<SDValue, SDValue>
6966 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
6968 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
6969 N.getValueType().getVectorNumElements() &&
6970 "More vector elements requested than available!");
6972 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
6973 getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
6974 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
6975 getConstant(LoVT.getVectorNumElements(), DL,
6976 TLI->getVectorIdxTy(getDataLayout())));
6977 return std::make_pair(Lo, Hi);
6980 void SelectionDAG::ExtractVectorElements(SDValue Op,
6981 SmallVectorImpl<SDValue> &Args,
6982 unsigned Start, unsigned Count) {
6983 EVT VT = Op.getValueType();
6985 Count = VT.getVectorNumElements();
6987 EVT EltVT = VT.getVectorElementType();
6988 EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
6990 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
6991 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
6992 Op, getConstant(i, SL, IdxTy)));
6996 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6997 unsigned GlobalAddressSDNode::getAddressSpace() const {
6998 return getGlobal()->getType()->getAddressSpace();
7002 Type *ConstantPoolSDNode::getType() const {
7003 if (isMachineConstantPoolEntry())
7004 return Val.MachineCPVal->getType();
7005 return Val.ConstVal->getType();
7008 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
7010 unsigned &SplatBitSize,
7012 unsigned MinSplatBits,
7013 bool isBigEndian) const {
7014 EVT VT = getValueType(0);
7015 assert(VT.isVector() && "Expected a vector type");
7016 unsigned sz = VT.getSizeInBits();
7017 if (MinSplatBits > sz)
7020 SplatValue = APInt(sz, 0);
7021 SplatUndef = APInt(sz, 0);
7023 // Get the bits. Bits with undefined values (when the corresponding element
7024 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
7025 // in SplatValue. If any of the values are not constant, give up and return
7027 unsigned int nOps = getNumOperands();
7028 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
7029 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
7031 for (unsigned j = 0; j < nOps; ++j) {
7032 unsigned i = isBigEndian ? nOps-1-j : j;
7033 SDValue OpVal = getOperand(i);
7034 unsigned BitPos = j * EltBitSize;
7036 if (OpVal.getOpcode() == ISD::UNDEF)
7037 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
7038 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
7039 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
7040 zextOrTrunc(sz) << BitPos;
7041 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
7042 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
7047 // The build_vector is all constants or undefs. Find the smallest element
7048 // size that splats the vector.
7050 HasAnyUndefs = (SplatUndef != 0);
7053 unsigned HalfSize = sz / 2;
7054 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
7055 APInt LowValue = SplatValue.trunc(HalfSize);
7056 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
7057 APInt LowUndef = SplatUndef.trunc(HalfSize);
7059 // If the two halves do not match (ignoring undef bits), stop here.
7060 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7061 MinSplatBits > HalfSize)
7064 SplatValue = HighValue | LowValue;
7065 SplatUndef = HighUndef & LowUndef;
7074 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
7075 if (UndefElements) {
7076 UndefElements->clear();
7077 UndefElements->resize(getNumOperands());
7080 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
7081 SDValue Op = getOperand(i);
7082 if (Op.getOpcode() == ISD::UNDEF) {
7084 (*UndefElements)[i] = true;
7085 } else if (!Splatted) {
7087 } else if (Splatted != Op) {
7093 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
7094 "Can only have a splat without a constant for all undefs.");
7095 return getOperand(0);
7102 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
7103 return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
7107 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
7108 return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
7111 bool BuildVectorSDNode::isConstant() const {
7112 for (const SDValue &Op : op_values()) {
7113 unsigned Opc = Op.getOpcode();
7114 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
7120 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
7121 // Find the first non-undef value in the shuffle mask.
7123 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
7126 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
7128 // Make sure all remaining elements are either undef or the same as the first
7130 for (int Idx = Mask[i]; i != e; ++i)
7131 if (Mask[i] >= 0 && Mask[i] != Idx)
7137 static void checkForCyclesHelper(const SDNode *N,
7138 SmallPtrSetImpl<const SDNode*> &Visited,
7139 SmallPtrSetImpl<const SDNode*> &Checked,
7140 const llvm::SelectionDAG *DAG) {
7141 // If this node has already been checked, don't check it again.
7142 if (Checked.count(N))
7145 // If a node has already been visited on this depth-first walk, reject it as
7147 if (!Visited.insert(N).second) {
7148 errs() << "Detected cycle in SelectionDAG\n";
7149 dbgs() << "Offending node:\n";
7150 N->dumprFull(DAG); dbgs() << "\n";
7154 for (const SDValue &Op : N->op_values())
7155 checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
7162 void llvm::checkForCycles(const llvm::SDNode *N,
7163 const llvm::SelectionDAG *DAG,
7171 assert(N && "Checking nonexistent SDNode");
7172 SmallPtrSet<const SDNode*, 32> visited;
7173 SmallPtrSet<const SDNode*, 32> checked;
7174 checkForCyclesHelper(N, visited, checked, DAG);
7179 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
7180 checkForCycles(DAG->getRoot().getNode(), DAG, force);