1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
90 case ISD::SIGN_EXTEND:
94 case ISD::ZERO_EXTEND:
95 R = ScalarizeVecRes_UnaryOp(N);
118 R = ScalarizeVecRes_BinOp(N);
121 R = ScalarizeVecRes_TernaryOp(N);
125 // If R is null, the sub-method took care of registering the result.
127 SetScalarizedVector(SDValue(N, ResNo), R);
130 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
131 SDValue LHS = GetScalarizedVector(N->getOperand(0));
132 SDValue RHS = GetScalarizedVector(N->getOperand(1));
133 return DAG.getNode(N->getOpcode(), SDLoc(N),
134 LHS.getValueType(), LHS, RHS);
137 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
138 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
139 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
140 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
141 return DAG.getNode(N->getOpcode(), SDLoc(N),
142 Op0.getValueType(), Op0, Op1, Op2);
145 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
147 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
148 return GetScalarizedVector(Op);
151 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
152 EVT NewVT = N->getValueType(0).getVectorElementType();
153 return DAG.getNode(ISD::BITCAST, SDLoc(N),
154 NewVT, N->getOperand(0));
157 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
158 EVT EltVT = N->getValueType(0).getVectorElementType();
159 SDValue InOp = N->getOperand(0);
160 // The BUILD_VECTOR operands may be of wider element types and
161 // we may need to truncate them back to the requested return type.
162 if (EltVT.isInteger())
163 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
167 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
168 EVT NewVT = N->getValueType(0).getVectorElementType();
169 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
170 return DAG.getConvertRndSat(NewVT, SDLoc(N),
171 Op0, DAG.getValueType(NewVT),
172 DAG.getValueType(Op0.getValueType()),
175 cast<CvtRndSatSDNode>(N)->getCvtCode());
178 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
180 N->getValueType(0).getVectorElementType(),
181 N->getOperand(0), N->getOperand(1));
184 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
185 EVT NewVT = N->getValueType(0).getVectorElementType();
186 SDValue Op = GetScalarizedVector(N->getOperand(0));
187 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
188 NewVT, Op, N->getOperand(1));
191 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
192 SDValue Op = GetScalarizedVector(N->getOperand(0));
193 return DAG.getNode(ISD::FPOWI, SDLoc(N),
194 Op.getValueType(), Op, N->getOperand(1));
197 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
198 // The value to insert may have a wider type than the vector element type,
199 // so be sure to truncate it to the element type if necessary.
200 SDValue Op = N->getOperand(1);
201 EVT EltVT = N->getValueType(0).getVectorElementType();
202 if (Op.getValueType() != EltVT)
203 // FIXME: Can this happen for floating point types?
204 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
208 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
209 assert(N->isUnindexed() && "Indexed vector load?");
211 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
212 N->getExtensionType(),
213 N->getValueType(0).getVectorElementType(),
215 N->getChain(), N->getBasePtr(),
216 DAG.getUNDEF(N->getBasePtr().getValueType()),
218 N->getMemoryVT().getVectorElementType(),
219 N->isVolatile(), N->isNonTemporal(),
220 N->isInvariant(), N->getOriginalAlignment(),
223 // Legalized the chain result - switch anything that used the old chain to
225 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
229 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
230 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
231 EVT DestVT = N->getValueType(0).getVectorElementType();
232 SDValue Op = GetScalarizedVector(N->getOperand(0));
233 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
236 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
237 EVT EltVT = N->getValueType(0).getVectorElementType();
238 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
239 SDValue LHS = GetScalarizedVector(N->getOperand(0));
240 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
241 LHS, DAG.getValueType(ExtVT));
244 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
245 // If the operand is wider than the vector element type then it is implicitly
246 // truncated. Make that explicit here.
247 EVT EltVT = N->getValueType(0).getVectorElementType();
248 SDValue InOp = N->getOperand(0);
249 if (InOp.getValueType() != EltVT)
250 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
254 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
255 SDValue Cond = GetScalarizedVector(N->getOperand(0));
256 SDValue LHS = GetScalarizedVector(N->getOperand(1));
257 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
258 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
259 if (ScalarBool != VecBool) {
260 EVT CondVT = Cond.getValueType();
261 switch (ScalarBool) {
262 case TargetLowering::UndefinedBooleanContent:
264 case TargetLowering::ZeroOrOneBooleanContent:
265 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
266 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
267 // Vector read from all ones, scalar expects a single 1 so mask.
268 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
269 Cond, DAG.getConstant(1, CondVT));
271 case TargetLowering::ZeroOrNegativeOneBooleanContent:
272 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
273 VecBool == TargetLowering::ZeroOrOneBooleanContent);
274 // Vector reads from a one, scalar from all ones so sign extend.
275 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
276 Cond, DAG.getValueType(MVT::i1));
281 return DAG.getSelect(SDLoc(N),
282 LHS.getValueType(), Cond, LHS,
283 GetScalarizedVector(N->getOperand(2)));
286 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
287 SDValue LHS = GetScalarizedVector(N->getOperand(1));
288 return DAG.getSelect(SDLoc(N),
289 LHS.getValueType(), N->getOperand(0), LHS,
290 GetScalarizedVector(N->getOperand(2)));
293 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
294 SDValue LHS = GetScalarizedVector(N->getOperand(2));
295 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
296 N->getOperand(0), N->getOperand(1),
297 LHS, GetScalarizedVector(N->getOperand(3)),
301 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
302 assert(N->getValueType(0).isVector() ==
303 N->getOperand(0).getValueType().isVector() &&
304 "Scalar/Vector type mismatch");
306 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
308 SDValue LHS = GetScalarizedVector(N->getOperand(0));
309 SDValue RHS = GetScalarizedVector(N->getOperand(1));
312 // Turn it into a scalar SETCC.
313 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
316 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
317 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
320 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
321 // Figure out if the scalar is the LHS or RHS and return it.
322 SDValue Arg = N->getOperand(2).getOperand(0);
323 if (Arg.getOpcode() == ISD::UNDEF)
324 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
325 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
326 return GetScalarizedVector(N->getOperand(Op));
329 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
330 assert(N->getValueType(0).isVector() &&
331 N->getOperand(0).getValueType().isVector() &&
332 "Operand types must be vectors");
334 SDValue LHS = GetScalarizedVector(N->getOperand(0));
335 SDValue RHS = GetScalarizedVector(N->getOperand(1));
336 EVT NVT = N->getValueType(0).getVectorElementType();
339 // Turn it into a scalar SETCC.
340 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
342 // Vectors may have a different boolean contents to scalars. Promote the
343 // value appropriately.
344 ISD::NodeType ExtendCode =
345 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
346 return DAG.getNode(ExtendCode, DL, NVT, Res);
350 //===----------------------------------------------------------------------===//
351 // Operand Vector Scalarization <1 x ty> -> ty.
352 //===----------------------------------------------------------------------===//
354 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
355 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
358 SDValue Res = SDValue();
360 if (Res.getNode() == 0) {
361 switch (N->getOpcode()) {
364 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
368 llvm_unreachable("Do not know how to scalarize this operator's operand!");
370 Res = ScalarizeVecOp_BITCAST(N);
372 case ISD::ANY_EXTEND:
373 case ISD::ZERO_EXTEND:
374 case ISD::SIGN_EXTEND:
376 Res = ScalarizeVecOp_UnaryOp(N);
378 case ISD::CONCAT_VECTORS:
379 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
381 case ISD::EXTRACT_VECTOR_ELT:
382 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
385 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
388 Res = ScalarizeVecOp_FP_ROUND(N, OpNo);
393 // If the result is null, the sub-method took care of registering results etc.
394 if (!Res.getNode()) return false;
396 // If the result is N, the sub-method updated N in place. Tell the legalizer
398 if (Res.getNode() == N)
401 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
402 "Invalid operand expansion");
404 ReplaceValueWith(SDValue(N, 0), Res);
408 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
409 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
410 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
411 SDValue Elt = GetScalarizedVector(N->getOperand(0));
412 return DAG.getNode(ISD::BITCAST, SDLoc(N),
413 N->getValueType(0), Elt);
416 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
417 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
418 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
419 assert(N->getValueType(0).getVectorNumElements() == 1 &&
420 "Unexected vector type!");
421 SDValue Elt = GetScalarizedVector(N->getOperand(0));
422 SmallVector<SDValue, 1> Ops(1);
423 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N),
424 N->getValueType(0).getScalarType(), Elt);
425 // Revectorize the result so the types line up with what the uses of this
426 // expression expect.
427 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
431 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
432 /// use a BUILD_VECTOR instead.
433 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
434 SmallVector<SDValue, 8> Ops(N->getNumOperands());
435 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
436 Ops[i] = GetScalarizedVector(N->getOperand(i));
437 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
438 &Ops[0], Ops.size());
441 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
442 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
444 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
445 SDValue Res = GetScalarizedVector(N->getOperand(0));
446 if (Res.getValueType() != N->getValueType(0))
447 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
452 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
453 /// scalarized, it must be <1 x ty>. Just store the element.
454 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
455 assert(N->isUnindexed() && "Indexed store of one-element vector?");
456 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
459 if (N->isTruncatingStore())
460 return DAG.getTruncStore(N->getChain(), dl,
461 GetScalarizedVector(N->getOperand(1)),
462 N->getBasePtr(), N->getPointerInfo(),
463 N->getMemoryVT().getVectorElementType(),
464 N->isVolatile(), N->isNonTemporal(),
465 N->getAlignment(), N->getTBAAInfo());
467 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
468 N->getBasePtr(), N->getPointerInfo(),
469 N->isVolatile(), N->isNonTemporal(),
470 N->getOriginalAlignment(), N->getTBAAInfo());
473 /// ScalarizeVecOp_FP_ROUND - If the value to round is a vector that needs
474 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
475 SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) {
476 SDValue Elt = GetScalarizedVector(N->getOperand(0));
477 SDValue Res = DAG.getNode(ISD::FP_ROUND, SDLoc(N),
478 N->getValueType(0).getVectorElementType(), Elt,
480 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), N->getValueType(0), Res);
483 //===----------------------------------------------------------------------===//
484 // Result Vector Splitting
485 //===----------------------------------------------------------------------===//
487 /// SplitVectorResult - This method is called when the specified result of the
488 /// specified node is found to need vector splitting. At this point, the node
489 /// may also have invalid operands or may have other results that need
490 /// legalization, we just know that (at least) one result needs vector
492 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
493 DEBUG(dbgs() << "Split node result: ";
498 // See if the target wants to custom expand this node.
499 if (CustomLowerNode(N, N->getValueType(ResNo), true))
502 switch (N->getOpcode()) {
505 dbgs() << "SplitVectorResult #" << ResNo << ": ";
509 report_fatal_error("Do not know how to split the result of this "
512 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
514 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
515 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
516 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
517 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
518 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
519 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
520 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
521 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
522 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
523 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
524 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
525 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
527 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
530 SplitVecRes_SETCC(N, Lo, Hi);
532 case ISD::VECTOR_SHUFFLE:
533 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
536 case ISD::CONVERT_RNDSAT:
539 case ISD::CTLZ_ZERO_UNDEF:
540 case ISD::CTTZ_ZERO_UNDEF:
551 case ISD::FNEARBYINT:
555 case ISD::FP_TO_SINT:
556 case ISD::FP_TO_UINT:
562 case ISD::SINT_TO_FP:
564 case ISD::UINT_TO_FP:
565 SplitVecRes_UnaryOp(N, Lo, Hi);
568 case ISD::ANY_EXTEND:
569 case ISD::SIGN_EXTEND:
570 case ISD::ZERO_EXTEND:
571 SplitVecRes_ExtendOp(N, Lo, Hi);
594 SplitVecRes_BinOp(N, Lo, Hi);
597 SplitVecRes_TernaryOp(N, Lo, Hi);
601 // If Lo/Hi is null, the sub-method took care of registering results etc.
603 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
606 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
608 SDValue LHSLo, LHSHi;
609 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
610 SDValue RHSLo, RHSHi;
611 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
614 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
615 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
618 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
620 SDValue Op0Lo, Op0Hi;
621 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
622 SDValue Op1Lo, Op1Hi;
623 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
624 SDValue Op2Lo, Op2Hi;
625 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
628 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
629 Op0Lo, Op1Lo, Op2Lo);
630 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
631 Op0Hi, Op1Hi, Op2Hi);
634 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
636 // We know the result is a vector. The input may be either a vector or a
639 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
642 SDValue InOp = N->getOperand(0);
643 EVT InVT = InOp.getValueType();
645 // Handle some special cases efficiently.
646 switch (getTypeAction(InVT)) {
647 case TargetLowering::TypeLegal:
648 case TargetLowering::TypePromoteInteger:
649 case TargetLowering::TypeSoftenFloat:
650 case TargetLowering::TypeScalarizeVector:
651 case TargetLowering::TypeWidenVector:
653 case TargetLowering::TypeExpandInteger:
654 case TargetLowering::TypeExpandFloat:
655 // A scalar to vector conversion, where the scalar needs expansion.
656 // If the vector is being split in two then we can just convert the
659 GetExpandedOp(InOp, Lo, Hi);
660 if (TLI.isBigEndian())
662 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
663 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
667 case TargetLowering::TypeSplitVector:
668 // If the input is a vector that needs to be split, convert each split
669 // piece of the input now.
670 GetSplitVector(InOp, Lo, Hi);
671 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
672 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
676 // In the general case, convert the input to an integer and split it by hand.
677 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
678 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
679 if (TLI.isBigEndian())
680 std::swap(LoIntVT, HiIntVT);
682 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
684 if (TLI.isBigEndian())
686 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
687 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
690 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
694 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
695 unsigned LoNumElts = LoVT.getVectorNumElements();
696 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
697 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
699 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
700 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
703 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
705 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
707 unsigned NumSubvectors = N->getNumOperands() / 2;
708 if (NumSubvectors == 1) {
709 Lo = N->getOperand(0);
710 Hi = N->getOperand(1);
715 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
717 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
718 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
720 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
721 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
724 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
726 SDValue Vec = N->getOperand(0);
727 SDValue Idx = N->getOperand(1);
731 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
733 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
734 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
735 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
736 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
737 TLI.getVectorIdxTy()));
740 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
743 GetSplitVector(N->getOperand(0), Lo, Hi);
744 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
745 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
748 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
750 SDValue LHSLo, LHSHi;
751 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
755 llvm::tie(LoVT, HiVT) =
756 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT());
758 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
759 DAG.getValueType(LoVT));
760 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
761 DAG.getValueType(HiVT));
764 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
766 SDValue Vec = N->getOperand(0);
767 SDValue Elt = N->getOperand(1);
768 SDValue Idx = N->getOperand(2);
770 GetSplitVector(Vec, Lo, Hi);
772 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
773 unsigned IdxVal = CIdx->getZExtValue();
774 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
775 if (IdxVal < LoNumElts)
776 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
777 Lo.getValueType(), Lo, Elt, Idx);
779 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
780 DAG.getConstant(IdxVal - LoNumElts,
781 TLI.getVectorIdxTy()));
785 // Spill the vector to the stack.
786 EVT VecVT = Vec.getValueType();
787 EVT EltVT = VecVT.getVectorElementType();
788 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
789 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
790 MachinePointerInfo(), false, false, 0);
792 // Store the new element. This may be larger than the vector element type,
793 // so use a truncating store.
794 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
795 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
797 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
798 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
801 // Load the Lo part from the stack slot.
802 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
803 false, false, false, 0);
805 // Increment the pointer to the other part.
806 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
807 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
808 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
810 // Load the Hi part from the stack slot.
811 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
812 false, false, false, MinAlign(Alignment, IncrementSize));
815 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
819 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
820 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
821 Hi = DAG.getUNDEF(HiVT);
824 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
826 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
829 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(LD->getValueType(0));
831 ISD::LoadExtType ExtType = LD->getExtensionType();
832 SDValue Ch = LD->getChain();
833 SDValue Ptr = LD->getBasePtr();
834 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
835 EVT MemoryVT = LD->getMemoryVT();
836 unsigned Alignment = LD->getOriginalAlignment();
837 bool isVolatile = LD->isVolatile();
838 bool isNonTemporal = LD->isNonTemporal();
839 bool isInvariant = LD->isInvariant();
840 const MDNode *TBAAInfo = LD->getTBAAInfo();
842 EVT LoMemVT, HiMemVT;
843 llvm::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
845 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
846 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
847 isInvariant, Alignment, TBAAInfo);
849 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
850 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
851 DAG.getConstant(IncrementSize, Ptr.getValueType()));
852 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
853 LD->getPointerInfo().getWithOffset(IncrementSize),
854 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment,
857 // Build a factor node to remember that this load is independent of the
859 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
862 // Legalized the chain result - switch anything that used the old chain to
864 ReplaceValueWith(SDValue(LD, 1), Ch);
867 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
868 assert(N->getValueType(0).isVector() &&
869 N->getOperand(0).getValueType().isVector() &&
870 "Operand types must be vectors");
874 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
877 SDValue LL, LH, RL, RH;
878 llvm::tie(LL, LH) = DAG.SplitVectorOperand(N, 0);
879 llvm::tie(RL, RH) = DAG.SplitVectorOperand(N, 1);
881 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
882 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
885 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
887 // Get the dest types - they may not match the input types, e.g. int_to_fp.
890 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
892 // If the input also splits, handle it directly for a compile time speedup.
893 // Otherwise split it by hand.
894 EVT InVT = N->getOperand(0).getValueType();
895 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector)
896 GetSplitVector(N->getOperand(0), Lo, Hi);
898 llvm::tie(Lo, Hi) = DAG.SplitVectorOperand(N, 0);
900 if (N->getOpcode() == ISD::FP_ROUND) {
901 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
902 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
903 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
904 SDValue DTyOpLo = DAG.getValueType(LoVT);
905 SDValue DTyOpHi = DAG.getValueType(HiVT);
906 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
907 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
908 SDValue RndOp = N->getOperand(3);
909 SDValue SatOp = N->getOperand(4);
910 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
911 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
913 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
916 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
917 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
921 void DAGTypeLegalizer::SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo,
924 EVT SrcVT = N->getOperand(0).getValueType();
925 EVT DestVT = N->getValueType(0);
927 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT);
929 // We can do better than a generic split operation if the extend is doing
930 // more than just doubling the width of the elements and the following are
932 // - The number of vector elements is even,
933 // - the source type is legal,
934 // - the type of a split source is illegal,
935 // - the type of an extended (by doubling element size) source is legal, and
936 // - the type of that extended source when split is legal.
938 // This won't necessarily completely legalize the operation, but it will
939 // more effectively move in the right direction and prevent falling down
940 // to scalarization in many cases due to the input vector being split too
942 unsigned NumElements = SrcVT.getVectorNumElements();
943 if ((NumElements & 1) == 0 &&
944 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) {
945 LLVMContext &Ctx = *DAG.getContext();
946 EVT NewSrcVT = EVT::getVectorVT(
947 Ctx, EVT::getIntegerVT(
948 Ctx, SrcVT.getVectorElementType().getSizeInBits() * 2),
951 EVT::getVectorVT(Ctx, SrcVT.getVectorElementType(), NumElements / 2);
952 EVT SplitLoVT, SplitHiVT;
953 llvm::tie(SplitLoVT, SplitHiVT) = DAG.GetSplitDestVTs(NewSrcVT);
954 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) &&
955 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) {
956 DEBUG(dbgs() << "Split vector extend via incremental extend:";
957 N->dump(&DAG); dbgs() << "\n");
958 // Extend the source vector by one step.
960 DAG.getNode(N->getOpcode(), dl, NewSrcVT, N->getOperand(0));
961 // Get the low and high halves of the new, extended one step, vector.
962 llvm::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl);
963 // Extend those vector halves the rest of the way.
964 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
965 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
969 // Fall back to the generic unary operator splitting otherwise.
970 SplitVecRes_UnaryOp(N, Lo, Hi);
973 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
974 SDValue &Lo, SDValue &Hi) {
975 // The low and high parts of the original input give four input vectors.
978 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
979 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
980 EVT NewVT = Inputs[0].getValueType();
981 unsigned NewElts = NewVT.getVectorNumElements();
983 // If Lo or Hi uses elements from at most two of the four input vectors, then
984 // express it as a vector shuffle of those two inputs. Otherwise extract the
985 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
986 SmallVector<int, 16> Ops;
987 for (unsigned High = 0; High < 2; ++High) {
988 SDValue &Output = High ? Hi : Lo;
990 // Build a shuffle mask for the output, discovering on the fly which
991 // input vectors to use as shuffle operands (recorded in InputUsed).
992 // If building a suitable shuffle vector proves too hard, then bail
993 // out with useBuildVector set.
994 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
995 unsigned FirstMaskIdx = High * NewElts;
996 bool useBuildVector = false;
997 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
998 // The mask element. This indexes into the input.
999 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1001 // The input vector this mask element indexes into.
1002 unsigned Input = (unsigned)Idx / NewElts;
1004 if (Input >= array_lengthof(Inputs)) {
1005 // The mask element does not index into any input vector.
1010 // Turn the index into an offset from the start of the input vector.
1011 Idx -= Input * NewElts;
1013 // Find or create a shuffle vector operand to hold this input.
1015 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
1016 if (InputUsed[OpNo] == Input) {
1017 // This input vector is already an operand.
1019 } else if (InputUsed[OpNo] == -1U) {
1020 // Create a new operand for this input vector.
1021 InputUsed[OpNo] = Input;
1026 if (OpNo >= array_lengthof(InputUsed)) {
1027 // More than two input vectors used! Give up on trying to create a
1028 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
1029 useBuildVector = true;
1033 // Add the mask index for the new shuffle vector.
1034 Ops.push_back(Idx + OpNo * NewElts);
1037 if (useBuildVector) {
1038 EVT EltVT = NewVT.getVectorElementType();
1039 SmallVector<SDValue, 16> SVOps;
1041 // Extract the input elements by hand.
1042 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
1043 // The mask element. This indexes into the input.
1044 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1046 // The input vector this mask element indexes into.
1047 unsigned Input = (unsigned)Idx / NewElts;
1049 if (Input >= array_lengthof(Inputs)) {
1050 // The mask element is "undef" or indexes off the end of the input.
1051 SVOps.push_back(DAG.getUNDEF(EltVT));
1055 // Turn the index into an offset from the start of the input vector.
1056 Idx -= Input * NewElts;
1058 // Extract the vector element by hand.
1059 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1060 Inputs[Input], DAG.getConstant(Idx,
1061 TLI.getVectorIdxTy())));
1064 // Construct the Lo/Hi output using a BUILD_VECTOR.
1065 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
1066 } else if (InputUsed[0] == -1U) {
1067 // No input vectors were used! The result is undefined.
1068 Output = DAG.getUNDEF(NewVT);
1070 SDValue Op0 = Inputs[InputUsed[0]];
1071 // If only one input was used, use an undefined vector for the other.
1072 SDValue Op1 = InputUsed[1] == -1U ?
1073 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1074 // At least one input vector was used. Create a new shuffle vector.
1075 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1083 //===----------------------------------------------------------------------===//
1084 // Operand Vector Splitting
1085 //===----------------------------------------------------------------------===//
1087 /// SplitVectorOperand - This method is called when the specified operand of the
1088 /// specified node is found to need vector splitting. At this point, all of the
1089 /// result types of the node are known to be legal, but other operands of the
1090 /// node may need legalization as well as the specified one.
1091 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1092 DEBUG(dbgs() << "Split node operand: ";
1095 SDValue Res = SDValue();
1097 // See if the target wants to custom split this node.
1098 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1101 if (Res.getNode() == 0) {
1102 switch (N->getOpcode()) {
1105 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1109 report_fatal_error("Do not know how to split this operator's "
1112 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1113 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1114 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1115 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1116 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1117 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1118 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1120 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1123 Res = SplitVecOp_VSELECT(N, OpNo);
1128 case ISD::FP_EXTEND:
1129 case ISD::FP_TO_SINT:
1130 case ISD::FP_TO_UINT:
1131 case ISD::SINT_TO_FP:
1132 case ISD::UINT_TO_FP:
1134 case ISD::SIGN_EXTEND:
1135 case ISD::ZERO_EXTEND:
1136 case ISD::ANY_EXTEND:
1137 Res = SplitVecOp_UnaryOp(N);
1142 // If the result is null, the sub-method took care of registering results etc.
1143 if (!Res.getNode()) return false;
1145 // If the result is N, the sub-method updated N in place. Tell the legalizer
1147 if (Res.getNode() == N)
1150 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1151 "Invalid operand expansion");
1153 ReplaceValueWith(SDValue(N, 0), Res);
1157 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1158 // The only possibility for an illegal operand is the mask, since result type
1159 // legalization would have handled this node already otherwise.
1160 assert(OpNo == 0 && "Illegal operand must be mask");
1162 SDValue Mask = N->getOperand(0);
1163 SDValue Src0 = N->getOperand(1);
1164 SDValue Src1 = N->getOperand(2);
1165 EVT Src0VT = Src0.getValueType();
1167 assert(Mask.getValueType().isVector() && "VSELECT without a vector mask?");
1170 GetSplitVector(N->getOperand(0), Lo, Hi);
1171 assert(Lo.getValueType() == Hi.getValueType() &&
1172 "Lo and Hi have differing types");
1175 llvm::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(Src0VT);
1176 assert(LoOpVT == HiOpVT && "Asymmetric vector split?");
1178 SDValue LoOp0, HiOp0, LoOp1, HiOp1, LoMask, HiMask;
1179 llvm::tie(LoOp0, HiOp0) = DAG.SplitVector(Src0, DL);
1180 llvm::tie(LoOp1, HiOp1) = DAG.SplitVector(Src1, DL);
1181 llvm::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL);
1184 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1186 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1188 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1191 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1192 // The result has a legal vector type, but the input needs splitting.
1193 EVT ResVT = N->getValueType(0);
1196 GetSplitVector(N->getOperand(0), Lo, Hi);
1197 EVT InVT = Lo.getValueType();
1199 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1200 InVT.getVectorNumElements());
1202 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1203 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1205 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1208 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1209 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1210 // end up being split all the way down to individual components. Convert the
1211 // split pieces into integers and reassemble.
1213 GetSplitVector(N->getOperand(0), Lo, Hi);
1214 Lo = BitConvertToInteger(Lo);
1215 Hi = BitConvertToInteger(Hi);
1217 if (TLI.isBigEndian())
1220 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1221 JoinIntegers(Lo, Hi));
1224 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1225 // We know that the extracted result type is legal.
1226 EVT SubVT = N->getValueType(0);
1227 SDValue Idx = N->getOperand(1);
1230 GetSplitVector(N->getOperand(0), Lo, Hi);
1232 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1233 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1235 if (IdxVal < LoElts) {
1236 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1237 "Extracted subvector crosses vector split!");
1238 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1240 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1241 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1245 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1246 SDValue Vec = N->getOperand(0);
1247 SDValue Idx = N->getOperand(1);
1248 EVT VecVT = Vec.getValueType();
1250 if (isa<ConstantSDNode>(Idx)) {
1251 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1252 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1255 GetSplitVector(Vec, Lo, Hi);
1257 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1259 if (IdxVal < LoElts)
1260 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1261 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1262 DAG.getConstant(IdxVal - LoElts,
1263 Idx.getValueType())), 0);
1266 // Store the vector to the stack.
1267 EVT EltVT = VecVT.getVectorElementType();
1269 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1270 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1271 MachinePointerInfo(), false, false, 0);
1273 // Load back the required element.
1274 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1275 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1276 MachinePointerInfo(), EltVT, false, false, 0);
1279 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1280 assert(N->isUnindexed() && "Indexed store of vector?");
1281 assert(OpNo == 1 && "Can only split the stored value");
1284 bool isTruncating = N->isTruncatingStore();
1285 SDValue Ch = N->getChain();
1286 SDValue Ptr = N->getBasePtr();
1287 EVT MemoryVT = N->getMemoryVT();
1288 unsigned Alignment = N->getOriginalAlignment();
1289 bool isVol = N->isVolatile();
1290 bool isNT = N->isNonTemporal();
1291 const MDNode *TBAAInfo = N->getTBAAInfo();
1293 GetSplitVector(N->getOperand(1), Lo, Hi);
1295 EVT LoMemVT, HiMemVT;
1296 llvm::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
1298 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1301 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1302 LoMemVT, isVol, isNT, Alignment, TBAAInfo);
1304 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1305 isVol, isNT, Alignment, TBAAInfo);
1307 // Increment the pointer to the other half.
1308 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1309 DAG.getConstant(IncrementSize, Ptr.getValueType()));
1312 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1313 N->getPointerInfo().getWithOffset(IncrementSize),
1314 HiMemVT, isVol, isNT, Alignment, TBAAInfo);
1316 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1317 N->getPointerInfo().getWithOffset(IncrementSize),
1318 isVol, isNT, Alignment, TBAAInfo);
1320 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1323 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1326 // The input operands all must have the same type, and we know the result
1327 // type is valid. Convert this to a buildvector which extracts all the
1329 // TODO: If the input elements are power-two vectors, we could convert this to
1330 // a new CONCAT_VECTORS node with elements that are half-wide.
1331 SmallVector<SDValue, 32> Elts;
1332 EVT EltVT = N->getValueType(0).getVectorElementType();
1333 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1334 SDValue Op = N->getOperand(op);
1335 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1337 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1338 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1343 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1344 &Elts[0], Elts.size());
1347 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1348 // The result type is legal, but the input type is illegal. If splitting
1349 // ends up with the result type of each half still being legal, just
1350 // do that. If, however, that would result in an illegal result type,
1351 // we can try to get more clever with power-two vectors. Specifically,
1352 // split the input type, but also widen the result element size, then
1353 // concatenate the halves and truncate again. For example, consider a target
1354 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1355 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1356 // %inlo = v4i32 extract_subvector %in, 0
1357 // %inhi = v4i32 extract_subvector %in, 4
1358 // %lo16 = v4i16 trunc v4i32 %inlo
1359 // %hi16 = v4i16 trunc v4i32 %inhi
1360 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1361 // %res = v8i8 trunc v8i16 %in16
1363 // Without this transform, the original truncate would end up being
1364 // scalarized, which is pretty much always a last resort.
1365 SDValue InVec = N->getOperand(0);
1366 EVT InVT = InVec->getValueType(0);
1367 EVT OutVT = N->getValueType(0);
1368 unsigned NumElements = OutVT.getVectorNumElements();
1369 // Widening should have already made sure this is a power-two vector
1370 // if we're trying to split it at all. assert() that's true, just in case.
1371 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1373 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1374 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1376 // If the input elements are only 1/2 the width of the result elements,
1377 // just use the normal splitting. Our trick only work if there's room
1378 // to split more than once.
1379 if (InElementSize <= OutElementSize * 2)
1380 return SplitVecOp_UnaryOp(N);
1383 // Extract the halves of the input via extract_subvector.
1384 SDValue InLoVec, InHiVec;
1385 llvm::tie(InLoVec, InHiVec) = DAG.SplitVector(InVec, DL);
1386 // Truncate them to 1/2 the element size.
1387 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1388 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1390 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1391 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1392 // Concatenate them to get the full intermediate truncation result.
1393 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1394 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1396 // Now finish up by truncating all the way down to the original result
1397 // type. This should normally be something that ends up being legal directly,
1398 // but in theory if a target has very wide vectors and an annoyingly
1399 // restricted set of legal types, this split can chain to build things up.
1400 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1403 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1404 assert(N->getValueType(0).isVector() &&
1405 N->getOperand(0).getValueType().isVector() &&
1406 "Operand types must be vectors");
1407 // The result has a legal vector type, but the input needs splitting.
1408 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1410 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1411 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1412 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1413 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1414 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1416 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1417 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1418 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1419 return PromoteTargetBoolean(Con, N->getValueType(0));
1423 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1424 // The result has a legal vector type, but the input needs splitting.
1425 EVT ResVT = N->getValueType(0);
1428 GetSplitVector(N->getOperand(0), Lo, Hi);
1429 EVT InVT = Lo.getValueType();
1431 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1432 InVT.getVectorNumElements());
1434 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1435 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1437 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1442 //===----------------------------------------------------------------------===//
1443 // Result Vector Widening
1444 //===----------------------------------------------------------------------===//
1446 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1447 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1451 // See if the target wants to custom widen this node.
1452 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1455 SDValue Res = SDValue();
1456 switch (N->getOpcode()) {
1459 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1463 llvm_unreachable("Do not know how to widen the result of this operator!");
1465 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1466 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1467 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1468 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1469 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1470 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1471 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1472 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1473 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1474 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1475 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1477 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1478 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1479 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1480 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1481 case ISD::VECTOR_SHUFFLE:
1482 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1494 Res = WidenVecRes_Binary(N);
1498 case ISD::FCOPYSIGN:
1508 Res = WidenVecRes_BinaryCanTrap(N);
1512 Res = WidenVecRes_POWI(N);
1518 Res = WidenVecRes_Shift(N);
1521 case ISD::ANY_EXTEND:
1522 case ISD::FP_EXTEND:
1524 case ISD::FP_TO_SINT:
1525 case ISD::FP_TO_UINT:
1526 case ISD::SIGN_EXTEND:
1527 case ISD::SINT_TO_FP:
1529 case ISD::UINT_TO_FP:
1530 case ISD::ZERO_EXTEND:
1531 Res = WidenVecRes_Convert(N);
1546 case ISD::FNEARBYINT:
1553 Res = WidenVecRes_Unary(N);
1556 Res = WidenVecRes_Ternary(N);
1560 // If Res is null, the sub-method took care of registering the result.
1562 SetWidenedVector(SDValue(N, ResNo), Res);
1565 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1566 // Ternary op widening.
1568 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1569 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1570 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1571 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1572 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1575 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1576 // Binary op widening.
1578 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1579 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1580 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1581 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1584 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
1585 // Binary op widening for operations that can trap.
1586 unsigned Opcode = N->getOpcode();
1588 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1589 EVT WidenEltVT = WidenVT.getVectorElementType();
1591 unsigned NumElts = VT.getVectorNumElements();
1592 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1593 NumElts = NumElts / 2;
1594 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1597 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1598 // Operation doesn't trap so just widen as normal.
1599 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1600 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1601 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1604 // No legal vector version so unroll the vector operation and then widen.
1606 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1608 // Since the operation can trap, apply operation on the original vector.
1610 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1611 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1612 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1614 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1615 unsigned ConcatEnd = 0; // Current ConcatOps index.
1616 int Idx = 0; // Current Idx into input vectors.
1618 // NumElts := greatest legal vector size (at most WidenVT)
1619 // while (orig. vector has unhandled elements) {
1620 // take munches of size NumElts from the beginning and add to ConcatOps
1621 // NumElts := next smaller supported vector size or 1
1623 while (CurNumElts != 0) {
1624 while (CurNumElts >= NumElts) {
1625 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1626 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1627 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1628 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1629 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1631 CurNumElts -= NumElts;
1634 NumElts = NumElts / 2;
1635 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1636 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1639 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1640 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1641 InOp1, DAG.getConstant(Idx,
1642 TLI.getVectorIdxTy()));
1643 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1644 InOp2, DAG.getConstant(Idx,
1645 TLI.getVectorIdxTy()));
1646 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1653 // Check to see if we have a single operation with the widen type.
1654 if (ConcatEnd == 1) {
1655 VT = ConcatOps[0].getValueType();
1657 return ConcatOps[0];
1660 // while (Some element of ConcatOps is not of type MaxVT) {
1661 // From the end of ConcatOps, collect elements of the same type and put
1662 // them into an op of the next larger supported type
1664 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1665 Idx = ConcatEnd - 1;
1666 VT = ConcatOps[Idx--].getValueType();
1667 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1670 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1674 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1675 } while (!TLI.isTypeLegal(NextVT));
1677 if (!VT.isVector()) {
1678 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1679 SDValue VecOp = DAG.getUNDEF(NextVT);
1680 unsigned NumToInsert = ConcatEnd - Idx - 1;
1681 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1682 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1683 ConcatOps[OpIdx], DAG.getConstant(i,
1684 TLI.getVectorIdxTy()));
1686 ConcatOps[Idx+1] = VecOp;
1687 ConcatEnd = Idx + 2;
1689 // Vector type, create a CONCAT_VECTORS of type NextVT
1690 SDValue undefVec = DAG.getUNDEF(VT);
1691 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1692 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1693 unsigned RealVals = ConcatEnd - Idx - 1;
1694 unsigned SubConcatEnd = 0;
1695 unsigned SubConcatIdx = Idx + 1;
1696 while (SubConcatEnd < RealVals)
1697 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1698 while (SubConcatEnd < OpsToConcat)
1699 SubConcatOps[SubConcatEnd++] = undefVec;
1700 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1701 NextVT, &SubConcatOps[0],
1703 ConcatEnd = SubConcatIdx + 1;
1707 // Check to see if we have a single operation with the widen type.
1708 if (ConcatEnd == 1) {
1709 VT = ConcatOps[0].getValueType();
1711 return ConcatOps[0];
1714 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1715 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1716 if (NumOps != ConcatEnd ) {
1717 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1718 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1719 ConcatOps[j] = UndefVal;
1721 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1724 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1725 SDValue InOp = N->getOperand(0);
1728 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1729 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1731 EVT InVT = InOp.getValueType();
1732 EVT InEltVT = InVT.getVectorElementType();
1733 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1735 unsigned Opcode = N->getOpcode();
1736 unsigned InVTNumElts = InVT.getVectorNumElements();
1738 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1739 InOp = GetWidenedVector(N->getOperand(0));
1740 InVT = InOp.getValueType();
1741 InVTNumElts = InVT.getVectorNumElements();
1742 if (InVTNumElts == WidenNumElts) {
1743 if (N->getNumOperands() == 1)
1744 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1745 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1749 if (TLI.isTypeLegal(InWidenVT)) {
1750 // Because the result and the input are different vector types, widening
1751 // the result could create a legal type but widening the input might make
1752 // it an illegal type that might lead to repeatedly splitting the input
1753 // and then widening it. To avoid this, we widen the input only if
1754 // it results in a legal type.
1755 if (WidenNumElts % InVTNumElts == 0) {
1756 // Widen the input and call convert on the widened input vector.
1757 unsigned NumConcat = WidenNumElts/InVTNumElts;
1758 SmallVector<SDValue, 16> Ops(NumConcat);
1760 SDValue UndefVal = DAG.getUNDEF(InVT);
1761 for (unsigned i = 1; i != NumConcat; ++i)
1763 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1764 &Ops[0], NumConcat);
1765 if (N->getNumOperands() == 1)
1766 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1767 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1770 if (InVTNumElts % WidenNumElts == 0) {
1771 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1772 InOp, DAG.getConstant(0,
1773 TLI.getVectorIdxTy()));
1774 // Extract the input and convert the shorten input vector.
1775 if (N->getNumOperands() == 1)
1776 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1777 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1781 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1782 SmallVector<SDValue, 16> Ops(WidenNumElts);
1783 EVT EltVT = WidenVT.getVectorElementType();
1784 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1786 for (i=0; i < MinElts; ++i) {
1787 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1788 DAG.getConstant(i, TLI.getVectorIdxTy()));
1789 if (N->getNumOperands() == 1)
1790 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1792 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1795 SDValue UndefVal = DAG.getUNDEF(EltVT);
1796 for (; i < WidenNumElts; ++i)
1799 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1802 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1803 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1804 SDValue InOp = GetWidenedVector(N->getOperand(0));
1805 SDValue ShOp = N->getOperand(1);
1806 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1809 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1810 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1811 SDValue InOp = GetWidenedVector(N->getOperand(0));
1812 SDValue ShOp = N->getOperand(1);
1814 EVT ShVT = ShOp.getValueType();
1815 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1816 ShOp = GetWidenedVector(ShOp);
1817 ShVT = ShOp.getValueType();
1819 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1820 ShVT.getVectorElementType(),
1821 WidenVT.getVectorNumElements());
1822 if (ShVT != ShWidenVT)
1823 ShOp = ModifyToType(ShOp, ShWidenVT);
1825 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1828 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1829 // Unary op widening.
1830 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1831 SDValue InOp = GetWidenedVector(N->getOperand(0));
1832 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1835 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1836 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1837 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1838 cast<VTSDNode>(N->getOperand(1))->getVT()
1839 .getVectorElementType(),
1840 WidenVT.getVectorNumElements());
1841 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1842 return DAG.getNode(N->getOpcode(), SDLoc(N),
1843 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1846 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1847 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1848 return GetWidenedVector(WidenVec);
1851 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1852 SDValue InOp = N->getOperand(0);
1853 EVT InVT = InOp.getValueType();
1854 EVT VT = N->getValueType(0);
1855 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1858 switch (getTypeAction(InVT)) {
1859 case TargetLowering::TypeLegal:
1861 case TargetLowering::TypePromoteInteger:
1862 // If the incoming type is a vector that is being promoted, then
1863 // we know that the elements are arranged differently and that we
1864 // must perform the conversion using a stack slot.
1865 if (InVT.isVector())
1868 // If the InOp is promoted to the same size, convert it. Otherwise,
1869 // fall out of the switch and widen the promoted input.
1870 InOp = GetPromotedInteger(InOp);
1871 InVT = InOp.getValueType();
1872 if (WidenVT.bitsEq(InVT))
1873 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1875 case TargetLowering::TypeSoftenFloat:
1876 case TargetLowering::TypeExpandInteger:
1877 case TargetLowering::TypeExpandFloat:
1878 case TargetLowering::TypeScalarizeVector:
1879 case TargetLowering::TypeSplitVector:
1881 case TargetLowering::TypeWidenVector:
1882 // If the InOp is widened to the same size, convert it. Otherwise, fall
1883 // out of the switch and widen the widened input.
1884 InOp = GetWidenedVector(InOp);
1885 InVT = InOp.getValueType();
1886 if (WidenVT.bitsEq(InVT))
1887 // The input widens to the same size. Convert to the widen value.
1888 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1892 unsigned WidenSize = WidenVT.getSizeInBits();
1893 unsigned InSize = InVT.getSizeInBits();
1894 // x86mmx is not an acceptable vector element type, so don't try.
1895 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1896 // Determine new input vector type. The new input vector type will use
1897 // the same element type (if its a vector) or use the input type as a
1898 // vector. It is the same size as the type to widen to.
1900 unsigned NewNumElts = WidenSize / InSize;
1901 if (InVT.isVector()) {
1902 EVT InEltVT = InVT.getVectorElementType();
1903 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1904 WidenSize / InEltVT.getSizeInBits());
1906 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1909 if (TLI.isTypeLegal(NewInVT)) {
1910 // Because the result and the input are different vector types, widening
1911 // the result could create a legal type but widening the input might make
1912 // it an illegal type that might lead to repeatedly splitting the input
1913 // and then widening it. To avoid this, we widen the input only if
1914 // it results in a legal type.
1915 SmallVector<SDValue, 16> Ops(NewNumElts);
1916 SDValue UndefVal = DAG.getUNDEF(InVT);
1918 for (unsigned i = 1; i < NewNumElts; ++i)
1922 if (InVT.isVector())
1923 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1924 NewInVT, &Ops[0], NewNumElts);
1926 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1927 NewInVT, &Ops[0], NewNumElts);
1928 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1932 return CreateStackStoreLoad(InOp, WidenVT);
1935 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1937 // Build a vector with undefined for the new nodes.
1938 EVT VT = N->getValueType(0);
1940 // Integer BUILD_VECTOR operands may be larger than the node's vector element
1941 // type. The UNDEFs need to have the same type as the existing operands.
1942 EVT EltVT = N->getOperand(0).getValueType();
1943 unsigned NumElts = VT.getVectorNumElements();
1945 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1946 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1948 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1949 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
1950 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
1952 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1955 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1956 EVT InVT = N->getOperand(0).getValueType();
1957 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1959 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1960 unsigned NumInElts = InVT.getVectorNumElements();
1961 unsigned NumOperands = N->getNumOperands();
1963 bool InputWidened = false; // Indicates we need to widen the input.
1964 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1965 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1966 // Add undef vectors to widen to correct length.
1967 unsigned NumConcat = WidenVT.getVectorNumElements() /
1968 InVT.getVectorNumElements();
1969 SDValue UndefVal = DAG.getUNDEF(InVT);
1970 SmallVector<SDValue, 16> Ops(NumConcat);
1971 for (unsigned i=0; i < NumOperands; ++i)
1972 Ops[i] = N->getOperand(i);
1973 for (unsigned i = NumOperands; i != NumConcat; ++i)
1975 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1978 InputWidened = true;
1979 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1980 // The inputs and the result are widen to the same value.
1982 for (i=1; i < NumOperands; ++i)
1983 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1986 if (i == NumOperands)
1987 // Everything but the first operand is an UNDEF so just return the
1988 // widened first operand.
1989 return GetWidenedVector(N->getOperand(0));
1991 if (NumOperands == 2) {
1992 // Replace concat of two operands with a shuffle.
1993 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1994 for (unsigned i = 0; i < NumInElts; ++i) {
1996 MaskOps[i + NumInElts] = i + WidenNumElts;
1998 return DAG.getVectorShuffle(WidenVT, dl,
1999 GetWidenedVector(N->getOperand(0)),
2000 GetWidenedVector(N->getOperand(1)),
2006 // Fall back to use extracts and build vector.
2007 EVT EltVT = WidenVT.getVectorElementType();
2008 SmallVector<SDValue, 16> Ops(WidenNumElts);
2010 for (unsigned i=0; i < NumOperands; ++i) {
2011 SDValue InOp = N->getOperand(i);
2013 InOp = GetWidenedVector(InOp);
2014 for (unsigned j=0; j < NumInElts; ++j)
2015 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2016 DAG.getConstant(j, TLI.getVectorIdxTy()));
2018 SDValue UndefVal = DAG.getUNDEF(EltVT);
2019 for (; Idx < WidenNumElts; ++Idx)
2020 Ops[Idx] = UndefVal;
2021 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2024 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
2026 SDValue InOp = N->getOperand(0);
2027 SDValue RndOp = N->getOperand(3);
2028 SDValue SatOp = N->getOperand(4);
2030 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2031 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2033 EVT InVT = InOp.getValueType();
2034 EVT InEltVT = InVT.getVectorElementType();
2035 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
2037 SDValue DTyOp = DAG.getValueType(WidenVT);
2038 SDValue STyOp = DAG.getValueType(InWidenVT);
2039 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
2041 unsigned InVTNumElts = InVT.getVectorNumElements();
2042 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
2043 InOp = GetWidenedVector(InOp);
2044 InVT = InOp.getValueType();
2045 InVTNumElts = InVT.getVectorNumElements();
2046 if (InVTNumElts == WidenNumElts)
2047 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2051 if (TLI.isTypeLegal(InWidenVT)) {
2052 // Because the result and the input are different vector types, widening
2053 // the result could create a legal type but widening the input might make
2054 // it an illegal type that might lead to repeatedly splitting the input
2055 // and then widening it. To avoid this, we widen the input only if
2056 // it results in a legal type.
2057 if (WidenNumElts % InVTNumElts == 0) {
2058 // Widen the input and call convert on the widened input vector.
2059 unsigned NumConcat = WidenNumElts/InVTNumElts;
2060 SmallVector<SDValue, 16> Ops(NumConcat);
2062 SDValue UndefVal = DAG.getUNDEF(InVT);
2063 for (unsigned i = 1; i != NumConcat; ++i)
2066 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
2067 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2071 if (InVTNumElts % WidenNumElts == 0) {
2072 // Extract the input and convert the shorten input vector.
2073 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2074 DAG.getConstant(0, TLI.getVectorIdxTy()));
2075 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2080 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2081 SmallVector<SDValue, 16> Ops(WidenNumElts);
2082 EVT EltVT = WidenVT.getVectorElementType();
2083 DTyOp = DAG.getValueType(EltVT);
2084 STyOp = DAG.getValueType(InEltVT);
2086 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2088 for (i=0; i < MinElts; ++i) {
2089 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2090 DAG.getConstant(i, TLI.getVectorIdxTy()));
2091 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2095 SDValue UndefVal = DAG.getUNDEF(EltVT);
2096 for (; i < WidenNumElts; ++i)
2099 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2102 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2103 EVT VT = N->getValueType(0);
2104 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2105 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2106 SDValue InOp = N->getOperand(0);
2107 SDValue Idx = N->getOperand(1);
2110 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2111 InOp = GetWidenedVector(InOp);
2113 EVT InVT = InOp.getValueType();
2115 // Check if we can just return the input vector after widening.
2116 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2117 if (IdxVal == 0 && InVT == WidenVT)
2120 // Check if we can extract from the vector.
2121 unsigned InNumElts = InVT.getVectorNumElements();
2122 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2123 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2125 // We could try widening the input to the right length but for now, extract
2126 // the original elements, fill the rest with undefs and build a vector.
2127 SmallVector<SDValue, 16> Ops(WidenNumElts);
2128 EVT EltVT = VT.getVectorElementType();
2129 unsigned NumElts = VT.getVectorNumElements();
2131 for (i=0; i < NumElts; ++i)
2132 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2133 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2135 SDValue UndefVal = DAG.getUNDEF(EltVT);
2136 for (; i < WidenNumElts; ++i)
2138 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2141 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2142 SDValue InOp = GetWidenedVector(N->getOperand(0));
2143 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2144 InOp.getValueType(), InOp,
2145 N->getOperand(1), N->getOperand(2));
2148 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2149 LoadSDNode *LD = cast<LoadSDNode>(N);
2150 ISD::LoadExtType ExtType = LD->getExtensionType();
2153 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2154 if (ExtType != ISD::NON_EXTLOAD)
2155 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2157 Result = GenWidenVectorLoads(LdChain, LD);
2159 // If we generate a single load, we can use that for the chain. Otherwise,
2160 // build a factor node to remember the multiple loads are independent and
2163 if (LdChain.size() == 1)
2164 NewChain = LdChain[0];
2166 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
2167 &LdChain[0], LdChain.size());
2169 // Modified the chain - switch anything that used the old chain to use
2171 ReplaceValueWith(SDValue(N, 1), NewChain);
2176 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2177 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2178 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2179 WidenVT, N->getOperand(0));
2182 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2183 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2184 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2186 SDValue Cond1 = N->getOperand(0);
2187 EVT CondVT = Cond1.getValueType();
2188 if (CondVT.isVector()) {
2189 EVT CondEltVT = CondVT.getVectorElementType();
2190 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2191 CondEltVT, WidenNumElts);
2192 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2193 Cond1 = GetWidenedVector(Cond1);
2195 if (Cond1.getValueType() != CondWidenVT)
2196 Cond1 = ModifyToType(Cond1, CondWidenVT);
2199 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2200 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2201 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2202 return DAG.getNode(N->getOpcode(), SDLoc(N),
2203 WidenVT, Cond1, InOp1, InOp2);
2206 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2207 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2208 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2209 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2210 InOp1.getValueType(), N->getOperand(0),
2211 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2214 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2215 assert(N->getValueType(0).isVector() ==
2216 N->getOperand(0).getValueType().isVector() &&
2217 "Scalar/Vector type mismatch");
2218 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2220 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2221 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2222 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2223 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2224 InOp1, InOp2, N->getOperand(2));
2227 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2228 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2229 return DAG.getUNDEF(WidenVT);
2232 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2233 EVT VT = N->getValueType(0);
2236 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2237 unsigned NumElts = VT.getVectorNumElements();
2238 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2240 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2241 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2243 // Adjust mask based on new input vector length.
2244 SmallVector<int, 16> NewMask;
2245 for (unsigned i = 0; i != NumElts; ++i) {
2246 int Idx = N->getMaskElt(i);
2247 if (Idx < (int)NumElts)
2248 NewMask.push_back(Idx);
2250 NewMask.push_back(Idx - NumElts + WidenNumElts);
2252 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2253 NewMask.push_back(-1);
2254 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2257 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2258 assert(N->getValueType(0).isVector() &&
2259 N->getOperand(0).getValueType().isVector() &&
2260 "Operands must be vectors");
2261 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2262 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2264 SDValue InOp1 = N->getOperand(0);
2265 EVT InVT = InOp1.getValueType();
2266 assert(InVT.isVector() && "can not widen non-vector type");
2267 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2268 InVT.getVectorElementType(), WidenNumElts);
2269 InOp1 = GetWidenedVector(InOp1);
2270 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2272 // Assume that the input and output will be widen appropriately. If not,
2273 // we will have to unroll it at some point.
2274 assert(InOp1.getValueType() == WidenInVT &&
2275 InOp2.getValueType() == WidenInVT &&
2276 "Input not widened to expected type!");
2278 return DAG.getNode(ISD::SETCC, SDLoc(N),
2279 WidenVT, InOp1, InOp2, N->getOperand(2));
2283 //===----------------------------------------------------------------------===//
2284 // Widen Vector Operand
2285 //===----------------------------------------------------------------------===//
2286 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2287 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2290 SDValue Res = SDValue();
2292 // See if the target wants to custom widen this node.
2293 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2296 switch (N->getOpcode()) {
2299 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2303 llvm_unreachable("Do not know how to widen this operator's operand!");
2305 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2306 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2307 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2308 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2309 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2310 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2312 case ISD::FP_EXTEND:
2313 case ISD::FP_TO_SINT:
2314 case ISD::FP_TO_UINT:
2315 case ISD::SINT_TO_FP:
2316 case ISD::UINT_TO_FP:
2318 case ISD::SIGN_EXTEND:
2319 case ISD::ZERO_EXTEND:
2320 case ISD::ANY_EXTEND:
2321 Res = WidenVecOp_Convert(N);
2325 // If Res is null, the sub-method took care of registering the result.
2326 if (!Res.getNode()) return false;
2328 // If the result is N, the sub-method updated N in place. Tell the legalizer
2330 if (Res.getNode() == N)
2334 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2335 "Invalid operand expansion");
2337 ReplaceValueWith(SDValue(N, 0), Res);
2341 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2342 // Since the result is legal and the input is illegal, it is unlikely
2343 // that we can fix the input to a legal type so unroll the convert
2344 // into some scalar code and create a nasty build vector.
2345 EVT VT = N->getValueType(0);
2346 EVT EltVT = VT.getVectorElementType();
2348 unsigned NumElts = VT.getVectorNumElements();
2349 SDValue InOp = N->getOperand(0);
2350 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2351 InOp = GetWidenedVector(InOp);
2352 EVT InVT = InOp.getValueType();
2353 EVT InEltVT = InVT.getVectorElementType();
2355 unsigned Opcode = N->getOpcode();
2356 SmallVector<SDValue, 16> Ops(NumElts);
2357 for (unsigned i=0; i < NumElts; ++i)
2358 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2359 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2360 DAG.getConstant(i, TLI.getVectorIdxTy())));
2362 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2365 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2366 EVT VT = N->getValueType(0);
2367 SDValue InOp = GetWidenedVector(N->getOperand(0));
2368 EVT InWidenVT = InOp.getValueType();
2371 // Check if we can convert between two legal vector types and extract.
2372 unsigned InWidenSize = InWidenVT.getSizeInBits();
2373 unsigned Size = VT.getSizeInBits();
2374 // x86mmx is not an acceptable vector element type, so don't try.
2375 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2376 unsigned NewNumElts = InWidenSize / Size;
2377 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2378 if (TLI.isTypeLegal(NewVT)) {
2379 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2380 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2381 DAG.getConstant(0, TLI.getVectorIdxTy()));
2385 return CreateStackStoreLoad(InOp, VT);
2388 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2389 // If the input vector is not legal, it is likely that we will not find a
2390 // legal vector of the same size. Replace the concatenate vector with a
2391 // nasty build vector.
2392 EVT VT = N->getValueType(0);
2393 EVT EltVT = VT.getVectorElementType();
2395 unsigned NumElts = VT.getVectorNumElements();
2396 SmallVector<SDValue, 16> Ops(NumElts);
2398 EVT InVT = N->getOperand(0).getValueType();
2399 unsigned NumInElts = InVT.getVectorNumElements();
2402 unsigned NumOperands = N->getNumOperands();
2403 for (unsigned i=0; i < NumOperands; ++i) {
2404 SDValue InOp = N->getOperand(i);
2405 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2406 InOp = GetWidenedVector(InOp);
2407 for (unsigned j=0; j < NumInElts; ++j)
2408 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2409 DAG.getConstant(j, TLI.getVectorIdxTy()));
2411 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2414 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2415 SDValue InOp = GetWidenedVector(N->getOperand(0));
2416 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2417 N->getValueType(0), InOp, N->getOperand(1));
2420 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2421 SDValue InOp = GetWidenedVector(N->getOperand(0));
2422 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2423 N->getValueType(0), InOp, N->getOperand(1));
2426 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2427 // We have to widen the value but we want only to store the original
2429 StoreSDNode *ST = cast<StoreSDNode>(N);
2431 SmallVector<SDValue, 16> StChain;
2432 if (ST->isTruncatingStore())
2433 GenWidenVectorTruncStores(StChain, ST);
2435 GenWidenVectorStores(StChain, ST);
2437 if (StChain.size() == 1)
2440 return DAG.getNode(ISD::TokenFactor, SDLoc(ST),
2441 MVT::Other,&StChain[0],StChain.size());
2444 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2445 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2446 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2449 // WARNING: In this code we widen the compare instruction with garbage.
2450 // This garbage may contain denormal floats which may be slow. Is this a real
2451 // concern ? Should we zero the unused lanes if this is a float compare ?
2453 // Get a new SETCC node to compare the newly widened operands.
2454 // Only some of the compared elements are legal.
2455 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2456 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2457 SVT, InOp0, InOp1, N->getOperand(2));
2459 // Extract the needed results from the result vector.
2460 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2461 SVT.getVectorElementType(),
2462 N->getValueType(0).getVectorNumElements());
2463 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2464 ResVT, WideSETCC, DAG.getConstant(0,
2465 TLI.getVectorIdxTy()));
2467 return PromoteTargetBoolean(CC, N->getValueType(0));
2471 //===----------------------------------------------------------------------===//
2472 // Vector Widening Utilities
2473 //===----------------------------------------------------------------------===//
2475 // Utility function to find the type to chop up a widen vector for load/store
2476 // TLI: Target lowering used to determine legal types.
2477 // Width: Width left need to load/store.
2478 // WidenVT: The widen vector type to load to/store from
2479 // Align: If 0, don't allow use of a wider type
2480 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2482 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2483 unsigned Width, EVT WidenVT,
2484 unsigned Align = 0, unsigned WidenEx = 0) {
2485 EVT WidenEltVT = WidenVT.getVectorElementType();
2486 unsigned WidenWidth = WidenVT.getSizeInBits();
2487 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2488 unsigned AlignInBits = Align*8;
2490 // If we have one element to load/store, return it.
2491 EVT RetVT = WidenEltVT;
2492 if (Width == WidenEltWidth)
2495 // See if there is larger legal integer than the element type to load/store
2497 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2498 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2499 EVT MemVT((MVT::SimpleValueType) VT);
2500 unsigned MemVTWidth = MemVT.getSizeInBits();
2501 if (MemVT.getSizeInBits() <= WidenEltWidth)
2503 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2504 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2505 (MemVTWidth <= Width ||
2506 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2512 // See if there is a larger vector type to load/store that has the same vector
2513 // element type and is evenly divisible with the WidenVT.
2514 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2515 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2516 EVT MemVT = (MVT::SimpleValueType) VT;
2517 unsigned MemVTWidth = MemVT.getSizeInBits();
2518 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2519 (WidenWidth % MemVTWidth) == 0 &&
2520 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2521 (MemVTWidth <= Width ||
2522 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2523 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2531 // Builds a vector type from scalar loads
2532 // VecTy: Resulting Vector type
2533 // LDOps: Load operators to build a vector type
2534 // [Start,End) the list of loads to use.
2535 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2536 SmallVectorImpl<SDValue> &LdOps,
2537 unsigned Start, unsigned End) {
2538 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2539 SDLoc dl(LdOps[Start]);
2540 EVT LdTy = LdOps[Start].getValueType();
2541 unsigned Width = VecTy.getSizeInBits();
2542 unsigned NumElts = Width / LdTy.getSizeInBits();
2543 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2546 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2548 for (unsigned i = Start + 1; i != End; ++i) {
2549 EVT NewLdTy = LdOps[i].getValueType();
2550 if (NewLdTy != LdTy) {
2551 NumElts = Width / NewLdTy.getSizeInBits();
2552 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2553 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2554 // Readjust position and vector position based on new load type
2555 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2558 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2559 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2561 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2564 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2566 // The strategy assumes that we can efficiently load powers of two widths.
2567 // The routines chops the vector into the largest vector loads with the same
2568 // element type or scalar loads and then recombines it to the widen vector
2570 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2571 unsigned WidenWidth = WidenVT.getSizeInBits();
2572 EVT LdVT = LD->getMemoryVT();
2574 assert(LdVT.isVector() && WidenVT.isVector());
2575 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2578 SDValue Chain = LD->getChain();
2579 SDValue BasePtr = LD->getBasePtr();
2580 unsigned Align = LD->getAlignment();
2581 bool isVolatile = LD->isVolatile();
2582 bool isNonTemporal = LD->isNonTemporal();
2583 bool isInvariant = LD->isInvariant();
2584 const MDNode *TBAAInfo = LD->getTBAAInfo();
2586 int LdWidth = LdVT.getSizeInBits();
2587 int WidthDiff = WidenWidth - LdWidth; // Difference
2588 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2590 // Find the vector type that can load from.
2591 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2592 int NewVTWidth = NewVT.getSizeInBits();
2593 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2594 isVolatile, isNonTemporal, isInvariant, Align,
2596 LdChain.push_back(LdOp.getValue(1));
2598 // Check if we can load the element with one instruction
2599 if (LdWidth <= NewVTWidth) {
2600 if (!NewVT.isVector()) {
2601 unsigned NumElts = WidenWidth / NewVTWidth;
2602 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2603 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2604 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2606 if (NewVT == WidenVT)
2609 assert(WidenWidth % NewVTWidth == 0);
2610 unsigned NumConcat = WidenWidth / NewVTWidth;
2611 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2612 SDValue UndefVal = DAG.getUNDEF(NewVT);
2613 ConcatOps[0] = LdOp;
2614 for (unsigned i = 1; i != NumConcat; ++i)
2615 ConcatOps[i] = UndefVal;
2616 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2620 // Load vector by using multiple loads from largest vector to scalar
2621 SmallVector<SDValue, 16> LdOps;
2622 LdOps.push_back(LdOp);
2624 LdWidth -= NewVTWidth;
2625 unsigned Offset = 0;
2627 while (LdWidth > 0) {
2628 unsigned Increment = NewVTWidth / 8;
2629 Offset += Increment;
2630 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2631 DAG.getConstant(Increment, BasePtr.getValueType()));
2634 if (LdWidth < NewVTWidth) {
2635 // Our current type we are using is too large, find a better size
2636 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2637 NewVTWidth = NewVT.getSizeInBits();
2638 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2639 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2640 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2642 LdChain.push_back(L.getValue(1));
2643 if (L->getValueType(0).isVector()) {
2644 SmallVector<SDValue, 16> Loads;
2646 unsigned size = L->getValueSizeInBits(0);
2647 while (size < LdOp->getValueSizeInBits(0)) {
2648 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2649 size += L->getValueSizeInBits(0);
2651 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2652 &Loads[0], Loads.size());
2655 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2656 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2657 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2659 LdChain.push_back(L.getValue(1));
2665 LdWidth -= NewVTWidth;
2668 // Build the vector from the loads operations
2669 unsigned End = LdOps.size();
2670 if (!LdOps[0].getValueType().isVector())
2671 // All the loads are scalar loads.
2672 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2674 // If the load contains vectors, build the vector using concat vector.
2675 // All of the vectors used to loads are power of 2 and the scalars load
2676 // can be combined to make a power of 2 vector.
2677 SmallVector<SDValue, 16> ConcatOps(End);
2680 EVT LdTy = LdOps[i].getValueType();
2681 // First combine the scalar loads to a vector
2682 if (!LdTy.isVector()) {
2683 for (--i; i >= 0; --i) {
2684 LdTy = LdOps[i].getValueType();
2685 if (LdTy.isVector())
2688 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2690 ConcatOps[--Idx] = LdOps[i];
2691 for (--i; i >= 0; --i) {
2692 EVT NewLdTy = LdOps[i].getValueType();
2693 if (NewLdTy != LdTy) {
2694 // Create a larger vector
2695 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2696 &ConcatOps[Idx], End - Idx);
2700 ConcatOps[--Idx] = LdOps[i];
2703 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2704 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2705 &ConcatOps[Idx], End - Idx);
2707 // We need to fill the rest with undefs to build the vector
2708 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2709 SmallVector<SDValue, 16> WidenOps(NumOps);
2710 SDValue UndefVal = DAG.getUNDEF(LdTy);
2713 for (; i != End-Idx; ++i)
2714 WidenOps[i] = ConcatOps[Idx+i];
2715 for (; i != NumOps; ++i)
2716 WidenOps[i] = UndefVal;
2718 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2722 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2724 ISD::LoadExtType ExtType) {
2725 // For extension loads, it may not be more efficient to chop up the vector
2726 // and then extended it. Instead, we unroll the load and build a new vector.
2727 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2728 EVT LdVT = LD->getMemoryVT();
2730 assert(LdVT.isVector() && WidenVT.isVector());
2733 SDValue Chain = LD->getChain();
2734 SDValue BasePtr = LD->getBasePtr();
2735 unsigned Align = LD->getAlignment();
2736 bool isVolatile = LD->isVolatile();
2737 bool isNonTemporal = LD->isNonTemporal();
2738 const MDNode *TBAAInfo = LD->getTBAAInfo();
2740 EVT EltVT = WidenVT.getVectorElementType();
2741 EVT LdEltVT = LdVT.getVectorElementType();
2742 unsigned NumElts = LdVT.getVectorNumElements();
2744 // Load each element and widen
2745 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2746 SmallVector<SDValue, 16> Ops(WidenNumElts);
2747 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2748 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2749 LD->getPointerInfo(),
2750 LdEltVT, isVolatile, isNonTemporal, Align, TBAAInfo);
2751 LdChain.push_back(Ops[0].getValue(1));
2752 unsigned i = 0, Offset = Increment;
2753 for (i=1; i < NumElts; ++i, Offset += Increment) {
2754 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2756 DAG.getConstant(Offset,
2757 BasePtr.getValueType()));
2758 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2759 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2760 isVolatile, isNonTemporal, Align, TBAAInfo);
2761 LdChain.push_back(Ops[i].getValue(1));
2764 // Fill the rest with undefs
2765 SDValue UndefVal = DAG.getUNDEF(EltVT);
2766 for (; i != WidenNumElts; ++i)
2769 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2773 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2775 // The strategy assumes that we can efficiently store powers of two widths.
2776 // The routines chops the vector into the largest vector stores with the same
2777 // element type or scalar stores.
2778 SDValue Chain = ST->getChain();
2779 SDValue BasePtr = ST->getBasePtr();
2780 unsigned Align = ST->getAlignment();
2781 bool isVolatile = ST->isVolatile();
2782 bool isNonTemporal = ST->isNonTemporal();
2783 const MDNode *TBAAInfo = ST->getTBAAInfo();
2784 SDValue ValOp = GetWidenedVector(ST->getValue());
2787 EVT StVT = ST->getMemoryVT();
2788 unsigned StWidth = StVT.getSizeInBits();
2789 EVT ValVT = ValOp.getValueType();
2790 unsigned ValWidth = ValVT.getSizeInBits();
2791 EVT ValEltVT = ValVT.getVectorElementType();
2792 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2793 assert(StVT.getVectorElementType() == ValEltVT);
2795 int Idx = 0; // current index to store
2796 unsigned Offset = 0; // offset from base to store
2797 while (StWidth != 0) {
2798 // Find the largest vector type we can store with
2799 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2800 unsigned NewVTWidth = NewVT.getSizeInBits();
2801 unsigned Increment = NewVTWidth / 8;
2802 if (NewVT.isVector()) {
2803 unsigned NumVTElts = NewVT.getVectorNumElements();
2805 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2806 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2807 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2808 ST->getPointerInfo().getWithOffset(Offset),
2809 isVolatile, isNonTemporal,
2810 MinAlign(Align, Offset), TBAAInfo));
2811 StWidth -= NewVTWidth;
2812 Offset += Increment;
2814 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2815 DAG.getConstant(Increment, BasePtr.getValueType()));
2816 } while (StWidth != 0 && StWidth >= NewVTWidth);
2818 // Cast the vector to the scalar type we can store
2819 unsigned NumElts = ValWidth / NewVTWidth;
2820 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2821 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2822 // Readjust index position based on new vector type
2823 Idx = Idx * ValEltWidth / NewVTWidth;
2825 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2826 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2827 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2828 ST->getPointerInfo().getWithOffset(Offset),
2829 isVolatile, isNonTemporal,
2830 MinAlign(Align, Offset), TBAAInfo));
2831 StWidth -= NewVTWidth;
2832 Offset += Increment;
2833 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2834 DAG.getConstant(Increment, BasePtr.getValueType()));
2835 } while (StWidth != 0 && StWidth >= NewVTWidth);
2836 // Restore index back to be relative to the original widen element type
2837 Idx = Idx * NewVTWidth / ValEltWidth;
2843 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2845 // For extension loads, it may not be more efficient to truncate the vector
2846 // and then store it. Instead, we extract each element and then store it.
2847 SDValue Chain = ST->getChain();
2848 SDValue BasePtr = ST->getBasePtr();
2849 unsigned Align = ST->getAlignment();
2850 bool isVolatile = ST->isVolatile();
2851 bool isNonTemporal = ST->isNonTemporal();
2852 const MDNode *TBAAInfo = ST->getTBAAInfo();
2853 SDValue ValOp = GetWidenedVector(ST->getValue());
2856 EVT StVT = ST->getMemoryVT();
2857 EVT ValVT = ValOp.getValueType();
2859 // It must be true that we the widen vector type is bigger than where
2860 // we need to store.
2861 assert(StVT.isVector() && ValOp.getValueType().isVector());
2862 assert(StVT.bitsLT(ValOp.getValueType()));
2864 // For truncating stores, we can not play the tricks of chopping legal
2865 // vector types and bit cast it to the right type. Instead, we unroll
2867 EVT StEltVT = StVT.getVectorElementType();
2868 EVT ValEltVT = ValVT.getVectorElementType();
2869 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2870 unsigned NumElts = StVT.getVectorNumElements();
2871 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2872 DAG.getConstant(0, TLI.getVectorIdxTy()));
2873 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2874 ST->getPointerInfo(), StEltVT,
2875 isVolatile, isNonTemporal, Align,
2877 unsigned Offset = Increment;
2878 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2879 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2880 BasePtr, DAG.getConstant(Offset,
2881 BasePtr.getValueType()));
2882 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2883 DAG.getConstant(0, TLI.getVectorIdxTy()));
2884 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2885 ST->getPointerInfo().getWithOffset(Offset),
2886 StEltVT, isVolatile, isNonTemporal,
2887 MinAlign(Align, Offset), TBAAInfo));
2891 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2892 /// input vector must have the same element type as NVT.
2893 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2894 // Note that InOp might have been widened so it might already have
2895 // the right width or it might need be narrowed.
2896 EVT InVT = InOp.getValueType();
2897 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2898 "input and widen element type must match");
2901 // Check if InOp already has the right width.
2905 unsigned InNumElts = InVT.getVectorNumElements();
2906 unsigned WidenNumElts = NVT.getVectorNumElements();
2907 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2908 unsigned NumConcat = WidenNumElts / InNumElts;
2909 SmallVector<SDValue, 16> Ops(NumConcat);
2910 SDValue UndefVal = DAG.getUNDEF(InVT);
2912 for (unsigned i = 1; i != NumConcat; ++i)
2915 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2918 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2919 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2920 DAG.getConstant(0, TLI.getVectorIdxTy()));
2922 // Fall back to extract and build.
2923 SmallVector<SDValue, 16> Ops(WidenNumElts);
2924 EVT EltVT = NVT.getVectorElementType();
2925 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2927 for (Idx = 0; Idx < MinNumElts; ++Idx)
2928 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2929 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2931 SDValue UndefVal = DAG.getUNDEF(EltVT);
2932 for ( ; Idx < WidenNumElts; ++Idx)
2933 Ops[Idx] = UndefVal;
2934 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);