1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 //===----------------------------------------------------------------------===//
30 // Result Vector Scalarization: <1 x ty> -> ty.
31 //===----------------------------------------------------------------------===//
33 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
34 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
37 SDValue R = SDValue();
39 switch (N->getOpcode()) {
42 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
46 report_fatal_error("Do not know how to scalarize the result of this "
49 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
51 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
52 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
53 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
54 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
55 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
56 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
57 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
58 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
59 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
60 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
62 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
63 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
64 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
65 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
66 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
90 case ISD::SIGN_EXTEND:
94 case ISD::ZERO_EXTEND:
95 R = ScalarizeVecRes_UnaryOp(N);
117 R = ScalarizeVecRes_BinOp(N);
120 R = ScalarizeVecRes_TernaryOp(N);
124 // If R is null, the sub-method took care of registering the result.
126 SetScalarizedVector(SDValue(N, ResNo), R);
129 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
130 SDValue LHS = GetScalarizedVector(N->getOperand(0));
131 SDValue RHS = GetScalarizedVector(N->getOperand(1));
132 return DAG.getNode(N->getOpcode(), SDLoc(N),
133 LHS.getValueType(), LHS, RHS);
136 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
137 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
138 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
139 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
140 return DAG.getNode(N->getOpcode(), SDLoc(N),
141 Op0.getValueType(), Op0, Op1, Op2);
144 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
146 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
147 return GetScalarizedVector(Op);
150 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
151 EVT NewVT = N->getValueType(0).getVectorElementType();
152 return DAG.getNode(ISD::BITCAST, SDLoc(N),
153 NewVT, N->getOperand(0));
156 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
157 EVT EltVT = N->getValueType(0).getVectorElementType();
158 SDValue InOp = N->getOperand(0);
159 // The BUILD_VECTOR operands may be of wider element types and
160 // we may need to truncate them back to the requested return type.
161 if (EltVT.isInteger())
162 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
166 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
167 EVT NewVT = N->getValueType(0).getVectorElementType();
168 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
169 return DAG.getConvertRndSat(NewVT, SDLoc(N),
170 Op0, DAG.getValueType(NewVT),
171 DAG.getValueType(Op0.getValueType()),
174 cast<CvtRndSatSDNode>(N)->getCvtCode());
177 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
178 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
179 N->getValueType(0).getVectorElementType(),
180 N->getOperand(0), N->getOperand(1));
183 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
184 EVT NewVT = N->getValueType(0).getVectorElementType();
185 SDValue Op = GetScalarizedVector(N->getOperand(0));
186 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
187 NewVT, Op, N->getOperand(1));
190 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
191 SDValue Op = GetScalarizedVector(N->getOperand(0));
192 return DAG.getNode(ISD::FPOWI, SDLoc(N),
193 Op.getValueType(), Op, N->getOperand(1));
196 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
197 // The value to insert may have a wider type than the vector element type,
198 // so be sure to truncate it to the element type if necessary.
199 SDValue Op = N->getOperand(1);
200 EVT EltVT = N->getValueType(0).getVectorElementType();
201 if (Op.getValueType() != EltVT)
202 // FIXME: Can this happen for floating point types?
203 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
207 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
208 assert(N->isUnindexed() && "Indexed vector load?");
210 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
211 N->getExtensionType(),
212 N->getValueType(0).getVectorElementType(),
214 N->getChain(), N->getBasePtr(),
215 DAG.getUNDEF(N->getBasePtr().getValueType()),
217 N->getMemoryVT().getVectorElementType(),
218 N->isVolatile(), N->isNonTemporal(),
219 N->isInvariant(), N->getOriginalAlignment());
221 // Legalized the chain result - switch anything that used the old chain to
223 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
227 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
228 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
229 EVT DestVT = N->getValueType(0).getVectorElementType();
230 SDValue Op = GetScalarizedVector(N->getOperand(0));
231 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
234 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
235 EVT EltVT = N->getValueType(0).getVectorElementType();
236 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
237 SDValue LHS = GetScalarizedVector(N->getOperand(0));
238 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
239 LHS, DAG.getValueType(ExtVT));
242 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
243 // If the operand is wider than the vector element type then it is implicitly
244 // truncated. Make that explicit here.
245 EVT EltVT = N->getValueType(0).getVectorElementType();
246 SDValue InOp = N->getOperand(0);
247 if (InOp.getValueType() != EltVT)
248 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
252 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
253 SDValue Cond = GetScalarizedVector(N->getOperand(0));
254 SDValue LHS = GetScalarizedVector(N->getOperand(1));
255 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
256 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
257 if (ScalarBool != VecBool) {
258 EVT CondVT = Cond.getValueType();
259 switch (ScalarBool) {
260 case TargetLowering::UndefinedBooleanContent:
262 case TargetLowering::ZeroOrOneBooleanContent:
263 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
264 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
265 // Vector read from all ones, scalar expects a single 1 so mask.
266 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
267 Cond, DAG.getConstant(1, CondVT));
269 case TargetLowering::ZeroOrNegativeOneBooleanContent:
270 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
271 VecBool == TargetLowering::ZeroOrOneBooleanContent);
272 // Vector reads from a one, scalar from all ones so sign extend.
273 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
274 Cond, DAG.getValueType(MVT::i1));
279 return DAG.getSelect(SDLoc(N),
280 LHS.getValueType(), Cond, LHS,
281 GetScalarizedVector(N->getOperand(2)));
284 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
285 SDValue LHS = GetScalarizedVector(N->getOperand(1));
286 return DAG.getSelect(SDLoc(N),
287 LHS.getValueType(), N->getOperand(0), LHS,
288 GetScalarizedVector(N->getOperand(2)));
291 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
292 SDValue LHS = GetScalarizedVector(N->getOperand(2));
293 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
294 N->getOperand(0), N->getOperand(1),
295 LHS, GetScalarizedVector(N->getOperand(3)),
299 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
300 assert(N->getValueType(0).isVector() ==
301 N->getOperand(0).getValueType().isVector() &&
302 "Scalar/Vector type mismatch");
304 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
306 SDValue LHS = GetScalarizedVector(N->getOperand(0));
307 SDValue RHS = GetScalarizedVector(N->getOperand(1));
310 // Turn it into a scalar SETCC.
311 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
314 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
315 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
318 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
319 // Figure out if the scalar is the LHS or RHS and return it.
320 SDValue Arg = N->getOperand(2).getOperand(0);
321 if (Arg.getOpcode() == ISD::UNDEF)
322 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
323 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
324 return GetScalarizedVector(N->getOperand(Op));
327 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
328 assert(N->getValueType(0).isVector() &&
329 N->getOperand(0).getValueType().isVector() &&
330 "Operand types must be vectors");
332 SDValue LHS = GetScalarizedVector(N->getOperand(0));
333 SDValue RHS = GetScalarizedVector(N->getOperand(1));
334 EVT NVT = N->getValueType(0).getVectorElementType();
337 // Turn it into a scalar SETCC.
338 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
340 // Vectors may have a different boolean contents to scalars. Promote the
341 // value appropriately.
342 ISD::NodeType ExtendCode =
343 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
344 return DAG.getNode(ExtendCode, DL, NVT, Res);
348 //===----------------------------------------------------------------------===//
349 // Operand Vector Scalarization <1 x ty> -> ty.
350 //===----------------------------------------------------------------------===//
352 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
353 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
356 SDValue Res = SDValue();
358 if (Res.getNode() == 0) {
359 switch (N->getOpcode()) {
362 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
366 llvm_unreachable("Do not know how to scalarize this operator's operand!");
368 Res = ScalarizeVecOp_BITCAST(N);
370 case ISD::ANY_EXTEND:
371 case ISD::ZERO_EXTEND:
372 case ISD::SIGN_EXTEND:
373 Res = ScalarizeVecOp_EXTEND(N);
375 case ISD::CONCAT_VECTORS:
376 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
378 case ISD::EXTRACT_VECTOR_ELT:
379 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
382 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
387 // If the result is null, the sub-method took care of registering results etc.
388 if (!Res.getNode()) return false;
390 // If the result is N, the sub-method updated N in place. Tell the legalizer
392 if (Res.getNode() == N)
395 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
396 "Invalid operand expansion");
398 ReplaceValueWith(SDValue(N, 0), Res);
402 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
403 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
404 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
405 SDValue Elt = GetScalarizedVector(N->getOperand(0));
406 return DAG.getNode(ISD::BITCAST, SDLoc(N),
407 N->getValueType(0), Elt);
410 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
411 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
412 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTEND(SDNode *N) {
413 assert(N->getValueType(0).getVectorNumElements() == 1 &&
414 "Unexected vector type!");
415 SDValue Elt = GetScalarizedVector(N->getOperand(0));
416 SmallVector<SDValue, 1> Ops(1);
417 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N),
418 N->getValueType(0).getScalarType(), Elt);
419 // Revectorize the result so the types line up with what the uses of this
420 // expression expect.
421 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
425 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
426 /// use a BUILD_VECTOR instead.
427 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
428 SmallVector<SDValue, 8> Ops(N->getNumOperands());
429 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
430 Ops[i] = GetScalarizedVector(N->getOperand(i));
431 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
432 &Ops[0], Ops.size());
435 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
436 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
438 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
439 SDValue Res = GetScalarizedVector(N->getOperand(0));
440 if (Res.getValueType() != N->getValueType(0))
441 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
446 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
447 /// scalarized, it must be <1 x ty>. Just store the element.
448 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
449 assert(N->isUnindexed() && "Indexed store of one-element vector?");
450 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
453 if (N->isTruncatingStore())
454 return DAG.getTruncStore(N->getChain(), dl,
455 GetScalarizedVector(N->getOperand(1)),
456 N->getBasePtr(), N->getPointerInfo(),
457 N->getMemoryVT().getVectorElementType(),
458 N->isVolatile(), N->isNonTemporal(),
461 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
462 N->getBasePtr(), N->getPointerInfo(),
463 N->isVolatile(), N->isNonTemporal(),
464 N->getOriginalAlignment());
468 //===----------------------------------------------------------------------===//
469 // Result Vector Splitting
470 //===----------------------------------------------------------------------===//
472 /// SplitVectorResult - This method is called when the specified result of the
473 /// specified node is found to need vector splitting. At this point, the node
474 /// may also have invalid operands or may have other results that need
475 /// legalization, we just know that (at least) one result needs vector
477 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
478 DEBUG(dbgs() << "Split node result: ";
483 // See if the target wants to custom expand this node.
484 if (CustomLowerNode(N, N->getValueType(ResNo), true))
487 switch (N->getOpcode()) {
490 dbgs() << "SplitVectorResult #" << ResNo << ": ";
494 report_fatal_error("Do not know how to split the result of this "
497 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
499 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
500 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
501 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
502 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
503 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
504 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
505 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
506 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
507 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
508 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
509 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
510 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
512 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
515 SplitVecRes_SETCC(N, Lo, Hi);
517 case ISD::VECTOR_SHUFFLE:
518 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
521 case ISD::ANY_EXTEND:
522 case ISD::CONVERT_RNDSAT:
525 case ISD::CTLZ_ZERO_UNDEF:
526 case ISD::CTTZ_ZERO_UNDEF:
537 case ISD::FNEARBYINT:
541 case ISD::FP_TO_SINT:
542 case ISD::FP_TO_UINT:
548 case ISD::SIGN_EXTEND:
549 case ISD::SINT_TO_FP:
551 case ISD::UINT_TO_FP:
552 case ISD::ZERO_EXTEND:
553 SplitVecRes_UnaryOp(N, Lo, Hi);
575 SplitVecRes_BinOp(N, Lo, Hi);
578 SplitVecRes_TernaryOp(N, Lo, Hi);
582 // If Lo/Hi is null, the sub-method took care of registering results etc.
584 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
587 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
589 SDValue LHSLo, LHSHi;
590 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
591 SDValue RHSLo, RHSHi;
592 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
595 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
596 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
599 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
601 SDValue Op0Lo, Op0Hi;
602 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
603 SDValue Op1Lo, Op1Hi;
604 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
605 SDValue Op2Lo, Op2Hi;
606 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
609 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
610 Op0Lo, Op1Lo, Op2Lo);
611 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
612 Op0Hi, Op1Hi, Op2Hi);
615 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
617 // We know the result is a vector. The input may be either a vector or a
620 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
623 SDValue InOp = N->getOperand(0);
624 EVT InVT = InOp.getValueType();
626 // Handle some special cases efficiently.
627 switch (getTypeAction(InVT)) {
628 case TargetLowering::TypeLegal:
629 case TargetLowering::TypePromoteInteger:
630 case TargetLowering::TypeSoftenFloat:
631 case TargetLowering::TypeScalarizeVector:
632 case TargetLowering::TypeWidenVector:
634 case TargetLowering::TypeExpandInteger:
635 case TargetLowering::TypeExpandFloat:
636 // A scalar to vector conversion, where the scalar needs expansion.
637 // If the vector is being split in two then we can just convert the
640 GetExpandedOp(InOp, Lo, Hi);
641 if (TLI.isBigEndian())
643 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
644 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
648 case TargetLowering::TypeSplitVector:
649 // If the input is a vector that needs to be split, convert each split
650 // piece of the input now.
651 GetSplitVector(InOp, Lo, Hi);
652 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
653 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
657 // In the general case, convert the input to an integer and split it by hand.
658 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
659 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
660 if (TLI.isBigEndian())
661 std::swap(LoIntVT, HiIntVT);
663 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
665 if (TLI.isBigEndian())
667 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
668 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
671 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
675 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
676 unsigned LoNumElts = LoVT.getVectorNumElements();
677 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
678 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
680 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
681 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
684 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
686 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
688 unsigned NumSubvectors = N->getNumOperands() / 2;
689 if (NumSubvectors == 1) {
690 Lo = N->getOperand(0);
691 Hi = N->getOperand(1);
696 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
698 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
699 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, &LoOps[0], LoOps.size());
701 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
702 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, &HiOps[0], HiOps.size());
705 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
707 SDValue Vec = N->getOperand(0);
708 SDValue Idx = N->getOperand(1);
712 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
714 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
715 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
716 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
717 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
718 TLI.getVectorIdxTy()));
721 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
724 GetSplitVector(N->getOperand(0), Lo, Hi);
725 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
726 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
729 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
731 SDValue LHSLo, LHSHi;
732 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
736 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT);
738 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
739 DAG.getValueType(LoVT));
740 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
741 DAG.getValueType(HiVT));
744 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
746 SDValue Vec = N->getOperand(0);
747 SDValue Elt = N->getOperand(1);
748 SDValue Idx = N->getOperand(2);
750 GetSplitVector(Vec, Lo, Hi);
752 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
753 unsigned IdxVal = CIdx->getZExtValue();
754 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
755 if (IdxVal < LoNumElts)
756 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
757 Lo.getValueType(), Lo, Elt, Idx);
759 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
760 DAG.getConstant(IdxVal - LoNumElts,
761 TLI.getVectorIdxTy()));
765 // Spill the vector to the stack.
766 EVT VecVT = Vec.getValueType();
767 EVT EltVT = VecVT.getVectorElementType();
768 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
769 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
770 MachinePointerInfo(), false, false, 0);
772 // Store the new element. This may be larger than the vector element type,
773 // so use a truncating store.
774 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
775 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
777 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
778 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
781 // Load the Lo part from the stack slot.
782 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
783 false, false, false, 0);
785 // Increment the pointer to the other part.
786 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
787 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
788 DAG.getIntPtrConstant(IncrementSize));
790 // Load the Hi part from the stack slot.
791 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
792 false, false, false, MinAlign(Alignment, IncrementSize));
795 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
799 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
800 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
801 Hi = DAG.getUNDEF(HiVT);
804 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
806 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
809 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
811 ISD::LoadExtType ExtType = LD->getExtensionType();
812 SDValue Ch = LD->getChain();
813 SDValue Ptr = LD->getBasePtr();
814 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
815 EVT MemoryVT = LD->getMemoryVT();
816 unsigned Alignment = LD->getOriginalAlignment();
817 bool isVolatile = LD->isVolatile();
818 bool isNonTemporal = LD->isNonTemporal();
819 bool isInvariant = LD->isInvariant();
821 EVT LoMemVT, HiMemVT;
822 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
824 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
825 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
826 isInvariant, Alignment);
828 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
829 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
830 DAG.getIntPtrConstant(IncrementSize));
831 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
832 LD->getPointerInfo().getWithOffset(IncrementSize),
833 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment);
835 // Build a factor node to remember that this load is independent of the
837 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
840 // Legalized the chain result - switch anything that used the old chain to
842 ReplaceValueWith(SDValue(LD, 1), Ch);
845 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
846 assert(N->getValueType(0).isVector() &&
847 N->getOperand(0).getValueType().isVector() &&
848 "Operand types must be vectors");
852 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
855 EVT InVT = N->getOperand(0).getValueType();
856 SDValue LL, LH, RL, RH;
857 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
858 LoVT.getVectorNumElements());
859 LL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
860 DAG.getConstant(0, TLI.getVectorIdxTy()));
861 LH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(0),
862 DAG.getConstant(InNVT.getVectorNumElements(),
863 TLI.getVectorIdxTy()));
865 RL = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
866 DAG.getConstant(0, TLI.getVectorIdxTy()));
867 RH = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, N->getOperand(1),
868 DAG.getConstant(InNVT.getVectorNumElements(),
869 TLI.getVectorIdxTy()));
871 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
872 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
875 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
877 // Get the dest types - they may not match the input types, e.g. int_to_fp.
880 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
882 // If the input also splits, handle it directly for a compile time speedup.
883 // Otherwise split it by hand.
884 EVT InVT = N->getOperand(0).getValueType();
885 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) {
886 GetSplitVector(N->getOperand(0), Lo, Hi);
888 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType(),
889 LoVT.getVectorNumElements());
890 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
891 DAG.getConstant(0, TLI.getVectorIdxTy()));
892 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, N->getOperand(0),
893 DAG.getConstant(InNVT.getVectorNumElements(),
894 TLI.getVectorIdxTy()));
897 if (N->getOpcode() == ISD::FP_ROUND) {
898 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
899 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
900 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
901 SDValue DTyOpLo = DAG.getValueType(LoVT);
902 SDValue DTyOpHi = DAG.getValueType(HiVT);
903 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
904 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
905 SDValue RndOp = N->getOperand(3);
906 SDValue SatOp = N->getOperand(4);
907 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
908 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
910 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
913 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
914 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
918 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
919 SDValue &Lo, SDValue &Hi) {
920 // The low and high parts of the original input give four input vectors.
923 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
924 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
925 EVT NewVT = Inputs[0].getValueType();
926 unsigned NewElts = NewVT.getVectorNumElements();
928 // If Lo or Hi uses elements from at most two of the four input vectors, then
929 // express it as a vector shuffle of those two inputs. Otherwise extract the
930 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
931 SmallVector<int, 16> Ops;
932 for (unsigned High = 0; High < 2; ++High) {
933 SDValue &Output = High ? Hi : Lo;
935 // Build a shuffle mask for the output, discovering on the fly which
936 // input vectors to use as shuffle operands (recorded in InputUsed).
937 // If building a suitable shuffle vector proves too hard, then bail
938 // out with useBuildVector set.
939 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
940 unsigned FirstMaskIdx = High * NewElts;
941 bool useBuildVector = false;
942 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
943 // The mask element. This indexes into the input.
944 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
946 // The input vector this mask element indexes into.
947 unsigned Input = (unsigned)Idx / NewElts;
949 if (Input >= array_lengthof(Inputs)) {
950 // The mask element does not index into any input vector.
955 // Turn the index into an offset from the start of the input vector.
956 Idx -= Input * NewElts;
958 // Find or create a shuffle vector operand to hold this input.
960 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
961 if (InputUsed[OpNo] == Input) {
962 // This input vector is already an operand.
964 } else if (InputUsed[OpNo] == -1U) {
965 // Create a new operand for this input vector.
966 InputUsed[OpNo] = Input;
971 if (OpNo >= array_lengthof(InputUsed)) {
972 // More than two input vectors used! Give up on trying to create a
973 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
974 useBuildVector = true;
978 // Add the mask index for the new shuffle vector.
979 Ops.push_back(Idx + OpNo * NewElts);
982 if (useBuildVector) {
983 EVT EltVT = NewVT.getVectorElementType();
984 SmallVector<SDValue, 16> SVOps;
986 // Extract the input elements by hand.
987 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
988 // The mask element. This indexes into the input.
989 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
991 // The input vector this mask element indexes into.
992 unsigned Input = (unsigned)Idx / NewElts;
994 if (Input >= array_lengthof(Inputs)) {
995 // The mask element is "undef" or indexes off the end of the input.
996 SVOps.push_back(DAG.getUNDEF(EltVT));
1000 // Turn the index into an offset from the start of the input vector.
1001 Idx -= Input * NewElts;
1003 // Extract the vector element by hand.
1004 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1005 Inputs[Input], DAG.getConstant(Idx,
1006 TLI.getVectorIdxTy())));
1009 // Construct the Lo/Hi output using a BUILD_VECTOR.
1010 Output = DAG.getNode(ISD::BUILD_VECTOR,dl,NewVT, &SVOps[0], SVOps.size());
1011 } else if (InputUsed[0] == -1U) {
1012 // No input vectors were used! The result is undefined.
1013 Output = DAG.getUNDEF(NewVT);
1015 SDValue Op0 = Inputs[InputUsed[0]];
1016 // If only one input was used, use an undefined vector for the other.
1017 SDValue Op1 = InputUsed[1] == -1U ?
1018 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1019 // At least one input vector was used. Create a new shuffle vector.
1020 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1028 //===----------------------------------------------------------------------===//
1029 // Operand Vector Splitting
1030 //===----------------------------------------------------------------------===//
1032 /// SplitVectorOperand - This method is called when the specified operand of the
1033 /// specified node is found to need vector splitting. At this point, all of the
1034 /// result types of the node are known to be legal, but other operands of the
1035 /// node may need legalization as well as the specified one.
1036 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1037 DEBUG(dbgs() << "Split node operand: ";
1040 SDValue Res = SDValue();
1042 // See if the target wants to custom split this node.
1043 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1046 if (Res.getNode() == 0) {
1047 switch (N->getOpcode()) {
1050 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1054 report_fatal_error("Do not know how to split this operator's "
1057 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1058 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1059 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1060 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1061 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1062 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1063 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1065 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1068 Res = SplitVecOp_VSELECT(N, OpNo);
1073 case ISD::FP_EXTEND:
1074 case ISD::FP_TO_SINT:
1075 case ISD::FP_TO_UINT:
1076 case ISD::SINT_TO_FP:
1077 case ISD::UINT_TO_FP:
1079 case ISD::SIGN_EXTEND:
1080 case ISD::ZERO_EXTEND:
1081 case ISD::ANY_EXTEND:
1082 Res = SplitVecOp_UnaryOp(N);
1087 // If the result is null, the sub-method took care of registering results etc.
1088 if (!Res.getNode()) return false;
1090 // If the result is N, the sub-method updated N in place. Tell the legalizer
1092 if (Res.getNode() == N)
1095 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1096 "Invalid operand expansion");
1098 ReplaceValueWith(SDValue(N, 0), Res);
1102 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1103 // The only possibility for an illegal operand is the mask, since result type
1104 // legalization would have handled this node already otherwise.
1105 assert(OpNo == 0 && "Illegal operand must be mask");
1107 SDValue Mask = N->getOperand(0);
1108 SDValue Src0 = N->getOperand(1);
1109 SDValue Src1 = N->getOperand(2);
1111 EVT MaskVT = Mask.getValueType();
1112 assert(MaskVT.isVector() && "VSELECT without a vector mask?");
1115 GetSplitVector(N->getOperand(0), Lo, Hi);
1116 assert(Lo.getValueType() == Hi.getValueType() &&
1117 "Lo and Hi have differing types");
1119 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
1120 unsigned HiNumElts = Hi.getValueType().getVectorNumElements();
1121 assert(LoNumElts == HiNumElts && "Asymmetric vector split?");
1123 LLVMContext &Ctx = *DAG.getContext();
1124 SDValue Zero = DAG.getConstant(0, TLI.getVectorIdxTy());
1125 SDValue LoElts = DAG.getConstant(LoNumElts, TLI.getVectorIdxTy());
1126 EVT Src0VT = Src0.getValueType();
1127 EVT Src0EltTy = Src0VT.getVectorElementType();
1128 EVT MaskEltTy = MaskVT.getVectorElementType();
1130 EVT LoOpVT = EVT::getVectorVT(Ctx, Src0EltTy, LoNumElts);
1131 EVT LoMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, LoNumElts);
1132 EVT HiOpVT = EVT::getVectorVT(Ctx, Src0EltTy, HiNumElts);
1133 EVT HiMaskVT = EVT::getVectorVT(Ctx, MaskEltTy, HiNumElts);
1135 SDValue LoOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src0, Zero);
1136 SDValue LoOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoOpVT, Src1, Zero);
1138 SDValue HiOp0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src0, LoElts);
1139 SDValue HiOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiOpVT, Src1, LoElts);
1142 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoMaskVT, Mask, Zero);
1144 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HiMaskVT, Mask, LoElts);
1147 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1149 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1151 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1154 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1155 // The result has a legal vector type, but the input needs splitting.
1156 EVT ResVT = N->getValueType(0);
1159 GetSplitVector(N->getOperand(0), Lo, Hi);
1160 EVT InVT = Lo.getValueType();
1162 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1163 InVT.getVectorNumElements());
1165 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1166 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1168 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1171 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1172 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1173 // end up being split all the way down to individual components. Convert the
1174 // split pieces into integers and reassemble.
1176 GetSplitVector(N->getOperand(0), Lo, Hi);
1177 Lo = BitConvertToInteger(Lo);
1178 Hi = BitConvertToInteger(Hi);
1180 if (TLI.isBigEndian())
1183 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1184 JoinIntegers(Lo, Hi));
1187 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1188 // We know that the extracted result type is legal.
1189 EVT SubVT = N->getValueType(0);
1190 SDValue Idx = N->getOperand(1);
1193 GetSplitVector(N->getOperand(0), Lo, Hi);
1195 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1196 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1198 if (IdxVal < LoElts) {
1199 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1200 "Extracted subvector crosses vector split!");
1201 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1203 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1204 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1208 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1209 SDValue Vec = N->getOperand(0);
1210 SDValue Idx = N->getOperand(1);
1211 EVT VecVT = Vec.getValueType();
1213 if (isa<ConstantSDNode>(Idx)) {
1214 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1215 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1218 GetSplitVector(Vec, Lo, Hi);
1220 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1222 if (IdxVal < LoElts)
1223 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1224 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1225 DAG.getConstant(IdxVal - LoElts,
1226 Idx.getValueType())), 0);
1229 // Store the vector to the stack.
1230 EVT EltVT = VecVT.getVectorElementType();
1232 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1233 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1234 MachinePointerInfo(), false, false, 0);
1236 // Load back the required element.
1237 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1238 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1239 MachinePointerInfo(), EltVT, false, false, 0);
1242 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1243 assert(N->isUnindexed() && "Indexed store of vector?");
1244 assert(OpNo == 1 && "Can only split the stored value");
1247 bool isTruncating = N->isTruncatingStore();
1248 SDValue Ch = N->getChain();
1249 SDValue Ptr = N->getBasePtr();
1250 EVT MemoryVT = N->getMemoryVT();
1251 unsigned Alignment = N->getOriginalAlignment();
1252 bool isVol = N->isVolatile();
1253 bool isNT = N->isNonTemporal();
1255 GetSplitVector(N->getOperand(1), Lo, Hi);
1257 EVT LoMemVT, HiMemVT;
1258 GetSplitDestVTs(MemoryVT, LoMemVT, HiMemVT);
1260 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1263 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1264 LoMemVT, isVol, isNT, Alignment);
1266 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1267 isVol, isNT, Alignment);
1269 // Increment the pointer to the other half.
1270 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1271 DAG.getIntPtrConstant(IncrementSize));
1274 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1275 N->getPointerInfo().getWithOffset(IncrementSize),
1276 HiMemVT, isVol, isNT, Alignment);
1278 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1279 N->getPointerInfo().getWithOffset(IncrementSize),
1280 isVol, isNT, Alignment);
1282 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1285 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1288 // The input operands all must have the same type, and we know the result
1289 // type is valid. Convert this to a buildvector which extracts all the
1291 // TODO: If the input elements are power-two vectors, we could convert this to
1292 // a new CONCAT_VECTORS node with elements that are half-wide.
1293 SmallVector<SDValue, 32> Elts;
1294 EVT EltVT = N->getValueType(0).getVectorElementType();
1295 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1296 SDValue Op = N->getOperand(op);
1297 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1299 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1300 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1305 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0),
1306 &Elts[0], Elts.size());
1309 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1310 // The result type is legal, but the input type is illegal. If splitting
1311 // ends up with the result type of each half still being legal, just
1312 // do that. If, however, that would result in an illegal result type,
1313 // we can try to get more clever with power-two vectors. Specifically,
1314 // split the input type, but also widen the result element size, then
1315 // concatenate the halves and truncate again. For example, consider a target
1316 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1317 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1318 // %inlo = v4i32 extract_subvector %in, 0
1319 // %inhi = v4i32 extract_subvector %in, 4
1320 // %lo16 = v4i16 trunc v4i32 %inlo
1321 // %hi16 = v4i16 trunc v4i32 %inhi
1322 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1323 // %res = v8i8 trunc v8i16 %in16
1325 // Without this transform, the original truncate would end up being
1326 // scalarized, which is pretty much always a last resort.
1327 SDValue InVec = N->getOperand(0);
1328 EVT InVT = InVec->getValueType(0);
1329 EVT OutVT = N->getValueType(0);
1330 unsigned NumElements = OutVT.getVectorNumElements();
1331 // Widening should have already made sure this is a power-two vector
1332 // if we're trying to split it at all. assert() that's true, just in case.
1333 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1335 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1336 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1338 // If the input elements are only 1/2 the width of the result elements,
1339 // just use the normal splitting. Our trick only work if there's room
1340 // to split more than once.
1341 if (InElementSize <= OutElementSize * 2)
1342 return SplitVecOp_UnaryOp(N);
1345 // Extract the halves of the input via extract_subvector.
1346 EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
1347 InVT.getVectorElementType(), NumElements/2);
1348 SDValue InLoVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1349 DAG.getConstant(0, TLI.getVectorIdxTy()));
1350 SDValue InHiVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, InVec,
1351 DAG.getConstant(NumElements/2,
1352 TLI.getVectorIdxTy()));
1353 // Truncate them to 1/2 the element size.
1354 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1355 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1357 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1358 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1359 // Concatenate them to get the full intermediate truncation result.
1360 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1361 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1363 // Now finish up by truncating all the way down to the original result
1364 // type. This should normally be something that ends up being legal directly,
1365 // but in theory if a target has very wide vectors and an annoyingly
1366 // restricted set of legal types, this split can chain to build things up.
1367 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1370 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1371 assert(N->getValueType(0).isVector() &&
1372 N->getOperand(0).getValueType().isVector() &&
1373 "Operand types must be vectors");
1374 // The result has a legal vector type, but the input needs splitting.
1375 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1377 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1378 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1379 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1380 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1381 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1383 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1384 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1385 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1386 return PromoteTargetBoolean(Con, N->getValueType(0));
1390 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1391 // The result has a legal vector type, but the input needs splitting.
1392 EVT ResVT = N->getValueType(0);
1395 GetSplitVector(N->getOperand(0), Lo, Hi);
1396 EVT InVT = Lo.getValueType();
1398 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1399 InVT.getVectorNumElements());
1401 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1402 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1404 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1409 //===----------------------------------------------------------------------===//
1410 // Result Vector Widening
1411 //===----------------------------------------------------------------------===//
1413 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1414 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1418 // See if the target wants to custom widen this node.
1419 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1422 SDValue Res = SDValue();
1423 switch (N->getOpcode()) {
1426 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1430 llvm_unreachable("Do not know how to widen the result of this operator!");
1432 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1433 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1434 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1435 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1436 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1437 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1438 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1439 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1440 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1441 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1442 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1444 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1445 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1446 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1447 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1448 case ISD::VECTOR_SHUFFLE:
1449 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1455 case ISD::FCOPYSIGN:
1471 Res = WidenVecRes_Binary(N);
1475 Res = WidenVecRes_POWI(N);
1481 Res = WidenVecRes_Shift(N);
1484 case ISD::ANY_EXTEND:
1485 case ISD::FP_EXTEND:
1487 case ISD::FP_TO_SINT:
1488 case ISD::FP_TO_UINT:
1489 case ISD::SIGN_EXTEND:
1490 case ISD::SINT_TO_FP:
1492 case ISD::UINT_TO_FP:
1493 case ISD::ZERO_EXTEND:
1494 Res = WidenVecRes_Convert(N);
1509 case ISD::FNEARBYINT:
1516 Res = WidenVecRes_Unary(N);
1519 Res = WidenVecRes_Ternary(N);
1523 // If Res is null, the sub-method took care of registering the result.
1525 SetWidenedVector(SDValue(N, ResNo), Res);
1528 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1529 // Ternary op widening.
1531 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1532 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1533 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1534 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1535 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1538 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1539 // Binary op widening.
1540 unsigned Opcode = N->getOpcode();
1542 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1543 EVT WidenEltVT = WidenVT.getVectorElementType();
1545 unsigned NumElts = VT.getVectorNumElements();
1546 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1547 NumElts = NumElts / 2;
1548 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1551 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1552 // Operation doesn't trap so just widen as normal.
1553 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1554 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1555 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1558 // No legal vector version so unroll the vector operation and then widen.
1560 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1562 // Since the operation can trap, apply operation on the original vector.
1564 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1565 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1566 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1568 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1569 unsigned ConcatEnd = 0; // Current ConcatOps index.
1570 int Idx = 0; // Current Idx into input vectors.
1572 // NumElts := greatest legal vector size (at most WidenVT)
1573 // while (orig. vector has unhandled elements) {
1574 // take munches of size NumElts from the beginning and add to ConcatOps
1575 // NumElts := next smaller supported vector size or 1
1577 while (CurNumElts != 0) {
1578 while (CurNumElts >= NumElts) {
1579 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1580 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1581 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1582 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1583 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1585 CurNumElts -= NumElts;
1588 NumElts = NumElts / 2;
1589 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1590 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1593 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1594 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1595 InOp1, DAG.getConstant(Idx,
1596 TLI.getVectorIdxTy()));
1597 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1598 InOp2, DAG.getConstant(Idx,
1599 TLI.getVectorIdxTy()));
1600 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1607 // Check to see if we have a single operation with the widen type.
1608 if (ConcatEnd == 1) {
1609 VT = ConcatOps[0].getValueType();
1611 return ConcatOps[0];
1614 // while (Some element of ConcatOps is not of type MaxVT) {
1615 // From the end of ConcatOps, collect elements of the same type and put
1616 // them into an op of the next larger supported type
1618 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1619 Idx = ConcatEnd - 1;
1620 VT = ConcatOps[Idx--].getValueType();
1621 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1624 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1628 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1629 } while (!TLI.isTypeLegal(NextVT));
1631 if (!VT.isVector()) {
1632 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1633 SDValue VecOp = DAG.getUNDEF(NextVT);
1634 unsigned NumToInsert = ConcatEnd - Idx - 1;
1635 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1636 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1637 ConcatOps[OpIdx], DAG.getConstant(i,
1638 TLI.getVectorIdxTy()));
1640 ConcatOps[Idx+1] = VecOp;
1641 ConcatEnd = Idx + 2;
1643 // Vector type, create a CONCAT_VECTORS of type NextVT
1644 SDValue undefVec = DAG.getUNDEF(VT);
1645 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1646 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1647 unsigned RealVals = ConcatEnd - Idx - 1;
1648 unsigned SubConcatEnd = 0;
1649 unsigned SubConcatIdx = Idx + 1;
1650 while (SubConcatEnd < RealVals)
1651 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1652 while (SubConcatEnd < OpsToConcat)
1653 SubConcatOps[SubConcatEnd++] = undefVec;
1654 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1655 NextVT, &SubConcatOps[0],
1657 ConcatEnd = SubConcatIdx + 1;
1661 // Check to see if we have a single operation with the widen type.
1662 if (ConcatEnd == 1) {
1663 VT = ConcatOps[0].getValueType();
1665 return ConcatOps[0];
1668 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1669 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1670 if (NumOps != ConcatEnd ) {
1671 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1672 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1673 ConcatOps[j] = UndefVal;
1675 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0], NumOps);
1678 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1679 SDValue InOp = N->getOperand(0);
1682 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1683 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1685 EVT InVT = InOp.getValueType();
1686 EVT InEltVT = InVT.getVectorElementType();
1687 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1689 unsigned Opcode = N->getOpcode();
1690 unsigned InVTNumElts = InVT.getVectorNumElements();
1692 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1693 InOp = GetWidenedVector(N->getOperand(0));
1694 InVT = InOp.getValueType();
1695 InVTNumElts = InVT.getVectorNumElements();
1696 if (InVTNumElts == WidenNumElts) {
1697 if (N->getNumOperands() == 1)
1698 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1699 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1703 if (TLI.isTypeLegal(InWidenVT)) {
1704 // Because the result and the input are different vector types, widening
1705 // the result could create a legal type but widening the input might make
1706 // it an illegal type that might lead to repeatedly splitting the input
1707 // and then widening it. To avoid this, we widen the input only if
1708 // it results in a legal type.
1709 if (WidenNumElts % InVTNumElts == 0) {
1710 // Widen the input and call convert on the widened input vector.
1711 unsigned NumConcat = WidenNumElts/InVTNumElts;
1712 SmallVector<SDValue, 16> Ops(NumConcat);
1714 SDValue UndefVal = DAG.getUNDEF(InVT);
1715 for (unsigned i = 1; i != NumConcat; ++i)
1717 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT,
1718 &Ops[0], NumConcat);
1719 if (N->getNumOperands() == 1)
1720 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1721 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1724 if (InVTNumElts % WidenNumElts == 0) {
1725 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1726 InOp, DAG.getConstant(0,
1727 TLI.getVectorIdxTy()));
1728 // Extract the input and convert the shorten input vector.
1729 if (N->getNumOperands() == 1)
1730 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1731 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1735 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1736 SmallVector<SDValue, 16> Ops(WidenNumElts);
1737 EVT EltVT = WidenVT.getVectorElementType();
1738 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1740 for (i=0; i < MinElts; ++i) {
1741 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1742 DAG.getConstant(i, TLI.getVectorIdxTy()));
1743 if (N->getNumOperands() == 1)
1744 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1746 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1749 SDValue UndefVal = DAG.getUNDEF(EltVT);
1750 for (; i < WidenNumElts; ++i)
1753 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, &Ops[0], WidenNumElts);
1756 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1757 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1758 SDValue InOp = GetWidenedVector(N->getOperand(0));
1759 SDValue ShOp = N->getOperand(1);
1760 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1763 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1764 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1765 SDValue InOp = GetWidenedVector(N->getOperand(0));
1766 SDValue ShOp = N->getOperand(1);
1768 EVT ShVT = ShOp.getValueType();
1769 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1770 ShOp = GetWidenedVector(ShOp);
1771 ShVT = ShOp.getValueType();
1773 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1774 ShVT.getVectorElementType(),
1775 WidenVT.getVectorNumElements());
1776 if (ShVT != ShWidenVT)
1777 ShOp = ModifyToType(ShOp, ShWidenVT);
1779 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1782 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1783 // Unary op widening.
1784 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1785 SDValue InOp = GetWidenedVector(N->getOperand(0));
1786 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1789 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1790 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1791 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1792 cast<VTSDNode>(N->getOperand(1))->getVT()
1793 .getVectorElementType(),
1794 WidenVT.getVectorNumElements());
1795 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1796 return DAG.getNode(N->getOpcode(), SDLoc(N),
1797 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1800 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1801 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1802 return GetWidenedVector(WidenVec);
1805 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1806 SDValue InOp = N->getOperand(0);
1807 EVT InVT = InOp.getValueType();
1808 EVT VT = N->getValueType(0);
1809 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1812 switch (getTypeAction(InVT)) {
1813 case TargetLowering::TypeLegal:
1815 case TargetLowering::TypePromoteInteger:
1816 // If the incoming type is a vector that is being promoted, then
1817 // we know that the elements are arranged differently and that we
1818 // must perform the conversion using a stack slot.
1819 if (InVT.isVector())
1822 // If the InOp is promoted to the same size, convert it. Otherwise,
1823 // fall out of the switch and widen the promoted input.
1824 InOp = GetPromotedInteger(InOp);
1825 InVT = InOp.getValueType();
1826 if (WidenVT.bitsEq(InVT))
1827 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1829 case TargetLowering::TypeSoftenFloat:
1830 case TargetLowering::TypeExpandInteger:
1831 case TargetLowering::TypeExpandFloat:
1832 case TargetLowering::TypeScalarizeVector:
1833 case TargetLowering::TypeSplitVector:
1835 case TargetLowering::TypeWidenVector:
1836 // If the InOp is widened to the same size, convert it. Otherwise, fall
1837 // out of the switch and widen the widened input.
1838 InOp = GetWidenedVector(InOp);
1839 InVT = InOp.getValueType();
1840 if (WidenVT.bitsEq(InVT))
1841 // The input widens to the same size. Convert to the widen value.
1842 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1846 unsigned WidenSize = WidenVT.getSizeInBits();
1847 unsigned InSize = InVT.getSizeInBits();
1848 // x86mmx is not an acceptable vector element type, so don't try.
1849 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1850 // Determine new input vector type. The new input vector type will use
1851 // the same element type (if its a vector) or use the input type as a
1852 // vector. It is the same size as the type to widen to.
1854 unsigned NewNumElts = WidenSize / InSize;
1855 if (InVT.isVector()) {
1856 EVT InEltVT = InVT.getVectorElementType();
1857 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1858 WidenSize / InEltVT.getSizeInBits());
1860 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1863 if (TLI.isTypeLegal(NewInVT)) {
1864 // Because the result and the input are different vector types, widening
1865 // the result could create a legal type but widening the input might make
1866 // it an illegal type that might lead to repeatedly splitting the input
1867 // and then widening it. To avoid this, we widen the input only if
1868 // it results in a legal type.
1869 SmallVector<SDValue, 16> Ops(NewNumElts);
1870 SDValue UndefVal = DAG.getUNDEF(InVT);
1872 for (unsigned i = 1; i < NewNumElts; ++i)
1876 if (InVT.isVector())
1877 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1878 NewInVT, &Ops[0], NewNumElts);
1880 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
1881 NewInVT, &Ops[0], NewNumElts);
1882 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1886 return CreateStackStoreLoad(InOp, WidenVT);
1889 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1891 // Build a vector with undefined for the new nodes.
1892 EVT VT = N->getValueType(0);
1894 // Integer BUILD_VECTOR operands may be larger than the node's vector element
1895 // type. The UNDEFs need to have the same type as the existing operands.
1896 EVT EltVT = N->getOperand(0).getValueType();
1897 unsigned NumElts = VT.getVectorNumElements();
1899 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1900 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1902 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1903 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
1904 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
1906 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &NewOps[0], NewOps.size());
1909 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1910 EVT InVT = N->getOperand(0).getValueType();
1911 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1913 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1914 unsigned NumInElts = InVT.getVectorNumElements();
1915 unsigned NumOperands = N->getNumOperands();
1917 bool InputWidened = false; // Indicates we need to widen the input.
1918 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1919 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1920 // Add undef vectors to widen to correct length.
1921 unsigned NumConcat = WidenVT.getVectorNumElements() /
1922 InVT.getVectorNumElements();
1923 SDValue UndefVal = DAG.getUNDEF(InVT);
1924 SmallVector<SDValue, 16> Ops(NumConcat);
1925 for (unsigned i=0; i < NumOperands; ++i)
1926 Ops[i] = N->getOperand(i);
1927 for (unsigned i = NumOperands; i != NumConcat; ++i)
1929 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &Ops[0], NumConcat);
1932 InputWidened = true;
1933 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
1934 // The inputs and the result are widen to the same value.
1936 for (i=1; i < NumOperands; ++i)
1937 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
1940 if (i == NumOperands)
1941 // Everything but the first operand is an UNDEF so just return the
1942 // widened first operand.
1943 return GetWidenedVector(N->getOperand(0));
1945 if (NumOperands == 2) {
1946 // Replace concat of two operands with a shuffle.
1947 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
1948 for (unsigned i = 0; i < NumInElts; ++i) {
1950 MaskOps[i + NumInElts] = i + WidenNumElts;
1952 return DAG.getVectorShuffle(WidenVT, dl,
1953 GetWidenedVector(N->getOperand(0)),
1954 GetWidenedVector(N->getOperand(1)),
1960 // Fall back to use extracts and build vector.
1961 EVT EltVT = WidenVT.getVectorElementType();
1962 SmallVector<SDValue, 16> Ops(WidenNumElts);
1964 for (unsigned i=0; i < NumOperands; ++i) {
1965 SDValue InOp = N->getOperand(i);
1967 InOp = GetWidenedVector(InOp);
1968 for (unsigned j=0; j < NumInElts; ++j)
1969 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
1970 DAG.getConstant(j, TLI.getVectorIdxTy()));
1972 SDValue UndefVal = DAG.getUNDEF(EltVT);
1973 for (; Idx < WidenNumElts; ++Idx)
1974 Ops[Idx] = UndefVal;
1975 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
1978 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
1980 SDValue InOp = N->getOperand(0);
1981 SDValue RndOp = N->getOperand(3);
1982 SDValue SatOp = N->getOperand(4);
1984 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1985 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1987 EVT InVT = InOp.getValueType();
1988 EVT InEltVT = InVT.getVectorElementType();
1989 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1991 SDValue DTyOp = DAG.getValueType(WidenVT);
1992 SDValue STyOp = DAG.getValueType(InWidenVT);
1993 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
1995 unsigned InVTNumElts = InVT.getVectorNumElements();
1996 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1997 InOp = GetWidenedVector(InOp);
1998 InVT = InOp.getValueType();
1999 InVTNumElts = InVT.getVectorNumElements();
2000 if (InVTNumElts == WidenNumElts)
2001 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2005 if (TLI.isTypeLegal(InWidenVT)) {
2006 // Because the result and the input are different vector types, widening
2007 // the result could create a legal type but widening the input might make
2008 // it an illegal type that might lead to repeatedly splitting the input
2009 // and then widening it. To avoid this, we widen the input only if
2010 // it results in a legal type.
2011 if (WidenNumElts % InVTNumElts == 0) {
2012 // Widen the input and call convert on the widened input vector.
2013 unsigned NumConcat = WidenNumElts/InVTNumElts;
2014 SmallVector<SDValue, 16> Ops(NumConcat);
2016 SDValue UndefVal = DAG.getUNDEF(InVT);
2017 for (unsigned i = 1; i != NumConcat; ++i)
2020 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, &Ops[0],NumConcat);
2021 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2025 if (InVTNumElts % WidenNumElts == 0) {
2026 // Extract the input and convert the shorten input vector.
2027 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2028 DAG.getConstant(0, TLI.getVectorIdxTy()));
2029 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2034 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2035 SmallVector<SDValue, 16> Ops(WidenNumElts);
2036 EVT EltVT = WidenVT.getVectorElementType();
2037 DTyOp = DAG.getValueType(EltVT);
2038 STyOp = DAG.getValueType(InEltVT);
2040 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2042 for (i=0; i < MinElts; ++i) {
2043 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2044 DAG.getConstant(i, TLI.getVectorIdxTy()));
2045 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2049 SDValue UndefVal = DAG.getUNDEF(EltVT);
2050 for (; i < WidenNumElts; ++i)
2053 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2056 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2057 EVT VT = N->getValueType(0);
2058 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2059 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2060 SDValue InOp = N->getOperand(0);
2061 SDValue Idx = N->getOperand(1);
2064 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2065 InOp = GetWidenedVector(InOp);
2067 EVT InVT = InOp.getValueType();
2069 // Check if we can just return the input vector after widening.
2070 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2071 if (IdxVal == 0 && InVT == WidenVT)
2074 // Check if we can extract from the vector.
2075 unsigned InNumElts = InVT.getVectorNumElements();
2076 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2077 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2079 // We could try widening the input to the right length but for now, extract
2080 // the original elements, fill the rest with undefs and build a vector.
2081 SmallVector<SDValue, 16> Ops(WidenNumElts);
2082 EVT EltVT = VT.getVectorElementType();
2083 unsigned NumElts = VT.getVectorNumElements();
2085 for (i=0; i < NumElts; ++i)
2086 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2087 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2089 SDValue UndefVal = DAG.getUNDEF(EltVT);
2090 for (; i < WidenNumElts; ++i)
2092 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], WidenNumElts);
2095 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2096 SDValue InOp = GetWidenedVector(N->getOperand(0));
2097 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2098 InOp.getValueType(), InOp,
2099 N->getOperand(1), N->getOperand(2));
2102 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2103 LoadSDNode *LD = cast<LoadSDNode>(N);
2104 ISD::LoadExtType ExtType = LD->getExtensionType();
2107 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2108 if (ExtType != ISD::NON_EXTLOAD)
2109 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2111 Result = GenWidenVectorLoads(LdChain, LD);
2113 // If we generate a single load, we can use that for the chain. Otherwise,
2114 // build a factor node to remember the multiple loads are independent and
2117 if (LdChain.size() == 1)
2118 NewChain = LdChain[0];
2120 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other,
2121 &LdChain[0], LdChain.size());
2123 // Modified the chain - switch anything that used the old chain to use
2125 ReplaceValueWith(SDValue(N, 1), NewChain);
2130 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2131 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2132 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2133 WidenVT, N->getOperand(0));
2136 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2137 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2138 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2140 SDValue Cond1 = N->getOperand(0);
2141 EVT CondVT = Cond1.getValueType();
2142 if (CondVT.isVector()) {
2143 EVT CondEltVT = CondVT.getVectorElementType();
2144 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2145 CondEltVT, WidenNumElts);
2146 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2147 Cond1 = GetWidenedVector(Cond1);
2149 if (Cond1.getValueType() != CondWidenVT)
2150 Cond1 = ModifyToType(Cond1, CondWidenVT);
2153 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2154 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2155 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2156 return DAG.getNode(N->getOpcode(), SDLoc(N),
2157 WidenVT, Cond1, InOp1, InOp2);
2160 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2161 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2162 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2163 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2164 InOp1.getValueType(), N->getOperand(0),
2165 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2168 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2169 assert(N->getValueType(0).isVector() ==
2170 N->getOperand(0).getValueType().isVector() &&
2171 "Scalar/Vector type mismatch");
2172 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2174 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2175 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2176 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2177 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2178 InOp1, InOp2, N->getOperand(2));
2181 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2182 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2183 return DAG.getUNDEF(WidenVT);
2186 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2187 EVT VT = N->getValueType(0);
2190 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2191 unsigned NumElts = VT.getVectorNumElements();
2192 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2194 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2195 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2197 // Adjust mask based on new input vector length.
2198 SmallVector<int, 16> NewMask;
2199 for (unsigned i = 0; i != NumElts; ++i) {
2200 int Idx = N->getMaskElt(i);
2201 if (Idx < (int)NumElts)
2202 NewMask.push_back(Idx);
2204 NewMask.push_back(Idx - NumElts + WidenNumElts);
2206 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2207 NewMask.push_back(-1);
2208 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2211 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2212 assert(N->getValueType(0).isVector() &&
2213 N->getOperand(0).getValueType().isVector() &&
2214 "Operands must be vectors");
2215 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2216 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2218 SDValue InOp1 = N->getOperand(0);
2219 EVT InVT = InOp1.getValueType();
2220 assert(InVT.isVector() && "can not widen non vector type");
2221 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2222 InVT.getVectorElementType(), WidenNumElts);
2223 InOp1 = GetWidenedVector(InOp1);
2224 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2226 // Assume that the input and output will be widen appropriately. If not,
2227 // we will have to unroll it at some point.
2228 assert(InOp1.getValueType() == WidenInVT &&
2229 InOp2.getValueType() == WidenInVT &&
2230 "Input not widened to expected type!");
2232 return DAG.getNode(ISD::SETCC, SDLoc(N),
2233 WidenVT, InOp1, InOp2, N->getOperand(2));
2237 //===----------------------------------------------------------------------===//
2238 // Widen Vector Operand
2239 //===----------------------------------------------------------------------===//
2240 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2241 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2244 SDValue Res = SDValue();
2246 // See if the target wants to custom widen this node.
2247 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2250 switch (N->getOpcode()) {
2253 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2257 llvm_unreachable("Do not know how to widen this operator's operand!");
2259 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2260 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2261 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2262 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2263 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2264 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2266 case ISD::FP_EXTEND:
2267 case ISD::FP_TO_SINT:
2268 case ISD::FP_TO_UINT:
2269 case ISD::SINT_TO_FP:
2270 case ISD::UINT_TO_FP:
2272 case ISD::SIGN_EXTEND:
2273 case ISD::ZERO_EXTEND:
2274 case ISD::ANY_EXTEND:
2275 Res = WidenVecOp_Convert(N);
2279 // If Res is null, the sub-method took care of registering the result.
2280 if (!Res.getNode()) return false;
2282 // If the result is N, the sub-method updated N in place. Tell the legalizer
2284 if (Res.getNode() == N)
2288 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2289 "Invalid operand expansion");
2291 ReplaceValueWith(SDValue(N, 0), Res);
2295 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2296 // Since the result is legal and the input is illegal, it is unlikely
2297 // that we can fix the input to a legal type so unroll the convert
2298 // into some scalar code and create a nasty build vector.
2299 EVT VT = N->getValueType(0);
2300 EVT EltVT = VT.getVectorElementType();
2302 unsigned NumElts = VT.getVectorNumElements();
2303 SDValue InOp = N->getOperand(0);
2304 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2305 InOp = GetWidenedVector(InOp);
2306 EVT InVT = InOp.getValueType();
2307 EVT InEltVT = InVT.getVectorElementType();
2309 unsigned Opcode = N->getOpcode();
2310 SmallVector<SDValue, 16> Ops(NumElts);
2311 for (unsigned i=0; i < NumElts; ++i)
2312 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2313 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2314 DAG.getConstant(i, TLI.getVectorIdxTy())));
2316 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2319 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2320 EVT VT = N->getValueType(0);
2321 SDValue InOp = GetWidenedVector(N->getOperand(0));
2322 EVT InWidenVT = InOp.getValueType();
2325 // Check if we can convert between two legal vector types and extract.
2326 unsigned InWidenSize = InWidenVT.getSizeInBits();
2327 unsigned Size = VT.getSizeInBits();
2328 // x86mmx is not an acceptable vector element type, so don't try.
2329 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2330 unsigned NewNumElts = InWidenSize / Size;
2331 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2332 if (TLI.isTypeLegal(NewVT)) {
2333 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2334 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2335 DAG.getConstant(0, TLI.getVectorIdxTy()));
2339 return CreateStackStoreLoad(InOp, VT);
2342 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2343 // If the input vector is not legal, it is likely that we will not find a
2344 // legal vector of the same size. Replace the concatenate vector with a
2345 // nasty build vector.
2346 EVT VT = N->getValueType(0);
2347 EVT EltVT = VT.getVectorElementType();
2349 unsigned NumElts = VT.getVectorNumElements();
2350 SmallVector<SDValue, 16> Ops(NumElts);
2352 EVT InVT = N->getOperand(0).getValueType();
2353 unsigned NumInElts = InVT.getVectorNumElements();
2356 unsigned NumOperands = N->getNumOperands();
2357 for (unsigned i=0; i < NumOperands; ++i) {
2358 SDValue InOp = N->getOperand(i);
2359 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2360 InOp = GetWidenedVector(InOp);
2361 for (unsigned j=0; j < NumInElts; ++j)
2362 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2363 DAG.getConstant(j, TLI.getVectorIdxTy()));
2365 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
2368 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2369 SDValue InOp = GetWidenedVector(N->getOperand(0));
2370 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2371 N->getValueType(0), InOp, N->getOperand(1));
2374 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2375 SDValue InOp = GetWidenedVector(N->getOperand(0));
2376 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2377 N->getValueType(0), InOp, N->getOperand(1));
2380 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2381 // We have to widen the value but we want only to store the original
2383 StoreSDNode *ST = cast<StoreSDNode>(N);
2385 SmallVector<SDValue, 16> StChain;
2386 if (ST->isTruncatingStore())
2387 GenWidenVectorTruncStores(StChain, ST);
2389 GenWidenVectorStores(StChain, ST);
2391 if (StChain.size() == 1)
2394 return DAG.getNode(ISD::TokenFactor, SDLoc(ST),
2395 MVT::Other,&StChain[0],StChain.size());
2398 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2399 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2400 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2403 // WARNING: In this code we widen the compare instruction with garbage.
2404 // This garbage may contain denormal floats which may be slow. Is this a real
2405 // concern ? Should we zero the unused lanes if this is a float compare ?
2407 // Get a new SETCC node to compare the newly widened operands.
2408 // Only some of the compared elements are legal.
2409 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2410 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2411 SVT, InOp0, InOp1, N->getOperand(2));
2413 // Extract the needed results from the result vector.
2414 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2415 SVT.getVectorElementType(),
2416 N->getValueType(0).getVectorNumElements());
2417 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2418 ResVT, WideSETCC, DAG.getConstant(0,
2419 TLI.getVectorIdxTy()));
2421 return PromoteTargetBoolean(CC, N->getValueType(0));
2425 //===----------------------------------------------------------------------===//
2426 // Vector Widening Utilities
2427 //===----------------------------------------------------------------------===//
2429 // Utility function to find the type to chop up a widen vector for load/store
2430 // TLI: Target lowering used to determine legal types.
2431 // Width: Width left need to load/store.
2432 // WidenVT: The widen vector type to load to/store from
2433 // Align: If 0, don't allow use of a wider type
2434 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2436 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2437 unsigned Width, EVT WidenVT,
2438 unsigned Align = 0, unsigned WidenEx = 0) {
2439 EVT WidenEltVT = WidenVT.getVectorElementType();
2440 unsigned WidenWidth = WidenVT.getSizeInBits();
2441 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2442 unsigned AlignInBits = Align*8;
2444 // If we have one element to load/store, return it.
2445 EVT RetVT = WidenEltVT;
2446 if (Width == WidenEltWidth)
2449 // See if there is larger legal integer than the element type to load/store
2451 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2452 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2453 EVT MemVT((MVT::SimpleValueType) VT);
2454 unsigned MemVTWidth = MemVT.getSizeInBits();
2455 if (MemVT.getSizeInBits() <= WidenEltWidth)
2457 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2458 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2459 (MemVTWidth <= Width ||
2460 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2466 // See if there is a larger vector type to load/store that has the same vector
2467 // element type and is evenly divisible with the WidenVT.
2468 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2469 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2470 EVT MemVT = (MVT::SimpleValueType) VT;
2471 unsigned MemVTWidth = MemVT.getSizeInBits();
2472 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2473 (WidenWidth % MemVTWidth) == 0 &&
2474 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2475 (MemVTWidth <= Width ||
2476 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2477 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2485 // Builds a vector type from scalar loads
2486 // VecTy: Resulting Vector type
2487 // LDOps: Load operators to build a vector type
2488 // [Start,End) the list of loads to use.
2489 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2490 SmallVectorImpl<SDValue> &LdOps,
2491 unsigned Start, unsigned End) {
2492 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2493 SDLoc dl(LdOps[Start]);
2494 EVT LdTy = LdOps[Start].getValueType();
2495 unsigned Width = VecTy.getSizeInBits();
2496 unsigned NumElts = Width / LdTy.getSizeInBits();
2497 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2500 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2502 for (unsigned i = Start + 1; i != End; ++i) {
2503 EVT NewLdTy = LdOps[i].getValueType();
2504 if (NewLdTy != LdTy) {
2505 NumElts = Width / NewLdTy.getSizeInBits();
2506 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2507 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2508 // Readjust position and vector position based on new load type
2509 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2512 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2513 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2515 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2518 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2520 // The strategy assumes that we can efficiently load powers of two widths.
2521 // The routines chops the vector into the largest vector loads with the same
2522 // element type or scalar loads and then recombines it to the widen vector
2524 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2525 unsigned WidenWidth = WidenVT.getSizeInBits();
2526 EVT LdVT = LD->getMemoryVT();
2528 assert(LdVT.isVector() && WidenVT.isVector());
2529 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2532 SDValue Chain = LD->getChain();
2533 SDValue BasePtr = LD->getBasePtr();
2534 unsigned Align = LD->getAlignment();
2535 bool isVolatile = LD->isVolatile();
2536 bool isNonTemporal = LD->isNonTemporal();
2537 bool isInvariant = LD->isInvariant();
2539 int LdWidth = LdVT.getSizeInBits();
2540 int WidthDiff = WidenWidth - LdWidth; // Difference
2541 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2543 // Find the vector type that can load from.
2544 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2545 int NewVTWidth = NewVT.getSizeInBits();
2546 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2547 isVolatile, isNonTemporal, isInvariant, Align);
2548 LdChain.push_back(LdOp.getValue(1));
2550 // Check if we can load the element with one instruction
2551 if (LdWidth <= NewVTWidth) {
2552 if (!NewVT.isVector()) {
2553 unsigned NumElts = WidenWidth / NewVTWidth;
2554 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2555 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2556 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2558 if (NewVT == WidenVT)
2561 assert(WidenWidth % NewVTWidth == 0);
2562 unsigned NumConcat = WidenWidth / NewVTWidth;
2563 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2564 SDValue UndefVal = DAG.getUNDEF(NewVT);
2565 ConcatOps[0] = LdOp;
2566 for (unsigned i = 1; i != NumConcat; ++i)
2567 ConcatOps[i] = UndefVal;
2568 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &ConcatOps[0],
2572 // Load vector by using multiple loads from largest vector to scalar
2573 SmallVector<SDValue, 16> LdOps;
2574 LdOps.push_back(LdOp);
2576 LdWidth -= NewVTWidth;
2577 unsigned Offset = 0;
2579 while (LdWidth > 0) {
2580 unsigned Increment = NewVTWidth / 8;
2581 Offset += Increment;
2582 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2583 DAG.getIntPtrConstant(Increment));
2586 if (LdWidth < NewVTWidth) {
2587 // Our current type we are using is too large, find a better size
2588 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2589 NewVTWidth = NewVT.getSizeInBits();
2590 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2591 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2592 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2593 LdChain.push_back(L.getValue(1));
2594 if (L->getValueType(0).isVector()) {
2595 SmallVector<SDValue, 16> Loads;
2597 unsigned size = L->getValueSizeInBits(0);
2598 while (size < LdOp->getValueSizeInBits(0)) {
2599 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2600 size += L->getValueSizeInBits(0);
2602 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0),
2603 &Loads[0], Loads.size());
2606 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2607 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2608 isNonTemporal, isInvariant, MinAlign(Align, Increment));
2609 LdChain.push_back(L.getValue(1));
2615 LdWidth -= NewVTWidth;
2618 // Build the vector from the loads operations
2619 unsigned End = LdOps.size();
2620 if (!LdOps[0].getValueType().isVector())
2621 // All the loads are scalar loads.
2622 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2624 // If the load contains vectors, build the vector using concat vector.
2625 // All of the vectors used to loads are power of 2 and the scalars load
2626 // can be combined to make a power of 2 vector.
2627 SmallVector<SDValue, 16> ConcatOps(End);
2630 EVT LdTy = LdOps[i].getValueType();
2631 // First combine the scalar loads to a vector
2632 if (!LdTy.isVector()) {
2633 for (--i; i >= 0; --i) {
2634 LdTy = LdOps[i].getValueType();
2635 if (LdTy.isVector())
2638 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2640 ConcatOps[--Idx] = LdOps[i];
2641 for (--i; i >= 0; --i) {
2642 EVT NewLdTy = LdOps[i].getValueType();
2643 if (NewLdTy != LdTy) {
2644 // Create a larger vector
2645 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2646 &ConcatOps[Idx], End - Idx);
2650 ConcatOps[--Idx] = LdOps[i];
2653 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2654 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2655 &ConcatOps[Idx], End - Idx);
2657 // We need to fill the rest with undefs to build the vector
2658 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2659 SmallVector<SDValue, 16> WidenOps(NumOps);
2660 SDValue UndefVal = DAG.getUNDEF(LdTy);
2663 for (; i != End-Idx; ++i)
2664 WidenOps[i] = ConcatOps[Idx+i];
2665 for (; i != NumOps; ++i)
2666 WidenOps[i] = UndefVal;
2668 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, &WidenOps[0],NumOps);
2672 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2674 ISD::LoadExtType ExtType) {
2675 // For extension loads, it may not be more efficient to chop up the vector
2676 // and then extended it. Instead, we unroll the load and build a new vector.
2677 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2678 EVT LdVT = LD->getMemoryVT();
2680 assert(LdVT.isVector() && WidenVT.isVector());
2683 SDValue Chain = LD->getChain();
2684 SDValue BasePtr = LD->getBasePtr();
2685 unsigned Align = LD->getAlignment();
2686 bool isVolatile = LD->isVolatile();
2687 bool isNonTemporal = LD->isNonTemporal();
2689 EVT EltVT = WidenVT.getVectorElementType();
2690 EVT LdEltVT = LdVT.getVectorElementType();
2691 unsigned NumElts = LdVT.getVectorNumElements();
2693 // Load each element and widen
2694 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2695 SmallVector<SDValue, 16> Ops(WidenNumElts);
2696 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2697 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2698 LD->getPointerInfo(),
2699 LdEltVT, isVolatile, isNonTemporal, Align);
2700 LdChain.push_back(Ops[0].getValue(1));
2701 unsigned i = 0, Offset = Increment;
2702 for (i=1; i < NumElts; ++i, Offset += Increment) {
2703 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2704 BasePtr, DAG.getIntPtrConstant(Offset));
2705 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2706 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2707 isVolatile, isNonTemporal, Align);
2708 LdChain.push_back(Ops[i].getValue(1));
2711 // Fill the rest with undefs
2712 SDValue UndefVal = DAG.getUNDEF(EltVT);
2713 for (; i != WidenNumElts; ++i)
2716 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, &Ops[0], Ops.size());
2720 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2722 // The strategy assumes that we can efficiently store powers of two widths.
2723 // The routines chops the vector into the largest vector stores with the same
2724 // element type or scalar stores.
2725 SDValue Chain = ST->getChain();
2726 SDValue BasePtr = ST->getBasePtr();
2727 unsigned Align = ST->getAlignment();
2728 bool isVolatile = ST->isVolatile();
2729 bool isNonTemporal = ST->isNonTemporal();
2730 SDValue ValOp = GetWidenedVector(ST->getValue());
2733 EVT StVT = ST->getMemoryVT();
2734 unsigned StWidth = StVT.getSizeInBits();
2735 EVT ValVT = ValOp.getValueType();
2736 unsigned ValWidth = ValVT.getSizeInBits();
2737 EVT ValEltVT = ValVT.getVectorElementType();
2738 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2739 assert(StVT.getVectorElementType() == ValEltVT);
2741 int Idx = 0; // current index to store
2742 unsigned Offset = 0; // offset from base to store
2743 while (StWidth != 0) {
2744 // Find the largest vector type we can store with
2745 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2746 unsigned NewVTWidth = NewVT.getSizeInBits();
2747 unsigned Increment = NewVTWidth / 8;
2748 if (NewVT.isVector()) {
2749 unsigned NumVTElts = NewVT.getVectorNumElements();
2751 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2752 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2753 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2754 ST->getPointerInfo().getWithOffset(Offset),
2755 isVolatile, isNonTemporal,
2756 MinAlign(Align, Offset)));
2757 StWidth -= NewVTWidth;
2758 Offset += Increment;
2760 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2761 DAG.getIntPtrConstant(Increment));
2762 } while (StWidth != 0 && StWidth >= NewVTWidth);
2764 // Cast the vector to the scalar type we can store
2765 unsigned NumElts = ValWidth / NewVTWidth;
2766 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2767 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2768 // Readjust index position based on new vector type
2769 Idx = Idx * ValEltWidth / NewVTWidth;
2771 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2772 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2773 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2774 ST->getPointerInfo().getWithOffset(Offset),
2775 isVolatile, isNonTemporal,
2776 MinAlign(Align, Offset)));
2777 StWidth -= NewVTWidth;
2778 Offset += Increment;
2779 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2780 DAG.getIntPtrConstant(Increment));
2781 } while (StWidth != 0 && StWidth >= NewVTWidth);
2782 // Restore index back to be relative to the original widen element type
2783 Idx = Idx * NewVTWidth / ValEltWidth;
2789 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2791 // For extension loads, it may not be more efficient to truncate the vector
2792 // and then store it. Instead, we extract each element and then store it.
2793 SDValue Chain = ST->getChain();
2794 SDValue BasePtr = ST->getBasePtr();
2795 unsigned Align = ST->getAlignment();
2796 bool isVolatile = ST->isVolatile();
2797 bool isNonTemporal = ST->isNonTemporal();
2798 SDValue ValOp = GetWidenedVector(ST->getValue());
2801 EVT StVT = ST->getMemoryVT();
2802 EVT ValVT = ValOp.getValueType();
2804 // It must be true that we the widen vector type is bigger than where
2805 // we need to store.
2806 assert(StVT.isVector() && ValOp.getValueType().isVector());
2807 assert(StVT.bitsLT(ValOp.getValueType()));
2809 // For truncating stores, we can not play the tricks of chopping legal
2810 // vector types and bit cast it to the right type. Instead, we unroll
2812 EVT StEltVT = StVT.getVectorElementType();
2813 EVT ValEltVT = ValVT.getVectorElementType();
2814 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2815 unsigned NumElts = StVT.getVectorNumElements();
2816 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2817 DAG.getConstant(0, TLI.getVectorIdxTy()));
2818 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2819 ST->getPointerInfo(), StEltVT,
2820 isVolatile, isNonTemporal, Align));
2821 unsigned Offset = Increment;
2822 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2823 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2824 BasePtr, DAG.getIntPtrConstant(Offset));
2825 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2826 DAG.getConstant(0, TLI.getVectorIdxTy()));
2827 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2828 ST->getPointerInfo().getWithOffset(Offset),
2829 StEltVT, isVolatile, isNonTemporal,
2830 MinAlign(Align, Offset)));
2834 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2835 /// input vector must have the same element type as NVT.
2836 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2837 // Note that InOp might have been widened so it might already have
2838 // the right width or it might need be narrowed.
2839 EVT InVT = InOp.getValueType();
2840 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2841 "input and widen element type must match");
2844 // Check if InOp already has the right width.
2848 unsigned InNumElts = InVT.getVectorNumElements();
2849 unsigned WidenNumElts = NVT.getVectorNumElements();
2850 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2851 unsigned NumConcat = WidenNumElts / InNumElts;
2852 SmallVector<SDValue, 16> Ops(NumConcat);
2853 SDValue UndefVal = DAG.getUNDEF(InVT);
2855 for (unsigned i = 1; i != NumConcat; ++i)
2858 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, &Ops[0], NumConcat);
2861 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2862 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2863 DAG.getConstant(0, TLI.getVectorIdxTy()));
2865 // Fall back to extract and build.
2866 SmallVector<SDValue, 16> Ops(WidenNumElts);
2867 EVT EltVT = NVT.getVectorElementType();
2868 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2870 for (Idx = 0; Idx < MinNumElts; ++Idx)
2871 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2872 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2874 SDValue UndefVal = DAG.getUNDEF(EltVT);
2875 for ( ; Idx < WidenNumElts; ++Idx)
2876 Ops[Idx] = UndefVal;
2877 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, &Ops[0], WidenNumElts);