1 //===-- LegalizeTypesSplit.cpp - Vector Splitting for LegalizeTypes -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements vector splitting support for LegalizeTypes. Vector
11 // splitting is the act of changing a computation in an invalid vector type to
12 // be a computation in multiple vectors of a smaller type. For example,
13 // implementing <128 x f32> operations in terms of two <64 x f32> operations.
15 //===----------------------------------------------------------------------===//
17 #include "LegalizeTypes.h"
20 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a vector
21 /// type that needs to be split. This handles non-power of two vectors.
22 static void GetSplitDestVTs(MVT::ValueType InVT,
23 MVT::ValueType &Lo, MVT::ValueType &Hi) {
24 MVT::ValueType NewEltVT = MVT::getVectorElementType(InVT);
25 unsigned NumElements = MVT::getVectorNumElements(InVT);
26 if ((NumElements & (NumElements-1)) == 0) { // Simple power of two vector.
28 Lo = Hi = MVT::getVectorType(NewEltVT, NumElements);
29 } else { // Non-power-of-two vectors.
30 unsigned NewNumElts_Lo = 1 << Log2_32(NumElements);
31 unsigned NewNumElts_Hi = NumElements - NewNumElts_Lo;
32 Lo = MVT::getVectorType(NewEltVT, NewNumElts_Lo);
33 Hi = MVT::getVectorType(NewEltVT, NewNumElts_Hi);
38 //===----------------------------------------------------------------------===//
39 // Result Vector Splitting
40 //===----------------------------------------------------------------------===//
42 /// SplitResult - This method is called when the specified result of the
43 /// specified node is found to need vector splitting. At this point, the node
44 /// may also have invalid operands or may have other results that need
45 /// legalization, we just know that (at least) one result needs vector
47 void DAGTypeLegalizer::SplitResult(SDNode *N, unsigned ResNo) {
48 DEBUG(cerr << "Expand node result: "; N->dump(&DAG); cerr << "\n");
52 // See if the target wants to custom expand this node.
53 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
54 TargetLowering::Custom) {
55 // If the target wants to, allow it to lower this itself.
56 if (SDNode *P = TLI.ExpandOperationResult(N, DAG)) {
57 // Everything that once used N now uses P. We are guaranteed that the
58 // result value types of N and the result value types of P match.
59 ReplaceNodeWith(N, P);
65 switch (N->getOpcode()) {
68 cerr << "SplitResult #" << ResNo << ": ";
69 N->dump(&DAG); cerr << "\n";
71 assert(0 && "Do not know how to split the result of this operator!");
74 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
75 case ISD::LOAD: SplitRes_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
76 case ISD::BUILD_PAIR: SplitRes_BUILD_PAIR(N, Lo, Hi); break;
77 case ISD::INSERT_VECTOR_ELT:SplitRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
78 case ISD::VECTOR_SHUFFLE: SplitRes_VECTOR_SHUFFLE(N, Lo, Hi); break;
79 case ISD::BUILD_VECTOR: SplitRes_BUILD_VECTOR(N, Lo, Hi); break;
80 case ISD::CONCAT_VECTORS: SplitRes_CONCAT_VECTORS(N, Lo, Hi); break;
81 case ISD::BIT_CONVERT: SplitRes_BIT_CONVERT(N, Lo, Hi); break;
93 case ISD::UINT_TO_FP: SplitRes_UnOp(N, Lo, Hi); break;
109 case ISD::FREM: SplitRes_BinOp(N, Lo, Hi); break;
110 case ISD::FPOWI: SplitRes_FPOWI(N, Lo, Hi); break;
111 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
114 // If Lo/Hi is null, the sub-method took care of registering results etc.
116 SetSplitOp(SDOperand(N, ResNo), Lo, Hi);
119 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
120 MVT::ValueType LoVT, HiVT;
121 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
123 Lo = DAG.getNode(ISD::UNDEF, LoVT);
124 Hi = DAG.getNode(ISD::UNDEF, HiVT);
127 void DAGTypeLegalizer::SplitRes_LOAD(LoadSDNode *LD,
128 SDOperand &Lo, SDOperand &Hi) {
129 MVT::ValueType LoVT, HiVT;
130 GetSplitDestVTs(LD->getValueType(0), LoVT, HiVT);
132 SDOperand Ch = LD->getChain();
133 SDOperand Ptr = LD->getBasePtr();
134 const Value *SV = LD->getSrcValue();
135 int SVOffset = LD->getSrcValueOffset();
136 unsigned Alignment = LD->getAlignment();
137 bool isVolatile = LD->isVolatile();
139 Lo = DAG.getLoad(LoVT, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
140 unsigned IncrementSize = MVT::getSizeInBits(LoVT)/8;
141 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
142 DAG.getIntPtrConstant(IncrementSize));
143 SVOffset += IncrementSize;
144 Alignment = MinAlign(Alignment, IncrementSize);
145 Hi = DAG.getLoad(HiVT, Ch, Ptr, SV, SVOffset, isVolatile, Alignment);
147 // Build a factor node to remember that this load is independent of the
149 SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1),
152 // Legalized the chain result - switch anything that used the old chain to
154 ReplaceValueWith(SDOperand(LD, 1), TF);
157 void DAGTypeLegalizer::SplitRes_BUILD_PAIR(SDNode *N, SDOperand &Lo,
159 Lo = N->getOperand(0);
160 Hi = N->getOperand(1);
163 void DAGTypeLegalizer::SplitRes_INSERT_VECTOR_ELT(SDNode *N, SDOperand &Lo,
165 GetSplitOp(N->getOperand(0), Lo, Hi);
166 unsigned Index = cast<ConstantSDNode>(N->getOperand(2))->getValue();
167 SDOperand ScalarOp = N->getOperand(1);
168 unsigned LoNumElts = MVT::getVectorNumElements(Lo.getValueType());
169 if (Index < LoNumElts)
170 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, Lo.getValueType(), Lo, ScalarOp,
173 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, Hi.getValueType(), Hi, ScalarOp,
174 DAG.getConstant(Index - LoNumElts, TLI.getPointerTy()));
178 void DAGTypeLegalizer::SplitRes_VECTOR_SHUFFLE(SDNode *N,
179 SDOperand &Lo, SDOperand &Hi) {
180 // Build the low part.
181 SDOperand Mask = N->getOperand(2);
182 SmallVector<SDOperand, 16> Ops;
183 MVT::ValueType PtrVT = TLI.getPointerTy();
185 MVT::ValueType LoVT, HiVT;
186 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
187 MVT::ValueType EltVT = MVT::getVectorElementType(LoVT);
188 unsigned LoNumElts = MVT::getVectorNumElements(LoVT);
189 unsigned NumElements = Mask.getNumOperands();
191 // Insert all of the elements from the input that are needed. We use
192 // buildvector of extractelement here because the input vectors will have
193 // to be legalized, so this makes the code simpler.
194 for (unsigned i = 0; i != LoNumElts; ++i) {
195 unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getValue();
196 SDOperand InVec = N->getOperand(0);
197 if (Idx >= NumElements) {
198 InVec = N->getOperand(1);
201 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
202 DAG.getConstant(Idx, PtrVT)));
204 Lo = DAG.getNode(ISD::BUILD_VECTOR, LoVT, &Ops[0], Ops.size());
207 for (unsigned i = LoNumElts; i != NumElements; ++i) {
208 unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getValue();
209 SDOperand InVec = N->getOperand(0);
210 if (Idx >= NumElements) {
211 InVec = N->getOperand(1);
214 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, InVec,
215 DAG.getConstant(Idx, PtrVT)));
217 Hi = DAG.getNode(ISD::BUILD_VECTOR, HiVT, &Ops[0], Ops.size());
220 void DAGTypeLegalizer::SplitRes_BUILD_VECTOR(SDNode *N, SDOperand &Lo,
222 MVT::ValueType LoVT, HiVT;
223 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
224 unsigned LoNumElts = MVT::getVectorNumElements(LoVT);
225 SmallVector<SDOperand, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
226 Lo = DAG.getNode(ISD::BUILD_VECTOR, LoVT, &LoOps[0], LoOps.size());
228 SmallVector<SDOperand, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
229 Hi = DAG.getNode(ISD::BUILD_VECTOR, HiVT, &HiOps[0], HiOps.size());
232 void DAGTypeLegalizer::SplitRes_CONCAT_VECTORS(SDNode *N,
233 SDOperand &Lo, SDOperand &Hi) {
234 // FIXME: Handle non-power-of-two vectors?
235 unsigned NumSubvectors = N->getNumOperands() / 2;
236 if (NumSubvectors == 1) {
237 Lo = N->getOperand(0);
238 Hi = N->getOperand(1);
242 MVT::ValueType LoVT, HiVT;
243 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
245 SmallVector<SDOperand, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
246 Lo = DAG.getNode(ISD::CONCAT_VECTORS, LoVT, &LoOps[0], LoOps.size());
248 SmallVector<SDOperand, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
249 Hi = DAG.getNode(ISD::CONCAT_VECTORS, HiVT, &HiOps[0], HiOps.size());
252 void DAGTypeLegalizer::SplitRes_BIT_CONVERT(SDNode *N,
253 SDOperand &Lo, SDOperand &Hi) {
254 // We know the result is a vector. The input may be either a vector or a
256 SDOperand InOp = N->getOperand(0);
257 if (MVT::isVector(InOp.getValueType()) &&
258 MVT::getVectorNumElements(InOp.getValueType()) != 1) {
259 // If this is a vector, split the vector and convert each of the pieces now.
260 GetSplitOp(InOp, Lo, Hi);
262 MVT::ValueType LoVT, HiVT;
263 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
265 Lo = DAG.getNode(ISD::BIT_CONVERT, LoVT, Lo);
266 Hi = DAG.getNode(ISD::BIT_CONVERT, HiVT, Hi);
270 // Lower the bit-convert to a store/load from the stack, then split the load.
271 SDOperand Op = CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
272 SplitRes_LOAD(cast<LoadSDNode>(Op.Val), Lo, Hi);
275 void DAGTypeLegalizer::SplitRes_BinOp(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
276 SDOperand LHSLo, LHSHi;
277 GetSplitOp(N->getOperand(0), LHSLo, LHSHi);
278 SDOperand RHSLo, RHSHi;
279 GetSplitOp(N->getOperand(1), RHSLo, RHSHi);
281 Lo = DAG.getNode(N->getOpcode(), LHSLo.getValueType(), LHSLo, RHSLo);
282 Hi = DAG.getNode(N->getOpcode(), LHSHi.getValueType(), LHSHi, RHSHi);
285 void DAGTypeLegalizer::SplitRes_UnOp(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
286 // Get the dest types. This doesn't always match input types, e.g. int_to_fp.
287 MVT::ValueType LoVT, HiVT;
288 GetSplitDestVTs(N->getValueType(0), LoVT, HiVT);
290 GetSplitOp(N->getOperand(0), Lo, Hi);
291 Lo = DAG.getNode(N->getOpcode(), LoVT, Lo);
292 Hi = DAG.getNode(N->getOpcode(), HiVT, Hi);
295 void DAGTypeLegalizer::SplitRes_FPOWI(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
296 GetSplitOp(N->getOperand(0), Lo, Hi);
297 Lo = DAG.getNode(ISD::FPOWI, Lo.getValueType(), Lo, N->getOperand(1));
298 Hi = DAG.getNode(ISD::FPOWI, Lo.getValueType(), Hi, N->getOperand(1));
302 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDOperand &Lo, SDOperand &Hi){
303 SDOperand LL, LH, RL, RH;
304 GetSplitOp(N->getOperand(1), LL, LH);
305 GetSplitOp(N->getOperand(2), RL, RH);
307 SDOperand Cond = N->getOperand(0);
308 Lo = DAG.getNode(ISD::SELECT, LL.getValueType(), Cond, LL, RL);
309 Hi = DAG.getNode(ISD::SELECT, LH.getValueType(), Cond, LH, RH);
313 //===----------------------------------------------------------------------===//
314 // Operand Vector Splitting
315 //===----------------------------------------------------------------------===//
317 /// SplitOperand - This method is called when the specified operand of the
318 /// specified node is found to need vector splitting. At this point, all of the
319 /// result types of the node are known to be legal, but other operands of the
320 /// node may need legalization as well as the specified one.
321 bool DAGTypeLegalizer::SplitOperand(SDNode *N, unsigned OpNo) {
322 DEBUG(cerr << "Split node operand: "; N->dump(&DAG); cerr << "\n");
326 if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
327 TargetLowering::Custom)
328 Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
332 switch (N->getOpcode()) {
335 cerr << "SplitOperand Op #" << OpNo << ": ";
336 N->dump(&DAG); cerr << "\n";
338 assert(0 && "Do not know how to split this operator's operand!");
340 case ISD::STORE: Res = SplitOp_STORE(cast<StoreSDNode>(N), OpNo); break;
341 case ISD::RET: Res = SplitOp_RET(N, OpNo); break;
343 case ISD::EXTRACT_SUBVECTOR: Res = SplitOp_EXTRACT_SUBVECTOR(N); break;
347 // If the result is null, the sub-method took care of registering results etc.
348 if (!Res.Val) return false;
350 // If the result is N, the sub-method updated N in place. Check to see if any
351 // operands are new, and if so, mark them.
353 // Mark N as new and remark N and its operands. This allows us to correctly
354 // revisit N if it needs another step of promotion and allows us to visit
355 // any new operands to N.
360 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
361 "Invalid operand expansion");
363 ReplaceValueWith(SDOperand(N, 0), Res);
367 SDOperand DAGTypeLegalizer::SplitOp_STORE(StoreSDNode *N, unsigned OpNo) {
368 assert(OpNo == 1 && "Can only split the stored value");
370 SDOperand Ch = N->getChain();
371 SDOperand Ptr = N->getBasePtr();
372 int SVOffset = N->getSrcValueOffset();
373 unsigned Alignment = N->getAlignment();
374 bool isVol = N->isVolatile();
376 GetSplitOp(N->getOperand(1), Lo, Hi);
378 unsigned IncrementSize = MVT::getSizeInBits(Lo.getValueType())/8;
380 Lo = DAG.getStore(Ch, Lo, Ptr, N->getSrcValue(), SVOffset, isVol, Alignment);
382 // Increment the pointer to the other half.
383 Ptr = DAG.getNode(ISD::ADD, Ptr.getValueType(), Ptr,
384 DAG.getIntPtrConstant(IncrementSize));
386 Hi = DAG.getStore(Ch, Hi, Ptr, N->getSrcValue(), SVOffset+IncrementSize,
387 isVol, MinAlign(Alignment, IncrementSize));
388 return DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
391 SDOperand DAGTypeLegalizer::SplitOp_RET(SDNode *N, unsigned OpNo) {
392 assert(N->getNumOperands() == 3 &&"Can only handle ret of one vector so far");
393 // FIXME: Returns of gcc generic vectors larger than a legal vector
394 // type should be returned by reference!
396 GetSplitOp(N->getOperand(1), Lo, Hi);
398 SDOperand Chain = N->getOperand(0); // The chain.
399 SDOperand Sign = N->getOperand(2); // Signness
401 return DAG.getNode(ISD::RET, MVT::Other, Chain, Lo, Sign, Hi, Sign);
404 SDOperand DAGTypeLegalizer::SplitOp_EXTRACT_SUBVECTOR(SDNode *N) {
405 // We know that the extracted result type is legal. For now, assume the index
407 MVT::ValueType SubVT = N->getValueType(0);
408 SDOperand Idx = N->getOperand(1);
410 GetSplitOp(N->getOperand(0), Lo, Hi);
412 uint64_t LoElts = MVT::getVectorNumElements(Lo.getValueType());
413 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getValue();
415 if (IdxVal < LoElts) {
416 assert(IdxVal + MVT::getVectorNumElements(SubVT) <= LoElts &&
417 "Extracted subvector crosses vector split!");
418 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SubVT, Lo, Idx);
420 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SubVT, Hi,
421 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));