1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/FunctionLoweringInfo.h"
16 #include "llvm/ADT/PostOrderIterator.h"
17 #include "llvm/CodeGen/Analysis.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/WinEHFuncInfo.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/IR/DebugInfo.h"
26 #include "llvm/IR/DerivedTypes.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/Instructions.h"
29 #include "llvm/IR/IntrinsicInst.h"
30 #include "llvm/IR/LLVMContext.h"
31 #include "llvm/IR/Module.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/MathExtras.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/Target/TargetFrameLowering.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetLowering.h"
39 #include "llvm/Target/TargetOptions.h"
40 #include "llvm/Target/TargetRegisterInfo.h"
41 #include "llvm/Target/TargetSubtargetInfo.h"
45 #define DEBUG_TYPE "function-lowering-info"
47 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
48 /// PHI nodes or outside of the basic block that defines it, or used by a
49 /// switch or atomic instruction, which may expand to multiple basic blocks.
50 static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
51 if (I->use_empty()) return false;
52 if (isa<PHINode>(I)) return true;
53 const BasicBlock *BB = I->getParent();
54 for (const User *U : I->users())
55 if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
61 static ISD::NodeType getPreferredExtendForValue(const Value *V) {
62 // For the users of the source value being used for compare instruction, if
63 // the number of signed predicate is greater than unsigned predicate, we
64 // prefer to use SIGN_EXTEND.
66 // With this optimization, we would be able to reduce some redundant sign or
67 // zero extension instruction, and eventually more machine CSE opportunities
69 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
70 unsigned NumOfSigned = 0, NumOfUnsigned = 0;
71 for (const User *U : V->users()) {
72 if (const auto *CI = dyn_cast<CmpInst>(U)) {
73 NumOfSigned += CI->isSigned();
74 NumOfUnsigned += CI->isUnsigned();
77 if (NumOfSigned > NumOfUnsigned)
78 ExtendKind = ISD::SIGN_EXTEND;
83 void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
87 TLI = MF->getSubtarget().getTargetLowering();
88 RegInfo = &MF->getRegInfo();
89 MachineModuleInfo &MMI = MF->getMMI();
91 // Check whether the function can return without sret-demotion.
92 SmallVector<ISD::OutputArg, 4> Outs;
93 GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
95 CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
96 Fn->isVarArg(), Outs, Fn->getContext());
98 // Initialize the mapping of values to registers. This is only set up for
99 // instruction values that are used outside of the block that defines
101 Function::const_iterator BB = Fn->begin(), EB = Fn->end();
102 for (; BB != EB; ++BB)
103 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
105 if (const AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
106 // Static allocas can be folded into the initial stack frame adjustment.
107 if (AI->isStaticAlloca()) {
108 const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
109 Type *Ty = AI->getAllocatedType();
110 uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
112 std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
115 TySize *= CUI->getZExtValue(); // Get total allocated size.
116 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
118 StaticAllocaMap[AI] =
119 MF->getFrameInfo()->CreateStackObject(TySize, Align, false, AI);
123 std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(
124 AI->getAllocatedType()),
126 unsigned StackAlign =
127 MF->getSubtarget().getFrameLowering()->getStackAlignment();
128 if (Align <= StackAlign)
130 // Inform the Frame Information that we have variable-sized objects.
131 MF->getFrameInfo()->CreateVariableSizedObject(Align ? Align : 1, AI);
135 // Look for inline asm that clobbers the SP register.
136 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
137 ImmutableCallSite CS(I);
138 if (isa<InlineAsm>(CS.getCalledValue())) {
139 unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
140 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
141 std::vector<TargetLowering::AsmOperandInfo> Ops =
142 TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
143 for (size_t I = 0, E = Ops.size(); I != E; ++I) {
144 TargetLowering::AsmOperandInfo &Op = Ops[I];
145 if (Op.Type == InlineAsm::isClobber) {
146 // Clobbers don't have SDValue operands, hence SDValue().
147 TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
148 std::pair<unsigned, const TargetRegisterClass *> PhysReg =
149 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
151 if (PhysReg.first == SP)
152 MF->getFrameInfo()->setHasOpaqueSPAdjustment(true);
158 // Look for calls to the @llvm.va_start intrinsic. We can omit some
159 // prologue boilerplate for variadic functions that don't examine their
161 if (const auto *II = dyn_cast<IntrinsicInst>(I)) {
162 if (II->getIntrinsicID() == Intrinsic::vastart)
163 MF->getFrameInfo()->setHasVAStart(true);
166 // If we have a musttail call in a variadic funciton, we need to ensure we
167 // forward implicit register parameters.
168 if (const auto *CI = dyn_cast<CallInst>(I)) {
169 if (CI->isMustTailCall() && Fn->isVarArg())
170 MF->getFrameInfo()->setHasMustTailInVarArgFunc(true);
173 // Mark values used outside their block as exported, by allocating
174 // a virtual register for them.
175 if (isUsedOutsideOfDefiningBlock(I))
176 if (!isa<AllocaInst>(I) ||
177 !StaticAllocaMap.count(cast<AllocaInst>(I)))
178 InitializeRegForValue(I);
180 // Collect llvm.dbg.declare information. This is done now instead of
181 // during the initial isel pass through the IR so that it is done
182 // in a predictable order.
183 if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
184 assert(DI->getVariable() && "Missing variable");
185 assert(DI->getDebugLoc() && "Missing location");
186 if (MMI.hasDebugInfo()) {
187 // Don't handle byval struct arguments or VLAs, for example.
188 // Non-byval arguments are handled here (they refer to the stack
189 // temporary alloca at this point).
190 const Value *Address = DI->getAddress();
192 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
193 Address = BCI->getOperand(0);
194 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
195 DenseMap<const AllocaInst *, int>::iterator SI =
196 StaticAllocaMap.find(AI);
197 if (SI != StaticAllocaMap.end()) { // Check for VLAs.
199 MMI.setVariableDbgInfo(DI->getVariable(), DI->getExpression(),
200 FI, DI->getDebugLoc());
207 // Decide the preferred extend type for a value.
208 PreferredExtendType[I] = getPreferredExtendForValue(I);
211 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
212 // also creates the initial PHI MachineInstrs, though none of the input
213 // operands are populated.
214 for (BB = Fn->begin(); BB != EB; ++BB) {
215 // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
216 // are really data, and no instructions can live here.
218 const Instruction *I = BB->getFirstNonPHI();
219 // FIXME: Don't mark SEH functions without __finally blocks as having
221 if (!isa<LandingPadInst>(I))
222 MMI.setHasEHFunclets(true);
223 if (isa<CatchEndPadInst>(I) || isa<CleanupEndPadInst>(I)) {
224 assert(&*BB->begin() == I &&
225 "WinEHPrepare failed to remove PHIs from imaginary BBs");
228 if (isa<CatchPadInst>(I) || isa<CleanupPadInst>(I))
229 assert(&*BB->begin() == I && "WinEHPrepare failed to demote PHIs");
232 MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
236 // Transfer the address-taken flag. This is necessary because there could
237 // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
238 // the first one should be marked.
239 if (BB->hasAddressTaken())
240 MBB->setHasAddressTaken();
242 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
244 for (BasicBlock::const_iterator I = BB->begin();
245 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
246 if (PN->use_empty()) continue;
249 if (PN->getType()->isEmptyTy())
252 DebugLoc DL = PN->getDebugLoc();
253 unsigned PHIReg = ValueMap[PN];
254 assert(PHIReg && "PHI node does not have an assigned virtual register!");
256 SmallVector<EVT, 4> ValueVTs;
257 ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
258 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
259 EVT VT = ValueVTs[vti];
260 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
261 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
262 for (unsigned i = 0; i != NumRegisters; ++i)
263 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
264 PHIReg += NumRegisters;
269 // Mark landing pad blocks.
270 SmallVector<const LandingPadInst *, 4> LPads;
271 for (BB = Fn->begin(); BB != EB; ++BB) {
272 const Instruction *FNP = BB->getFirstNonPHI();
273 if (BB->isEHPad() && MBBMap.count(BB))
274 MBBMap[BB]->setIsEHPad();
275 if (const auto *LPI = dyn_cast<LandingPadInst>(FNP))
276 LPads.push_back(LPI);
279 // If this personality uses funclets, we need to do a bit more work.
280 if (!Fn->hasPersonalityFn())
282 EHPersonality Personality = classifyEHPersonality(Fn->getPersonalityFn());
283 if (!isFuncletEHPersonality(Personality))
286 if (Personality == EHPersonality::MSVC_Win64SEH ||
287 Personality == EHPersonality::MSVC_X86SEH) {
288 addSEHHandlersForLPads(LPads);
291 // Calculate state numbers if we haven't already.
292 WinEHFuncInfo &EHInfo = MMI.getWinEHFuncInfo(&fn);
293 const Function *WinEHParentFn = MMI.getWinEHParent(&fn);
294 if (Personality == EHPersonality::MSVC_CXX)
295 calculateWinCXXEHStateNumbers(WinEHParentFn, EHInfo);
296 else if (isAsynchronousEHPersonality(Personality))
297 calculateSEHStateNumbers(WinEHParentFn, EHInfo);
298 else if (Personality == EHPersonality::CoreCLR)
299 calculateClrEHStateNumbers(WinEHParentFn, EHInfo);
301 calculateCatchReturnSuccessorColors(WinEHParentFn, EHInfo);
303 // Map all BB references in the WinEH data to MBBs.
304 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
305 for (WinEHHandlerType &H : TBME.HandlerArray) {
306 if (H.CatchObjRecoverIdx == -2 && H.CatchObj.Alloca) {
307 assert(StaticAllocaMap.count(H.CatchObj.Alloca));
308 H.CatchObj.FrameIndex = StaticAllocaMap[H.CatchObj.Alloca];
310 H.CatchObj.FrameIndex = INT_MAX;
312 if (const auto *BB = dyn_cast<BasicBlock>(H.Handler.get<const Value *>()))
313 H.Handler = MBBMap[BB];
316 for (WinEHUnwindMapEntry &UME : EHInfo.UnwindMap)
318 if (const auto *BB = dyn_cast<BasicBlock>(UME.Cleanup.get<const Value *>()))
319 UME.Cleanup = MBBMap[BB];
320 for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
321 const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
322 UME.Handler = MBBMap[BB];
324 for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
325 const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
326 CME.Handler = MBBMap[BB];
329 // If there's an explicit EH registration node on the stack, record its
331 if (EHInfo.EHRegNode && EHInfo.EHRegNode->getParent()->getParent() == Fn) {
332 assert(StaticAllocaMap.count(EHInfo.EHRegNode));
333 EHInfo.EHRegNodeFrameIndex = StaticAllocaMap[EHInfo.EHRegNode];
336 // Copy the state numbers to LandingPadInfo for the current function, which
337 // could be a handler or the parent. This should happen for 32-bit SEH and
339 if (Personality == EHPersonality::MSVC_CXX ||
340 Personality == EHPersonality::MSVC_X86SEH) {
341 for (const LandingPadInst *LP : LPads) {
342 MachineBasicBlock *LPadMBB = MBBMap[LP->getParent()];
343 MMI.addWinEHState(LPadMBB, EHInfo.EHPadStateMap[LP]);
348 void FunctionLoweringInfo::addSEHHandlersForLPads(
349 ArrayRef<const LandingPadInst *> LPads) {
350 MachineModuleInfo &MMI = MF->getMMI();
352 // Iterate over all landing pads with llvm.eh.actions calls.
353 for (const LandingPadInst *LP : LPads) {
354 const IntrinsicInst *ActionsCall =
355 dyn_cast<IntrinsicInst>(LP->getNextNode());
357 ActionsCall->getIntrinsicID() != Intrinsic::eh_actions)
360 // Parse the llvm.eh.actions call we found.
361 MachineBasicBlock *LPadMBB = MBBMap[LP->getParent()];
362 SmallVector<std::unique_ptr<ActionHandler>, 4> Actions;
363 parseEHActions(ActionsCall, Actions);
365 // Iterate EH actions from most to least precedence, which means
366 // iterating in reverse.
367 for (auto I = Actions.rbegin(), E = Actions.rend(); I != E; ++I) {
368 ActionHandler *Action = I->get();
369 if (auto *CH = dyn_cast<CatchHandler>(Action)) {
371 dyn_cast<Function>(CH->getSelector()->stripPointerCasts());
372 assert((Filter || CH->getSelector()->isNullValue()) &&
373 "expected function or catch-all");
374 const auto *RecoverBA =
375 cast<BlockAddress>(CH->getHandlerBlockOrFunc());
376 MMI.addSEHCatchHandler(LPadMBB, Filter, RecoverBA);
378 assert(isa<CleanupHandler>(Action));
379 const auto *Fini = cast<Function>(Action->getHandlerBlockOrFunc());
380 MMI.addSEHCleanupHandler(LPadMBB, Fini);
386 /// clear - Clear out all the function-specific state. This returns this
387 /// FunctionLoweringInfo to an empty state, ready to be used for a
388 /// different function.
389 void FunctionLoweringInfo::clear() {
390 assert(CatchInfoFound.size() == CatchInfoLost.size() &&
391 "Not all catch info was assigned to a landing pad!");
395 StaticAllocaMap.clear();
397 CatchInfoLost.clear();
398 CatchInfoFound.clear();
400 LiveOutRegInfo.clear();
402 ArgDbgValues.clear();
403 ByValArgFrameIndexMap.clear();
405 StatepointStackSlots.clear();
406 StatepointRelocatedValues.clear();
407 PreferredExtendType.clear();
410 /// CreateReg - Allocate a single virtual register for the given type.
411 unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
412 return RegInfo->createVirtualRegister(
413 MF->getSubtarget().getTargetLowering()->getRegClassFor(VT));
416 /// CreateRegs - Allocate the appropriate number of virtual registers of
417 /// the correctly promoted or expanded types. Assign these registers
418 /// consecutive vreg numbers and return the first assigned number.
420 /// In the case that the given value has struct or array type, this function
421 /// will assign registers for each member or element.
423 unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
424 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
426 SmallVector<EVT, 4> ValueVTs;
427 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
429 unsigned FirstReg = 0;
430 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
431 EVT ValueVT = ValueVTs[Value];
432 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
434 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
435 for (unsigned i = 0; i != NumRegs; ++i) {
436 unsigned R = CreateReg(RegisterVT);
437 if (!FirstReg) FirstReg = R;
443 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
444 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
445 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
446 /// the larger bit width by zero extension. The bit width must be no smaller
447 /// than the LiveOutInfo's existing bit width.
448 const FunctionLoweringInfo::LiveOutInfo *
449 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
450 if (!LiveOutRegInfo.inBounds(Reg))
453 LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
457 if (BitWidth > LOI->KnownZero.getBitWidth()) {
458 LOI->NumSignBits = 1;
459 LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
460 LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
466 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
467 /// register based on the LiveOutInfo of its operands.
468 void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
469 Type *Ty = PN->getType();
470 if (!Ty->isIntegerTy() || Ty->isVectorTy())
473 SmallVector<EVT, 1> ValueVTs;
474 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
475 assert(ValueVTs.size() == 1 &&
476 "PHIs with non-vector integer types should have a single VT.");
477 EVT IntVT = ValueVTs[0];
479 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
481 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
482 unsigned BitWidth = IntVT.getSizeInBits();
484 unsigned DestReg = ValueMap[PN];
485 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
487 LiveOutRegInfo.grow(DestReg);
488 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
490 Value *V = PN->getIncomingValue(0);
491 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
492 DestLOI.NumSignBits = 1;
493 APInt Zero(BitWidth, 0);
494 DestLOI.KnownZero = Zero;
495 DestLOI.KnownOne = Zero;
499 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
500 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
501 DestLOI.NumSignBits = Val.getNumSignBits();
502 DestLOI.KnownZero = ~Val;
503 DestLOI.KnownOne = Val;
505 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
506 "CopyToReg node was created.");
507 unsigned SrcReg = ValueMap[V];
508 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
509 DestLOI.IsValid = false;
512 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
514 DestLOI.IsValid = false;
520 assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
521 DestLOI.KnownOne.getBitWidth() == BitWidth &&
522 "Masks should have the same bit width as the type.");
524 for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
525 Value *V = PN->getIncomingValue(i);
526 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
527 DestLOI.NumSignBits = 1;
528 APInt Zero(BitWidth, 0);
529 DestLOI.KnownZero = Zero;
530 DestLOI.KnownOne = Zero;
534 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
535 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
536 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
537 DestLOI.KnownZero &= ~Val;
538 DestLOI.KnownOne &= Val;
542 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
543 "its CopyToReg node was created.");
544 unsigned SrcReg = ValueMap[V];
545 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
546 DestLOI.IsValid = false;
549 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
551 DestLOI.IsValid = false;
554 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
555 DestLOI.KnownZero &= SrcLOI->KnownZero;
556 DestLOI.KnownOne &= SrcLOI->KnownOne;
560 /// setArgumentFrameIndex - Record frame index for the byval
561 /// argument. This overrides previous frame index entry for this argument,
563 void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
565 ByValArgFrameIndexMap[A] = FI;
568 /// getArgumentFrameIndex - Get frame index for the byval argument.
569 /// If the argument does not have any assigned frame index then 0 is
571 int FunctionLoweringInfo::getArgumentFrameIndex(const Argument *A) {
572 DenseMap<const Argument *, int>::iterator I =
573 ByValArgFrameIndexMap.find(A);
574 if (I != ByValArgFrameIndexMap.end())
576 DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
580 unsigned FunctionLoweringInfo::getCatchPadExceptionPointerVReg(
581 const Value *CPI, const TargetRegisterClass *RC) {
582 MachineRegisterInfo &MRI = MF->getRegInfo();
583 auto I = CatchPadExceptionPointers.insert({CPI, 0});
584 unsigned &VReg = I.first->second;
586 VReg = MRI.createVirtualRegister(RC);
587 assert(VReg && "null vreg in exception pointer table!");
591 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
592 /// being passed to this variadic function, and set the MachineModuleInfo's
593 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
594 /// reference to _fltused on Windows, which will link in MSVCRT's
595 /// floating-point support.
596 void llvm::ComputeUsesVAFloatArgument(const CallInst &I,
597 MachineModuleInfo *MMI)
599 FunctionType *FT = cast<FunctionType>(
600 I.getCalledValue()->getType()->getContainedType(0));
601 if (FT->isVarArg() && !MMI->usesVAFloatArgument()) {
602 for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
603 Type* T = I.getArgOperand(i)->getType();
604 for (auto i : post_order(T)) {
605 if (i->isFloatingPointTy()) {
606 MMI->setUsesVAFloatArgument(true);
614 /// AddLandingPadInfo - Extract the exception handling information from the
615 /// landingpad instruction and add them to the specified machine module info.
616 void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
617 MachineBasicBlock *MBB) {
618 if (const auto *PF = dyn_cast<Function>(
619 I.getParent()->getParent()->getPersonalityFn()->stripPointerCasts()))
620 MMI.addPersonality(PF);
625 // FIXME: New EH - Add the clauses in reverse order. This isn't 100% correct,
626 // but we need to do it this way because of how the DWARF EH emitter
627 // processes the clauses.
628 for (unsigned i = I.getNumClauses(); i != 0; --i) {
629 Value *Val = I.getClause(i - 1);
630 if (I.isCatch(i - 1)) {
631 MMI.addCatchTypeInfo(MBB,
632 dyn_cast<GlobalValue>(Val->stripPointerCasts()));
634 // Add filters in a list.
635 Constant *CVal = cast<Constant>(Val);
636 SmallVector<const GlobalValue*, 4> FilterList;
637 for (User::op_iterator
638 II = CVal->op_begin(), IE = CVal->op_end(); II != IE; ++II)
639 FilterList.push_back(cast<GlobalValue>((*II)->stripPointerCasts()));
641 MMI.addFilterTypeInfo(MBB, FilterList);