1 //===-- RegisterScavenging.cpp - Machine register scavenging --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the Evan Cheng and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine register scavenger. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers availbale by evicting them
15 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "reg-scavenging"
18 #include "llvm/CodeGen/RegisterScavenging.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/Target/MRegisterInfo.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/ADT/STLExtras.h"
28 void RegScavenger::init(MachineBasicBlock *mbb) {
32 const MachineFunction &MF = *MBB->getParent();
33 const TargetMachine &TM = MF.getTarget();
34 const MRegisterInfo *RegInfo = TM.getRegisterInfo();
37 NumPhysRegs = RegInfo->getNumRegs();
38 RegStates.resize(NumPhysRegs, true);
40 // Create reserved registers bitvector.
41 ReservedRegs = RegInfo->getReservedRegs(MF);
42 RegStates ^= ReservedRegs;
44 // Create callee-saved registers bitvector.
45 CalleeSavedRegs.resize(NumPhysRegs);
46 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
48 for (unsigned i = 0; CSRegs[i]; ++i)
49 CalleeSavedRegs.set(CSRegs[i]);
51 // Live-in registers are in use.
52 if (!MBB->livein_empty())
53 for (MachineBasicBlock::const_livein_iterator I = MBB->livein_begin(),
54 E = MBB->livein_end(); I != E; ++I)
60 void RegScavenger::forward() {
61 assert(MBBI != MBB->end() && "Already at the end of the basic block!");
68 MachineInstr *MI = MBBI;
69 // Process uses first.
70 BitVector ChangedRegs(NumPhysRegs);
71 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
72 const MachineOperand &MO = MI->getOperand(i);
73 if (!MO.isReg() || !MO.isUse())
75 unsigned Reg = MO.getReg();
79 if (MO.isKill() && !isReserved(Reg))
82 // Change states of all registers after all the uses are processed to guard
83 // against multiple uses.
84 setUnused(ChangedRegs);
87 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
88 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
89 const MachineOperand &MO = MI->getOperand(i);
90 if (!MO.isReg() || !MO.isDef())
92 unsigned Reg = MO.getReg();
93 // Skip two-address destination operand.
94 if (TID->findTiedToSrcOperand(i) != -1) {
98 assert(isUnused(Reg) || isReserved(Reg));
104 void RegScavenger::backward() {
105 assert(MBBI != MBB->begin() && "Already at start of basic block!");
106 // Move ptr backward.
109 MachineInstr *MI = MBBI;
110 // Process defs first.
111 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
112 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
113 const MachineOperand &MO = MI->getOperand(i);
114 if (!MO.isReg() || !MO.isDef())
116 // Skip two-address destination operand.
117 if (TID->findTiedToSrcOperand(i) != -1)
119 unsigned Reg = MO.getReg();
121 if (!isReserved(Reg))
126 BitVector ChangedRegs(NumPhysRegs);
127 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
128 const MachineOperand &MO = MI->getOperand(i);
129 if (!MO.isReg() || !MO.isUse())
131 unsigned Reg = MO.getReg();
134 assert(isUnused(Reg) || isReserved(Reg));
135 ChangedRegs.set(Reg);
137 setUsed(ChangedRegs);
140 /// CreateRegClassMask - Set the bits that represent the registers in the
141 /// TargetRegisterClass.
142 static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {
143 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); I != E;
148 unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
149 bool ExCalleeSaved) const {
150 // Mask off the registers which are not in the TargetRegisterClass.
151 BitVector RegStatesCopy(NumPhysRegs, false);
152 CreateRegClassMask(RegClass, RegStatesCopy);
153 RegStatesCopy &= RegStates;
155 // If looking for a non-callee-saved register, mask off all the callee-saved
158 RegStatesCopy &= ~CalleeSavedRegs;
160 // Returns the first unused (bit is set) register, or 0 is none is found.
161 int Reg = RegStatesCopy.find_first();
162 return (Reg == -1) ? 0 : Reg;
165 void RegScavenger::clear() {