1 //===-- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the abstract interface for register coalescers,
11 // allowing them to interact with and query register allocators.
13 //===----------------------------------------------------------------------===//
15 #include "RegisterClassInfo.h"
16 #include "llvm/Support/IncludeFile.h"
17 #include "llvm/CodeGen/LiveInterval.h"
18 #include "llvm/ADT/SmallPtrSet.h"
20 #ifndef LLVM_CODEGEN_REGISTER_COALESCER_H
21 #define LLVM_CODEGEN_REGISTER_COALESCER_H
25 class MachineFunction;
29 class TargetRegisterInfo;
30 class TargetRegisterClass;
31 class TargetInstrInfo;
32 class LiveDebugVariables;
34 class MachineLoopInfo;
38 /// An abstract interface for register coalescers. Coalescers must
39 /// implement this interface to be part of the coalescer analysis
41 class RegisterCoalescer : public MachineFunctionPass {
43 MachineRegisterInfo* mri_;
44 const TargetMachine* tm_;
45 const TargetRegisterInfo* tri_;
46 const TargetInstrInfo* tii_;
48 LiveDebugVariables *ldv_;
49 const MachineLoopInfo* loopInfo;
51 RegisterClassInfo RegClassInfo;
53 /// JoinedCopies - Keep track of copies eliminated due to coalescing.
55 SmallPtrSet<MachineInstr*, 32> JoinedCopies;
57 /// ReMatCopies - Keep track of copies eliminated due to remat.
59 SmallPtrSet<MachineInstr*, 32> ReMatCopies;
61 /// ReMatDefs - Keep track of definition instructions which have
63 SmallPtrSet<MachineInstr*, 8> ReMatDefs;
65 /// joinIntervals - join compatible live intervals
68 /// CopyCoalesceInMBB - Coalesce copies in the specified MBB, putting
69 /// copies that cannot yet be coalesced into the "TryAgain" list.
70 void CopyCoalesceInMBB(MachineBasicBlock *MBB,
71 std::vector<MachineInstr*> &TryAgain);
73 /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
74 /// which are the src/dst of the copy instruction CopyMI. This returns true
75 /// if the copy was successfully coalesced away. If it is not currently
76 /// possible to coalesce this interval, but it may be possible if other
77 /// things get coalesced, then it returns true by reference in 'Again'.
78 bool JoinCopy(MachineInstr *TheCopy, bool &Again);
80 /// JoinIntervals - Attempt to join these two intervals. On failure, this
81 /// returns false. The output "SrcInt" will not have been modified, so we can
82 /// use this information below to update aliases.
83 bool JoinIntervals(CoalescerPair &CP);
85 /// AdjustCopiesBackFrom - We found a non-trivially-coalescable copy. If
86 /// the source value number is defined by a copy from the destination reg
87 /// see if we can merge these two destination reg valno# into a single
88 /// value number, eliminating a copy.
89 bool AdjustCopiesBackFrom(const CoalescerPair &CP, MachineInstr *CopyMI);
91 /// HasOtherReachingDefs - Return true if there are definitions of IntB
92 /// other than BValNo val# that can reach uses of AValno val# of IntA.
93 bool HasOtherReachingDefs(LiveInterval &IntA, LiveInterval &IntB,
94 VNInfo *AValNo, VNInfo *BValNo);
96 /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy.
97 /// If the source value number is defined by a commutable instruction and
98 /// its other operand is coalesced to the copy dest register, see if we
99 /// can transform the copy into a noop by commuting the definition.
100 bool RemoveCopyByCommutingDef(const CoalescerPair &CP,MachineInstr *CopyMI);
102 /// ReMaterializeTrivialDef - If the source of a copy is defined by a trivial
103 /// computation, replace the copy by rematerialize the definition.
104 /// If PreserveSrcInt is true, make sure SrcInt is valid after the call.
105 bool ReMaterializeTrivialDef(LiveInterval &SrcInt, bool PreserveSrcInt,
106 unsigned DstReg, unsigned DstSubIdx,
107 MachineInstr *CopyMI);
109 /// shouldJoinPhys - Return true if a physreg copy should be joined.
110 bool shouldJoinPhys(CoalescerPair &CP);
112 /// isWinToJoinCrossClass - Return true if it's profitable to coalesce
113 /// two virtual registers from different register classes.
114 bool isWinToJoinCrossClass(unsigned SrcReg,
116 const TargetRegisterClass *SrcRC,
117 const TargetRegisterClass *DstRC,
118 const TargetRegisterClass *NewRC);
120 /// UpdateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
121 /// update the subregister number if it is not zero. If DstReg is a
122 /// physical register and the existing subregister number of the def / use
123 /// being updated is not zero, make sure to set it to the correct physical
125 void UpdateRegDefsUses(const CoalescerPair &CP);
127 /// RemoveDeadDef - If a def of a live interval is now determined dead,
128 /// remove the val# it defines. If the live interval becomes empty, remove
130 bool RemoveDeadDef(LiveInterval &li, MachineInstr *DefMI);
132 /// RemoveCopyFlag - If DstReg is no longer defined by CopyMI, clear the
133 /// VNInfo copy flag for DstReg and all aliases.
134 void RemoveCopyFlag(unsigned DstReg, const MachineInstr *CopyMI);
136 /// markAsJoined - Remember that CopyMI has already been joined.
137 void markAsJoined(MachineInstr *CopyMI);
139 /// eliminateUndefCopy - Handle copies of undef values.
140 bool eliminateUndefCopy(MachineInstr *CopyMI, const CoalescerPair &CP);
143 static char ID; // Class identification, replacement for typeinfo
144 RegisterCoalescer() : MachineFunctionPass(ID) {
145 initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
148 /// Register allocators must call this from their own
149 /// getAnalysisUsage to cover the case where the coalescer is not
150 /// a Pass in the proper sense and isn't managed by PassManager.
151 /// PassManager needs to know which analyses to make available and
152 /// which to invalidate when running the register allocator or any
153 /// pass that might call coalescing. The long-term solution is to
154 /// allow hierarchies of PassManagers.
155 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
157 virtual void releaseMemory();
159 /// runOnMachineFunction - pass entry point
160 virtual bool runOnMachineFunction(MachineFunction&);
162 /// print - Implement the dump method.
163 virtual void print(raw_ostream &O, const Module* = 0) const;
166 /// CoalescerPair - A helper class for register coalescers. When deciding if
167 /// two registers can be coalesced, CoalescerPair can determine if a copy
168 /// instruction would become an identity copy after coalescing.
169 class CoalescerPair {
170 const TargetInstrInfo &tii_;
171 const TargetRegisterInfo &tri_;
173 /// dstReg_ - The register that will be left after coalescing. It can be a
174 /// virtual or physical register.
177 /// srcReg_ - the virtual register that will be coalesced into dstReg.
180 /// subReg_ - The subregister index of srcReg in dstReg_. It is possible the
181 /// coalesce srcReg_ into a subreg of the larger dstReg_ when dstReg_ is a
182 /// virtual register.
185 /// partial_ - True when the original copy was a partial subregister copy.
188 /// crossClass_ - True when both regs are virtual, and newRC is constrained.
191 /// flipped_ - True when DstReg and SrcReg are reversed from the oriignal copy
195 /// newRC_ - The register class of the coalesced register, or NULL if dstReg_
197 const TargetRegisterClass *newRC_;
200 CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
201 : tii_(tii), tri_(tri), dstReg_(0), srcReg_(0), subIdx_(0),
202 partial_(false), crossClass_(false), flipped_(false), newRC_(0) {}
204 /// setRegisters - set registers to match the copy instruction MI. Return
205 /// false if MI is not a coalescable copy instruction.
206 bool setRegisters(const MachineInstr*);
208 /// flip - Swap srcReg_ and dstReg_. Return false if swapping is impossible
209 /// because dstReg_ is a physical register, or subIdx_ is set.
212 /// isCoalescable - Return true if MI is a copy instruction that will become
213 /// an identity copy after coalescing.
214 bool isCoalescable(const MachineInstr*) const;
216 /// isPhys - Return true if DstReg is a physical register.
217 bool isPhys() const { return !newRC_; }
219 /// isPartial - Return true if the original copy instruction did not copy the
220 /// full register, but was a subreg operation.
221 bool isPartial() const { return partial_; }
223 /// isCrossClass - Return true if DstReg is virtual and NewRC is a smaller register class than DstReg's.
224 bool isCrossClass() const { return crossClass_; }
226 /// isFlipped - Return true when getSrcReg is the register being defined by
227 /// the original copy instruction.
228 bool isFlipped() const { return flipped_; }
230 /// getDstReg - Return the register (virtual or physical) that will remain
231 /// after coalescing.
232 unsigned getDstReg() const { return dstReg_; }
234 /// getSrcReg - Return the virtual register that will be coalesced away.
235 unsigned getSrcReg() const { return srcReg_; }
237 /// getSubIdx - Return the subregister index in DstReg that SrcReg will be
238 /// coalesced into, or 0.
239 unsigned getSubIdx() const { return subIdx_; }
241 /// getNewRC - Return the register class of the coalesced register.
242 const TargetRegisterClass *getNewRC() const { return newRC_; }
244 } // End llvm namespace