1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 // This pass provides an optional shrink wrapping variant of prolog/epilog
18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
20 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "pei"
23 #include "PrologEpilogInserter.h"
24 #include "llvm/ADT/IndexedMap.h"
25 #include "llvm/ADT/STLExtras.h"
26 #include "llvm/ADT/SmallSet.h"
27 #include "llvm/ADT/Statistic.h"
28 #include "llvm/CodeGen/MachineDominators.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/CodeGen/MachineLoopInfo.h"
32 #include "llvm/CodeGen/MachineRegisterInfo.h"
33 #include "llvm/CodeGen/RegisterScavenging.h"
34 #include "llvm/IR/InlineAsm.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Debug.h"
38 #include "llvm/Target/TargetFrameLowering.h"
39 #include "llvm/Target/TargetInstrInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Target/TargetRegisterInfo.h"
47 char &llvm::PrologEpilogCodeInserterID = PEI::ID;
49 INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
50 "Prologue/Epilogue Insertion", false, false)
51 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
52 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
53 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
54 INITIALIZE_PASS_END(PEI, "prologepilog",
55 "Prologue/Epilogue Insertion & Frame Finalization",
58 STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered");
59 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
60 STATISTIC(NumBytesStackSpace,
61 "Number of bytes used for stack in all functions");
63 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
64 /// frame indexes with appropriate references.
66 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
67 const Function* F = Fn.getFunction();
68 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
69 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
71 assert(!Fn.getRegInfo().getNumVirtRegs() && "Regalloc must assign all vregs");
73 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
74 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
76 // Calculate the MaxCallFrameSize and AdjustsStack variables for the
77 // function's frame information. Also eliminates call frame pseudo
79 calculateCallsInformation(Fn);
81 // Allow the target machine to make some adjustments to the function
82 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
83 TFI->processFunctionBeforeCalleeSavedScan(Fn, RS);
85 // Scan the function for modified callee saved registers and insert spill code
86 // for any callee saved registers that are modified.
87 calculateCalleeSavedRegisters(Fn);
89 // Determine placement of CSR spill/restore code:
90 // - With shrink wrapping, place spills and restores to tightly
91 // enclose regions in the Machine CFG of the function where
93 // - Without shink wrapping (default), place all spills in the
94 // entry block, all restores in return blocks.
95 placeCSRSpillsAndRestores(Fn);
97 // Add the code to save and restore the callee saved registers
98 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
100 insertCSRSpillsAndRestores(Fn);
102 // Allow the target machine to make final modifications to the function
103 // before the frame layout is finalized.
104 TFI->processFunctionBeforeFrameFinalized(Fn, RS);
106 // Calculate actual frame offsets for all abstract stack objects...
107 calculateFrameObjectOffsets(Fn);
109 // Add prolog and epilog code to the function. This function is required
110 // to align the stack frame as necessary for any stack variables or
111 // called functions. Because of this, calculateCalleeSavedRegisters()
112 // must be called before this function in order to set the AdjustsStack
113 // and MaxCallFrameSize variables.
114 if (!F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
116 insertPrologEpilogCode(Fn);
118 // Replace all MO_FrameIndex operands with physical register references
119 // and actual offsets.
121 replaceFrameIndices(Fn);
123 // If register scavenging is needed, as we've enabled doing it as a
124 // post-pass, scavenge the virtual registers that frame index elimiation
126 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
127 scavengeFrameVirtualRegs(Fn);
129 // Clear any vregs created by virtual scavenging.
130 Fn.getRegInfo().clearVirtRegs();
137 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
138 /// variables for the function's frame information and eliminate call frame
139 /// pseudo instructions.
140 void PEI::calculateCallsInformation(MachineFunction &Fn) {
141 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
142 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
143 MachineFrameInfo *MFI = Fn.getFrameInfo();
145 unsigned MaxCallFrameSize = 0;
146 bool AdjustsStack = MFI->adjustsStack();
148 // Get the function call frame set-up and tear-down instruction opcode
149 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
150 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
152 // Early exit for targets which have no call frame setup/destroy pseudo
154 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
157 std::vector<MachineBasicBlock::iterator> FrameSDOps;
158 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
159 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
160 if (I->getOpcode() == FrameSetupOpcode ||
161 I->getOpcode() == FrameDestroyOpcode) {
162 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
163 " instructions should have a single immediate argument!");
164 unsigned Size = I->getOperand(0).getImm();
165 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
167 FrameSDOps.push_back(I);
168 } else if (I->isInlineAsm()) {
169 // Some inline asm's need a stack frame, as indicated by operand 1.
170 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
171 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
175 MFI->setAdjustsStack(AdjustsStack);
176 MFI->setMaxCallFrameSize(MaxCallFrameSize);
178 for (std::vector<MachineBasicBlock::iterator>::iterator
179 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
180 MachineBasicBlock::iterator I = *i;
182 // If call frames are not being included as part of the stack frame, and
183 // the target doesn't indicate otherwise, remove the call frame pseudos
184 // here. The sub/add sp instruction pairs are still inserted, but we don't
185 // need to track the SP adjustment for frame index elimination.
186 if (TFI->canSimplifyCallFramePseudos(Fn))
187 TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
192 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved
194 void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
195 const TargetRegisterInfo *RegInfo = F.getTarget().getRegisterInfo();
196 const TargetFrameLowering *TFI = F.getTarget().getFrameLowering();
197 MachineFrameInfo *MFI = F.getFrameInfo();
199 // Get the callee saved register list...
200 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs(&F);
202 // These are used to keep track the callee-save area. Initialize them.
203 MinCSFrameIndex = INT_MAX;
206 // Early exit for targets which have no callee saved registers.
207 if (CSRegs == 0 || CSRegs[0] == 0)
210 // In Naked functions we aren't going to save any registers.
211 if (F.getFunction()->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
215 std::vector<CalleeSavedInfo> CSI;
216 for (unsigned i = 0; CSRegs[i]; ++i) {
217 unsigned Reg = CSRegs[i];
218 if (F.getRegInfo().isPhysRegUsed(Reg)) {
219 // If the reg is modified, save it!
220 CSI.push_back(CalleeSavedInfo(Reg));
225 return; // Early exit if no callee saved registers are modified!
227 unsigned NumFixedSpillSlots;
228 const TargetFrameLowering::SpillSlot *FixedSpillSlots =
229 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
231 // Now that we know which registers need to be saved and restored, allocate
232 // stack slots for them.
233 for (std::vector<CalleeSavedInfo>::iterator
234 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
235 unsigned Reg = I->getReg();
236 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
239 if (RegInfo->hasReservedSpillSlot(F, Reg, FrameIdx)) {
240 I->setFrameIdx(FrameIdx);
244 // Check to see if this physreg must be spilled to a particular stack slot
246 const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
247 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
248 FixedSlot->Reg != Reg)
251 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
252 // Nope, just spill it anywhere convenient.
253 unsigned Align = RC->getAlignment();
254 unsigned StackAlign = TFI->getStackAlignment();
256 // We may not be able to satisfy the desired alignment specification of
257 // the TargetRegisterClass if the stack alignment is smaller. Use the
259 Align = std::min(Align, StackAlign);
260 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
261 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
262 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
264 // Spill it to the stack where we must.
265 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true);
268 I->setFrameIdx(FrameIdx);
271 MFI->setCalleeSavedInfo(CSI);
274 /// insertCSRSpillsAndRestores - Insert spill and restore code for
275 /// callee saved registers used in the function, handling shrink wrapping.
277 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
278 // Get callee saved register information.
279 MachineFrameInfo *MFI = Fn.getFrameInfo();
280 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
282 MFI->setCalleeSavedInfoValid(true);
284 // Early exit if no callee saved registers are modified!
288 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
289 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
290 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
291 MachineBasicBlock::iterator I;
293 if (!ShrinkWrapThisFunction) {
294 // Spill using target interface.
295 I = EntryBlock->begin();
296 if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
297 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
298 // Add the callee-saved register as live-in.
299 // It's killed at the spill.
300 EntryBlock->addLiveIn(CSI[i].getReg());
302 // Insert the spill to the stack frame.
303 unsigned Reg = CSI[i].getReg();
304 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
305 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
306 CSI[i].getFrameIdx(), RC, TRI);
310 // Restore using target interface.
311 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
312 MachineBasicBlock* MBB = ReturnBlocks[ri];
315 // Skip over all terminator instructions, which are part of the return
317 MachineBasicBlock::iterator I2 = I;
318 while (I2 != MBB->begin() && (--I2)->isTerminator())
321 bool AtStart = I == MBB->begin();
322 MachineBasicBlock::iterator BeforeI = I;
326 // Restore all registers immediately before the return and any
327 // terminators that precede it.
328 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
329 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
330 unsigned Reg = CSI[i].getReg();
331 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
332 TII.loadRegFromStackSlot(*MBB, I, Reg,
333 CSI[i].getFrameIdx(),
335 assert(I != MBB->begin() &&
336 "loadRegFromStackSlot didn't insert any code!");
337 // Insert in reverse order. loadRegFromStackSlot can insert
338 // multiple instructions.
352 std::vector<CalleeSavedInfo> blockCSI;
353 for (CSRegBlockMap::iterator BI = CSRSave.begin(),
354 BE = CSRSave.end(); BI != BE; ++BI) {
355 MachineBasicBlock* MBB = BI->first;
356 CSRegSet save = BI->second;
362 for (CSRegSet::iterator RI = save.begin(),
363 RE = save.end(); RI != RE; ++RI) {
364 blockCSI.push_back(CSI[*RI]);
366 assert(blockCSI.size() > 0 &&
367 "Could not collect callee saved register info");
371 // When shrink wrapping, use stack slot stores/loads.
372 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
373 // Add the callee-saved register as live-in.
374 // It's killed at the spill.
375 MBB->addLiveIn(blockCSI[i].getReg());
377 // Insert the spill to the stack frame.
378 unsigned Reg = blockCSI[i].getReg();
379 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
380 TII.storeRegToStackSlot(*MBB, I, Reg,
382 blockCSI[i].getFrameIdx(),
387 for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
388 BE = CSRRestore.end(); BI != BE; ++BI) {
389 MachineBasicBlock* MBB = BI->first;
390 CSRegSet restore = BI->second;
396 for (CSRegSet::iterator RI = restore.begin(),
397 RE = restore.end(); RI != RE; ++RI) {
398 blockCSI.push_back(CSI[*RI]);
400 assert(blockCSI.size() > 0 &&
401 "Could not find callee saved register info");
403 // If MBB is empty and needs restores, insert at the _beginning_.
410 // Skip over all terminator instructions, which are part of the
412 if (! I->isTerminator()) {
415 MachineBasicBlock::iterator I2 = I;
416 while (I2 != MBB->begin() && (--I2)->isTerminator())
421 bool AtStart = I == MBB->begin();
422 MachineBasicBlock::iterator BeforeI = I;
426 // Restore all registers immediately before the return and any
427 // terminators that precede it.
428 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
429 unsigned Reg = blockCSI[i].getReg();
430 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
431 TII.loadRegFromStackSlot(*MBB, I, Reg,
432 blockCSI[i].getFrameIdx(),
434 assert(I != MBB->begin() &&
435 "loadRegFromStackSlot didn't insert any code!");
436 // Insert in reverse order. loadRegFromStackSlot can insert
437 // multiple instructions.
448 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
450 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
451 bool StackGrowsDown, int64_t &Offset,
452 unsigned &MaxAlign) {
453 // If the stack grows down, add the object size to find the lowest address.
455 Offset += MFI->getObjectSize(FrameIdx);
457 unsigned Align = MFI->getObjectAlignment(FrameIdx);
459 // If the alignment of this object is greater than that of the stack, then
460 // increase the stack alignment to match.
461 MaxAlign = std::max(MaxAlign, Align);
463 // Adjust to alignment boundary.
464 Offset = (Offset + Align - 1) / Align * Align;
466 if (StackGrowsDown) {
467 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
468 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
470 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
471 MFI->setObjectOffset(FrameIdx, Offset);
472 Offset += MFI->getObjectSize(FrameIdx);
476 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
477 /// abstract stack objects.
479 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
480 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
482 bool StackGrowsDown =
483 TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
485 // Loop over all of the stack objects, assigning sequential addresses...
486 MachineFrameInfo *MFI = Fn.getFrameInfo();
488 // Start at the beginning of the local area.
489 // The Offset is the distance from the stack top in the direction
490 // of stack growth -- so it's always nonnegative.
491 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
493 LocalAreaOffset = -LocalAreaOffset;
494 assert(LocalAreaOffset >= 0
495 && "Local area offset should be in direction of stack growth");
496 int64_t Offset = LocalAreaOffset;
498 // If there are fixed sized objects that are preallocated in the local area,
499 // non-fixed objects can't be allocated right at the start of local area.
500 // We currently don't support filling in holes in between fixed sized
501 // objects, so we adjust 'Offset' to point to the end of last fixed sized
502 // preallocated object.
503 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
505 if (StackGrowsDown) {
506 // The maximum distance from the stack pointer is at lower address of
507 // the object -- which is given by offset. For down growing stack
508 // the offset is negative, so we negate the offset to get the distance.
509 FixedOff = -MFI->getObjectOffset(i);
511 // The maximum distance from the start pointer is at the upper
512 // address of the object.
513 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
515 if (FixedOff > Offset) Offset = FixedOff;
518 // First assign frame offsets to stack objects that are used to spill
519 // callee saved registers.
520 if (StackGrowsDown) {
521 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
522 // If the stack grows down, we need to add the size to find the lowest
523 // address of the object.
524 Offset += MFI->getObjectSize(i);
526 unsigned Align = MFI->getObjectAlignment(i);
527 // Adjust to alignment boundary
528 Offset = (Offset+Align-1)/Align*Align;
530 MFI->setObjectOffset(i, -Offset); // Set the computed offset
533 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
534 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
535 unsigned Align = MFI->getObjectAlignment(i);
536 // Adjust to alignment boundary
537 Offset = (Offset+Align-1)/Align*Align;
539 MFI->setObjectOffset(i, Offset);
540 Offset += MFI->getObjectSize(i);
544 unsigned MaxAlign = MFI->getMaxAlignment();
546 // Make sure the special register scavenging spill slot is closest to the
547 // frame pointer if a frame pointer is required.
548 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
549 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) &&
550 !RegInfo->needsStackRealignment(Fn)) {
551 int SFI = RS->getScavengingFrameIndex();
553 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
556 // FIXME: Once this is working, then enable flag will change to a target
557 // check for whether the frame is large enough to want to use virtual
558 // frame index registers. Functions which don't want/need this optimization
559 // will continue to use the existing code path.
560 if (MFI->getUseLocalStackAllocationBlock()) {
561 unsigned Align = MFI->getLocalFrameMaxAlign();
563 // Adjust to alignment boundary.
564 Offset = (Offset + Align - 1) / Align * Align;
566 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
568 // Resolve offsets for objects in the local block.
569 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
570 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
571 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
572 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
574 MFI->setObjectOffset(Entry.first, FIOffset);
576 // Allocate the local block
577 Offset += MFI->getLocalFrameSize();
579 MaxAlign = std::max(Align, MaxAlign);
582 // Make sure that the stack protector comes before the local variables on the
584 SmallSet<int, 16> LargeStackObjs;
585 if (MFI->getStackProtectorIndex() >= 0) {
586 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
589 // Assign large stack objects first.
590 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
591 if (MFI->isObjectPreAllocated(i) &&
592 MFI->getUseLocalStackAllocationBlock())
594 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
596 if (RS && (int)i == RS->getScavengingFrameIndex())
598 if (MFI->isDeadObjectIndex(i))
600 if (MFI->getStackProtectorIndex() == (int)i)
602 if (!MFI->MayNeedStackProtector(i))
605 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
606 LargeStackObjs.insert(i);
610 // Then assign frame offsets to stack objects that are not used to spill
611 // callee saved registers.
612 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
613 if (MFI->isObjectPreAllocated(i) &&
614 MFI->getUseLocalStackAllocationBlock())
616 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
618 if (RS && (int)i == RS->getScavengingFrameIndex())
620 if (MFI->isDeadObjectIndex(i))
622 if (MFI->getStackProtectorIndex() == (int)i)
624 if (LargeStackObjs.count(i))
627 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
630 // Make sure the special register scavenging spill slot is closest to the
632 if (RS && (!TFI.hasFP(Fn) || RegInfo->needsStackRealignment(Fn) ||
633 !RegInfo->useFPForScavengingIndex(Fn))) {
634 int SFI = RS->getScavengingFrameIndex();
636 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
639 if (!TFI.targetHandlesStackFrameRounding()) {
640 // If we have reserved argument space for call sites in the function
641 // immediately on entry to the current function, count it as part of the
642 // overall stack size.
643 if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
644 Offset += MFI->getMaxCallFrameSize();
646 // Round up the size to a multiple of the alignment. If the function has
647 // any calls or alloca's, align to the target's StackAlignment value to
648 // ensure that the callee's frame or the alloca data is suitably aligned;
649 // otherwise, for leaf functions, align to the TransientStackAlignment
652 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
653 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
654 StackAlign = TFI.getStackAlignment();
656 StackAlign = TFI.getTransientStackAlignment();
658 // If the frame pointer is eliminated, all frame offsets will be relative to
659 // SP not FP. Align to MaxAlign so this works.
660 StackAlign = std::max(StackAlign, MaxAlign);
661 unsigned AlignMask = StackAlign - 1;
662 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
665 // Update frame info to pretend that this is part of the stack...
666 int64_t StackSize = Offset - LocalAreaOffset;
667 MFI->setStackSize(StackSize);
668 NumBytesStackSpace += StackSize;
671 /// insertPrologEpilogCode - Scan the function for modified callee saved
672 /// registers, insert spill code for these callee saved registers, then add
673 /// prolog and epilog code to the function.
675 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
676 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
678 // Add prologue to the function...
679 TFI.emitPrologue(Fn);
681 // Add epilogue to restore the callee-save registers in each exiting block
682 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
683 // If last instruction is a return instruction, add an epilogue
684 if (!I->empty() && I->back().isReturn())
685 TFI.emitEpilogue(Fn, *I);
688 // Emit additional code that is required to support segmented stacks, if
689 // we've been asked for it. This, when linked with a runtime with support
690 // for segmented stacks (libgcc is one), will result in allocating stack
691 // space in small chunks instead of one large contiguous block.
692 if (Fn.getTarget().Options.EnableSegmentedStacks)
693 TFI.adjustForSegmentedStacks(Fn);
695 // Emit additional code that is required to explicitly handle the stack in
696 // HiPE native code (if needed) when loaded in the Erlang/OTP runtime. The
697 // approach is rather similar to that of Segmented Stacks, but it uses a
698 // different conditional check and another BIF for allocating more stack
700 if (Fn.getFunction()->getCallingConv() == CallingConv::HiPE)
701 TFI.adjustForHiPEPrologue(Fn);
704 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
705 /// register references and actual offsets.
707 void PEI::replaceFrameIndices(MachineFunction &Fn) {
708 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
710 const TargetMachine &TM = Fn.getTarget();
711 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
712 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
713 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
714 const TargetFrameLowering *TFI = TM.getFrameLowering();
715 bool StackGrowsDown =
716 TFI->getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
717 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
718 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
720 for (MachineFunction::iterator BB = Fn.begin(),
721 E = Fn.end(); BB != E; ++BB) {
723 int SPAdjCount = 0; // frame setup / destroy count.
725 int SPAdj = 0; // SP offset due to call frame setup / destroy.
726 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
728 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
730 if (I->getOpcode() == FrameSetupOpcode ||
731 I->getOpcode() == FrameDestroyOpcode) {
733 // Track whether we see even pairs of them
734 SPAdjCount += I->getOpcode() == FrameSetupOpcode ? 1 : -1;
736 // Remember how much SP has been adjusted to create the call
738 int Size = I->getOperand(0).getImm();
740 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
741 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
746 MachineBasicBlock::iterator PrevI = BB->end();
747 if (I != BB->begin()) PrevI = prior(I);
748 TFI->eliminateCallFramePseudoInstr(Fn, *BB, I);
750 // Visit the instructions created by eliminateCallFramePseudoInstr().
751 if (PrevI == BB->end())
752 I = BB->begin(); // The replaced instr was the first in the block.
754 I = llvm::next(PrevI);
758 MachineInstr *MI = I;
760 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
761 if (!MI->getOperand(i).isFI())
764 // Some instructions (e.g. inline asm instructions) can have
765 // multiple frame indices and/or cause eliminateFrameIndex
766 // to insert more than one instruction. We need the register
767 // scavenger to go through all of these instructions so that
768 // it can update its register information. We keep the
769 // iterator at the point before insertion so that we can
770 // revisit them in full.
771 bool AtBeginning = (I == BB->begin());
772 if (!AtBeginning) --I;
774 // If this instruction has a FrameIndex operand, we need to
775 // use that target machine register info object to eliminate
777 TRI.eliminateFrameIndex(MI, SPAdj, i,
778 FrameIndexVirtualScavenging ? NULL : RS);
780 // Reset the iterator if we were at the beginning of the BB.
790 if (DoIncr && I != BB->end()) ++I;
792 // Update register states.
793 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
796 // If we have evenly matched pairs of frame setup / destroy instructions,
797 // make sure the adjustments come out to zero. If we don't have matched
798 // pairs, we can't be sure the missing bit isn't in another basic block
799 // due to a custom inserter playing tricks, so just asserting SPAdj==0
800 // isn't sufficient. See tMOVCC on Thumb1, for example.
801 assert((SPAdjCount || SPAdj == 0) &&
802 "Unbalanced call frame setup / destroy pairs?");
806 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
807 /// with physical registers. Use the register scavenger to find an
808 /// appropriate register to use.
810 /// FIXME: Iterating over the instruction stream is unnecessary. We can simply
811 /// iterate over the vreg use list, which at this point only contains machine
812 /// operands for which eliminateFrameIndex need a new scratch reg.
813 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
814 // Run through the instructions and find any virtual registers.
815 for (MachineFunction::iterator BB = Fn.begin(),
816 E = Fn.end(); BB != E; ++BB) {
817 RS->enterBasicBlock(BB);
819 unsigned VirtReg = 0;
820 unsigned ScratchReg = 0;
823 // The instruction stream may change in the loop, so check BB->end()
825 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
826 MachineInstr *MI = I;
827 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
828 if (MI->getOperand(i).isReg()) {
829 MachineOperand &MO = MI->getOperand(i);
830 unsigned Reg = MO.getReg();
833 if (!TargetRegisterInfo::isVirtualRegister(Reg))
836 ++NumVirtualFrameRegs;
838 // Have we already allocated a scratch register for this virtual?
839 if (Reg != VirtReg) {
840 // When we first encounter a new virtual register, it
841 // must be a definition.
842 assert(MI->getOperand(i).isDef() &&
843 "frame index virtual missing def!");
844 // Scavenge a new scratch register
846 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
847 ScratchReg = RS->scavengeRegister(RC, I, SPAdj);
850 // Replace this reference to the virtual register with the
852 assert (ScratchReg && "Missing scratch register!");
853 MI->getOperand(i).setReg(ScratchReg);