1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIElimination.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Function.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Compiler.h"
31 #include "llvm/Support/Debug.h"
36 STATISTIC(NumAtomic, "Number of atomic phis lowered");
37 STATISTIC(NumSplits, "Number of critical edges split on demand");
40 SplitEdges("split-phi-edges",
41 cl::desc("Split critical edges during phi elimination"),
42 cl::init(false), cl::Hidden);
44 char PHIElimination::ID = 0;
45 static RegisterPass<PHIElimination>
46 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
48 const PassInfo *const llvm::PHIEliminationID = &X;
50 void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
51 AU.addPreserved<LiveVariables>();
52 AU.addPreserved<MachineDominatorTree>();
54 AU.addRequired<LiveVariables>();
57 AU.addPreservedID(MachineLoopInfoID);
59 MachineFunctionPass::getAnalysisUsage(AU);
62 bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
63 MRI = &Fn.getRegInfo();
69 // Split critical edges to help the coalescer
71 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
72 Changed |= SplitPHIEdges(Fn, *I);
74 // Populate VRegPHIUseCount
77 // Eliminate PHI instructions by inserting copies into predecessor blocks.
78 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
79 Changed |= EliminatePHINodes(Fn, *I);
81 // Remove dead IMPLICIT_DEF instructions.
82 for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
83 E = ImpDefs.end(); I != E; ++I) {
84 MachineInstr *DefMI = *I;
85 unsigned DefReg = DefMI->getOperand(0).getReg();
86 if (MRI->use_empty(DefReg))
87 DefMI->eraseFromParent();
91 VRegPHIUseCount.clear();
95 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
96 /// predecessor basic blocks.
98 bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
99 MachineBasicBlock &MBB) {
100 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
101 return false; // Quick exit for basic blocks without PHIs.
103 // Get an iterator to the first instruction after the last PHI node (this may
104 // also be the end of the basic block).
105 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
107 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
108 LowerAtomicPHINode(MBB, AfterPHIsIt);
113 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
114 /// are implicit_def's.
115 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
116 const MachineRegisterInfo *MRI) {
117 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
118 unsigned SrcReg = MPhi->getOperand(i).getReg();
119 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
120 if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
126 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
127 // when following the CFG edge to SuccMBB. This needs to be after any def of
128 // SrcReg, but before any subsequent point where control flow might jump out of
130 MachineBasicBlock::iterator
131 llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
132 MachineBasicBlock &SuccMBB,
134 // Handle the trivial case trivially.
138 // Usually, we just want to insert the copy before the first terminator
139 // instruction. However, for the edge going to a landing pad, we must insert
140 // the copy before the call/invoke instruction.
141 if (!SuccMBB.isLandingPad())
142 return MBB.getFirstTerminator();
144 // Discover any defs/uses in this basic block.
145 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
146 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
147 RE = MRI->reg_end(); RI != RE; ++RI) {
148 MachineInstr *DefUseMI = &*RI;
149 if (DefUseMI->getParent() == &MBB)
150 DefUsesInMBB.insert(DefUseMI);
153 MachineBasicBlock::iterator InsertPoint;
154 if (DefUsesInMBB.empty()) {
155 // No defs. Insert the copy at the start of the basic block.
156 InsertPoint = MBB.begin();
157 } else if (DefUsesInMBB.size() == 1) {
158 // Insert the copy immediately after the def/use.
159 InsertPoint = *DefUsesInMBB.begin();
162 // Insert the copy immediately after the last def/use.
163 InsertPoint = MBB.end();
164 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
168 // Make sure the copy goes after any phi nodes however.
169 return SkipPHIsAndLabels(MBB, InsertPoint);
172 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
173 /// under the assuption that it needs to be lowered in a way that supports
174 /// atomic execution of PHIs. This lowering method is always correct all of the
177 void llvm::PHIElimination::LowerAtomicPHINode(
178 MachineBasicBlock &MBB,
179 MachineBasicBlock::iterator AfterPHIsIt) {
180 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
181 MachineInstr *MPhi = MBB.remove(MBB.begin());
183 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
184 unsigned DestReg = MPhi->getOperand(0).getReg();
185 bool isDead = MPhi->getOperand(0).isDead();
187 // Create a new register for the incoming PHI arguments.
188 MachineFunction &MF = *MBB.getParent();
189 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
190 unsigned IncomingReg = 0;
192 // Insert a register to register copy at the top of the current block (but
193 // after any remaining phi nodes) which copies the new incoming register
194 // into the phi node destination.
195 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
196 if (isSourceDefinedByImplicitDef(MPhi, MRI))
197 // If all sources of a PHI node are implicit_def, just emit an
198 // implicit_def instead of a copy.
199 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
200 TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
202 IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
203 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
207 assert(!hasPHIDef(DestReg) && "Vreg has multiple phi-defs?");
208 PHIDefs[DestReg] = &MBB;
210 // Update live variable information if there is any.
211 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
213 MachineInstr *PHICopy = prior(AfterPHIsIt);
216 // Increment use count of the newly created virtual register.
217 LV->getVarInfo(IncomingReg).NumUses++;
219 // Add information to LiveVariables to know that the incoming value is
220 // killed. Note that because the value is defined in several places (once
221 // each for each incoming block), the "def" block and instruction fields
222 // for the VarInfo is not filled in.
223 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
226 // Since we are going to be deleting the PHI node, if it is the last use of
227 // any registers, or if the value itself is dead, we need to move this
228 // information over to the new copy we just inserted.
229 LV->removeVirtualRegistersKilled(MPhi);
231 // If the result is dead, update LV.
233 LV->addVirtualRegisterDead(DestReg, PHICopy);
234 LV->removeVirtualRegisterDead(DestReg, MPhi);
238 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
239 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
240 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
241 MPhi->getOperand(i).getReg())];
243 // Now loop over all of the incoming arguments, changing them to copy into the
244 // IncomingReg register in the corresponding predecessor basic block.
245 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
246 for (int i = NumSrcs - 1; i >= 0; --i) {
247 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
248 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
249 "Machine PHI Operands must all be virtual registers!");
251 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
253 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
256 PHIKills[SrcReg].insert(&opBlock);
258 // If source is defined by an implicit def, there is no need to insert a
260 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
261 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
262 ImpDefs.insert(DefMI);
266 // Check to make sure we haven't already emitted the copy for this block.
267 // This can happen because PHI nodes may have multiple entries for the same
269 if (!MBBsInsertedInto.insert(&opBlock))
270 continue; // If the copy has already been emitted, we're done.
272 // Find a safe location to insert the copy, this may be the first terminator
273 // in the block (or end()).
274 MachineBasicBlock::iterator InsertPos =
275 FindCopyInsertPoint(opBlock, MBB, SrcReg);
278 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
280 // Now update live variable information if we have it. Otherwise we're done
283 // We want to be able to insert a kill of the register if this PHI (aka, the
284 // copy we just inserted) is the last use of the source value. Live
285 // variable analysis conservatively handles this by saying that the value is
286 // live until the end of the block the PHI entry lives in. If the value
287 // really is dead at the PHI copy, there will be no successor blocks which
288 // have the value live-in.
290 // Also check to see if this register is in use by another PHI node which
291 // has not yet been eliminated. If so, it will be killed at an appropriate
294 // Is it used by any PHI instructions in this block?
295 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
297 // Okay, if we now know that the value is not live out of the block, we can
298 // add a kill marker in this block saying that it kills the incoming value!
299 if (!ValueIsUsed && !isLiveOut(SrcReg, opBlock, *LV)) {
300 // In our final twist, we have to decide which instruction kills the
301 // register. In most cases this is the copy, however, the first
302 // terminator instruction at the end of the block may also use the value.
303 // In this case, we should mark *it* as being the killing block, not the
305 MachineBasicBlock::iterator KillInst = prior(InsertPos);
306 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
307 if (Term != opBlock.end()) {
308 if (Term->readsRegister(SrcReg))
311 // Check that no other terminators use values.
313 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
315 assert(!TI->readsRegister(SrcReg) &&
316 "Terminator instructions cannot use virtual registers unless"
317 "they are the first terminator in a block!");
322 // Finally, mark it killed.
323 LV->addVirtualRegisterKilled(SrcReg, KillInst);
325 // This vreg no longer lives all of the way through opBlock.
326 unsigned opBlockNum = opBlock.getNumber();
327 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
331 // Really delete the PHI instruction now!
332 MF.DeleteMachineInstr(MPhi);
336 /// analyzePHINodes - Gather information about the PHI nodes in here. In
337 /// particular, we want to map the number of uses of a virtual register which is
338 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
339 /// used later to determine when the vreg is killed in the BB.
341 void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) {
342 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
344 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
345 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
346 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
347 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
348 BBI->getOperand(i).getReg())];
351 bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
352 MachineBasicBlock &MBB) {
353 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
354 return false; // Quick exit for basic blocks without PHIs.
355 LiveVariables &LV = getAnalysis<LiveVariables>();
356 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
357 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) {
358 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
359 unsigned Reg = BBI->getOperand(i).getReg();
360 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
361 // We break edges when registers are live out from the predecessor block
362 // (not considering PHI nodes). If the register is live in to this block
363 // anyway, we would gain nothing from splitting.
364 if (isLiveOut(Reg, *PreMBB, LV) && !isLiveIn(Reg, MBB, LV))
365 SplitCriticalEdge(PreMBB, &MBB);
371 bool llvm::PHIElimination::isLiveOut(unsigned Reg, const MachineBasicBlock &MBB,
373 LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
375 // Loop over all of the successors of the basic block, checking to see if
376 // the value is either live in the block, or if it is killed in the block.
377 std::vector<MachineBasicBlock*> OpSuccBlocks;
378 for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
379 E = MBB.succ_end(); SI != E; ++SI) {
380 MachineBasicBlock *SuccMBB = *SI;
382 // Is it alive in this successor?
383 unsigned SuccIdx = SuccMBB->getNumber();
384 if (VI.AliveBlocks.test(SuccIdx))
386 OpSuccBlocks.push_back(SuccMBB);
389 // Check to see if this value is live because there is a use in a successor
391 switch (OpSuccBlocks.size()) {
393 MachineBasicBlock *SuccMBB = OpSuccBlocks[0];
394 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
395 if (VI.Kills[i]->getParent() == SuccMBB)
400 MachineBasicBlock *SuccMBB1 = OpSuccBlocks[0], *SuccMBB2 = OpSuccBlocks[1];
401 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
402 if (VI.Kills[i]->getParent() == SuccMBB1 ||
403 VI.Kills[i]->getParent() == SuccMBB2)
408 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
409 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
410 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
411 VI.Kills[i]->getParent()))
417 bool llvm::PHIElimination::isLiveIn(unsigned Reg, const MachineBasicBlock &MBB,
419 LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
421 if (VI.AliveBlocks.test(MBB.getNumber()))
425 const MachineInstr *Def = MRI->getVRegDef(Reg);
426 if (Def && Def->getParent() == &MBB)
430 return VI.findKill(&MBB);
433 MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
434 MachineBasicBlock *B) {
435 assert(A && B && "Missing MBB end point");
438 MachineFunction *MF = A->getParent();
439 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
441 DEBUG(errs() << "PHIElimination splitting critical edge:"
442 " BB#" << A->getNumber()
443 << " -- BB#" << NMBB->getNumber()
444 << " -- BB#" << B->getNumber() << '\n');
446 A->ReplaceUsesOfBlockWith(B, NMBB);
447 // If A may fall through to B, we may have to insert a branch.
448 if (A->isLayoutSuccessor(B))
449 A->updateTerminator();
451 // Insert unconditional "jump B" instruction in NMBB.
452 NMBB->addSuccessor(B);
453 SmallVector<MachineOperand, 4> Cond;
454 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
456 // Fix PHI nodes in B so they refer to NMBB instead of A
457 for (MachineBasicBlock::iterator i = B->begin(), e = B->end();
458 i != e && i->getOpcode() == TargetInstrInfo::PHI; ++i)
459 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
460 if (i->getOperand(ni+1).getMBB() == A)
461 i->getOperand(ni+1).setMBB(NMBB);
463 if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>())
464 LV->addNewBlock(NMBB, A);
466 if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>())
467 MDT->addNewBlock(NMBB, A);