1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIElimination.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Function.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/ADT/Statistic.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Compiler.h"
31 #include "llvm/Support/Debug.h"
36 STATISTIC(NumAtomic, "Number of atomic phis lowered");
37 STATISTIC(NumSplits, "Number of critical edges split on demand");
39 char PHIElimination::ID = 0;
40 static RegisterPass<PHIElimination>
41 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
43 const PassInfo *const llvm::PHIEliminationID = &X;
45 void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
46 AU.addPreserved<LiveVariables>();
47 AU.addPreserved<MachineDominatorTree>();
48 // rdar://7401784 This would be nice:
49 // AU.addPreservedID(MachineLoopInfoID);
50 MachineFunctionPass::getAnalysisUsage(AU);
53 bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
54 MRI = &Fn.getRegInfo();
60 // Split critical edges to help the coalescer
61 if (LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>())
62 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
63 Changed |= SplitPHIEdges(Fn, *I, *LV);
65 // Populate VRegPHIUseCount
68 // Eliminate PHI instructions by inserting copies into predecessor blocks.
69 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
70 Changed |= EliminatePHINodes(Fn, *I);
72 // Remove dead IMPLICIT_DEF instructions.
73 for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
74 E = ImpDefs.end(); I != E; ++I) {
75 MachineInstr *DefMI = *I;
76 unsigned DefReg = DefMI->getOperand(0).getReg();
77 if (MRI->use_empty(DefReg))
78 DefMI->eraseFromParent();
82 VRegPHIUseCount.clear();
86 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
87 /// predecessor basic blocks.
89 bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
90 MachineBasicBlock &MBB) {
91 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
92 return false; // Quick exit for basic blocks without PHIs.
94 // Get an iterator to the first instruction after the last PHI node (this may
95 // also be the end of the basic block).
96 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
98 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
99 LowerAtomicPHINode(MBB, AfterPHIsIt);
104 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
105 /// are implicit_def's.
106 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
107 const MachineRegisterInfo *MRI) {
108 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
109 unsigned SrcReg = MPhi->getOperand(i).getReg();
110 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
111 if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
117 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
118 // when following the CFG edge to SuccMBB. This needs to be after any def of
119 // SrcReg, but before any subsequent point where control flow might jump out of
121 MachineBasicBlock::iterator
122 llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
123 MachineBasicBlock &SuccMBB,
125 // Handle the trivial case trivially.
129 // Usually, we just want to insert the copy before the first terminator
130 // instruction. However, for the edge going to a landing pad, we must insert
131 // the copy before the call/invoke instruction.
132 if (!SuccMBB.isLandingPad())
133 return MBB.getFirstTerminator();
135 // Discover any defs/uses in this basic block.
136 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
137 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
138 RE = MRI->reg_end(); RI != RE; ++RI) {
139 MachineInstr *DefUseMI = &*RI;
140 if (DefUseMI->getParent() == &MBB)
141 DefUsesInMBB.insert(DefUseMI);
144 MachineBasicBlock::iterator InsertPoint;
145 if (DefUsesInMBB.empty()) {
146 // No defs. Insert the copy at the start of the basic block.
147 InsertPoint = MBB.begin();
148 } else if (DefUsesInMBB.size() == 1) {
149 // Insert the copy immediately after the def/use.
150 InsertPoint = *DefUsesInMBB.begin();
153 // Insert the copy immediately after the last def/use.
154 InsertPoint = MBB.end();
155 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
159 // Make sure the copy goes after any phi nodes however.
160 return SkipPHIsAndLabels(MBB, InsertPoint);
163 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
164 /// under the assuption that it needs to be lowered in a way that supports
165 /// atomic execution of PHIs. This lowering method is always correct all of the
168 void llvm::PHIElimination::LowerAtomicPHINode(
169 MachineBasicBlock &MBB,
170 MachineBasicBlock::iterator AfterPHIsIt) {
171 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
172 MachineInstr *MPhi = MBB.remove(MBB.begin());
174 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
175 unsigned DestReg = MPhi->getOperand(0).getReg();
176 bool isDead = MPhi->getOperand(0).isDead();
178 // Create a new register for the incoming PHI arguments.
179 MachineFunction &MF = *MBB.getParent();
180 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
181 unsigned IncomingReg = 0;
183 // Insert a register to register copy at the top of the current block (but
184 // after any remaining phi nodes) which copies the new incoming register
185 // into the phi node destination.
186 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
187 if (isSourceDefinedByImplicitDef(MPhi, MRI))
188 // If all sources of a PHI node are implicit_def, just emit an
189 // implicit_def instead of a copy.
190 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
191 TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
193 IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
194 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
198 assert(!hasPHIDef(DestReg) && "Vreg has multiple phi-defs?");
199 PHIDefs[DestReg] = &MBB;
201 // Update live variable information if there is any.
202 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
204 MachineInstr *PHICopy = prior(AfterPHIsIt);
207 // Increment use count of the newly created virtual register.
208 LV->getVarInfo(IncomingReg).NumUses++;
210 // Add information to LiveVariables to know that the incoming value is
211 // killed. Note that because the value is defined in several places (once
212 // each for each incoming block), the "def" block and instruction fields
213 // for the VarInfo is not filled in.
214 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
217 // Since we are going to be deleting the PHI node, if it is the last use of
218 // any registers, or if the value itself is dead, we need to move this
219 // information over to the new copy we just inserted.
220 LV->removeVirtualRegistersKilled(MPhi);
222 // If the result is dead, update LV.
224 LV->addVirtualRegisterDead(DestReg, PHICopy);
225 LV->removeVirtualRegisterDead(DestReg, MPhi);
229 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
230 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
231 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
232 MPhi->getOperand(i).getReg())];
234 // Now loop over all of the incoming arguments, changing them to copy into the
235 // IncomingReg register in the corresponding predecessor basic block.
236 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
237 for (int i = NumSrcs - 1; i >= 0; --i) {
238 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
239 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
240 "Machine PHI Operands must all be virtual registers!");
242 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
244 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
247 PHIKills[SrcReg].insert(&opBlock);
249 // If source is defined by an implicit def, there is no need to insert a
251 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
252 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
253 ImpDefs.insert(DefMI);
257 // Check to make sure we haven't already emitted the copy for this block.
258 // This can happen because PHI nodes may have multiple entries for the same
260 if (!MBBsInsertedInto.insert(&opBlock))
261 continue; // If the copy has already been emitted, we're done.
263 // Find a safe location to insert the copy, this may be the first terminator
264 // in the block (or end()).
265 MachineBasicBlock::iterator InsertPos =
266 FindCopyInsertPoint(opBlock, MBB, SrcReg);
269 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
271 // Now update live variable information if we have it. Otherwise we're done
274 // We want to be able to insert a kill of the register if this PHI (aka, the
275 // copy we just inserted) is the last use of the source value. Live
276 // variable analysis conservatively handles this by saying that the value is
277 // live until the end of the block the PHI entry lives in. If the value
278 // really is dead at the PHI copy, there will be no successor blocks which
279 // have the value live-in.
281 // Also check to see if this register is in use by another PHI node which
282 // has not yet been eliminated. If so, it will be killed at an appropriate
285 // Is it used by any PHI instructions in this block?
286 bool ValueIsUsed = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
288 // Okay, if we now know that the value is not live out of the block, we can
289 // add a kill marker in this block saying that it kills the incoming value!
290 if (!ValueIsUsed && !isLiveOut(SrcReg, opBlock, *LV)) {
291 // In our final twist, we have to decide which instruction kills the
292 // register. In most cases this is the copy, however, the first
293 // terminator instruction at the end of the block may also use the value.
294 // In this case, we should mark *it* as being the killing block, not the
296 MachineBasicBlock::iterator KillInst = prior(InsertPos);
297 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
298 if (Term != opBlock.end()) {
299 if (Term->readsRegister(SrcReg))
302 // Check that no other terminators use values.
304 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
306 assert(!TI->readsRegister(SrcReg) &&
307 "Terminator instructions cannot use virtual registers unless"
308 "they are the first terminator in a block!");
313 // Finally, mark it killed.
314 LV->addVirtualRegisterKilled(SrcReg, KillInst);
316 // This vreg no longer lives all of the way through opBlock.
317 unsigned opBlockNum = opBlock.getNumber();
318 LV->getVarInfo(SrcReg).AliveBlocks.reset(opBlockNum);
322 // Really delete the PHI instruction now!
323 MF.DeleteMachineInstr(MPhi);
327 /// analyzePHINodes - Gather information about the PHI nodes in here. In
328 /// particular, we want to map the number of uses of a virtual register which is
329 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
330 /// used later to determine when the vreg is killed in the BB.
332 void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) {
333 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
335 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
336 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
337 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
338 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
339 BBI->getOperand(i).getReg())];
342 bool llvm::PHIElimination::SplitPHIEdges(MachineFunction &MF,
343 MachineBasicBlock &MBB,
345 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
346 return false; // Quick exit for basic blocks without PHIs.
348 for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
349 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) {
350 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
351 unsigned Reg = BBI->getOperand(i).getReg();
352 MachineBasicBlock *PreMBB = BBI->getOperand(i+1).getMBB();
353 // We break edges when registers are live out from the predecessor block
354 // (not considering PHI nodes). If the register is live in to this block
355 // anyway, we would gain nothing from splitting.
356 if (!LV.isLiveIn(Reg, MBB) && isLiveOut(Reg, *PreMBB, LV))
357 SplitCriticalEdge(PreMBB, &MBB);
363 bool llvm::PHIElimination::isLiveOut(unsigned Reg, const MachineBasicBlock &MBB,
365 LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
367 // Loop over all of the successors of the basic block, checking to see if
368 // the value is either live in the block, or if it is killed in the block.
369 std::vector<MachineBasicBlock*> OpSuccBlocks;
370 for (MachineBasicBlock::const_succ_iterator SI = MBB.succ_begin(),
371 E = MBB.succ_end(); SI != E; ++SI) {
372 MachineBasicBlock *SuccMBB = *SI;
374 // Is it alive in this successor?
375 unsigned SuccIdx = SuccMBB->getNumber();
376 if (VI.AliveBlocks.test(SuccIdx))
378 OpSuccBlocks.push_back(SuccMBB);
381 // Check to see if this value is live because there is a use in a successor
383 switch (OpSuccBlocks.size()) {
385 MachineBasicBlock *SuccMBB = OpSuccBlocks[0];
386 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
387 if (VI.Kills[i]->getParent() == SuccMBB)
392 MachineBasicBlock *SuccMBB1 = OpSuccBlocks[0], *SuccMBB2 = OpSuccBlocks[1];
393 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
394 if (VI.Kills[i]->getParent() == SuccMBB1 ||
395 VI.Kills[i]->getParent() == SuccMBB2)
400 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
401 for (unsigned i = 0, e = VI.Kills.size(); i != e; ++i)
402 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
403 VI.Kills[i]->getParent()))
409 MachineBasicBlock *PHIElimination::SplitCriticalEdge(MachineBasicBlock *A,
410 MachineBasicBlock *B) {
411 assert(A && B && "Missing MBB end point");
413 MachineFunction *MF = A->getParent();
415 // We may need to update A's terminator, but we can't do that if AnalyzeBranch
416 // fails. If A uses a jump table, we won't touch it.
417 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
418 MachineBasicBlock *TBB = 0, *FBB = 0;
419 SmallVector<MachineOperand, 4> Cond;
420 if (TII->AnalyzeBranch(*A, TBB, FBB, Cond))
425 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
426 MF->insert(next(MachineFunction::iterator(A)), NMBB);
427 DEBUG(errs() << "PHIElimination splitting critical edge:"
428 " BB#" << A->getNumber()
429 << " -- BB#" << NMBB->getNumber()
430 << " -- BB#" << B->getNumber() << '\n');
432 A->ReplaceUsesOfBlockWith(B, NMBB);
433 A->updateTerminator();
435 // Insert unconditional "jump B" instruction in NMBB if necessary.
436 NMBB->addSuccessor(B);
437 if (!NMBB->isLayoutSuccessor(B)) {
439 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
442 // Fix PHI nodes in B so they refer to NMBB instead of A
443 for (MachineBasicBlock::iterator i = B->begin(), e = B->end();
444 i != e && i->getOpcode() == TargetInstrInfo::PHI; ++i)
445 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
446 if (i->getOperand(ni+1).getMBB() == A)
447 i->getOperand(ni+1).setMBB(NMBB);
449 if (LiveVariables *LV=getAnalysisIfAvailable<LiveVariables>())
450 LV->addNewBlock(NMBB, A, B);
452 if (MachineDominatorTree *MDT=getAnalysisIfAvailable<MachineDominatorTree>())
453 MDT->addNewBlock(NMBB, A);