1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 //===----------------------------------------------------------------------===//
5 #include "llvm/CodeGen/MachineInstr.h"
6 #include "llvm/CodeGen/MachineBasicBlock.h"
7 #include "llvm/Value.h"
8 #include "llvm/Target/TargetMachine.h"
9 #include "llvm/Target/TargetInstrInfo.h"
10 #include "llvm/Target/MRegisterInfo.h"
14 // Global variable holding an array of descriptors for machine instructions.
15 // The actual object needs to be created separately for each target machine.
16 // This variable is initialized and reset by class TargetInstrInfo.
18 // FIXME: This should be a property of the target so that more than one target
19 // at a time can be active...
21 extern const TargetInstrDescriptor *TargetInstrDescriptors;
23 // Constructor for instructions with variable #operands
24 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
27 operands(numOperands, MachineOperand()),
32 /// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
33 /// not a resize for them. It is expected that if you use this that you call
34 /// add* methods below to fill up the operands, instead of the Set methods.
35 /// Eventually, the "resizing" ctors will be phased out.
37 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
43 operands.reserve(numOperands);
46 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
47 /// MachineInstr is created and added to the end of the specified basic block.
49 MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
55 assert(MBB && "Cannot use inserting ctor with null basic block!");
56 operands.reserve(numOperands);
57 MBB->push_back(this); // Add instruction to end of basic block!
61 // OperandComplete - Return true if it's illegal to add a new operand
62 bool MachineInstr::OperandsComplete() const
64 int NumOperands = TargetInstrDescriptors[opCode].numOperands;
65 if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
66 return true; // Broken: we have all the operands of this instruction!
72 // Support for replacing opcode and operands of a MachineInstr in place.
73 // This only resets the size of the operand vector and initializes it.
74 // The new operands must be set explicitly later.
76 void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
78 assert(getNumImplicitRefs() == 0 &&
79 "This is probably broken because implicit refs are going to be lost.");
82 operands.resize(numOperands, MachineOperand());
86 MachineInstr::SetMachineOperandVal(unsigned i,
87 MachineOperand::MachineOperandType opType,
92 assert(i < operands.size()); // may be explicit or implicit op
93 operands[i].opType = opType;
94 operands[i].value = V;
95 operands[i].regNum = -1;
98 operands[i].flags = MachineOperand::DEFUSEFLAG;
99 else if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
100 operands[i].flags = MachineOperand::DEFONLYFLAG;
102 operands[i].flags = 0;
106 MachineInstr::SetMachineOperandConst(unsigned i,
107 MachineOperand::MachineOperandType operandType,
110 assert(i < getNumOperands()); // must be explicit op
111 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
112 "immed. constant cannot be defined");
114 operands[i].opType = operandType;
115 operands[i].value = NULL;
116 operands[i].immedVal = intValue;
117 operands[i].regNum = -1;
118 operands[i].flags = 0;
122 MachineInstr::SetMachineOperandReg(unsigned i,
125 assert(i < getNumOperands()); // must be explicit op
127 operands[i].opType = MachineOperand::MO_MachineRegister;
128 operands[i].value = NULL;
129 operands[i].regNum = regNum;
131 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
132 operands[i].flags = MachineOperand::DEFONLYFLAG;
134 operands[i].flags = 0;
136 insertUsedReg(regNum);
140 MachineInstr::SetRegForOperand(unsigned i, int regNum)
142 assert(i < getNumOperands()); // must be explicit op
143 operands[i].setRegForValue(regNum);
144 insertUsedReg(regNum);
148 MachineInstr::SetRegForImplicitRef(unsigned i, int regNum)
150 getImplicitOp(i).setRegForValue(regNum);
151 insertUsedReg(regNum);
155 // Subsitute all occurrences of Value* oldVal with newVal in all operands
156 // and all implicit refs. If defsOnly == true, substitute defs only.
158 MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
160 unsigned numSubst = 0;
162 // Subsitute operands
163 for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
165 if (!defsOnly || !O.isUseOnly())
167 O.getMachineOperand().value = newVal;
171 // Subsitute implicit refs
172 for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
173 if (getImplicitRef(i) == oldVal)
174 if (!defsOnly || !getImplicitOp(i).opIsUse())
176 getImplicitOp(i).value = newVal;
185 MachineInstr::dump() const
187 cerr << " " << *this;
190 static inline std::ostream&
191 OutputValue(std::ostream &os, const Value* val)
194 if (val && val->hasName())
195 return os << val->getName() << ")";
197 return os << (void*) val << ")"; // print address only
200 static inline void OutputReg(std::ostream &os, unsigned RegNo,
201 const MRegisterInfo *MRI = 0) {
203 if (RegNo < MRegisterInfo::FirstVirtualRegister)
204 os << "%" << MRI->get(RegNo).Name;
206 os << "%reg" << RegNo;
208 os << "%mreg(" << RegNo << ")";
211 static void print(const MachineOperand &MO, std::ostream &OS,
212 const TargetMachine &TM) {
213 const MRegisterInfo *MRI = TM.getRegisterInfo();
214 bool CloseParen = true;
217 else if (MO.opLoBits32())
219 else if (MO.opHiBits64())
221 else if (MO.opLoBits64())
226 switch (MO.getType()) {
227 case MachineOperand::MO_VirtualRegister:
228 if (MO.getVRegValue()) {
230 OutputValue(OS, MO.getVRegValue());
231 if (MO.hasAllocatedReg())
234 if (MO.hasAllocatedReg())
235 OutputReg(OS, MO.getAllocatedRegNum(), MRI);
237 case MachineOperand::MO_CCRegister:
239 OutputValue(OS, MO.getVRegValue());
240 if (MO.hasAllocatedReg()) {
242 OutputReg(OS, MO.getAllocatedRegNum(), MRI);
245 case MachineOperand::MO_MachineRegister:
246 OutputReg(OS, MO.getMachineRegNum(), MRI);
248 case MachineOperand::MO_SignExtendedImmed:
249 OS << (long)MO.getImmedValue();
251 case MachineOperand::MO_UnextendedImmed:
252 OS << (long)MO.getImmedValue();
254 case MachineOperand::MO_PCRelativeDisp: {
255 const Value* opVal = MO.getVRegValue();
256 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
257 OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
258 if (opVal->hasName())
259 OS << opVal->getName();
261 OS << (const void*) opVal;
265 case MachineOperand::MO_MachineBasicBlock:
267 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
268 << "," << (void*)MO.getMachineBasicBlock()->getBasicBlock() << ">";
270 case MachineOperand::MO_FrameIndex:
271 OS << "<fi#" << MO.getFrameIndex() << ">";
273 case MachineOperand::MO_ConstantPoolIndex:
274 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
276 case MachineOperand::MO_GlobalAddress:
277 OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
279 case MachineOperand::MO_ExternalSymbol:
280 OS << "<es:" << MO.getSymbolName() << ">";
283 assert(0 && "Unrecognized operand type");
290 void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
291 unsigned StartOp = 0;
293 // Specialize printing if op#0 is definition
294 if (getNumOperands() &&
295 (getOperand(0).opIsDefOnly() || getOperand(0).opIsDefAndUse())) {
296 ::print(getOperand(0), OS, TM);
298 ++StartOp; // Don't print this operand again!
300 OS << TM.getInstrInfo().getName(getOpcode());
302 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
303 const MachineOperand& mop = getOperand(i);
307 ::print(mop, OS, TM);
309 if (mop.opIsDefAndUse())
311 else if (mop.opIsDefOnly())
315 // code for printing implict references
316 if (getNumImplicitRefs()) {
317 OS << "\tImplicitRefs: ";
318 for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
320 OutputValue(OS, getImplicitRef(i));
321 if (getImplicitOp(i).opIsDefAndUse())
323 else if (getImplicitOp(i).opIsDefOnly())
332 std::ostream &operator<<(std::ostream& os, const MachineInstr& MI)
334 os << TargetInstrDescriptors[MI.opCode].Name;
336 for (unsigned i=0, N=MI.getNumOperands(); i < N; i++) {
337 os << "\t" << MI.getOperand(i);
338 if (MI.getOperand(i).opIsDefOnly())
340 if (MI.getOperand(i).opIsDefAndUse())
344 // code for printing implict references
345 unsigned NumOfImpRefs = MI.getNumImplicitRefs();
346 if (NumOfImpRefs > 0) {
347 os << "\tImplicit: ";
348 for (unsigned z=0; z < NumOfImpRefs; z++) {
349 OutputValue(os, MI.getImplicitRef(z));
350 if (MI.getImplicitOp(z).opIsDefOnly()) os << "<d>";
351 if (MI.getImplicitOp(z).opIsDefAndUse()) os << "<d&u>";
359 std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO)
363 else if (MO.opLoBits32())
365 else if (MO.opHiBits64())
367 else if (MO.opLoBits64())
370 switch (MO.getType())
372 case MachineOperand::MO_VirtualRegister:
373 if (MO.hasAllocatedReg())
374 OutputReg(OS, MO.getAllocatedRegNum());
376 if (MO.getVRegValue()) {
377 if (MO.hasAllocatedReg()) OS << "==";
379 OutputValue(OS, MO.getVRegValue());
382 case MachineOperand::MO_CCRegister:
384 OutputValue(OS, MO.getVRegValue());
385 if (MO.hasAllocatedReg()) {
387 OutputReg(OS, MO.getAllocatedRegNum());
390 case MachineOperand::MO_MachineRegister:
391 OutputReg(OS, MO.getMachineRegNum());
393 case MachineOperand::MO_SignExtendedImmed:
394 OS << (long)MO.getImmedValue();
396 case MachineOperand::MO_UnextendedImmed:
397 OS << (long)MO.getImmedValue();
399 case MachineOperand::MO_PCRelativeDisp:
401 const Value* opVal = MO.getVRegValue();
402 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
403 OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
404 if (opVal->hasName())
405 OS << opVal->getName();
407 OS << (const void*) opVal;
411 case MachineOperand::MO_MachineBasicBlock:
413 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
414 << "," << (void*)MO.getMachineBasicBlock()->getBasicBlock() << ">";
416 case MachineOperand::MO_FrameIndex:
417 OS << "<fi#" << MO.getFrameIndex() << ">";
419 case MachineOperand::MO_ConstantPoolIndex:
420 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
422 case MachineOperand::MO_GlobalAddress:
423 OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
425 case MachineOperand::MO_ExternalSymbol:
426 OS << "<es:" << MO.getSymbolName() << ">";
429 assert(0 && "Unrecognized operand type");
434 (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
435 MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))