2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/ConstPoolVals.h"
17 #include "llvm/Instruction.h"
20 //************************ Class Implementations **************************/
22 // Constructor for instructions with fixed #operands (nearly all)
23 MachineInstr::MachineInstr(MachineOpCode _opCode,
24 OpCodeMask _opCodeMask)
26 opCodeMask(_opCodeMask),
27 operands(TargetInstrDescriptors[_opCode].numOperands)
29 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
32 // Constructor for instructions with variable #operands
33 MachineInstr::MachineInstr(MachineOpCode _opCode,
35 OpCodeMask _opCodeMask)
37 opCodeMask(_opCodeMask),
43 MachineInstr::SetMachineOperand(unsigned int i,
44 MachineOperand::MachineOperandType operandType,
45 Value* _val, bool isdef=false)
47 assert(i < operands.size());
48 operands[i].Initialize(operandType, _val);
49 operands[i].isDef = isdef ||
50 TargetInstrDescriptors[opCode].resultPos == (int) i;
54 MachineInstr::SetMachineOperand(unsigned int i,
55 MachineOperand::MachineOperandType operandType,
56 int64_t intValue, bool isdef=false)
58 assert(i < operands.size());
59 operands[i].InitializeConst(operandType, intValue);
60 operands[i].isDef = isdef ||
61 TargetInstrDescriptors[opCode].resultPos == (int) i;
65 MachineInstr::SetMachineOperand(unsigned int i,
66 unsigned int regNum, bool isdef=false)
68 assert(i < operands.size());
69 operands[i].InitializeReg(regNum);
70 operands[i].isDef = isdef ||
71 TargetInstrDescriptors[opCode].resultPos == (int) i;
75 MachineInstr::dump(unsigned int indent) const
77 for (unsigned i=0; i < indent; i++)
84 operator<< (ostream& os, const MachineInstr& minstr)
86 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
88 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++)
89 os << "\t" << minstr.getOperand(i);
91 #undef DEBUG_VAL_OP_ITERATOR
92 #ifdef DEBUG_VAL_OP_ITERATOR
93 os << endl << "\tValue operands are: ";
94 for (MachineInstr::val_op_const_iterator vo(&minstr); ! vo.done(); ++vo)
96 const Value* val = *vo;
97 os << val << (vo.isDef()? "(def), " : ", ");
106 operator<< (ostream& os, const MachineOperand& mop)
109 if (mop.opType == MachineOperand::MO_VirtualRegister)
110 regInfo << "(val " << mop.value << ")" << ends;
111 else if (mop.opType == MachineOperand::MO_MachineRegister)
112 regInfo << "(" << mop.regNum << ")" << ends;
113 else if (mop.opType == MachineOperand::MO_CCRegister)
114 regInfo << "(val " << mop.value << ")" << ends;
118 case MachineOperand::MO_VirtualRegister:
119 case MachineOperand::MO_MachineRegister:
120 os << "%reg" << regInfo.str();
124 case MachineOperand::MO_CCRegister:
125 os << "%ccreg" << regInfo.str();
129 case MachineOperand::MO_SignExtendedImmed:
133 case MachineOperand::MO_UnextendedImmed:
137 case MachineOperand::MO_PCRelativeDisp:
138 os << "%disp(label " << mop.value << ")";
142 assert(0 && "Unrecognized operand type");
150 //---------------------------------------------------------------------------
151 // Target-independent utility routines for creating machine instructions
152 //---------------------------------------------------------------------------
155 //------------------------------------------------------------------------
156 // Function Set2OperandsFromInstr
157 // Function Set3OperandsFromInstr
159 // For the common case of 2- and 3-operand arithmetic/logical instructions,
160 // set the m/c instr. operands directly from the VM instruction's operands.
161 // Check whether the first or second operand is 0 and can use a dedicated "0" register.
162 // Check whether the second operand should use an immediate field or register.
163 // (First and third operands are never immediates for such instructions.)
166 // canDiscardResult: Specifies that the result operand can be discarded
167 // by using the dedicated "0"
169 // op1position, op2position and resultPosition: Specify in which position
170 // in the machine instruction the 3 operands (arg1, arg2
171 // and result) should go.
173 // RETURN VALUE: unsigned int flags, where
174 // flags & 0x01 => operand 1 is constant and needs a register
175 // flags & 0x02 => operand 2 is constant and needs a register
176 //------------------------------------------------------------------------
179 Set2OperandsFromInstr(MachineInstr* minstr,
180 InstructionNode* vmInstrNode,
181 const TargetMachine& target,
182 bool canDiscardResult,
186 Set3OperandsFromInstr(minstr, vmInstrNode, target,
187 canDiscardResult, op1Position,
188 /*op2Position*/ -1, resultPosition);
191 #undef REVERT_TO_EXPLICIT_CONSTANT_CHECKS
192 #ifdef REVERT_TO_EXPLICIT_CONSTANT_CHECKS
194 Set3OperandsFromInstrJUNK(MachineInstr* minstr,
195 InstructionNode* vmInstrNode,
196 const TargetMachine& target,
197 bool canDiscardResult,
202 assert(op1Position >= 0);
203 assert(resultPosition >= 0);
205 unsigned returnFlags = 0x0;
207 // Check if operand 1 is 0 and if so, try to use the register that gives 0, if any.
208 Value* op1Value = vmInstrNode->leftChild()->getValue();
209 bool isValidConstant;
210 int64_t intValue = GetConstantValueAsSignedInt(op1Value, isValidConstant);
211 if (isValidConstant && intValue == 0 && target.zeroRegNum >= 0)
212 minstr->SetMachineOperand(op1Position, /*regNum*/ target.zeroRegNum);
215 if (op1Value->getValueType() == Value::ConstantVal)
216 {// value is constant and must be loaded from constant pool
217 returnFlags = returnFlags | (1 << op1Position);
219 minstr->SetMachineOperand(op1Position,MachineOperand::MO_VirtualRegister,
223 // Check if operand 2 (if any) fits in the immediate field of the instruction,
224 // of if it is 0 and can use a dedicated machine register
225 if (op2Position >= 0)
227 Value* op2Value = vmInstrNode->rightChild()->getValue();
229 unsigned int machineRegNum;
231 MachineOperand::MachineOperandType
232 op2type = ChooseRegOrImmed(op2Value, minstr->getOpCode(), target,
233 /*canUseImmed*/ true,
234 machineRegNum, immedValue);
236 if (op2type == MachineOperand::MO_MachineRegister)
237 minstr->SetMachineOperand(op2Position, machineRegNum);
238 else if (op2type == MachineOperand::MO_VirtualRegister)
240 if (op2Value->getValueType() == Value::ConstantVal)
241 {// value is constant and must be loaded from constant pool
242 returnFlags = returnFlags | (1 << op2Position);
244 minstr->SetMachineOperand(op2Position, op2type, op2Value);
248 assert(op2type != MO_CCRegister);
249 minstr->SetMachineOperand(op2Position, op2type, immedValue);
253 // If operand 3 (result) can be discarded, use a dead register if one exists
254 if (canDiscardResult && target.zeroRegNum >= 0)
255 minstr->SetMachineOperand(resultPosition, target.zeroRegNum);
257 minstr->SetMachineOperand(resultPosition, MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
265 Set3OperandsFromInstr(MachineInstr* minstr,
266 InstructionNode* vmInstrNode,
267 const TargetMachine& target,
268 bool canDiscardResult,
273 assert(op1Position >= 0);
274 assert(resultPosition >= 0);
277 minstr->SetMachineOperand(op1Position, MachineOperand::MO_VirtualRegister,
278 vmInstrNode->leftChild()->getValue());
280 // operand 2 (if any)
281 if (op2Position >= 0)
282 minstr->SetMachineOperand(op2Position, MachineOperand::MO_VirtualRegister,
283 vmInstrNode->rightChild()->getValue());
285 // result operand: if it can be discarded, use a dead register if one exists
286 if (canDiscardResult && target.zeroRegNum >= 0)
287 minstr->SetMachineOperand(resultPosition, target.zeroRegNum);
289 minstr->SetMachineOperand(resultPosition, MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
293 MachineOperand::MachineOperandType
294 ChooseRegOrImmed(Value* val,
295 MachineOpCode opCode,
296 const TargetMachine& target,
298 unsigned int& getMachineRegNum,
299 int64_t& getImmedValue)
301 MachineOperand::MachineOperandType opType =
302 MachineOperand::MO_VirtualRegister;
303 getMachineRegNum = 0;
306 // Check for the common case first: argument is not constant
308 if (val->getValueType() != Value::ConstantVal)
311 // Now get the constant value and check if it fits in the IMMED field.
312 // Take advantage of the fact that the max unsigned value will rarely
313 // fit into any IMMED field and ignore that case (i.e., cast smaller
314 // unsigned constants to signed).
316 bool isValidConstant;
317 int64_t intValue = GetConstantValueAsSignedInt(val, isValidConstant);
321 if (intValue == 0 && target.zeroRegNum >= 0)
323 opType = MachineOperand::MO_MachineRegister;
324 getMachineRegNum = target.zeroRegNum;
326 else if (canUseImmed &&
327 target.getInstrInfo().constantFitsInImmedField(opCode,intValue))
329 opType = MachineOperand::MO_SignExtendedImmed;
330 getImmedValue = intValue;