1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Methods common to all machine instructions.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "llvm/Support/LeakDetector.h"
20 #include "llvm/Support/Streams.h"
24 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25 /// TID NULL and no operands.
26 MachineInstr::MachineInstr()
27 : TID(0), NumImplicitOps(0), parent(0) {
28 // Make sure that we get added to a machine basicblock
29 LeakDetector::addGarbageObject(this);
32 void MachineInstr::addImplicitDefUseOperands() {
33 if (TID->ImplicitDefs)
34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) {
36 Op.opType = MachineOperand::MO_Register;
41 Op.contents.RegNo = *ImpDefs;
43 Operands.push_back(Op);
45 if (TID->ImplicitUses)
46 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) {
48 Op.opType = MachineOperand::MO_Register;
53 Op.contents.RegNo = *ImpUses;
55 Operands.push_back(Op);
59 /// MachineInstr ctor - This constructor create a MachineInstr and add the
60 /// implicit operands. It reserves space for number of operands specified by
61 /// TargetInstrDescriptor or the numOperands if it is not zero. (for
62 /// instructions with variable number of operands).
63 MachineInstr::MachineInstr(const TargetInstrDescriptor &tid)
64 : TID(&tid), NumImplicitOps(0), parent(0) {
65 if (TID->ImplicitDefs)
66 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
68 if (TID->ImplicitUses)
69 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
71 Operands.reserve(NumImplicitOps + TID->numOperands);
72 addImplicitDefUseOperands();
73 // Make sure that we get added to a machine basicblock
74 LeakDetector::addGarbageObject(this);
77 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
78 /// MachineInstr is created and added to the end of the specified basic block.
80 MachineInstr::MachineInstr(MachineBasicBlock *MBB,
81 const TargetInstrDescriptor &tid)
82 : TID(&tid), NumImplicitOps(0), parent(0) {
83 assert(MBB && "Cannot use inserting ctor with null basic block!");
84 if (TID->ImplicitDefs)
85 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
87 if (TID->ImplicitUses)
88 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
90 Operands.reserve(NumImplicitOps + TID->numOperands);
91 addImplicitDefUseOperands();
92 // Make sure that we get added to a machine basicblock
93 LeakDetector::addGarbageObject(this);
94 MBB->push_back(this); // Add instruction to end of basic block!
97 /// MachineInstr ctor - Copies MachineInstr arg exactly
99 MachineInstr::MachineInstr(const MachineInstr &MI) {
100 TID = MI.getInstrDescriptor();
101 NumImplicitOps = MI.NumImplicitOps;
102 Operands.reserve(MI.getNumOperands());
105 for (unsigned i = 0; i != MI.getNumOperands(); ++i)
106 Operands.push_back(MI.getOperand(i));
108 // Set parent, next, and prev to null
115 MachineInstr::~MachineInstr() {
116 LeakDetector::removeGarbageObject(this);
119 /// getOpcode - Returns the opcode of this MachineInstr.
121 const int MachineInstr::getOpcode() const {
125 /// removeFromParent - This method unlinks 'this' from the containing basic
126 /// block, and returns it, but does not delete it.
127 MachineInstr *MachineInstr::removeFromParent() {
128 assert(getParent() && "Not embedded in a basic block!");
129 getParent()->remove(this);
134 /// OperandComplete - Return true if it's illegal to add a new operand
136 bool MachineInstr::OperandsComplete() const {
137 unsigned short NumOperands = TID->numOperands;
138 if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
139 getNumOperands()-NumImplicitOps >= NumOperands)
140 return true; // Broken: we have all the operands of this instruction!
144 /// isIdenticalTo - Return true if this operand is identical to the specified
146 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
147 if (getType() != Other.getType()) return false;
150 default: assert(0 && "Unrecognized operand type");
151 case MachineOperand::MO_Register:
152 return getReg() == Other.getReg() && isDef() == Other.isDef();
153 case MachineOperand::MO_Immediate:
154 return getImm() == Other.getImm();
155 case MachineOperand::MO_MachineBasicBlock:
156 return getMBB() == Other.getMBB();
157 case MachineOperand::MO_FrameIndex:
158 return getFrameIndex() == Other.getFrameIndex();
159 case MachineOperand::MO_ConstantPoolIndex:
160 return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
161 getOffset() == Other.getOffset();
162 case MachineOperand::MO_JumpTableIndex:
163 return getJumpTableIndex() == Other.getJumpTableIndex();
164 case MachineOperand::MO_GlobalAddress:
165 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
166 case MachineOperand::MO_ExternalSymbol:
167 return !strcmp(getSymbolName(), Other.getSymbolName()) &&
168 getOffset() == Other.getOffset();
172 /// findRegisterUseOperand() - Returns the MachineOperand that is a use of
173 /// the specific register or NULL if it is not found.
174 MachineOperand *MachineInstr::findRegisterUseOperand(unsigned Reg) {
175 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
176 MachineOperand &MO = getOperand(i);
177 if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
183 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
184 /// the specific register or NULL if it is not found.
185 MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
186 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
187 MachineOperand &MO = getOperand(i);
188 if (MO.isReg() && MO.isDef() && MO.getReg() == Reg)
194 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
196 void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
197 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
198 const MachineOperand &MO = MI->getOperand(i);
199 if (!MO.isReg() || (!MO.isKill() && !MO.isDead()))
201 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
202 MachineOperand &MOp = getOperand(j);
203 if (!MOp.isIdenticalTo(MO))
214 void MachineInstr::dump() const {
215 cerr << " " << *this;
218 static inline void OutputReg(std::ostream &os, unsigned RegNo,
219 const MRegisterInfo *MRI = 0) {
220 if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
222 os << "%" << MRI->get(RegNo).Name;
224 os << "%mreg(" << RegNo << ")";
226 os << "%reg" << RegNo;
229 static void print(const MachineOperand &MO, std::ostream &OS,
230 const TargetMachine *TM) {
231 const MRegisterInfo *MRI = 0;
233 if (TM) MRI = TM->getRegisterInfo();
235 switch (MO.getType()) {
236 case MachineOperand::MO_Register:
237 OutputReg(OS, MO.getReg(), MRI);
239 case MachineOperand::MO_Immediate:
240 OS << MO.getImmedValue();
242 case MachineOperand::MO_MachineBasicBlock:
244 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
245 << "," << (void*)MO.getMachineBasicBlock() << ">";
247 case MachineOperand::MO_FrameIndex:
248 OS << "<fi#" << MO.getFrameIndex() << ">";
250 case MachineOperand::MO_ConstantPoolIndex:
251 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
253 case MachineOperand::MO_JumpTableIndex:
254 OS << "<jt#" << MO.getJumpTableIndex() << ">";
256 case MachineOperand::MO_GlobalAddress:
257 OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
258 if (MO.getOffset()) OS << "+" << MO.getOffset();
261 case MachineOperand::MO_ExternalSymbol:
262 OS << "<es:" << MO.getSymbolName();
263 if (MO.getOffset()) OS << "+" << MO.getOffset();
267 assert(0 && "Unrecognized operand type");
271 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
272 unsigned StartOp = 0;
274 // Specialize printing if op#0 is definition
275 if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
276 ::print(getOperand(0), OS, TM);
277 if (getOperand(0).isDead())
280 ++StartOp; // Don't print this operand again!
286 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
287 const MachineOperand& mop = getOperand(i);
291 ::print(mop, OS, TM);
294 if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
296 bool NeedComma = false;
297 if (mop.isImplicit()) {
298 OS << (mop.isDef() ? "imp-def" : "imp-use");
300 } else if (mop.isDef()) {
304 if (mop.isKill() || mop.isDead()) {
320 void MachineInstr::print(std::ostream &os) const {
321 // If the instruction is embedded into a basic block, we can find the target
322 // info for the instruction.
323 if (const MachineBasicBlock *MBB = getParent()) {
324 const MachineFunction *MF = MBB->getParent();
326 print(os, &MF->getTarget());
331 // Otherwise, print it out in the "raw" format without symbolic register names
333 os << getInstrDescriptor()->Name;
335 for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
336 os << "\t" << getOperand(i);
337 if (getOperand(i).isReg() && getOperand(i).isDef())
344 void MachineOperand::print(std::ostream &OS) const {
347 OutputReg(OS, getReg());
350 OS << (long)getImmedValue();
352 case MO_MachineBasicBlock:
354 << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
355 << "@" << (void*)getMachineBasicBlock() << ">";
358 OS << "<fi#" << getFrameIndex() << ">";
360 case MO_ConstantPoolIndex:
361 OS << "<cp#" << getConstantPoolIndex() << ">";
363 case MO_JumpTableIndex:
364 OS << "<jt#" << getJumpTableIndex() << ">";
366 case MO_GlobalAddress:
367 OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
369 case MO_ExternalSymbol:
370 OS << "<es:" << getSymbolName() << ">";
373 assert(0 && "Unrecognized operand type");