1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/Parser.h"
18 #include "llvm/AsmParser/SlotMapping.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineInstr.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineMemOperand.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/IR/Instructions.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/Module.h"
29 #include "llvm/IR/ModuleSlotTracker.h"
30 #include "llvm/IR/ValueSymbolTable.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Support/SourceMgr.h"
33 #include "llvm/Target/TargetSubtargetInfo.h"
34 #include "llvm/Target/TargetInstrInfo.h"
40 /// A wrapper struct around the 'MachineOperand' struct that includes a source
42 struct MachineOperandWithLocation {
43 MachineOperand Operand;
44 StringRef::iterator Begin;
45 StringRef::iterator End;
47 MachineOperandWithLocation(const MachineOperand &Operand,
48 StringRef::iterator Begin, StringRef::iterator End)
49 : Operand(Operand), Begin(Begin), End(End) {}
56 StringRef Source, CurrentSource;
58 const PerFunctionMIParsingState &PFS;
59 /// Maps from indices to unnamed global values and metadata nodes.
60 const SlotMapping &IRSlots;
61 /// Maps from instruction names to op codes.
62 StringMap<unsigned> Names2InstrOpCodes;
63 /// Maps from register names to registers.
64 StringMap<unsigned> Names2Regs;
65 /// Maps from register mask names to register masks.
66 StringMap<const uint32_t *> Names2RegMasks;
67 /// Maps from subregister names to subregister indices.
68 StringMap<unsigned> Names2SubRegIndices;
69 /// Maps from slot numbers to function's unnamed basic blocks.
70 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
71 /// Maps from target index names to target indices.
72 StringMap<int> Names2TargetIndices;
73 /// Maps from direct target flag names to the direct target flag values.
74 StringMap<unsigned> Names2DirectTargetFlags;
77 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
78 StringRef Source, const PerFunctionMIParsingState &PFS,
79 const SlotMapping &IRSlots);
83 /// Report an error at the current location with the given message.
85 /// This function always return true.
86 bool error(const Twine &Msg);
88 /// Report an error at the given location with the given message.
90 /// This function always return true.
91 bool error(StringRef::iterator Loc, const Twine &Msg);
93 bool parse(MachineInstr *&MI);
94 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
95 bool parseStandaloneNamedRegister(unsigned &Reg);
96 bool parseStandaloneVirtualRegister(unsigned &Reg);
97 bool parseStandaloneIRBlockReference(const BasicBlock *&BB);
99 bool parseRegister(unsigned &Reg);
100 bool parseRegisterFlag(unsigned &Flags);
101 bool parseSubRegisterIndex(unsigned &SubReg);
102 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
103 bool parseImmediateOperand(MachineOperand &Dest);
104 bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
105 bool parseTypedImmediateOperand(MachineOperand &Dest);
106 bool parseFPImmediateOperand(MachineOperand &Dest);
107 bool parseMBBReference(MachineBasicBlock *&MBB);
108 bool parseMBBOperand(MachineOperand &Dest);
109 bool parseStackObjectOperand(MachineOperand &Dest);
110 bool parseFixedStackObjectOperand(MachineOperand &Dest);
111 bool parseGlobalValue(GlobalValue *&GV);
112 bool parseGlobalAddressOperand(MachineOperand &Dest);
113 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
114 bool parseJumpTableIndexOperand(MachineOperand &Dest);
115 bool parseExternalSymbolOperand(MachineOperand &Dest);
116 bool parseMDNode(MDNode *&Node);
117 bool parseMetadataOperand(MachineOperand &Dest);
118 bool parseCFIOffset(int &Offset);
119 bool parseCFIRegister(unsigned &Reg);
120 bool parseCFIOperand(MachineOperand &Dest);
121 bool parseIRBlock(BasicBlock *&BB, const Function &F);
122 bool parseBlockAddressOperand(MachineOperand &Dest);
123 bool parseTargetIndexOperand(MachineOperand &Dest);
124 bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
125 bool parseMachineOperand(MachineOperand &Dest);
126 bool parseMachineOperandAndTargetFlags(MachineOperand &Dest);
127 bool parseOffset(int64_t &Offset);
128 bool parseOperandsOffset(MachineOperand &Op);
129 bool parseIRValue(Value *&V);
130 bool parseMemoryOperandFlag(unsigned &Flags);
131 bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
132 bool parseMachinePointerInfo(MachinePointerInfo &Dest);
133 bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
136 /// Convert the integer literal in the current token into an unsigned integer.
138 /// Return true if an error occurred.
139 bool getUnsigned(unsigned &Result);
141 /// Convert the integer literal in the current token into an uint64.
143 /// Return true if an error occurred.
144 bool getUint64(uint64_t &Result);
146 /// If the current token is of the given kind, consume it and return false.
147 /// Otherwise report an error and return true.
148 bool expectAndConsume(MIToken::TokenKind TokenKind);
150 void initNames2InstrOpCodes();
152 /// Try to convert an instruction name to an opcode. Return true if the
153 /// instruction name is invalid.
154 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
156 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
158 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
159 const MCInstrDesc &MCID);
161 void initNames2Regs();
163 /// Try to convert a register name to a register number. Return true if the
164 /// register name is invalid.
165 bool getRegisterByName(StringRef RegName, unsigned &Reg);
167 void initNames2RegMasks();
169 /// Check if the given identifier is a name of a register mask.
171 /// Return null if the identifier isn't a register mask.
172 const uint32_t *getRegMask(StringRef Identifier);
174 void initNames2SubRegIndices();
176 /// Check if the given identifier is a name of a subregister index.
178 /// Return 0 if the name isn't a subregister index class.
179 unsigned getSubRegIndex(StringRef Name);
181 const BasicBlock *getIRBlock(unsigned Slot);
182 const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
184 void initNames2TargetIndices();
186 /// Try to convert a name of target index to the corresponding target index.
188 /// Return true if the name isn't a name of a target index.
189 bool getTargetIndex(StringRef Name, int &Index);
191 void initNames2DirectTargetFlags();
193 /// Try to convert a name of a direct target flag to the corresponding
196 /// Return true if the name isn't a name of a direct flag.
197 bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
200 } // end anonymous namespace
202 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
203 StringRef Source, const PerFunctionMIParsingState &PFS,
204 const SlotMapping &IRSlots)
205 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
206 PFS(PFS), IRSlots(IRSlots) {}
208 void MIParser::lex() {
209 CurrentSource = lexMIToken(
210 CurrentSource, Token,
211 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
214 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
216 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
217 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
218 Error = SMDiagnostic(
220 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
221 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
225 static const char *toString(MIToken::TokenKind TokenKind) {
231 case MIToken::lparen:
233 case MIToken::rparen:
236 return "<unknown token>";
240 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
241 if (Token.isNot(TokenKind))
242 return error(Twine("expected ") + toString(TokenKind));
247 bool MIParser::parse(MachineInstr *&MI) {
250 // Parse any register operands before '='
251 MachineOperand MO = MachineOperand::CreateImm(0);
252 SmallVector<MachineOperandWithLocation, 8> Operands;
253 while (Token.isRegister() || Token.isRegisterFlag()) {
254 auto Loc = Token.location();
255 if (parseRegisterOperand(MO, /*IsDef=*/true))
257 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
258 if (Token.isNot(MIToken::comma))
262 if (!Operands.empty() && expectAndConsume(MIToken::equal))
265 unsigned OpCode, Flags = 0;
266 if (Token.isError() || parseInstruction(OpCode, Flags))
269 // TODO: Parse the bundle instruction flags.
271 // Parse the remaining machine operands.
272 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location) &&
273 Token.isNot(MIToken::coloncolon)) {
274 auto Loc = Token.location();
275 if (parseMachineOperandAndTargetFlags(MO))
277 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
278 if (Token.is(MIToken::Eof) || Token.is(MIToken::coloncolon))
280 if (Token.isNot(MIToken::comma))
281 return error("expected ',' before the next machine operand");
285 DebugLoc DebugLocation;
286 if (Token.is(MIToken::kw_debug_location)) {
288 if (Token.isNot(MIToken::exclaim))
289 return error("expected a metadata node after 'debug-location'");
290 MDNode *Node = nullptr;
291 if (parseMDNode(Node))
293 DebugLocation = DebugLoc(Node);
296 // Parse the machine memory operands.
297 SmallVector<MachineMemOperand *, 2> MemOperands;
298 if (Token.is(MIToken::coloncolon)) {
300 while (Token.isNot(MIToken::Eof)) {
301 MachineMemOperand *MemOp = nullptr;
302 if (parseMachineMemoryOperand(MemOp))
304 MemOperands.push_back(MemOp);
305 if (Token.is(MIToken::Eof))
307 if (Token.isNot(MIToken::comma))
308 return error("expected ',' before the next machine memory operand");
313 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
314 if (!MCID.isVariadic()) {
315 // FIXME: Move the implicit operand verification to the machine verifier.
316 if (verifyImplicitOperands(Operands, MCID))
320 // TODO: Check for extraneous machine operands.
321 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
323 for (const auto &Operand : Operands)
324 MI->addOperand(MF, Operand.Operand);
325 if (MemOperands.empty())
327 MachineInstr::mmo_iterator MemRefs =
328 MF.allocateMemRefsArray(MemOperands.size());
329 std::copy(MemOperands.begin(), MemOperands.end(), MemRefs);
330 MI->setMemRefs(MemRefs, MemRefs + MemOperands.size());
334 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
336 if (Token.isNot(MIToken::MachineBasicBlock))
337 return error("expected a machine basic block reference");
338 if (parseMBBReference(MBB))
341 if (Token.isNot(MIToken::Eof))
343 "expected end of string after the machine basic block reference");
347 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
349 if (Token.isNot(MIToken::NamedRegister))
350 return error("expected a named register");
351 if (parseRegister(Reg))
354 if (Token.isNot(MIToken::Eof))
355 return error("expected end of string after the register reference");
359 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
361 if (Token.isNot(MIToken::VirtualRegister))
362 return error("expected a virtual register");
363 if (parseRegister(Reg))
366 if (Token.isNot(MIToken::Eof))
367 return error("expected end of string after the register reference");
371 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) {
373 if (Token.isNot(MIToken::IRBlock))
374 return error("expected an IR block reference");
375 unsigned SlotNumber = 0;
376 if (getUnsigned(SlotNumber))
378 BB = getIRBlock(SlotNumber);
380 return error(Twine("use of undefined IR block '%ir-block.") +
381 Twine(SlotNumber) + "'");
383 if (Token.isNot(MIToken::Eof))
384 return error("expected end of string after the IR block reference");
388 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
389 assert(MO.isImplicit());
390 return MO.isDef() ? "implicit-def" : "implicit";
393 static std::string getRegisterName(const TargetRegisterInfo *TRI,
395 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
396 return StringRef(TRI->getName(Reg)).lower();
399 bool MIParser::verifyImplicitOperands(
400 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
402 // We can't verify call instructions as they can contain arbitrary implicit
403 // register and register mask operands.
406 // Gather all the expected implicit operands.
407 SmallVector<MachineOperand, 4> ImplicitOperands;
408 if (MCID.ImplicitDefs)
409 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
410 ImplicitOperands.push_back(
411 MachineOperand::CreateReg(*ImpDefs, true, true));
412 if (MCID.ImplicitUses)
413 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
414 ImplicitOperands.push_back(
415 MachineOperand::CreateReg(*ImpUses, false, true));
417 const auto *TRI = MF.getSubtarget().getRegisterInfo();
418 assert(TRI && "Expected target register info");
419 size_t I = ImplicitOperands.size(), J = Operands.size();
424 const auto &ImplicitOperand = ImplicitOperands[I];
425 const auto &Operand = Operands[J].Operand;
426 if (ImplicitOperand.isIdenticalTo(Operand))
428 if (Operand.isReg() && Operand.isImplicit()) {
429 return error(Operands[J].Begin,
430 Twine("expected an implicit register operand '") +
431 printImplicitRegisterFlag(ImplicitOperand) + " %" +
432 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
435 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
436 // insead of reporting an error at this location:
439 // report the error at the following location:
442 return error(J < Operands.size() ? Operands[J].End : Token.location(),
443 Twine("missing implicit register operand '") +
444 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
445 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
450 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
451 if (Token.is(MIToken::kw_frame_setup)) {
452 Flags |= MachineInstr::FrameSetup;
455 if (Token.isNot(MIToken::Identifier))
456 return error("expected a machine instruction");
457 StringRef InstrName = Token.stringValue();
458 if (parseInstrName(InstrName, OpCode))
459 return error(Twine("unknown machine instruction name '") + InstrName + "'");
464 bool MIParser::parseRegister(unsigned &Reg) {
465 switch (Token.kind()) {
466 case MIToken::underscore:
469 case MIToken::NamedRegister: {
470 StringRef Name = Token.stringValue();
471 if (getRegisterByName(Name, Reg))
472 return error(Twine("unknown register name '") + Name + "'");
475 case MIToken::VirtualRegister: {
479 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
480 if (RegInfo == PFS.VirtualRegisterSlots.end())
481 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
483 Reg = RegInfo->second;
486 // TODO: Parse other register kinds.
488 llvm_unreachable("The current token should be a register");
493 bool MIParser::parseRegisterFlag(unsigned &Flags) {
494 const unsigned OldFlags = Flags;
495 switch (Token.kind()) {
496 case MIToken::kw_implicit:
497 Flags |= RegState::Implicit;
499 case MIToken::kw_implicit_define:
500 Flags |= RegState::ImplicitDefine;
502 case MIToken::kw_dead:
503 Flags |= RegState::Dead;
505 case MIToken::kw_killed:
506 Flags |= RegState::Kill;
508 case MIToken::kw_undef:
509 Flags |= RegState::Undef;
511 case MIToken::kw_early_clobber:
512 Flags |= RegState::EarlyClobber;
514 case MIToken::kw_debug_use:
515 Flags |= RegState::Debug;
517 // TODO: parse the other register flags.
519 llvm_unreachable("The current token should be a register flag");
521 if (OldFlags == Flags)
522 // We know that the same flag is specified more than once when the flags
524 return error("duplicate '" + Token.stringValue() + "' register flag");
529 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
530 assert(Token.is(MIToken::colon));
532 if (Token.isNot(MIToken::Identifier))
533 return error("expected a subregister index after ':'");
534 auto Name = Token.stringValue();
535 SubReg = getSubRegIndex(Name);
537 return error(Twine("use of unknown subregister index '") + Name + "'");
542 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
544 unsigned Flags = IsDef ? RegState::Define : 0;
545 while (Token.isRegisterFlag()) {
546 if (parseRegisterFlag(Flags))
549 if (!Token.isRegister())
550 return error("expected a register after register flags");
551 if (parseRegister(Reg))
555 if (Token.is(MIToken::colon)) {
556 if (parseSubRegisterIndex(SubReg))
559 Dest = MachineOperand::CreateReg(
560 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
561 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
562 Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug);
566 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
567 assert(Token.is(MIToken::IntegerLiteral));
568 const APSInt &Int = Token.integerValue();
569 if (Int.getMinSignedBits() > 64)
570 return error("integer literal is too large to be an immediate operand");
571 Dest = MachineOperand::CreateImm(Int.getExtValue());
576 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
577 auto Source = StringRef(Loc, Token.range().end() - Loc).str();
580 C = parseConstantValue(Source.c_str(), Err, *MF.getFunction()->getParent());
582 return error(Loc + Err.getColumnNo(), Err.getMessage());
586 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
587 assert(Token.is(MIToken::IntegerType));
588 auto Loc = Token.location();
590 if (Token.isNot(MIToken::IntegerLiteral))
591 return error("expected an integer literal");
592 const Constant *C = nullptr;
593 if (parseIRConstant(Loc, C))
595 Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
599 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
600 auto Loc = Token.location();
602 if (Token.isNot(MIToken::FloatingPointLiteral))
603 return error("expected a floating point literal");
604 const Constant *C = nullptr;
605 if (parseIRConstant(Loc, C))
607 Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
611 bool MIParser::getUnsigned(unsigned &Result) {
612 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
613 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
614 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
616 return error("expected 32-bit integer (too large)");
621 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
622 assert(Token.is(MIToken::MachineBasicBlock));
624 if (getUnsigned(Number))
626 auto MBBInfo = PFS.MBBSlots.find(Number);
627 if (MBBInfo == PFS.MBBSlots.end())
628 return error(Twine("use of undefined machine basic block #") +
630 MBB = MBBInfo->second;
631 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
632 return error(Twine("the name of machine basic block #") + Twine(Number) +
633 " isn't '" + Token.stringValue() + "'");
637 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
638 MachineBasicBlock *MBB;
639 if (parseMBBReference(MBB))
641 Dest = MachineOperand::CreateMBB(MBB);
646 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
647 assert(Token.is(MIToken::StackObject));
651 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
652 if (ObjectInfo == PFS.StackObjectSlots.end())
653 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
656 if (const auto *Alloca =
657 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
658 Name = Alloca->getName();
659 if (!Token.stringValue().empty() && Token.stringValue() != Name)
660 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
661 "' isn't '" + Token.stringValue() + "'");
663 Dest = MachineOperand::CreateFI(ObjectInfo->second);
667 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
668 assert(Token.is(MIToken::FixedStackObject));
672 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
673 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
674 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
677 Dest = MachineOperand::CreateFI(ObjectInfo->second);
681 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
682 switch (Token.kind()) {
683 case MIToken::NamedGlobalValue: {
684 const Module *M = MF.getFunction()->getParent();
685 GV = M->getNamedValue(Token.stringValue());
687 return error(Twine("use of undefined global value '") + Token.range() +
691 case MIToken::GlobalValue: {
693 if (getUnsigned(GVIdx))
695 if (GVIdx >= IRSlots.GlobalValues.size())
696 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
698 GV = IRSlots.GlobalValues[GVIdx];
702 llvm_unreachable("The current token should be a global value");
707 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
708 GlobalValue *GV = nullptr;
709 if (parseGlobalValue(GV))
712 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
713 if (parseOperandsOffset(Dest))
718 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
719 assert(Token.is(MIToken::ConstantPoolItem));
723 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
724 if (ConstantInfo == PFS.ConstantPoolSlots.end())
725 return error("use of undefined constant '%const." + Twine(ID) + "'");
727 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
728 if (parseOperandsOffset(Dest))
733 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
734 assert(Token.is(MIToken::JumpTableIndex));
738 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
739 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
740 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
742 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
746 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
747 assert(Token.is(MIToken::ExternalSymbol));
748 const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
750 Dest = MachineOperand::CreateES(Symbol);
751 if (parseOperandsOffset(Dest))
756 bool MIParser::parseMDNode(MDNode *&Node) {
757 assert(Token.is(MIToken::exclaim));
758 auto Loc = Token.location();
760 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
761 return error("expected metadata id after '!'");
765 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
766 if (NodeInfo == IRSlots.MetadataNodes.end())
767 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
769 Node = NodeInfo->second.get();
773 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
774 MDNode *Node = nullptr;
775 if (parseMDNode(Node))
777 Dest = MachineOperand::CreateMetadata(Node);
781 bool MIParser::parseCFIOffset(int &Offset) {
782 if (Token.isNot(MIToken::IntegerLiteral))
783 return error("expected a cfi offset");
784 if (Token.integerValue().getMinSignedBits() > 32)
785 return error("expected a 32 bit integer (the cfi offset is too large)");
786 Offset = (int)Token.integerValue().getExtValue();
791 bool MIParser::parseCFIRegister(unsigned &Reg) {
792 if (Token.isNot(MIToken::NamedRegister))
793 return error("expected a cfi register");
795 if (parseRegister(LLVMReg))
797 const auto *TRI = MF.getSubtarget().getRegisterInfo();
798 assert(TRI && "Expected target register info");
799 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
801 return error("invalid DWARF register");
802 Reg = (unsigned)DwarfReg;
807 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
808 auto Kind = Token.kind();
810 auto &MMI = MF.getMMI();
815 case MIToken::kw_cfi_offset:
816 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
817 parseCFIOffset(Offset))
820 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
822 case MIToken::kw_cfi_def_cfa_register:
823 if (parseCFIRegister(Reg))
826 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
828 case MIToken::kw_cfi_def_cfa_offset:
829 if (parseCFIOffset(Offset))
831 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
832 CFIIndex = MMI.addFrameInst(
833 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
835 case MIToken::kw_cfi_def_cfa:
836 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
837 parseCFIOffset(Offset))
839 // NB: MCCFIInstruction::createDefCfa negates the offset.
841 MMI.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
844 // TODO: Parse the other CFI operands.
845 llvm_unreachable("The current token should be a cfi operand");
847 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
851 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
852 switch (Token.kind()) {
853 case MIToken::NamedIRBlock: {
854 BB = dyn_cast_or_null<BasicBlock>(
855 F.getValueSymbolTable().lookup(Token.stringValue()));
857 return error(Twine("use of undefined IR block '") + Token.range() + "'");
860 case MIToken::IRBlock: {
861 unsigned SlotNumber = 0;
862 if (getUnsigned(SlotNumber))
864 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
866 return error(Twine("use of undefined IR block '%ir-block.") +
867 Twine(SlotNumber) + "'");
871 llvm_unreachable("The current token should be an IR block reference");
876 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
877 assert(Token.is(MIToken::kw_blockaddress));
879 if (expectAndConsume(MIToken::lparen))
881 if (Token.isNot(MIToken::GlobalValue) &&
882 Token.isNot(MIToken::NamedGlobalValue))
883 return error("expected a global value");
884 GlobalValue *GV = nullptr;
885 if (parseGlobalValue(GV))
887 auto *F = dyn_cast<Function>(GV);
889 return error("expected an IR function reference");
891 if (expectAndConsume(MIToken::comma))
893 BasicBlock *BB = nullptr;
894 if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
895 return error("expected an IR block reference");
896 if (parseIRBlock(BB, *F))
899 if (expectAndConsume(MIToken::rparen))
901 Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
902 if (parseOperandsOffset(Dest))
907 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
908 assert(Token.is(MIToken::kw_target_index));
910 if (expectAndConsume(MIToken::lparen))
912 if (Token.isNot(MIToken::Identifier))
913 return error("expected the name of the target index");
915 if (getTargetIndex(Token.stringValue(), Index))
916 return error("use of undefined target index '" + Token.stringValue() + "'");
918 if (expectAndConsume(MIToken::rparen))
920 Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
921 if (parseOperandsOffset(Dest))
926 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
927 assert(Token.is(MIToken::kw_liveout));
928 const auto *TRI = MF.getSubtarget().getRegisterInfo();
929 assert(TRI && "Expected target register info");
930 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
932 if (expectAndConsume(MIToken::lparen))
935 if (Token.isNot(MIToken::NamedRegister))
936 return error("expected a named register");
938 if (parseRegister(Reg))
941 Mask[Reg / 32] |= 1U << (Reg % 32);
942 // TODO: Report an error if the same register is used more than once.
943 if (Token.isNot(MIToken::comma))
947 if (expectAndConsume(MIToken::rparen))
949 Dest = MachineOperand::CreateRegLiveOut(Mask);
953 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
954 switch (Token.kind()) {
955 case MIToken::kw_implicit:
956 case MIToken::kw_implicit_define:
957 case MIToken::kw_dead:
958 case MIToken::kw_killed:
959 case MIToken::kw_undef:
960 case MIToken::kw_early_clobber:
961 case MIToken::kw_debug_use:
962 case MIToken::underscore:
963 case MIToken::NamedRegister:
964 case MIToken::VirtualRegister:
965 return parseRegisterOperand(Dest);
966 case MIToken::IntegerLiteral:
967 return parseImmediateOperand(Dest);
968 case MIToken::IntegerType:
969 return parseTypedImmediateOperand(Dest);
970 case MIToken::kw_half:
971 case MIToken::kw_float:
972 case MIToken::kw_double:
973 case MIToken::kw_x86_fp80:
974 case MIToken::kw_fp128:
975 case MIToken::kw_ppc_fp128:
976 return parseFPImmediateOperand(Dest);
977 case MIToken::MachineBasicBlock:
978 return parseMBBOperand(Dest);
979 case MIToken::StackObject:
980 return parseStackObjectOperand(Dest);
981 case MIToken::FixedStackObject:
982 return parseFixedStackObjectOperand(Dest);
983 case MIToken::GlobalValue:
984 case MIToken::NamedGlobalValue:
985 return parseGlobalAddressOperand(Dest);
986 case MIToken::ConstantPoolItem:
987 return parseConstantPoolIndexOperand(Dest);
988 case MIToken::JumpTableIndex:
989 return parseJumpTableIndexOperand(Dest);
990 case MIToken::ExternalSymbol:
991 return parseExternalSymbolOperand(Dest);
992 case MIToken::exclaim:
993 return parseMetadataOperand(Dest);
994 case MIToken::kw_cfi_offset:
995 case MIToken::kw_cfi_def_cfa_register:
996 case MIToken::kw_cfi_def_cfa_offset:
997 case MIToken::kw_cfi_def_cfa:
998 return parseCFIOperand(Dest);
999 case MIToken::kw_blockaddress:
1000 return parseBlockAddressOperand(Dest);
1001 case MIToken::kw_target_index:
1002 return parseTargetIndexOperand(Dest);
1003 case MIToken::kw_liveout:
1004 return parseLiveoutRegisterMaskOperand(Dest);
1005 case MIToken::Error:
1007 case MIToken::Identifier:
1008 if (const auto *RegMask = getRegMask(Token.stringValue())) {
1009 Dest = MachineOperand::CreateRegMask(RegMask);
1015 // TODO: parse the other machine operands.
1016 return error("expected a machine operand");
1021 bool MIParser::parseMachineOperandAndTargetFlags(MachineOperand &Dest) {
1023 bool HasTargetFlags = false;
1024 if (Token.is(MIToken::kw_target_flags)) {
1025 HasTargetFlags = true;
1027 if (expectAndConsume(MIToken::lparen))
1029 if (Token.isNot(MIToken::Identifier))
1030 return error("expected the name of the target flag");
1031 if (getDirectTargetFlag(Token.stringValue(), TF))
1032 return error("use of undefined target flag '" + Token.stringValue() +
1035 // TODO: Parse target's bit target flags.
1036 if (expectAndConsume(MIToken::rparen))
1039 auto Loc = Token.location();
1040 if (parseMachineOperand(Dest))
1042 if (!HasTargetFlags)
1045 return error(Loc, "register operands can't have target flags");
1046 Dest.setTargetFlags(TF);
1050 bool MIParser::parseOffset(int64_t &Offset) {
1051 if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
1053 StringRef Sign = Token.range();
1054 bool IsNegative = Token.is(MIToken::minus);
1056 if (Token.isNot(MIToken::IntegerLiteral))
1057 return error("expected an integer literal after '" + Sign + "'");
1058 if (Token.integerValue().getMinSignedBits() > 64)
1059 return error("expected 64-bit integer (too large)");
1060 Offset = Token.integerValue().getExtValue();
1067 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
1069 if (parseOffset(Offset))
1071 Op.setOffset(Offset);
1075 bool MIParser::parseIRValue(Value *&V) {
1076 switch (Token.kind()) {
1077 case MIToken::NamedIRValue: {
1078 V = MF.getFunction()->getValueSymbolTable().lookup(Token.stringValue());
1080 return error(Twine("use of undefined IR value '") + Token.range() + "'");
1083 // TODO: Parse unnamed IR value references.
1085 llvm_unreachable("The current token should be an IR block reference");
1090 bool MIParser::getUint64(uint64_t &Result) {
1091 assert(Token.hasIntegerValue());
1092 if (Token.integerValue().getActiveBits() > 64)
1093 return error("expected 64-bit integer (too large)");
1094 Result = Token.integerValue().getZExtValue();
1098 bool MIParser::parseMemoryOperandFlag(unsigned &Flags) {
1099 const unsigned OldFlags = Flags;
1100 switch (Token.kind()) {
1101 case MIToken::kw_volatile:
1102 Flags |= MachineMemOperand::MOVolatile;
1104 case MIToken::kw_non_temporal:
1105 Flags |= MachineMemOperand::MONonTemporal;
1107 case MIToken::kw_invariant:
1108 Flags |= MachineMemOperand::MOInvariant;
1110 // TODO: parse the target specific memory operand flags.
1112 llvm_unreachable("The current token should be a memory operand flag");
1114 if (OldFlags == Flags)
1115 // We know that the same flag is specified more than once when the flags
1116 // weren't modified.
1117 return error("duplicate '" + Token.stringValue() + "' memory operand flag");
1122 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
1123 switch (Token.kind()) {
1124 case MIToken::kw_stack:
1125 PSV = MF.getPSVManager().getStack();
1127 case MIToken::kw_got:
1128 PSV = MF.getPSVManager().getGOT();
1130 case MIToken::kw_jump_table:
1131 PSV = MF.getPSVManager().getJumpTable();
1133 case MIToken::kw_constant_pool:
1134 PSV = MF.getPSVManager().getConstantPool();
1136 // TODO: Parse the other pseudo source values.
1138 llvm_unreachable("The current token should be pseudo source value");
1144 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
1145 if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
1146 Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table)) {
1147 const PseudoSourceValue *PSV = nullptr;
1148 if (parseMemoryPseudoSourceValue(PSV))
1151 if (parseOffset(Offset))
1153 Dest = MachinePointerInfo(PSV, Offset);
1156 if (Token.isNot(MIToken::NamedIRValue))
1157 return error("expected an IR value reference");
1159 if (parseIRValue(V))
1161 if (!V->getType()->isPointerTy())
1162 return error("expected a pointer IR value");
1165 if (parseOffset(Offset))
1167 Dest = MachinePointerInfo(V, Offset);
1171 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
1172 if (expectAndConsume(MIToken::lparen))
1175 while (Token.isMemoryOperandFlag()) {
1176 if (parseMemoryOperandFlag(Flags))
1179 if (Token.isNot(MIToken::Identifier) ||
1180 (Token.stringValue() != "load" && Token.stringValue() != "store"))
1181 return error("expected 'load' or 'store' memory operation");
1182 if (Token.stringValue() == "load")
1183 Flags |= MachineMemOperand::MOLoad;
1185 Flags |= MachineMemOperand::MOStore;
1188 if (Token.isNot(MIToken::IntegerLiteral))
1189 return error("expected the size integer literal after memory operation");
1191 if (getUint64(Size))
1195 const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
1196 if (Token.isNot(MIToken::Identifier) || Token.stringValue() != Word)
1197 return error(Twine("expected '") + Word + "'");
1200 MachinePointerInfo Ptr = MachinePointerInfo();
1201 if (parseMachinePointerInfo(Ptr))
1203 unsigned BaseAlignment = Size;
1204 if (Token.is(MIToken::comma)) {
1206 if (Token.isNot(MIToken::kw_align))
1207 return error("expected 'align'");
1209 if (Token.isNot(MIToken::IntegerLiteral))
1210 return error("expected an integer literal after 'align'");
1211 if (getUnsigned(BaseAlignment))
1215 // TODO: Parse the attached metadata nodes.
1216 if (expectAndConsume(MIToken::rparen))
1218 Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment);
1222 void MIParser::initNames2InstrOpCodes() {
1223 if (!Names2InstrOpCodes.empty())
1225 const auto *TII = MF.getSubtarget().getInstrInfo();
1226 assert(TII && "Expected target instruction info");
1227 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
1228 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
1231 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
1232 initNames2InstrOpCodes();
1233 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
1234 if (InstrInfo == Names2InstrOpCodes.end())
1236 OpCode = InstrInfo->getValue();
1240 void MIParser::initNames2Regs() {
1241 if (!Names2Regs.empty())
1243 // The '%noreg' register is the register 0.
1244 Names2Regs.insert(std::make_pair("noreg", 0));
1245 const auto *TRI = MF.getSubtarget().getRegisterInfo();
1246 assert(TRI && "Expected target register info");
1247 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
1249 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
1252 assert(WasInserted && "Expected registers to be unique case-insensitively");
1256 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
1258 auto RegInfo = Names2Regs.find(RegName);
1259 if (RegInfo == Names2Regs.end())
1261 Reg = RegInfo->getValue();
1265 void MIParser::initNames2RegMasks() {
1266 if (!Names2RegMasks.empty())
1268 const auto *TRI = MF.getSubtarget().getRegisterInfo();
1269 assert(TRI && "Expected target register info");
1270 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
1271 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
1272 assert(RegMasks.size() == RegMaskNames.size());
1273 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
1274 Names2RegMasks.insert(
1275 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
1278 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
1279 initNames2RegMasks();
1280 auto RegMaskInfo = Names2RegMasks.find(Identifier);
1281 if (RegMaskInfo == Names2RegMasks.end())
1283 return RegMaskInfo->getValue();
1286 void MIParser::initNames2SubRegIndices() {
1287 if (!Names2SubRegIndices.empty())
1289 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
1290 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
1291 Names2SubRegIndices.insert(
1292 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
1295 unsigned MIParser::getSubRegIndex(StringRef Name) {
1296 initNames2SubRegIndices();
1297 auto SubRegInfo = Names2SubRegIndices.find(Name);
1298 if (SubRegInfo == Names2SubRegIndices.end())
1300 return SubRegInfo->getValue();
1303 static void initSlots2BasicBlocks(
1305 DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
1306 ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
1307 MST.incorporateFunction(F);
1308 for (auto &BB : F) {
1311 int Slot = MST.getLocalSlot(&BB);
1314 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
1318 static const BasicBlock *getIRBlockFromSlot(
1320 const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
1321 auto BlockInfo = Slots2BasicBlocks.find(Slot);
1322 if (BlockInfo == Slots2BasicBlocks.end())
1324 return BlockInfo->second;
1327 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
1328 if (Slots2BasicBlocks.empty())
1329 initSlots2BasicBlocks(*MF.getFunction(), Slots2BasicBlocks);
1330 return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
1333 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
1334 if (&F == MF.getFunction())
1335 return getIRBlock(Slot);
1336 DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
1337 initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
1338 return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
1341 void MIParser::initNames2TargetIndices() {
1342 if (!Names2TargetIndices.empty())
1344 const auto *TII = MF.getSubtarget().getInstrInfo();
1345 assert(TII && "Expected target instruction info");
1346 auto Indices = TII->getSerializableTargetIndices();
1347 for (const auto &I : Indices)
1348 Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
1351 bool MIParser::getTargetIndex(StringRef Name, int &Index) {
1352 initNames2TargetIndices();
1353 auto IndexInfo = Names2TargetIndices.find(Name);
1354 if (IndexInfo == Names2TargetIndices.end())
1356 Index = IndexInfo->second;
1360 void MIParser::initNames2DirectTargetFlags() {
1361 if (!Names2DirectTargetFlags.empty())
1363 const auto *TII = MF.getSubtarget().getInstrInfo();
1364 assert(TII && "Expected target instruction info");
1365 auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();
1366 for (const auto &I : Flags)
1367 Names2DirectTargetFlags.insert(
1368 std::make_pair(StringRef(I.second), I.first));
1371 bool MIParser::getDirectTargetFlag(StringRef Name, unsigned &Flag) {
1372 initNames2DirectTargetFlags();
1373 auto FlagInfo = Names2DirectTargetFlags.find(Name);
1374 if (FlagInfo == Names2DirectTargetFlags.end())
1376 Flag = FlagInfo->second;
1380 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
1381 MachineFunction &MF, StringRef Src,
1382 const PerFunctionMIParsingState &PFS,
1383 const SlotMapping &IRSlots, SMDiagnostic &Error) {
1384 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
1387 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
1388 MachineFunction &MF, StringRef Src,
1389 const PerFunctionMIParsingState &PFS,
1390 const SlotMapping &IRSlots, SMDiagnostic &Error) {
1391 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
1394 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
1395 MachineFunction &MF, StringRef Src,
1396 const PerFunctionMIParsingState &PFS,
1397 const SlotMapping &IRSlots,
1398 SMDiagnostic &Error) {
1399 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1400 .parseStandaloneNamedRegister(Reg);
1403 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
1404 MachineFunction &MF, StringRef Src,
1405 const PerFunctionMIParsingState &PFS,
1406 const SlotMapping &IRSlots,
1407 SMDiagnostic &Error) {
1408 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1409 .parseStandaloneVirtualRegister(Reg);
1412 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM,
1413 MachineFunction &MF, StringRef Src,
1414 const PerFunctionMIParsingState &PFS,
1415 const SlotMapping &IRSlots,
1416 SMDiagnostic &Error) {
1417 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1418 .parseStandaloneIRBlockReference(BB);