lib/CodeGen/LLVMTargetMachine.cpp

   1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the LLVMTargetMachine class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Target/TargetMachine.h"
  15 #include "llvm/PassManager.h"
  16 #include "llvm/Pass.h"
  17 #include "llvm/Assembly/PrintModulePass.h"
  18 #include "llvm/Analysis/LoopPass.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/CodeGen/GCStrategy.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetAsmInfo.h"
  23 #include "llvm/Transforms/Scalar.h"
  24 #include "llvm/Support/CommandLine.h"
  25 #include "llvm/Support/raw_ostream.h"
  26 using namespace llvm;
  27
  28 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
  29     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
  30 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
  31     cl::desc("Print LLVM IR input to isel pass"));
  32 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
  33     cl::desc("Dump emitter generated instructions as assembly"));
  34 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
  35     cl::desc("Dump garbage collector data"));
  36
  37 // Hidden options to help debugging
  38 static cl::opt<bool>
  39 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
  40               cl::desc("Perform sinking on machine code"));
  41 static cl::opt<bool>
  42 EnableLICM("machine-licm",
  43            cl::init(false), cl::Hidden,
  44            cl::desc("Perform loop-invariant code motion on machine code"));
  45
  46 // When this works it will be on by default.
  47 static cl::opt<bool>
  48 DisablePostRAScheduler("disable-post-RA-scheduler",
  49                        cl::desc("Disable scheduling after register allocation"),
  50                        cl::init(true));
  51
  52 FileModel::Model
  53 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
  54                                        raw_ostream &Out,
  55                                        CodeGenFileType FileType,
  56                                        bool Fast) {
  57   // Standard LLVM-Level Passes.
  58
  59   // Run loop strength reduction before anything else.
  60   if (!Fast) {
  61     PM.add(createLoopStrengthReducePass(getTargetLowering()));
  62     if (PrintLSR)
  63       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
  64   }
  65
  66   PM.add(createGCLoweringPass());
  67
  68   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
  69     PM.add(createLowerInvokePass(getTargetLowering()));
  70
  71   // Make sure that no unreachable blocks are instruction selected.
  72   PM.add(createUnreachableBlockEliminationPass());
  73
  74   if (!Fast)
  75     PM.add(createCodeGenPreparePass(getTargetLowering()));
  76
  77   if (PrintISelInput)
  78     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
  79                                  &cerr));
  80
  81   // Ask the target for an isel.
  82   if (addInstSelector(PM, Fast))
  83     return FileModel::Error;
  84
  85   // Print the instruction selected machine code...
  86   if (PrintMachineCode)
  87     PM.add(createMachineFunctionPrinterPass(cerr));
  88
  89   if (EnableLICM)
  90     PM.add(createMachineLICMPass());
  91
  92   if (EnableSinking)
  93     PM.add(createMachineSinkingPass());
  94
  95   // Run pre-ra passes.
  96   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
  97     PM.add(createMachineFunctionPrinterPass(cerr));
  98
  99   // Perform register allocation to convert to a concrete x86 representation
 100   PM.add(createRegisterAllocator());
 101
 102   // Perform stack slot coloring.
 103   if (!Fast)
 104     PM.add(createStackSlotColoringPass());
 105
 106   if (PrintMachineCode)  // Print the register-allocated code
 107     PM.add(createMachineFunctionPrinterPass(cerr));
 108
 109   // Run post-ra passes.
 110   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 111     PM.add(createMachineFunctionPrinterPass(cerr));
 112
 113   PM.add(createLowerSubregsPass());
 114
 115   if (PrintMachineCode)  // Print the subreg lowered code
 116     PM.add(createMachineFunctionPrinterPass(cerr));
 117
 118   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 119   PM.add(createPrologEpilogCodeInserter());
 120
 121   if (PrintMachineCode)
 122     PM.add(createMachineFunctionPrinterPass(cerr));
 123
 124   // Second pass scheduler.
 125   if (!Fast && !DisablePostRAScheduler)
 126     PM.add(createPostRAScheduler());
 127
 128   // Branch folding must be run after regalloc and prolog/epilog insertion.
 129   if (!Fast)
 130     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 131
 132   PM.add(createGCMachineCodeAnalysisPass());
 133   if (PrintMachineCode)
 134     PM.add(createMachineFunctionPrinterPass(cerr));
 135
 136   if (PrintGCInfo)
 137     PM.add(createGCInfoPrinter(*cerr));
 138
 139   // Fold redundant debug labels.
 140   PM.add(createDebugLabelFoldingPass());
 141
 142   if (PrintMachineCode)  // Print the register-allocated code
 143     PM.add(createMachineFunctionPrinterPass(cerr));
 144
 145   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 146     PM.add(createMachineFunctionPrinterPass(cerr));
 147
 148   if (!Fast && !OptimizeForSize)
 149     PM.add(createLoopAlignerPass());
 150
 151   switch (FileType) {
 152   default:
 153     break;
 154   case TargetMachine::AssemblyFile:
 155     if (addAssemblyEmitter(PM, Fast, Out))
 156       return FileModel::Error;
 157     return FileModel::AsmFile;
 158   case TargetMachine::ObjectFile:
 159     if (getMachOWriterInfo())
 160       return FileModel::MachOFile;
 161     else if (getELFWriterInfo())
 162       return FileModel::ElfFile;
 163   }
 164
 165   return FileModel::Error;
 166 }
 167
 168 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
 169 /// be split up (e.g., to add an object writer pass), this method can be used to
 170 /// finish up adding passes to emit the file, if necessary.
 171 bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
 172                                                   MachineCodeEmitter *MCE,
 173                                                   bool Fast) {
 174   if (MCE)
 175     addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 176
 177   PM.add(createGCInfoDeleter());
 178
 179   // Delete machine code for this function
 180   PM.add(createMachineCodeDeleter());
 181
 182   return false; // success!
 183 }
 184
 185 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
 186 /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
 187 /// actually outputting the machine code and resolving things like the address
 188 /// of functions.  This method should returns true if machine code emission is
 189 /// not supported.
 190 ///
 191 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
 192                                                    MachineCodeEmitter &MCE,
 193                                                    bool Fast) {
 194   // Standard LLVM-Level Passes.
 195
 196   // Run loop strength reduction before anything else.
 197   if (!Fast) {
 198     PM.add(createLoopStrengthReducePass(getTargetLowering()));
 199     if (PrintLSR)
 200       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
 201   }
 202
 203   PM.add(createGCLoweringPass());
 204
 205   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
 206     PM.add(createLowerInvokePass(getTargetLowering()));
 207
 208   // Make sure that no unreachable blocks are instruction selected.
 209   PM.add(createUnreachableBlockEliminationPass());
 210
 211   if (!Fast)
 212     PM.add(createCodeGenPreparePass(getTargetLowering()));
 213
 214   if (PrintISelInput)
 215     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
 216                                  &cerr));
 217
 218   // Ask the target for an isel.
 219   if (addInstSelector(PM, Fast))
 220     return true;
 221
 222   // Print the instruction selected machine code...
 223   if (PrintMachineCode)
 224     PM.add(createMachineFunctionPrinterPass(cerr));
 225
 226   if (EnableLICM)
 227     PM.add(createMachineLICMPass());
 228
 229   if (EnableSinking)
 230     PM.add(createMachineSinkingPass());
 231
 232   // Run pre-ra passes.
 233   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
 234     PM.add(createMachineFunctionPrinterPass(cerr));
 235
 236   // Perform register allocation.
 237   PM.add(createRegisterAllocator());
 238
 239   // Perform stack slot coloring.
 240   if (!Fast)
 241     PM.add(createStackSlotColoringPass());
 242
 243   if (PrintMachineCode)
 244     PM.add(createMachineFunctionPrinterPass(cerr));
 245
 246   // Run post-ra passes.
 247   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 248     PM.add(createMachineFunctionPrinterPass(cerr));
 249
 250   if (PrintMachineCode)  // Print the register-allocated code
 251     PM.add(createMachineFunctionPrinterPass(cerr));
 252
 253   PM.add(createLowerSubregsPass());
 254
 255   if (PrintMachineCode)  // Print the subreg lowered code
 256     PM.add(createMachineFunctionPrinterPass(cerr));
 257
 258   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 259   PM.add(createPrologEpilogCodeInserter());
 260
 261   if (PrintMachineCode)
 262     PM.add(createMachineFunctionPrinterPass(cerr));
 263
 264   // Second pass scheduler.
 265   if (!Fast)
 266     PM.add(createPostRAScheduler());
 267
 268   // Branch folding must be run after regalloc and prolog/epilog insertion.
 269   if (!Fast)
 270     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 271
 272   PM.add(createGCMachineCodeAnalysisPass());
 273
 274   if (PrintMachineCode)
 275     PM.add(createMachineFunctionPrinterPass(cerr));
 276
 277   if (PrintGCInfo)
 278     PM.add(createGCInfoPrinter(*cerr));
 279
 280   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 281     PM.add(createMachineFunctionPrinterPass(cerr));
 282
 283   addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
 284
 285   PM.add(createGCInfoDeleter());
 286
 287   // Delete machine code for this function
 288   PM.add(createMachineCodeDeleter());
 289
 290   return false; // success!
 291 }