1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "codegen-dce"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/Pass.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/ADT/Statistic.h"
26 STATISTIC(NumDeletes, "Number of dead instructions deleted");
29 class DeadMachineInstructionElim : public MachineFunctionPass {
30 virtual bool runOnMachineFunction(MachineFunction &MF);
32 const TargetRegisterInfo *TRI;
33 const MachineRegisterInfo *MRI;
34 const TargetInstrInfo *TII;
35 BitVector LivePhysRegs;
38 static char ID; // Pass identification, replacement for typeid
39 DeadMachineInstructionElim() : MachineFunctionPass(ID) {
40 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
44 bool isDead(const MachineInstr *MI) const;
47 char DeadMachineInstructionElim::ID = 0;
48 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
50 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
51 "Remove dead machine instructions", false, false)
53 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
54 // Technically speaking inline asm without side effects and no defs can still
55 // be deleted. But there is so much bad inline asm code out there, we should
57 if (MI->isInlineAsm())
60 // Don't delete instructions with side effects.
61 bool SawStore = false;
62 if (!MI->isSafeToMove(TII, 0, SawStore) && !MI->isPHI())
65 // Examine each operand.
66 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
67 const MachineOperand &MO = MI->getOperand(i);
68 if (MO.isReg() && MO.isDef()) {
69 unsigned Reg = MO.getReg();
70 if (TargetRegisterInfo::isPhysicalRegister(Reg) ?
71 LivePhysRegs[Reg] : !MRI->use_nodbg_empty(Reg)) {
72 // This def has a non-debug use. Don't delete the instruction!
78 // If there are no defs with uses, the instruction is dead.
82 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
83 bool AnyChanges = false;
84 MRI = &MF.getRegInfo();
85 TRI = MF.getTarget().getRegisterInfo();
86 TII = MF.getTarget().getInstrInfo();
88 // Treat reserved registers as always live.
89 BitVector ReservedRegs = TRI->getReservedRegs(MF);
91 // Loop over all instructions in all blocks, from bottom to top, so that it's
92 // more likely that chains of dependent but ultimately dead instructions will
94 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
96 MachineBasicBlock *MBB = &*I;
98 // Start out assuming that reserved registers are live out of this block.
99 LivePhysRegs = ReservedRegs;
101 // Also add any explicit live-out physregs for this block.
102 if (!MBB->empty() && MBB->back().isReturn())
103 for (MachineRegisterInfo::liveout_iterator LOI = MRI->liveout_begin(),
104 LOE = MRI->liveout_end(); LOI != LOE; ++LOI) {
106 if (TargetRegisterInfo::isPhysicalRegister(Reg))
107 LivePhysRegs.set(Reg);
110 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
111 // live across blocks, but some targets (x86) can have flags live out of a
113 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
114 E = MBB->succ_end(); S != E; S++)
115 for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
116 LI != (*S)->livein_end(); LI++)
117 LivePhysRegs.set(*LI);
119 // Now scan the instructions and delete dead ones, tracking physreg
120 // liveness as we go.
121 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
122 MIE = MBB->rend(); MII != MIE; ) {
123 MachineInstr *MI = &*MII;
125 // If the instruction is dead, delete it!
127 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
128 // It is possible that some DBG_VALUE instructions refer to this
129 // instruction. Examine each def operand for such references;
130 // if found, mark the DBG_VALUE as undef (but don't delete it).
131 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
132 const MachineOperand &MO = MI->getOperand(i);
133 if (!MO.isReg() || !MO.isDef())
135 unsigned Reg = MO.getReg();
136 if (!TargetRegisterInfo::isVirtualRegister(Reg))
138 MachineRegisterInfo::use_iterator nextI;
139 for (MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg),
140 E = MRI->use_end(); I!=E; I=nextI) {
141 nextI = llvm::next(I); // I is invalidated by the setReg
142 MachineOperand& Use = I.getOperand();
143 MachineInstr *UseMI = Use.getParent();
146 assert(Use.isDebug());
147 UseMI->getOperand(0).setReg(0U);
151 MI->eraseFromParent();
154 // MII is now pointing to the next instruction to process,
155 // so don't increment it.
159 // Record the physreg defs.
160 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
161 const MachineOperand &MO = MI->getOperand(i);
162 if (MO.isReg() && MO.isDef()) {
163 unsigned Reg = MO.getReg();
164 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
165 LivePhysRegs.reset(Reg);
166 // Check the subreg set, not the alias set, because a def
167 // of a super-register may still be partially live after
169 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
171 LivePhysRegs.reset(*SubRegs);
173 } else if (MO.isRegMask()) {
174 // Register mask of preserved registers. All clobbers are dead.
175 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
176 LivePhysRegs |= ReservedRegs;
179 // Record the physreg uses, after the defs, in case a physreg is
180 // both defined and used in the same instruction.
181 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
182 const MachineOperand &MO = MI->getOperand(i);
183 if (MO.isReg() && MO.isUse()) {
184 unsigned Reg = MO.getReg();
185 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
186 LivePhysRegs.set(Reg);
187 for (const unsigned *AliasSet = TRI->getAliasSet(Reg);
188 *AliasSet; ++AliasSet)
189 LivePhysRegs.set(*AliasSet);
194 // We didn't delete the current instruction, so increment MII to
200 LivePhysRegs.clear();