1 //===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains support for writing dwarf compile unit.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
17 #include "llvm/Support/DataTypes.h"
23 class TargetRegisterInfo;
25 /// Base class containing the logic for constructing DWARF expressions
26 /// independently of whether they are emitted into a DIE or into a .debug_loc
28 class DwarfExpression {
31 // Various convenience accessors that extract things out of AsmPrinter.
32 const TargetRegisterInfo *getTRI() const;
33 unsigned getDwarfVersion() const;
36 DwarfExpression(const AsmPrinter &AP) : AP(AP) {}
37 virtual ~DwarfExpression() {}
39 virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
40 virtual void EmitSigned(int Value) = 0;
41 virtual void EmitUnsigned(unsigned Value) = 0;
43 virtual unsigned getFrameRegister() = 0;
45 /// Emit a dwarf register operation.
46 void AddReg(int DwarfReg, const char* Comment = nullptr);
47 /// Emit an (double-)indirect dwarf register operation.
48 void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
50 /// Emit a dwarf register operation for describing
51 /// - a small value occupying only part of a register or
52 /// - a register representing only part of a value.
53 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
54 /// Emit a shift-right dwarf expression.
55 void AddShr(unsigned ShiftBy);
57 /// Emit an indirect dwarf register operation for the given machine register.
58 /// Returns false if no DWARF register exists for MachineReg.
59 bool AddMachineRegIndirect(unsigned MachineReg, int Offset);
61 /// \brief Emit a partial DWARF register operation.
62 /// \param MLoc the register
63 /// \param PieceSize size and
64 /// \param PieceOffset offset of the piece in bits, if this is one
65 /// piece of an aggregate value.
67 /// If size and offset is zero an operation for the entire
68 /// register is emitted: Some targets do not provide a DWARF
69 /// register number for every register. If this is the case, this
70 /// function will attempt to emit a DWARF register by emitting a
71 /// piece of a super-register or by piecing together multiple
72 /// subregisters that alias the register.
73 void AddMachineRegPiece(unsigned MachineReg,
74 unsigned PieceSizeInBits = 0,
75 unsigned PieceOffsetInBits = 0);
77 /// Emit a signed constant.
78 void AddSignedConstant(int Value);
79 /// Emit an unsigned constant.
80 void AddUnsignedConstant(unsigned Value);
84 /// DwarfExpression implementation for .debug_loc entries.
85 class DebugLocDwarfExpression : public DwarfExpression {
89 DebugLocDwarfExpression(const AsmPrinter &AP, ByteStreamer &BS)
90 : DwarfExpression(AP), BS(BS) {}
92 void EmitOp(uint8_t Op, const char *Comment) override;
93 void EmitSigned(int Value) override;
94 void EmitUnsigned(unsigned Value) override;
95 unsigned getFrameRegister() override;