1 #ifndef __RKCAMSYS_HEAR_H__
2 #define __RKCAMSYS_HEAR_H__
4 #include <linux/ioctl.h>
7 * C A M S Y S H E A D F I L E V E R S I O N
12 * 1) modify camsys_irqcnnt_t;
14 * 1) add support cif phy for marvin;
16 * 1) add clock information in struct camsys_devio_name_s;
18 * 1) add pwren control
20 * 1) add support mipi phy configuration;
21 * 2) add support io domain and mclk driver strength configuration;
23 1) add flash_trigger_out control
27 1) add dev_name in struct camsys_devio_name_s;
29 1) support external flash IC
31 #define CAMSYS_HEAD_VERSION KERNEL_VERSION(0,0xa,0)
33 #define CAMSYS_MARVIN_DEVNAME "camsys_marvin"
34 #define CAMSYS_CIF0_DEVNAME "camsys_cif0"
35 #define CAMSYS_CIF1_DEVNAME "camsys_cif1"
37 #define CAMSYS_NAME_LEN 32
39 #define CAMSYS_DEVID_MARVIN 0x00000001
40 #define CAMSYS_DEVID_CIF_0 0x00000002
41 #define CAMSYS_DEVID_CIF_1 0x00000004
42 #define CAMSYS_DEVID_INTERNAL 0x000000FF
44 #define CAMSYS_DEVID_SENSOR_1A 0x01000000
45 #define CAMSYS_DEVID_SENSOR_1B 0x02000000
46 #define CAMSYS_DEVID_SENSOR_2 0x04000000
47 #define CAMSYS_DEVID_EXTERNAL 0xFF000000
48 #define CAMSYS_DEVID_EXTERNAL_NUM 8
50 #define CAMSYS_DEVCFG_FLASHLIGHT 0x00000001
51 #define CAMSYS_DEVCFG_PREFLASHLIGHT 0x00000002
52 #define CAMSYS_DEVCFG_SHUTTER 0x00000004
54 typedef struct camsys_irqsta_s {
55 unsigned int ris; //Raw interrupt status
56 unsigned int mis; //Masked interrupt status
59 typedef struct camsys_irqcnnt_s {
61 unsigned int timeout; //us
67 typedef enum camsys_mmap_type_e { //this type can be filled in mmap offset argument
68 CamSys_Mmap_RegisterMem,
74 typedef struct camsys_querymem_s {
75 camsys_mmap_type_t mem_type;
76 unsigned long mem_offset;
78 unsigned int mem_size;
81 typedef struct camsys_i2c_info_s {
82 unsigned char bus_num;
83 unsigned short slave_addr;
84 unsigned int reg_addr; //i2c device register address
85 unsigned int reg_size; //register address size
87 unsigned int val_size; //register value size
88 unsigned int i2cbuf_directly;
89 unsigned int i2cbuf_bytes;
90 unsigned int speed; //100000 == 100KHz
93 typedef struct camsys_reginfo_s {
94 unsigned int dev_mask;
95 unsigned int reg_offset;
99 typedef enum camsys_sysctrl_ops_e {
101 CamSys_Vdd_Start_Tag,
108 CamSys_Gpio_Start_Tag,
116 CamSys_Clk_Start_Tag,
120 CamSys_Phy_Start_Tag,
123 CamSys_Flash_Trigger_Start_Tag,
124 CamSys_Flash_Trigger,
125 CamSys_Flash_Trigger_End_Tag,
128 } camsys_sysctrl_ops_t;
130 typedef struct camsys_regulator_info_s {
131 unsigned char name[CAMSYS_NAME_LEN];
134 } camsys_regulator_info_t;
136 typedef struct camsys_gpio_info_s {
137 unsigned char name[CAMSYS_NAME_LEN];
139 } camsys_gpio_info_t;
141 typedef struct camsys_iommu_s{
144 unsigned long linear_addr;
148 typedef struct camsys_sysctrl_s {
149 unsigned int dev_mask;
150 camsys_sysctrl_ops_t ops;
153 unsigned int rev[20];
156 typedef struct camsys_flash_info_s {
157 unsigned char fl_drv_name[CAMSYS_NAME_LEN];
158 camsys_gpio_info_t fl; //fl_trig
159 camsys_gpio_info_t fl_en;
160 } camsys_flash_info_t;
162 typedef struct camsys_mipiphy_s {
163 unsigned int data_en_bit; // data lane enable bit;
164 unsigned int bit_rate; // Mbps/lane
165 unsigned int phy_index; // phy0,phy1
168 typedef enum camsys_fmt_e {
169 CamSys_Fmt_Yuv420_8b = 0x18,
170 CamSys_Fmt_Yuv420_10b = 0x19,
171 CamSys_Fmt_LegacyYuv420_8b = 0x19,
173 CamSys_Fmt_Yuv422_8b = 0x1e,
174 CamSys_Fmt_Yuv422_10b = 0x1f,
176 CamSys_Fmt_Raw_6b = 0x28,
177 CamSys_Fmt_Raw_7b = 0x29,
178 CamSys_Fmt_Raw_8b = 0x2a,
179 CamSys_Fmt_Raw_10b = 0x2b,
180 CamSys_Fmt_Raw_12b = 0x2c,
181 CamSys_Fmt_Raw_14b = 0x2d,
184 typedef enum camsys_cifio_e {
185 CamSys_SensorBit0_CifBit0 = 0x00,
186 CamSys_SensorBit0_CifBit2 = 0x01,
189 typedef struct camsys_cifphy_s {
190 unsigned int cif_num;
192 camsys_cifio_t cifio;
196 typedef enum camsys_phy_type_e {
203 typedef struct camsys_extdev_phy_s {
204 camsys_phy_type_t type;
206 camsys_mipiphy_t mipi;
210 } camsys_extdev_phy_t;
212 typedef struct camsys_extdev_clk_s {
213 unsigned int in_rate;
214 unsigned int driver_strength; //0 - 3
215 } camsys_extdev_clk_t;
217 typedef struct camsys_devio_name_s {
218 unsigned char dev_name[CAMSYS_NAME_LEN];
221 camsys_regulator_info_t avdd; // sensor avdd power regulator name
222 camsys_regulator_info_t dovdd; // sensor dovdd power regulator name
223 camsys_regulator_info_t dvdd; // sensor dvdd power regulator name "NC" describe no regulator
224 camsys_regulator_info_t afvdd;
226 camsys_gpio_info_t pwrdn; // standby gpio name
227 camsys_gpio_info_t rst; // hard reset gpio name
228 camsys_gpio_info_t afpwr; // auto focus vcm driver ic power gpio name
229 camsys_gpio_info_t afpwrdn; // auto focus vcm driver ic standby gpio
230 camsys_gpio_info_t pwren; // power enable gpio name
233 camsys_flash_info_t fl;
235 camsys_extdev_phy_t phy;
236 camsys_extdev_clk_t clk;
238 unsigned int dev_cfg; // function bit mask configuration
239 } camsys_devio_name_t;
241 typedef struct camsys_version_s {
242 unsigned int drv_ver;
243 unsigned int head_ver;
247 * I O C T L C O D E S F O R R O C K C H I P S C A M S Y S D E V I C E S
250 #define CAMSYS_IOC_MAGIC 'M'
251 #define CAMSYS_IOC_MAXNR 14
253 #define CAMSYS_VERCHK _IOR(CAMSYS_IOC_MAGIC, 0, camsys_version_t)
255 #define CAMSYS_I2CRD _IOWR(CAMSYS_IOC_MAGIC, 1, camsys_i2c_info_t)
256 #define CAMSYS_I2CWR _IOW(CAMSYS_IOC_MAGIC, 2, camsys_i2c_info_t)
258 #define CAMSYS_SYSCTRL _IOW(CAMSYS_IOC_MAGIC, 3, camsys_sysctrl_t)
259 #define CAMSYS_REGRD _IOWR(CAMSYS_IOC_MAGIC, 4, camsys_reginfo_t)
260 #define CAMSYS_REGWR _IOW(CAMSYS_IOC_MAGIC, 5, camsys_reginfo_t)
261 #define CAMSYS_REGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 6, camsys_devio_name_t)
262 #define CAMSYS_DEREGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 7, unsigned int)
263 #define CAMSYS_IRQCONNECT _IOW(CAMSYS_IOC_MAGIC, 8, camsys_irqcnnt_t)
264 #define CAMSYS_IRQWAIT _IOR(CAMSYS_IOC_MAGIC, 9, camsys_irqsta_t)
265 #define CAMSYS_IRQDISCONNECT _IOW(CAMSYS_IOC_MAGIC, 10, camsys_irqcnnt_t)
267 #define CAMSYS_QUREYMEM _IOR(CAMSYS_IOC_MAGIC, 11, camsys_querymem_t)
268 #define CAMSYS_QUREYIOMMU _IOW(CAMSYS_IOC_MAGIC, 12, int)