1 #ifndef __RKCAMSYS_HEAR_H__
2 #define __RKCAMSYS_HEAR_H__
4 #include <linux/ioctl.h>
7 * C A M S Y S H E A D F I L E V E R S I O N
12 * 1) modify camsys_irqcnnt_t;
14 * 1) add support cif phy for marvin;
16 * 1) add clock information in struct camsys_devio_name_s;
18 * 1) add pwren control
20 * 1) add support mipi phy configuration;
21 * 2) add support io domain and mclk driver strength configuration;
23 1) add flash_trigger_out control
27 1) add dev_name in struct camsys_devio_name_s;
29 #define CAMSYS_HEAD_VERSION KERNEL_VERSION(0,9,0)
31 #define CAMSYS_MARVIN_DEVNAME "camsys_marvin"
32 #define CAMSYS_CIF0_DEVNAME "camsys_cif0"
33 #define CAMSYS_CIF1_DEVNAME "camsys_cif1"
35 #define CAMSYS_NAME_LEN 32
37 #define CAMSYS_DEVID_MARVIN 0x00000001
38 #define CAMSYS_DEVID_CIF_0 0x00000002
39 #define CAMSYS_DEVID_CIF_1 0x00000004
40 #define CAMSYS_DEVID_INTERNAL 0x000000FF
42 #define CAMSYS_DEVID_SENSOR_1A 0x01000000
43 #define CAMSYS_DEVID_SENSOR_1B 0x02000000
44 #define CAMSYS_DEVID_SENSOR_2 0x04000000
45 #define CAMSYS_DEVID_EXTERNAL 0xFF000000
46 #define CAMSYS_DEVID_EXTERNAL_NUM 8
48 #define CAMSYS_DEVCFG_FLASHLIGHT 0x00000001
49 #define CAMSYS_DEVCFG_PREFLASHLIGHT 0x00000002
50 #define CAMSYS_DEVCFG_SHUTTER 0x00000004
52 typedef struct camsys_irqsta_s {
53 unsigned int ris; //Raw interrupt status
54 unsigned int mis; //Masked interrupt status
57 typedef struct camsys_irqcnnt_s {
59 unsigned int timeout; //us
65 typedef enum camsys_mmap_type_e { //this type can be filled in mmap offset argument
66 CamSys_Mmap_RegisterMem,
72 typedef struct camsys_querymem_s {
73 camsys_mmap_type_t mem_type;
74 unsigned long mem_offset;
76 unsigned int mem_size;
79 typedef struct camsys_i2c_info_s {
80 unsigned char bus_num;
81 unsigned short slave_addr;
82 unsigned int reg_addr; //i2c device register address
83 unsigned int reg_size; //register address size
85 unsigned int val_size; //register value size
86 unsigned int i2cbuf_directly;
87 unsigned int i2cbuf_bytes;
88 unsigned int speed; //100000 == 100KHz
91 typedef struct camsys_reginfo_s {
92 unsigned int dev_mask;
93 unsigned int reg_offset;
97 typedef enum camsys_sysctrl_ops_e {
106 CamSys_Gpio_Start_Tag,
114 CamSys_Clk_Start_Tag,
118 CamSys_Phy_Start_Tag,
121 CamSys_Flash_Trigger_Start_Tag,
122 CamSys_Flash_Trigger,
123 CamSys_Flash_Trigger_End_Tag,
126 } camsys_sysctrl_ops_t;
128 typedef struct camsys_regulator_info_s {
129 unsigned char name[CAMSYS_NAME_LEN];
132 } camsys_regulator_info_t;
134 typedef struct camsys_gpio_info_s {
135 unsigned char name[CAMSYS_NAME_LEN];
137 } camsys_gpio_info_t;
139 typedef struct camsys_iommu_s{
142 unsigned long linear_addr;
146 typedef struct camsys_sysctrl_s {
147 unsigned int dev_mask;
148 camsys_sysctrl_ops_t ops;
151 unsigned int rev[20];
154 typedef struct camsys_flash_info_s {
155 camsys_gpio_info_t fl;
156 } camsys_flash_info_t;
158 typedef struct camsys_mipiphy_s {
159 unsigned int data_en_bit; // data lane enable bit;
160 unsigned int bit_rate; // Mbps/lane
161 unsigned int phy_index; // phy0,phy1
164 typedef enum camsys_fmt_e {
165 CamSys_Fmt_Yuv420_8b = 0x18,
166 CamSys_Fmt_Yuv420_10b = 0x19,
167 CamSys_Fmt_LegacyYuv420_8b = 0x19,
169 CamSys_Fmt_Yuv422_8b = 0x1e,
170 CamSys_Fmt_Yuv422_10b = 0x1f,
172 CamSys_Fmt_Raw_6b = 0x28,
173 CamSys_Fmt_Raw_7b = 0x29,
174 CamSys_Fmt_Raw_8b = 0x2a,
175 CamSys_Fmt_Raw_10b = 0x2b,
176 CamSys_Fmt_Raw_12b = 0x2c,
177 CamSys_Fmt_Raw_14b = 0x2d,
180 typedef enum camsys_cifio_e {
181 CamSys_SensorBit0_CifBit0 = 0x00,
182 CamSys_SensorBit0_CifBit2 = 0x01,
185 typedef struct camsys_cifphy_s {
186 unsigned int cif_num;
188 camsys_cifio_t cifio;
192 typedef enum camsys_phy_type_e {
199 typedef struct camsys_extdev_phy_s {
200 camsys_phy_type_t type;
202 camsys_mipiphy_t mipi;
206 } camsys_extdev_phy_t;
208 typedef struct camsys_extdev_clk_s {
209 unsigned int in_rate;
210 unsigned int driver_strength; //0 - 3
211 } camsys_extdev_clk_t;
213 typedef struct camsys_devio_name_s {
214 unsigned char dev_name[CAMSYS_NAME_LEN];
217 camsys_regulator_info_t avdd; // sensor avdd power regulator name
218 camsys_regulator_info_t dovdd; // sensor dovdd power regulator name
219 camsys_regulator_info_t dvdd; // sensor dvdd power regulator name "NC" describe no regulator
220 camsys_regulator_info_t afvdd;
222 camsys_gpio_info_t pwrdn; // standby gpio name
223 camsys_gpio_info_t rst; // hard reset gpio name
224 camsys_gpio_info_t afpwr; // auto focus vcm driver ic power gpio name
225 camsys_gpio_info_t afpwrdn; // auto focus vcm driver ic standby gpio
226 camsys_gpio_info_t pwren; // power enable gpio name
229 camsys_flash_info_t fl;
231 camsys_extdev_phy_t phy;
232 camsys_extdev_clk_t clk;
234 unsigned int dev_cfg; // function bit mask configuration
235 } camsys_devio_name_t;
237 typedef struct camsys_version_s {
238 unsigned int drv_ver;
239 unsigned int head_ver;
243 * I O C T L C O D E S F O R R O C K C H I P S C A M S Y S D E V I C E S
246 #define CAMSYS_IOC_MAGIC 'M'
247 #define CAMSYS_IOC_MAXNR 14
249 #define CAMSYS_VERCHK _IOR(CAMSYS_IOC_MAGIC, 0, camsys_version_t)
251 #define CAMSYS_I2CRD _IOWR(CAMSYS_IOC_MAGIC, 1, camsys_i2c_info_t)
252 #define CAMSYS_I2CWR _IOW(CAMSYS_IOC_MAGIC, 2, camsys_i2c_info_t)
254 #define CAMSYS_SYSCTRL _IOW(CAMSYS_IOC_MAGIC, 3, camsys_sysctrl_t)
255 #define CAMSYS_REGRD _IOWR(CAMSYS_IOC_MAGIC, 4, camsys_reginfo_t)
256 #define CAMSYS_REGWR _IOW(CAMSYS_IOC_MAGIC, 5, camsys_reginfo_t)
257 #define CAMSYS_REGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 6, camsys_devio_name_t)
258 #define CAMSYS_DEREGISTER_DEVIO _IOW(CAMSYS_IOC_MAGIC, 7, unsigned int)
259 #define CAMSYS_IRQCONNECT _IOW(CAMSYS_IOC_MAGIC, 8, camsys_irqcnnt_t)
260 #define CAMSYS_IRQWAIT _IOR(CAMSYS_IOC_MAGIC, 9, camsys_irqsta_t)
261 #define CAMSYS_IRQDISCONNECT _IOW(CAMSYS_IOC_MAGIC, 10, camsys_irqcnnt_t)
263 #define CAMSYS_QUREYMEM _IOR(CAMSYS_IOC_MAGIC, 11, camsys_querymem_t)
264 #define CAMSYS_QUREYIOMMU _IOW(CAMSYS_IOC_MAGIC, 12, int)