1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
26 class TargetSubtarget;
27 class TargetInstrInfo;
28 class TargetIntrinsicInfo;
31 class TargetFrameInfo;
32 class MachineCodeEmitter;
34 class ObjectCodeEmitter;
35 class TargetRegisterInfo;
36 class PassManagerBase;
39 class TargetMachOWriterInfo;
40 class TargetELFWriterInfo;
41 class formatted_raw_ostream;
43 // Relocation model types.
48 PIC_, // Cannot be named PIC due to collision with -DPIC
74 // Code generation optimization level.
75 namespace CodeGenOpt {
84 //===----------------------------------------------------------------------===//
86 /// TargetMachine - Primary interface to the complete machine description for
87 /// the target machine. All target-specific information should be accessible
88 /// through this interface.
91 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
92 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
93 protected: // Can only create subclasses.
94 TargetMachine(const Target &);
96 /// getSubtargetImpl - virtual method implemented by subclasses that returns
97 /// a reference to that target's TargetSubtarget-derived member variable.
98 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
100 /// TheTarget - The Target that this machine was created for.
101 const Target &TheTarget;
103 /// AsmInfo - Contains target specific asm information.
105 const MCAsmInfo *AsmInfo;
108 virtual ~TargetMachine();
110 const Target &getTarget() const { return TheTarget; }
112 // Interfaces to the major aspects of target machine information:
113 // -- Instruction opcode and operand information
114 // -- Pipelines and scheduling information
115 // -- Stack frame information
116 // -- Selection DAG lowering information
118 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
119 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
120 virtual TargetLowering *getTargetLowering() const { return 0; }
121 virtual const TargetData *getTargetData() const { return 0; }
123 /// getMCAsmInfo - Return target specific asm information.
125 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
127 /// getSubtarget - This method returns a pointer to the specified type of
128 /// TargetSubtarget. In debug builds, it verifies that the object being
129 /// returned is of the correct type.
130 template<typename STC> const STC &getSubtarget() const {
131 const TargetSubtarget *TST = getSubtargetImpl();
132 assert(TST && dynamic_cast<const STC*>(TST) &&
133 "Not the right kind of subtarget!");
134 return *static_cast<const STC*>(TST);
137 /// getRegisterInfo - If register information is available, return it. If
138 /// not, return null. This is kept separate from RegInfo until RegInfo has
139 /// details of graph coloring register allocation removed from it.
141 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
143 /// getIntrinsicInfo - If intrinsic information is available, return it. If
144 /// not, return null.
146 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
148 /// getJITInfo - If this target supports a JIT, return information for it,
149 /// otherwise return null.
151 virtual TargetJITInfo *getJITInfo() { return 0; }
153 /// getInstrItineraryData - Returns instruction itinerary data for the target
154 /// or specific subtarget.
156 virtual const InstrItineraryData getInstrItineraryData() const {
157 return InstrItineraryData();
160 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
161 /// information for it, otherwise return null.
163 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
165 /// getELFWriterInfo - If this target supports an ELF writer, return
166 /// information for it, otherwise return null.
168 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
170 /// getRelocationModel - Returns the code generation relocation model. The
171 /// choices are static, PIC, and dynamic-no-pic, and target default.
172 static Reloc::Model getRelocationModel();
174 /// setRelocationModel - Sets the code generation relocation model.
176 static void setRelocationModel(Reloc::Model Model);
178 /// getCodeModel - Returns the code model. The choices are small, kernel,
179 /// medium, large, and target default.
180 static CodeModel::Model getCodeModel();
182 /// setCodeModel - Sets the code model.
184 static void setCodeModel(CodeModel::Model Model);
186 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
188 static bool getAsmVerbosityDefault();
190 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
192 static void setAsmVerbosityDefault(bool);
194 /// CodeGenFileType - These enums are meant to be passed into
195 /// addPassesToEmitFile to indicate what type of file to emit.
196 enum CodeGenFileType {
197 AssemblyFile, ObjectFile, DynamicLibrary
200 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
201 /// on this target. User flag overrides.
202 virtual bool getEnableTailMergeDefault() const { return true; }
204 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
205 /// specified file emitted. Typically this will involve several steps of code
207 /// This method should return FileModel::Error if emission of this file type
208 /// is not supported.
210 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
211 formatted_raw_ostream &,
214 return FileModel::None;
217 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
218 /// to be split up (e.g., to add an object writer pass), this method can be
219 /// used to finish up adding passes to emit the file, if necessary.
221 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
222 MachineCodeEmitter *,
227 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
228 /// to be split up (e.g., to add an object writer pass), this method can be
229 /// used to finish up adding passes to emit the file, if necessary.
231 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
237 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
238 /// to be split up (e.g., to add an object writer pass), this method can be
239 /// used to finish up adding passes to emit the file, if necessary.
241 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
247 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
248 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
249 /// actually outputting the machine code and resolving things like the address
250 /// of functions. This method returns true if machine code emission is
253 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
254 MachineCodeEmitter &,
259 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
260 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
261 /// actually outputting the machine code and resolving things like the address
262 /// of functions. This method returns true if machine code emission is
265 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
271 /// addPassesToEmitWholeFile - This method can be implemented by targets that
272 /// require having the entire module at once. This is not recommended, do not
274 virtual bool WantsWholeFile() const { return false; }
275 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
282 /// LLVMTargetMachine - This class describes a target machine that is
283 /// implemented with the LLVM target-independent code generator.
285 class LLVMTargetMachine : public TargetMachine {
286 protected: // Can only create subclasses.
287 LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
289 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
290 /// both emitting to assembly files or machine code output.
292 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
296 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
297 /// specified file emitted. Typically this will involve several steps of code
298 /// generation. If OptLevel is None, the code generator should emit code as fast
299 /// as possible, though the generated code may be less efficient. This method
300 /// should return FileModel::Error if emission of this file type is not
303 /// The default implementation of this method adds components from the
304 /// LLVM retargetable code generator, invoking the methods below to get
305 /// target-specific passes in standard locations.
307 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
308 formatted_raw_ostream &Out,
309 CodeGenFileType FileType,
312 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
313 /// to be split up (e.g., to add an object writer pass), this method can be
314 /// used to finish up adding passes to emit the file, if necessary.
316 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
317 MachineCodeEmitter *MCE,
320 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
321 /// to be split up (e.g., to add an object writer pass), this method can be
322 /// used to finish up adding passes to emit the file, if necessary.
324 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
328 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
329 /// to be split up (e.g., to add an object writer pass), this method can be
330 /// used to finish up adding passes to emit the file, if necessary.
332 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
333 ObjectCodeEmitter *OCE,
336 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
337 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
338 /// actually outputting the machine code and resolving things like the address
339 /// of functions. This method returns true if machine code emission is
342 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
343 MachineCodeEmitter &MCE,
346 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
347 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
348 /// actually outputting the machine code and resolving things like the address
349 /// of functions. This method returns true if machine code emission is
352 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
356 /// Target-Independent Code Generator Pass Configuration Options.
358 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
359 /// passes, then install an instruction selector pass, which converts from
360 /// LLVM code to machine instructions.
361 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
365 /// addPreRegAlloc - This method may be implemented by targets that want to
366 /// run passes immediately before register allocation. This should return
367 /// true if -print-machineinstrs should print after these passes.
368 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
372 /// addPostRegAlloc - This method may be implemented by targets that want
373 /// to run passes after register allocation but before prolog-epilog
374 /// insertion. This should return true if -print-machineinstrs should print
375 /// after these passes.
376 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
380 /// addPreSched2 - This method may be implemented by targets that want to
381 /// run passes after prolog-epilog insertion and before the second instruction
382 /// scheduling pass. This should return true if -print-machineinstrs should
383 /// print after these passes.
384 virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
388 /// addPreEmitPass - This pass may be implemented by targets that want to run
389 /// passes immediately before machine code is emitted. This should return
390 /// true if -print-machineinstrs should print out the code after the passes.
391 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
396 /// addCodeEmitter - This pass should be overridden by the target to add a
397 /// code emitter, if supported. If this is not supported, 'true' should be
399 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
400 MachineCodeEmitter &) {
404 /// addCodeEmitter - This pass should be overridden by the target to add a
405 /// code emitter, if supported. If this is not supported, 'true' should be
407 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
412 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
413 /// a code emitter (without setting flags), if supported. If this is not
414 /// supported, 'true' should be returned.
415 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
416 MachineCodeEmitter &) {
420 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
421 /// a code emitter (without setting flags), if supported. If this is not
422 /// supported, 'true' should be returned.
423 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
428 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
429 /// a code emitter (without setting flags), if supported. If this is not
430 /// supported, 'true' should be returned.
431 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
432 ObjectCodeEmitter &) {
436 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
437 /// on this target. User flag overrides.
438 virtual bool getEnableTailMergeDefault() const { return true; }
440 /// addAssemblyEmitter - Helper function which creates a target specific
441 /// assembly printer, if available.
443 /// \return Returns 'false' on success.
444 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
445 bool /* VerboseAsmDefault */,
446 formatted_raw_ostream &);
449 } // End llvm namespace