1 //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MCInst and MCOperand classes, which
11 // is the basic representation used to represent low-level machine code
14 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_MC_MCINST_H
18 #define LLVM_MC_MCINST_H
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/Support/DataTypes.h"
22 #include "llvm/Support/DebugLoc.h"
26 /// MCOperand - Instances of this class represent operands of the MCInst class.
27 /// This is a simple discriminated union.
29 enum MachineOperandType {
30 kInvalid, ///< Uninitialized.
31 kRegister, ///< Register operand.
32 kImmediate ///< Immediate operand.
42 MCOperand() : Kind(kInvalid) {}
43 MCOperand(const MCOperand &RHS) { *this = RHS; }
45 bool isReg() const { return Kind == kRegister; }
46 bool isImm() const { return Kind == kImmediate; }
48 /// getReg - Returns the register number.
49 unsigned getReg() const {
50 assert(isReg() && "This is not a register operand!");
54 /// setReg - Set the register number.
55 void setReg(unsigned Reg) {
56 assert(isReg() && "This is not a register operand!");
60 uint64_t getImm() const {
61 assert(isImm() && "This is not an immediate");
64 void setImm(uint64_t Val) {
65 assert(isImm() && "This is not an immediate");
69 void MakeReg(unsigned Reg) {
73 void MakeImm(uint64_t Val) {
80 /// MCInst - Instances of this class represent a single low-level machine
84 SmallVector<MCOperand, 8> Operands;
86 MCInst() : Opcode(~0U) {}
88 unsigned getOpcode() const { return Opcode; }
89 DebugLoc getDebugLoc() const { return DebugLoc(); }
91 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
96 } // end namespace llvm