1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
20 #include "llvm/Support/DataTypes.h"
21 #include "llvm/Support/Streams.h"
30 class MachineBasicBlock;
31 class TargetInstrDescriptor;
35 template <typename T> struct ilist_traits;
36 template <typename T> struct ilist;
38 //===----------------------------------------------------------------------===//
39 // class MachineOperand
41 // Representation of each machine instruction operand.
43 struct MachineOperand {
44 enum MachineOperandType {
45 MO_Register, // Register operand.
46 MO_Immediate, // Immediate Operand
47 MO_MachineBasicBlock, // MachineBasicBlock reference
48 MO_FrameIndex, // Abstract Stack Frame Index
49 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
50 MO_JumpTableIndex, // Address of indexed Jump Table for switch
51 MO_ExternalSymbol, // Name of external global symbol
52 MO_GlobalAddress // Address of a global value
57 GlobalValue *GV; // For MO_GlobalAddress.
58 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
59 const char *SymbolName; // For MO_ExternalSymbol.
60 unsigned RegNo; // For MO_Register.
61 int64_t immedVal; // For MO_Immediate and MO_*Index.
64 MachineOperandType opType:8; // Discriminate the union.
65 bool IsDef : 1; // True if this is a def, false if this is a use.
66 bool IsImp : 1; // True if this is an implicit def or use.
68 bool IsKill : 1; // True if this is a reg use and the reg is dead
69 // immediately after the read.
70 bool IsDead : 1; // True if this is a reg def and the reg is dead
71 // immediately after the write. i.e. A register
72 // that is defined but never used.
74 /// auxInfo - auxiliary information used by the MachineOperand
76 /// offset - Offset to address of global or external, only valid for
77 /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
80 /// subReg - SubRegister number, only valid for MO_Register. A value of 0
81 /// indicates the MO_Register has no subReg.
87 void print(std::ostream &os) const;
88 void print(std::ostream *os) const { if (os) print(*os); }
91 MachineOperand(const MachineOperand &M) {
97 static MachineOperand CreateImm(int64_t Val) {
99 Op.opType = MachineOperand::MO_Immediate;
100 Op.contents.immedVal = Val;
101 Op.auxInfo.offset = 0;
105 static MachineOperand CreateFrameIndex(unsigned Idx) {
107 Op.opType = MachineOperand::MO_FrameIndex;
108 Op.contents.immedVal = Idx;
109 Op.auxInfo.offset = 0;
113 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
114 bool isKill = false, bool isDead = false,
115 unsigned SubReg = 0) {
117 Op.opType = MachineOperand::MO_Register;
122 Op.contents.RegNo = Reg;
123 Op.auxInfo.subReg = SubReg;
127 const MachineOperand &operator=(const MachineOperand &MO) {
128 contents = MO.contents;
134 auxInfo = MO.auxInfo;
138 /// getType - Returns the MachineOperandType for this operand.
140 MachineOperandType getType() const { return opType; }
142 /// Accessors that tell you what kind of MachineOperand you're looking at.
144 bool isRegister() const { return opType == MO_Register; }
145 bool isImmediate() const { return opType == MO_Immediate; }
146 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
147 bool isFrameIndex() const { return opType == MO_FrameIndex; }
148 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
149 bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
150 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
151 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
153 int64_t getImm() const {
154 assert(isImmediate() && "Wrong MachineOperand accessor");
155 return contents.immedVal;
158 int64_t getImmedValue() const {
159 assert(isImmediate() && "Wrong MachineOperand accessor");
160 return contents.immedVal;
162 MachineBasicBlock *getMBB() const {
163 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
166 MachineBasicBlock *getMachineBasicBlock() const {
167 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
170 void setMachineBasicBlock(MachineBasicBlock *MBB) {
171 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
174 int getFrameIndex() const {
175 assert(isFrameIndex() && "Wrong MachineOperand accessor");
176 return (int)contents.immedVal;
178 unsigned getConstantPoolIndex() const {
179 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
180 return (unsigned)contents.immedVal;
182 unsigned getJumpTableIndex() const {
183 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
184 return (unsigned)contents.immedVal;
186 GlobalValue *getGlobal() const {
187 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
190 int getOffset() const {
191 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
192 "Wrong MachineOperand accessor");
193 return auxInfo.offset;
195 unsigned getSubReg() const {
196 assert(isRegister() && "Wrong MachineOperand accessor");
197 return (unsigned)auxInfo.subReg;
199 const char *getSymbolName() const {
200 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
201 return contents.SymbolName;
205 assert(isRegister() && "Wrong MachineOperand accessor");
209 assert(isRegister() && "Wrong MachineOperand accessor");
213 assert(isRegister() && "Wrong MachineOperand accessor");
217 assert(isRegister() && "Wrong MachineOperand accessor");
221 bool isImplicit() const {
222 assert(isRegister() && "Wrong MachineOperand accessor");
226 assert(isRegister() && "Wrong MachineOperand accessor");
230 bool isKill() const {
231 assert(isRegister() && "Wrong MachineOperand accessor");
234 bool isDead() const {
235 assert(isRegister() && "Wrong MachineOperand accessor");
239 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
243 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
247 assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
251 assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
255 /// getReg - Returns the register number.
257 unsigned getReg() const {
258 assert(isRegister() && "This is not a register operand!");
259 return contents.RegNo;
262 /// MachineOperand mutators.
264 void setReg(unsigned Reg) {
265 assert(isRegister() && "This is not a register operand!");
266 contents.RegNo = Reg;
269 void setImmedValue(int64_t immVal) {
270 assert(isImmediate() && "Wrong MachineOperand mutator");
271 contents.immedVal = immVal;
273 void setImm(int64_t immVal) {
274 assert(isImmediate() && "Wrong MachineOperand mutator");
275 contents.immedVal = immVal;
278 void setOffset(int Offset) {
279 assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
280 isJumpTableIndex()) &&
281 "Wrong MachineOperand accessor");
282 auxInfo.offset = Offset;
284 void setSubReg(unsigned subReg) {
285 assert(isRegister() && "Wrong MachineOperand accessor");
286 auxInfo.subReg = (unsigned char)subReg;
288 void setConstantPoolIndex(unsigned Idx) {
289 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
290 contents.immedVal = Idx;
292 void setJumpTableIndex(unsigned Idx) {
293 assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
294 contents.immedVal = Idx;
297 /// isIdenticalTo - Return true if this operand is identical to the specified
298 /// operand. Note: This method ignores isKill and isDead properties.
299 bool isIdenticalTo(const MachineOperand &Other) const;
301 /// ChangeToImmediate - Replace this operand with a new immediate operand of
302 /// the specified value. If an operand is known to be an immediate already,
303 /// the setImmedValue method should be used.
304 void ChangeToImmediate(int64_t ImmVal) {
305 opType = MO_Immediate;
306 contents.immedVal = ImmVal;
309 /// ChangeToRegister - Replace this operand with a new register operand of
310 /// the specified value. If an operand is known to be an register already,
311 /// the setReg method should be used.
312 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
313 bool isKill = false, bool isDead = false) {
314 opType = MO_Register;
315 contents.RegNo = Reg;
322 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop) {
327 friend class MachineInstr;
331 //===----------------------------------------------------------------------===//
332 /// MachineInstr - Representation of each machine instruction.
335 const TargetInstrDescriptor *TID; // Instruction descriptor.
336 unsigned short NumImplicitOps; // Number of implicit operands (which
337 // are determined at construction time).
339 std::vector<MachineOperand> Operands; // the operands
340 MachineInstr* prev, *next; // links for our intrusive list
341 MachineBasicBlock* parent; // pointer to the owning basic block
343 // OperandComplete - Return true if it's illegal to add a new operand
344 bool OperandsComplete() const;
346 MachineInstr(const MachineInstr&);
347 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
349 // Intrusive list support
350 friend struct ilist_traits<MachineInstr>;
353 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
354 /// TID NULL and no operands.
357 /// MachineInstr ctor - This constructor create a MachineInstr and add the
358 /// implicit operands. It reserves space for number of operands specified by
359 /// TargetInstrDescriptor.
360 explicit MachineInstr(const TargetInstrDescriptor &TID, bool NoImp = false);
362 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
363 /// the MachineInstr is created and added to the end of the specified basic
366 MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
370 const MachineBasicBlock* getParent() const { return parent; }
371 MachineBasicBlock* getParent() { return parent; }
373 /// getInstrDescriptor - Returns the target instruction descriptor of this
375 const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
377 /// getOpcode - Returns the opcode of this MachineInstr.
379 int getOpcode() const;
381 /// Access to explicit operands of the instruction.
383 unsigned getNumOperands() const { return Operands.size(); }
385 const MachineOperand& getOperand(unsigned i) const {
386 assert(i < getNumOperands() && "getOperand() out of range!");
389 MachineOperand& getOperand(unsigned i) {
390 assert(i < getNumOperands() && "getOperand() out of range!");
394 /// getNumExplicitOperands - Returns the number of non-implicit operands.
396 unsigned getNumExplicitOperands() const;
398 /// isIdenticalTo - Return true if this instruction is identical to (same
399 /// opcode and same operands as) the specified instruction.
400 bool isIdenticalTo(const MachineInstr *Other) const {
401 if (Other->getOpcode() != getOpcode() ||
402 Other->getNumOperands() != getNumOperands())
404 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
405 if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
410 /// clone - Create a copy of 'this' instruction that is identical in
411 /// all ways except the the instruction has no parent, prev, or next.
412 MachineInstr* clone() const { return new MachineInstr(*this); }
414 /// removeFromParent - This method unlinks 'this' from the containing basic
415 /// block, and returns it, but does not delete it.
416 MachineInstr *removeFromParent();
418 /// eraseFromParent - This method unlinks 'this' from the containing basic
419 /// block and deletes it.
420 void eraseFromParent() {
421 delete removeFromParent();
424 /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
425 /// the specific register or -1 if it is not found. It further tightening
426 /// the search criteria to a use that kills the register if isKill is true.
427 int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
429 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
430 /// the specific register or NULL if it is not found.
431 MachineOperand *findRegisterDefOperand(unsigned Reg);
433 /// findFirstPredOperandIdx() - Find the index of the first operand in the
434 /// operand list that is used to represent the predicate. It returns -1 if
436 int findFirstPredOperandIdx() const;
438 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
439 /// to two addr elimination.
440 bool isRegReDefinedByTwoAddr(unsigned Reg) const;
442 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
444 void copyKillDeadInfo(const MachineInstr *MI);
446 /// copyPredicates - Copies predicate operand(s) from MI.
447 void copyPredicates(const MachineInstr *MI);
452 void print(std::ostream *OS, const TargetMachine *TM) const {
453 if (OS) print(*OS, TM);
455 void print(std::ostream &OS, const TargetMachine *TM) const;
456 void print(std::ostream &OS) const;
457 void print(std::ostream *OS) const { if (OS) print(*OS); }
459 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr){
464 //===--------------------------------------------------------------------===//
465 // Accessors to add operands when building up machine instructions.
468 /// addRegOperand - Add a register operand.
470 void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
471 bool IsKill = false, bool IsDead = false,
472 unsigned SubReg = 0) {
473 // FIXME: Make the AddNewOperand api sane.
474 AddNewOperand(IsImp) = MachineOperand::CreateReg(Reg, IsDef, IsImp, IsKill,
478 /// addImmOperand - Add a zero extended constant argument to the
479 /// machine instruction.
481 void addImmOperand(int64_t Val) {
482 // FIXME: Make the AddNewOperand api sane.
483 AddNewOperand() = MachineOperand::CreateImm(Val);
486 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
487 MachineOperand &Op = AddNewOperand();
488 Op.opType = MachineOperand::MO_MachineBasicBlock;
489 Op.contents.MBB = MBB;
490 Op.auxInfo.offset = 0;
493 /// addFrameIndexOperand - Add an abstract frame index to the instruction
495 void addFrameIndexOperand(unsigned Idx) {
496 // FIXME: Make the AddNewOperand api sane.
497 AddNewOperand() = MachineOperand::CreateFrameIndex(Idx);
500 /// addConstantPoolndexOperand - Add a constant pool object index to the
503 void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
504 MachineOperand &Op = AddNewOperand();
505 Op.opType = MachineOperand::MO_ConstantPoolIndex;
506 Op.contents.immedVal = Idx;
507 Op.auxInfo.offset = Offset;
510 /// addJumpTableIndexOperand - Add a jump table object index to the
513 void addJumpTableIndexOperand(unsigned Idx) {
514 MachineOperand &Op = AddNewOperand();
515 Op.opType = MachineOperand::MO_JumpTableIndex;
516 Op.contents.immedVal = Idx;
517 Op.auxInfo.offset = 0;
520 void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
521 MachineOperand &Op = AddNewOperand();
522 Op.opType = MachineOperand::MO_GlobalAddress;
524 Op.auxInfo.offset = Offset;
527 /// addExternalSymbolOperand - Add an external symbol operand to this instr
529 void addExternalSymbolOperand(const char *SymName) {
530 MachineOperand &Op = AddNewOperand();
531 Op.opType = MachineOperand::MO_ExternalSymbol;
532 Op.contents.SymbolName = SymName;
533 Op.auxInfo.offset = 0;
536 //===--------------------------------------------------------------------===//
537 // Accessors used to modify instructions in place.
540 /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
541 /// the current instruction with a new one.
543 void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
545 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
546 /// fewer operand than it started with.
548 void RemoveOperand(unsigned i) {
549 Operands.erase(Operands.begin()+i);
552 MachineOperand &AddNewOperand(bool IsImp = false) {
553 assert((IsImp || !OperandsComplete()) &&
554 "Trying to add an operand to a machine instr that is already done!");
555 if (IsImp || NumImplicitOps == 0) { // This is true most of the time.
556 Operands.push_back(MachineOperand());
557 return Operands.back();
559 return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
563 /// addImplicitDefUseOperands - Add all implicit def and use operands to
564 /// this instruction.
565 void addImplicitDefUseOperands();
568 //===----------------------------------------------------------------------===//
571 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
572 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
574 } // End llvm namespace