2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
25 * INTERFACES between SPI master-side drivers and SPI infrastructure.
26 * (There's no SPI slave support for Linux yet...)
28 extern struct bus_type spi_bus_type;
31 * struct spi_device - Master side proxy for an SPI slave device
32 * @dev: Driver model representation of the device.
33 * @master: SPI controller used with the device.
34 * @max_speed_hz: Maximum clock rate to be used with this chip
35 * (on this board); may be changed by the device's driver.
36 * The spi_transfer.speed_hz can override this for each transfer.
37 * @chip_select: Chipselect, distinguishing chips handled by @master.
38 * @mode: The spi mode defines how data is clocked out and in.
39 * This may be changed by the device's driver.
40 * The "active low" default for chipselect mode can be overridden
41 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
42 * each word in a transfer (by specifying SPI_LSB_FIRST).
43 * @bits_per_word: Data transfers involve one or more words; word sizes
44 * like eight or 12 bits are common. In-memory wordsizes are
45 * powers of two bytes (e.g. 20 bit samples use 32 bits).
46 * This may be changed by the device's driver, or left at the
47 * default (0) indicating protocol words are eight bit bytes.
48 * The spi_transfer.bits_per_word can override this for each transfer.
49 * @irq: Negative, or the number passed to request_irq() to receive
50 * interrupts from this device.
51 * @controller_state: Controller's runtime state
52 * @controller_data: Board-specific definitions for controller, such as
53 * FIFO initialization parameters; from board_info.controller_data
54 * @modalias: Name of the driver to use with this device, or an alias
55 * for that name. This appears in the sysfs "modalias" attribute
56 * for driver coldplugging, and in uevents used for hotplugging
58 * A @spi_device is used to interchange data between an SPI slave
59 * (usually a discrete chip) and CPU memory.
61 * In @dev, the platform_data is used to hold information about this
62 * device that's meaningful to the device's protocol driver, but not
63 * to its controller. One example might be an identifier for a chip
64 * variant with slightly different functionality; another might be
65 * information about how this particular board wires the chip's pins.
69 struct spi_master *master;
73 #define SPI_CPHA 0x01 /* clock phase */
74 #define SPI_CPOL 0x02 /* clock polarity */
75 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
76 #define SPI_MODE_1 (0|SPI_CPHA)
77 #define SPI_MODE_2 (SPI_CPOL|0)
78 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
79 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
80 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
81 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
82 #define SPI_LOOP 0x20 /* loopback mode */
83 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
84 #define SPI_READY 0x80 /* slave pulls low to pause */
87 void *controller_state;
88 void *controller_data;
92 * likely need more hooks for more protocol options affecting how
93 * the controller talks to each chip, like:
94 * - memory packing (12 bit samples into low bits, others zeroed)
96 * - drop chipselect after each word
102 static inline struct spi_device *to_spi_device(struct device *dev)
104 return dev ? container_of(dev, struct spi_device, dev) : NULL;
107 /* most drivers won't need to care about device refcounting */
108 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
110 return (spi && get_device(&spi->dev)) ? spi : NULL;
113 static inline void spi_dev_put(struct spi_device *spi)
116 put_device(&spi->dev);
119 /* ctldata is for the bus_master driver's runtime state */
120 static inline void *spi_get_ctldata(struct spi_device *spi)
122 return spi->controller_state;
125 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
127 spi->controller_state = state;
130 /* device driver data */
132 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
134 dev_set_drvdata(&spi->dev, data);
137 static inline void *spi_get_drvdata(struct spi_device *spi)
139 return dev_get_drvdata(&spi->dev);
147 * struct spi_driver - Host side "protocol" driver
148 * @probe: Binds this driver to the spi device. Drivers can verify
149 * that the device is actually present, and may need to configure
150 * characteristics (such as bits_per_word) which weren't needed for
151 * the initial configuration done during system setup.
152 * @remove: Unbinds this driver from the spi device
153 * @shutdown: Standard shutdown callback used during system state
154 * transitions such as powerdown/halt and kexec
155 * @suspend: Standard suspend callback used during system state transitions
156 * @resume: Standard resume callback used during system state transitions
157 * @driver: SPI device drivers should initialize the name and owner
158 * field of this structure.
160 * This represents the kind of device driver that uses SPI messages to
161 * interact with the hardware at the other end of a SPI link. It's called
162 * a "protocol" driver because it works through messages rather than talking
163 * directly to SPI hardware (which is what the underlying SPI controller
164 * driver does to pass those messages). These protocols are defined in the
165 * specification for the device(s) supported by the driver.
167 * As a rule, those device protocols represent the lowest level interface
168 * supported by a driver, and it will support upper level interfaces too.
169 * Examples of such upper levels include frameworks like MTD, networking,
170 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
173 int (*probe)(struct spi_device *spi);
174 int (*remove)(struct spi_device *spi);
175 void (*shutdown)(struct spi_device *spi);
176 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
177 int (*resume)(struct spi_device *spi);
178 struct device_driver driver;
181 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
183 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
186 extern int spi_register_driver(struct spi_driver *sdrv);
189 * spi_unregister_driver - reverse effect of spi_register_driver
190 * @sdrv: the driver to unregister
193 static inline void spi_unregister_driver(struct spi_driver *sdrv)
196 driver_unregister(&sdrv->driver);
201 * struct spi_master - interface to SPI master controller
202 * @dev: device interface to this driver
203 * @bus_num: board-specific (and often SOC-specific) identifier for a
204 * given SPI controller.
205 * @num_chipselect: chipselects are used to distinguish individual
206 * SPI slaves, and are numbered from zero to num_chipselects.
207 * each slave has a chipselect signal, but it's common that not
208 * every chipselect is connected to a slave.
209 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
210 * @setup: updates the device mode and clocking records used by a
211 * device's SPI controller; protocol code may call this. This
212 * must fail if an unrecognized or unsupported mode is requested.
213 * It's always safe to call this unless transfers are pending on
214 * the device whose settings are being modified.
215 * @transfer: adds a message to the controller's transfer queue.
216 * @cleanup: frees controller-specific state
218 * Each SPI master controller can communicate with one or more @spi_device
219 * children. These make a small bus, sharing MOSI, MISO and SCK signals
220 * but not chip select signals. Each device may be configured to use a
221 * different clock rate, since those shared signals are ignored unless
222 * the chip is selected.
224 * The driver for an SPI controller manages access to those devices through
225 * a queue of spi_message transactions, copying data between CPU memory and
226 * an SPI slave device. For each such message it queues, it calls the
227 * message's completion function when the transaction completes.
232 /* other than negative (== assign one dynamically), bus_num is fully
233 * board-specific. usually that simplifies to being SOC-specific.
234 * example: one SOC has three SPI controllers, numbered 0..2,
235 * and one board's schematics might show it using SPI-2. software
236 * would normally use bus_num=2 for that controller.
240 /* chipselects will be integral to many controllers; some others
241 * might use board-specific GPIOs.
245 /* some SPI controllers pose alignment requirements on DMAable
246 * buffers; let protocol drivers know about these requirements.
250 /* spi_device.mode flags understood by this controller driver */
253 /* Setup mode and clock, etc (spi driver may call many times).
255 * IMPORTANT: this may be called when transfers to another
256 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
257 * which could break those transfers.
259 int (*setup)(struct spi_device *spi);
261 /* bidirectional bulk transfers
263 * + The transfer() method may not sleep; its main role is
264 * just to add the message to the queue.
265 * + For now there's no remove-from-queue operation, or
266 * any other request management
267 * + To a given spi_device, message queueing is pure fifo
269 * + The master's main job is to process its message queue,
270 * selecting a chip then transferring data
271 * + If there are multiple spi_device children, the i/o queue
272 * arbitration algorithm is unspecified (round robin, fifo,
273 * priority, reservations, preemption, etc)
275 * + Chipselect stays active during the entire message
276 * (unless modified by spi_transfer.cs_change != 0).
277 * + The message transfers use clock and SPI mode parameters
278 * previously established by setup() for this device
280 int (*transfer)(struct spi_device *spi,
281 struct spi_message *mesg);
283 /* called on release() to free memory provided by spi_master */
284 void (*cleanup)(struct spi_device *spi);
287 static inline void *spi_master_get_devdata(struct spi_master *master)
289 return dev_get_drvdata(&master->dev);
292 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
294 dev_set_drvdata(&master->dev, data);
297 static inline struct spi_master *spi_master_get(struct spi_master *master)
299 if (!master || !get_device(&master->dev))
304 static inline void spi_master_put(struct spi_master *master)
307 put_device(&master->dev);
311 /* the spi driver core manages memory for the spi_master classdev */
312 extern struct spi_master *
313 spi_alloc_master(struct device *host, unsigned size);
315 extern int spi_register_master(struct spi_master *master);
316 extern void spi_unregister_master(struct spi_master *master);
318 extern struct spi_master *spi_busnum_to_master(u16 busnum);
320 /*---------------------------------------------------------------------------*/
323 * I/O INTERFACE between SPI controller and protocol drivers
325 * Protocol drivers use a queue of spi_messages, each transferring data
326 * between the controller and memory buffers.
328 * The spi_messages themselves consist of a series of read+write transfer
329 * segments. Those segments always read the same number of bits as they
330 * write; but one or the other is easily ignored by passing a null buffer
331 * pointer. (This is unlike most types of I/O API, because SPI hardware
334 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
335 * up to the protocol driver, which guarantees the integrity of both (as
336 * well as the data buffers) for as long as the message is queued.
340 * struct spi_transfer - a read/write buffer pair
341 * @tx_buf: data to be written (dma-safe memory), or NULL
342 * @rx_buf: data to be read (dma-safe memory), or NULL
343 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
344 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
345 * @len: size of rx and tx buffers (in bytes)
346 * @speed_hz: Select a speed other than the device default for this
347 * transfer. If 0 the default (from @spi_device) is used.
348 * @bits_per_word: select a bits_per_word other than the device default
349 * for this transfer. If 0 the default (from @spi_device) is used.
350 * @cs_change: affects chipselect after this transfer completes
351 * @delay_usecs: microseconds to delay after this transfer before
352 * (optionally) changing the chipselect status, then starting
353 * the next transfer or completing this @spi_message.
354 * @transfer_list: transfers are sequenced through @spi_message.transfers
356 * SPI transfers always write the same number of bytes as they read.
357 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
358 * In some cases, they may also want to provide DMA addresses for
359 * the data being transferred; that may reduce overhead, when the
360 * underlying driver uses dma.
362 * If the transmit buffer is null, zeroes will be shifted out
363 * while filling @rx_buf. If the receive buffer is null, the data
364 * shifted in will be discarded. Only "len" bytes shift out (or in).
365 * It's an error to try to shift out a partial word. (For example, by
366 * shifting out three bytes with word size of sixteen or twenty bits;
367 * the former uses two bytes per word, the latter uses four bytes.)
369 * In-memory data values are always in native CPU byte order, translated
370 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
371 * for example when bits_per_word is sixteen, buffers are 2N bytes long
372 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
374 * When the word size of the SPI transfer is not a power-of-two multiple
375 * of eight bits, those in-memory words include extra bits. In-memory
376 * words are always seen by protocol drivers as right-justified, so the
377 * undefined (rx) or unused (tx) bits are always the most significant bits.
379 * All SPI transfers start with the relevant chipselect active. Normally
380 * it stays selected until after the last transfer in a message. Drivers
381 * can affect the chipselect signal using cs_change.
383 * (i) If the transfer isn't the last one in the message, this flag is
384 * used to make the chipselect briefly go inactive in the middle of the
385 * message. Toggling chipselect in this way may be needed to terminate
386 * a chip command, letting a single spi_message perform all of group of
387 * chip transactions together.
389 * (ii) When the transfer is the last one in the message, the chip may
390 * stay selected until the next transfer. On multi-device SPI busses
391 * with nothing blocking messages going to other devices, this is just
392 * a performance hint; starting a message to another device deselects
393 * this one. But in other cases, this can be used to ensure correctness.
394 * Some devices need protocol transactions to be built from a series of
395 * spi_message submissions, where the content of one message is determined
396 * by the results of previous messages and where the whole transaction
397 * ends when the chipselect goes intactive.
399 * The code that submits an spi_message (and its spi_transfers)
400 * to the lower layers is responsible for managing its memory.
401 * Zero-initialize every field you don't set up explicitly, to
402 * insulate against future API updates. After you submit a message
403 * and its transfers, ignore them until its completion callback.
405 struct spi_transfer {
406 /* it's ok if tx_buf == rx_buf (right?)
407 * for MicroWire, one buffer must be null
408 * buffers must work with dma_*map_single() calls, unless
409 * spi_message.is_dma_mapped reports a pre-existing mapping
418 unsigned cs_change:1;
423 struct list_head transfer_list;
427 * struct spi_message - one multi-segment SPI transaction
428 * @transfers: list of transfer segments in this transaction
429 * @spi: SPI device to which the transaction is queued
430 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
431 * addresses for each transfer buffer
432 * @complete: called to report transaction completions
433 * @context: the argument to complete() when it's called
434 * @actual_length: the total number of bytes that were transferred in all
435 * successful segments
436 * @status: zero for success, else negative errno
437 * @queue: for use by whichever driver currently owns the message
438 * @state: for use by whichever driver currently owns the message
440 * A @spi_message is used to execute an atomic sequence of data transfers,
441 * each represented by a struct spi_transfer. The sequence is "atomic"
442 * in the sense that no other spi_message may use that SPI bus until that
443 * sequence completes. On some systems, many such sequences can execute as
444 * as single programmed DMA transfer. On all systems, these messages are
445 * queued, and might complete after transactions to other devices. Messages
446 * sent to a given spi_device are alway executed in FIFO order.
448 * The code that submits an spi_message (and its spi_transfers)
449 * to the lower layers is responsible for managing its memory.
450 * Zero-initialize every field you don't set up explicitly, to
451 * insulate against future API updates. After you submit a message
452 * and its transfers, ignore them until its completion callback.
455 struct list_head transfers;
457 struct spi_device *spi;
459 unsigned is_dma_mapped:1;
461 /* REVISIT: we might want a flag affecting the behavior of the
462 * last transfer ... allowing things like "read 16 bit length L"
463 * immediately followed by "read L bytes". Basically imposing
464 * a specific message scheduling algorithm.
466 * Some controller drivers (message-at-a-time queue processing)
467 * could provide that as their default scheduling algorithm. But
468 * others (with multi-message pipelines) could need a flag to
469 * tell them about such special cases.
472 /* completion is reported through a callback */
473 void (*complete)(void *context);
475 unsigned actual_length;
478 /* for optional use by whatever driver currently owns the
479 * spi_message ... between calls to spi_async and then later
480 * complete(), that's the spi_master controller driver.
482 struct list_head queue;
486 static inline void spi_message_init(struct spi_message *m)
488 memset(m, 0, sizeof *m);
489 INIT_LIST_HEAD(&m->transfers);
493 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
495 list_add_tail(&t->transfer_list, &m->transfers);
499 spi_transfer_del(struct spi_transfer *t)
501 list_del(&t->transfer_list);
504 /* It's fine to embed message and transaction structures in other data
505 * structures so long as you don't free them while they're in use.
508 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
510 struct spi_message *m;
512 m = kzalloc(sizeof(struct spi_message)
513 + ntrans * sizeof(struct spi_transfer),
517 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
519 INIT_LIST_HEAD(&m->transfers);
520 for (i = 0; i < ntrans; i++, t++)
521 spi_message_add_tail(t, m);
526 static inline void spi_message_free(struct spi_message *m)
531 extern int spi_setup(struct spi_device *spi);
534 * spi_async - asynchronous SPI transfer
535 * @spi: device with which data will be exchanged
536 * @message: describes the data transfers, including completion callback
537 * Context: any (irqs may be blocked, etc)
539 * This call may be used in_irq and other contexts which can't sleep,
540 * as well as from task contexts which can sleep.
542 * The completion callback is invoked in a context which can't sleep.
543 * Before that invocation, the value of message->status is undefined.
544 * When the callback is issued, message->status holds either zero (to
545 * indicate complete success) or a negative error code. After that
546 * callback returns, the driver which issued the transfer request may
547 * deallocate the associated memory; it's no longer in use by any SPI
548 * core or controller driver code.
550 * Note that although all messages to a spi_device are handled in
551 * FIFO order, messages may go to different devices in other orders.
552 * Some device might be higher priority, or have various "hard" access
553 * time requirements, for example.
555 * On detection of any fault during the transfer, processing of
556 * the entire message is aborted, and the device is deselected.
557 * Until returning from the associated message completion callback,
558 * no other spi_message queued to that device will be processed.
559 * (This rule applies equally to all the synchronous transfer calls,
560 * which are wrappers around this core asynchronous primitive.)
563 spi_async(struct spi_device *spi, struct spi_message *message)
566 return spi->master->transfer(spi, message);
569 /*---------------------------------------------------------------------------*/
571 /* All these synchronous SPI transfer routines are utilities layered
572 * over the core async transfer primitive. Here, "synchronous" means
573 * they will sleep uninterruptibly until the async transfer completes.
576 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
579 * spi_write - SPI synchronous write
580 * @spi: device to which data will be written
582 * @len: data buffer size
585 * This writes the buffer and returns zero or a negative error code.
586 * Callable only from contexts that can sleep.
589 spi_write(struct spi_device *spi, const u8 *buf, size_t len)
591 struct spi_transfer t = {
595 struct spi_message m;
597 spi_message_init(&m);
598 spi_message_add_tail(&t, &m);
599 return spi_sync(spi, &m);
603 * spi_read - SPI synchronous read
604 * @spi: device from which data will be read
606 * @len: data buffer size
609 * This reads the buffer and returns zero or a negative error code.
610 * Callable only from contexts that can sleep.
613 spi_read(struct spi_device *spi, u8 *buf, size_t len)
615 struct spi_transfer t = {
619 struct spi_message m;
621 spi_message_init(&m);
622 spi_message_add_tail(&t, &m);
623 return spi_sync(spi, &m);
626 /* this copies txbuf and rxbuf data; for small transfers only! */
627 extern int spi_write_then_read(struct spi_device *spi,
628 const u8 *txbuf, unsigned n_tx,
629 u8 *rxbuf, unsigned n_rx);
632 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
633 * @spi: device with which data will be exchanged
634 * @cmd: command to be written before data is read back
637 * This returns the (unsigned) eight bit number returned by the
638 * device, or else a negative error code. Callable only from
639 * contexts that can sleep.
641 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
646 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
648 /* return negative errno or unsigned value */
649 return (status < 0) ? status : result;
653 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
654 * @spi: device with which data will be exchanged
655 * @cmd: command to be written before data is read back
658 * This returns the (unsigned) sixteen bit number returned by the
659 * device, or else a negative error code. Callable only from
660 * contexts that can sleep.
662 * The number is returned in wire-order, which is at least sometimes
665 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
670 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
672 /* return negative errno or unsigned value */
673 return (status < 0) ? status : result;
676 /*---------------------------------------------------------------------------*/
679 * INTERFACE between board init code and SPI infrastructure.
681 * No SPI driver ever sees these SPI device table segments, but
682 * it's how the SPI core (or adapters that get hotplugged) grows
683 * the driver model tree.
685 * As a rule, SPI devices can't be probed. Instead, board init code
686 * provides a table listing the devices which are present, with enough
687 * information to bind and set up the device's driver. There's basic
688 * support for nonstatic configurations too; enough to handle adding
689 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
693 * struct spi_board_info - board-specific template for a SPI device
694 * @modalias: Initializes spi_device.modalias; identifies the driver.
695 * @platform_data: Initializes spi_device.platform_data; the particular
696 * data stored there is driver-specific.
697 * @controller_data: Initializes spi_device.controller_data; some
698 * controllers need hints about hardware setup, e.g. for DMA.
699 * @irq: Initializes spi_device.irq; depends on how the board is wired.
700 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
701 * from the chip datasheet and board-specific signal quality issues.
702 * @bus_num: Identifies which spi_master parents the spi_device; unused
703 * by spi_new_device(), and otherwise depends on board wiring.
704 * @chip_select: Initializes spi_device.chip_select; depends on how
705 * the board is wired.
706 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
707 * wiring (some devices support both 3WIRE and standard modes), and
708 * possibly presence of an inverter in the chipselect path.
710 * When adding new SPI devices to the device tree, these structures serve
711 * as a partial device template. They hold information which can't always
712 * be determined by drivers. Information that probe() can establish (such
713 * as the default transfer wordsize) is not included here.
715 * These structures are used in two places. Their primary role is to
716 * be stored in tables of board-specific device descriptors, which are
717 * declared early in board initialization and then used (much later) to
718 * populate a controller's device tree after the that controller's driver
719 * initializes. A secondary (and atypical) role is as a parameter to
720 * spi_new_device() call, which happens after those controller drivers
721 * are active in some dynamic board configuration models.
723 struct spi_board_info {
724 /* the device name and module name are coupled, like platform_bus;
725 * "modalias" is normally the driver name.
727 * platform_data goes to spi_device.dev.platform_data,
728 * controller_data goes to spi_device.controller_data,
732 const void *platform_data;
733 void *controller_data;
736 /* slower signaling on noisy or low voltage boards */
740 /* bus_num is board specific and matches the bus_num of some
741 * spi_master that will probably be registered later.
743 * chip_select reflects how this chip is wired to that master;
744 * it's less than num_chipselect.
749 /* mode becomes spi_device.mode, and is essential for chips
750 * where the default of SPI_CS_HIGH = 0 is wrong.
754 /* ... may need additional spi_device chip config data here.
755 * avoid stuff protocol drivers can set; but include stuff
756 * needed to behave without being bound to a driver:
757 * - quirks like clock rate mattering when not selected
763 spi_register_board_info(struct spi_board_info const *info, unsigned n);
765 /* board init code may ignore whether SPI is configured or not */
767 spi_register_board_info(struct spi_board_info const *info, unsigned n)
772 /* If you're hotplugging an adapter with devices (parport, usb, etc)
773 * use spi_new_device() to describe each device. You can also call
774 * spi_unregister_device() to start making that device vanish, but
775 * normally that would be handled by spi_unregister_master().
777 * You can also use spi_alloc_device() and spi_add_device() to use a two
778 * stage registration sequence for each spi_device. This gives the caller
779 * some more control over the spi_device structure before it is registered,
780 * but requires that caller to initialize fields that would otherwise
781 * be defined using the board info.
783 extern struct spi_device *
784 spi_alloc_device(struct spi_master *master);
787 spi_add_device(struct spi_device *spi);
789 extern struct spi_device *
790 spi_new_device(struct spi_master *, struct spi_board_info *);
793 spi_unregister_device(struct spi_device *spi)
796 device_unregister(&spi->dev);
799 #endif /* __LINUX_SPI_H */