2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/device.h>
23 #include <linux/mod_devicetable.h>
24 #include <linux/slab.h>
25 #include <linux/kthread.h>
26 #include <linux/completion.h>
29 * INTERFACES between SPI master-side drivers and SPI infrastructure.
30 * (There's no SPI slave support for Linux yet...)
32 extern struct bus_type spi_bus_type;
35 * struct spi_device - Master side proxy for an SPI slave device
36 * @dev: Driver model representation of the device.
37 * @master: SPI controller used with the device.
38 * @max_speed_hz: Maximum clock rate to be used with this chip
39 * (on this board); may be changed by the device's driver.
40 * The spi_transfer.speed_hz can override this for each transfer.
41 * @chip_select: Chipselect, distinguishing chips handled by @master.
42 * @mode: The spi mode defines how data is clocked out and in.
43 * This may be changed by the device's driver.
44 * The "active low" default for chipselect mode can be overridden
45 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
46 * each word in a transfer (by specifying SPI_LSB_FIRST).
47 * @bits_per_word: Data transfers involve one or more words; word sizes
48 * like eight or 12 bits are common. In-memory wordsizes are
49 * powers of two bytes (e.g. 20 bit samples use 32 bits).
50 * This may be changed by the device's driver, or left at the
51 * default (0) indicating protocol words are eight bit bytes.
52 * The spi_transfer.bits_per_word can override this for each transfer.
53 * @irq: Negative, or the number passed to request_irq() to receive
54 * interrupts from this device.
55 * @controller_state: Controller's runtime state
56 * @controller_data: Board-specific definitions for controller, such as
57 * FIFO initialization parameters; from board_info.controller_data
58 * @modalias: Name of the driver to use with this device, or an alias
59 * for that name. This appears in the sysfs "modalias" attribute
60 * for driver coldplugging, and in uevents used for hotplugging
61 * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
62 * when not using a GPIO line)
64 * A @spi_device is used to interchange data between an SPI slave
65 * (usually a discrete chip) and CPU memory.
67 * In @dev, the platform_data is used to hold information about this
68 * device that's meaningful to the device's protocol driver, but not
69 * to its controller. One example might be an identifier for a chip
70 * variant with slightly different functionality; another might be
71 * information about how this particular board wires the chip's pins.
75 struct spi_master *master;
79 #define SPI_CPHA 0x01 /* clock phase */
80 #define SPI_CPOL 0x02 /* clock polarity */
81 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
82 #define SPI_MODE_1 (0|SPI_CPHA)
83 #define SPI_MODE_2 (SPI_CPOL|0)
84 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
85 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
86 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
87 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
88 #define SPI_LOOP 0x20 /* loopback mode */
89 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */
90 #define SPI_READY 0x80 /* slave pulls low to pause */
91 #define SPI_TX_DUAL 0x100 /* transmit with 2 wires */
92 #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
93 #define SPI_RX_DUAL 0x400 /* receive with 2 wires */
94 #define SPI_RX_QUAD 0x800 /* receive with 4 wires */
97 void *controller_state;
98 void *controller_data;
99 char modalias[SPI_NAME_SIZE];
100 int cs_gpio; /* chip select gpio */
103 * likely need more hooks for more protocol options affecting how
104 * the controller talks to each chip, like:
105 * - memory packing (12 bit samples into low bits, others zeroed)
107 * - drop chipselect after each word
108 * - chipselect delays
113 static inline struct spi_device *to_spi_device(struct device *dev)
115 return dev ? container_of(dev, struct spi_device, dev) : NULL;
118 /* most drivers won't need to care about device refcounting */
119 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
121 return (spi && get_device(&spi->dev)) ? spi : NULL;
124 static inline void spi_dev_put(struct spi_device *spi)
127 put_device(&spi->dev);
130 /* ctldata is for the bus_master driver's runtime state */
131 static inline void *spi_get_ctldata(struct spi_device *spi)
133 return spi->controller_state;
136 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
138 spi->controller_state = state;
141 /* device driver data */
143 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
145 dev_set_drvdata(&spi->dev, data);
148 static inline void *spi_get_drvdata(struct spi_device *spi)
150 return dev_get_drvdata(&spi->dev);
157 * struct spi_driver - Host side "protocol" driver
158 * @id_table: List of SPI devices supported by this driver
159 * @probe: Binds this driver to the spi device. Drivers can verify
160 * that the device is actually present, and may need to configure
161 * characteristics (such as bits_per_word) which weren't needed for
162 * the initial configuration done during system setup.
163 * @remove: Unbinds this driver from the spi device
164 * @shutdown: Standard shutdown callback used during system state
165 * transitions such as powerdown/halt and kexec
166 * @suspend: Standard suspend callback used during system state transitions
167 * @resume: Standard resume callback used during system state transitions
168 * @driver: SPI device drivers should initialize the name and owner
169 * field of this structure.
171 * This represents the kind of device driver that uses SPI messages to
172 * interact with the hardware at the other end of a SPI link. It's called
173 * a "protocol" driver because it works through messages rather than talking
174 * directly to SPI hardware (which is what the underlying SPI controller
175 * driver does to pass those messages). These protocols are defined in the
176 * specification for the device(s) supported by the driver.
178 * As a rule, those device protocols represent the lowest level interface
179 * supported by a driver, and it will support upper level interfaces too.
180 * Examples of such upper levels include frameworks like MTD, networking,
181 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
184 const struct spi_device_id *id_table;
185 int (*probe)(struct spi_device *spi);
186 int (*remove)(struct spi_device *spi);
187 void (*shutdown)(struct spi_device *spi);
188 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
189 int (*resume)(struct spi_device *spi);
190 struct device_driver driver;
193 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
195 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
198 extern int spi_register_driver(struct spi_driver *sdrv);
201 * spi_unregister_driver - reverse effect of spi_register_driver
202 * @sdrv: the driver to unregister
205 static inline void spi_unregister_driver(struct spi_driver *sdrv)
208 driver_unregister(&sdrv->driver);
212 * module_spi_driver() - Helper macro for registering a SPI driver
213 * @__spi_driver: spi_driver struct
215 * Helper macro for SPI drivers which do not do anything special in module
216 * init/exit. This eliminates a lot of boilerplate. Each module may only
217 * use this macro once, and calling it replaces module_init() and module_exit()
219 #define module_spi_driver(__spi_driver) \
220 module_driver(__spi_driver, spi_register_driver, \
221 spi_unregister_driver)
224 * struct spi_master - interface to SPI master controller
225 * @dev: device interface to this driver
226 * @list: link with the global spi_master list
227 * @bus_num: board-specific (and often SOC-specific) identifier for a
228 * given SPI controller.
229 * @num_chipselect: chipselects are used to distinguish individual
230 * SPI slaves, and are numbered from zero to num_chipselects.
231 * each slave has a chipselect signal, but it's common that not
232 * every chipselect is connected to a slave.
233 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
234 * @mode_bits: flags understood by this controller driver
235 * @bits_per_word_mask: A mask indicating which values of bits_per_word are
236 * supported by the driver. Bit n indicates that a bits_per_word n+1 is
237 * suported. If set, the SPI core will reject any transfer with an
238 * unsupported bits_per_word. If not set, this value is simply ignored,
239 * and it's up to the individual driver to perform any validation.
240 * @min_speed_hz: Lowest supported transfer speed
241 * @max_speed_hz: Highest supported transfer speed
242 * @flags: other constraints relevant to this driver
243 * @bus_lock_spinlock: spinlock for SPI bus locking
244 * @bus_lock_mutex: mutex for SPI bus locking
245 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
246 * @setup: updates the device mode and clocking records used by a
247 * device's SPI controller; protocol code may call this. This
248 * must fail if an unrecognized or unsupported mode is requested.
249 * It's always safe to call this unless transfers are pending on
250 * the device whose settings are being modified.
251 * @transfer: adds a message to the controller's transfer queue.
252 * @cleanup: frees controller-specific state
253 * @queued: whether this master is providing an internal message queue
254 * @kworker: thread struct for message pump
255 * @kworker_task: pointer to task for message pump kworker thread
256 * @pump_messages: work struct for scheduling work to the message pump
257 * @queue_lock: spinlock to syncronise access to message queue
258 * @queue: message queue
259 * @cur_msg: the currently in-flight message
260 * @cur_msg_prepared: spi_prepare_message was called for the currently
262 * @xfer_completion: used by core tranfer_one_message()
263 * @busy: message pump is busy
264 * @running: message pump is running
265 * @rt: whether this queue is set to run as a realtime task
266 * @auto_runtime_pm: the core should ensure a runtime PM reference is held
267 * while the hardware is prepared, using the parent
268 * device for the spidev
269 * @prepare_transfer_hardware: a message will soon arrive from the queue
270 * so the subsystem requests the driver to prepare the transfer hardware
271 * by issuing this call
272 * @transfer_one_message: the subsystem calls the driver to transfer a single
273 * message while queuing transfers that arrive in the meantime. When the
274 * driver is finished with this message, it must call
275 * spi_finalize_current_message() so the subsystem can issue the next
277 * @unprepare_transfer_hardware: there are currently no more messages on the
278 * queue so the subsystem notifies the driver that it may relax the
279 * hardware by issuing this call
280 * @set_cs: assert or deassert chip select, true to assert. May be called
281 * from interrupt context.
282 * @prepare_message: set up the controller to transfer a single message,
283 * for example doing DMA mapping. Called from threaded
285 * @transfer_one: transfer a single spi_transfer. When the
286 * driver is finished with this transfer it must call
287 * spi_finalize_current_transfer() so the subsystem can issue
289 * @unprepare_message: undo any work done by prepare_message().
290 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
291 * number. Any individual value may be -ENOENT for CS lines that
292 * are not GPIOs (driven by the SPI controller itself).
294 * Each SPI master controller can communicate with one or more @spi_device
295 * children. These make a small bus, sharing MOSI, MISO and SCK signals
296 * but not chip select signals. Each device may be configured to use a
297 * different clock rate, since those shared signals are ignored unless
298 * the chip is selected.
300 * The driver for an SPI controller manages access to those devices through
301 * a queue of spi_message transactions, copying data between CPU memory and
302 * an SPI slave device. For each such message it queues, it calls the
303 * message's completion function when the transaction completes.
308 struct list_head list;
310 /* other than negative (== assign one dynamically), bus_num is fully
311 * board-specific. usually that simplifies to being SOC-specific.
312 * example: one SOC has three SPI controllers, numbered 0..2,
313 * and one board's schematics might show it using SPI-2. software
314 * would normally use bus_num=2 for that controller.
318 /* chipselects will be integral to many controllers; some others
319 * might use board-specific GPIOs.
323 /* some SPI controllers pose alignment requirements on DMAable
324 * buffers; let protocol drivers know about these requirements.
328 /* spi_device.mode flags understood by this controller driver */
331 /* bitmask of supported bits_per_word for transfers */
332 u32 bits_per_word_mask;
333 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
334 #define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
335 #define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
337 /* limits on transfer speed */
341 /* other constraints relevant to this driver */
343 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
344 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */
345 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */
347 /* lock and mutex for SPI bus locking */
348 spinlock_t bus_lock_spinlock;
349 struct mutex bus_lock_mutex;
351 /* flag indicating that the SPI bus is locked for exclusive use */
354 /* Setup mode and clock, etc (spi driver may call many times).
356 * IMPORTANT: this may be called when transfers to another
357 * device are active. DO NOT UPDATE SHARED REGISTERS in ways
358 * which could break those transfers.
360 int (*setup)(struct spi_device *spi);
362 /* bidirectional bulk transfers
364 * + The transfer() method may not sleep; its main role is
365 * just to add the message to the queue.
366 * + For now there's no remove-from-queue operation, or
367 * any other request management
368 * + To a given spi_device, message queueing is pure fifo
370 * + The master's main job is to process its message queue,
371 * selecting a chip then transferring data
372 * + If there are multiple spi_device children, the i/o queue
373 * arbitration algorithm is unspecified (round robin, fifo,
374 * priority, reservations, preemption, etc)
376 * + Chipselect stays active during the entire message
377 * (unless modified by spi_transfer.cs_change != 0).
378 * + The message transfers use clock and SPI mode parameters
379 * previously established by setup() for this device
381 int (*transfer)(struct spi_device *spi,
382 struct spi_message *mesg);
384 /* called on release() to free memory provided by spi_master */
385 void (*cleanup)(struct spi_device *spi);
388 * These hooks are for drivers that want to use the generic
389 * master transfer queueing mechanism. If these are used, the
390 * transfer() function above must NOT be specified by the driver.
391 * Over time we expect SPI drivers to be phased over to this API.
394 struct kthread_worker kworker;
395 struct task_struct *kworker_task;
396 struct kthread_work pump_messages;
397 spinlock_t queue_lock;
398 struct list_head queue;
399 struct spi_message *cur_msg;
403 bool auto_runtime_pm;
404 bool cur_msg_prepared;
405 struct completion xfer_completion;
407 int (*prepare_transfer_hardware)(struct spi_master *master);
408 int (*transfer_one_message)(struct spi_master *master,
409 struct spi_message *mesg);
410 int (*unprepare_transfer_hardware)(struct spi_master *master);
411 int (*prepare_message)(struct spi_master *master,
412 struct spi_message *message);
413 int (*unprepare_message)(struct spi_master *master,
414 struct spi_message *message);
417 * These hooks are for drivers that use a generic implementation
418 * of transfer_one_message() provied by the core.
420 void (*set_cs)(struct spi_device *spi, bool enable);
421 int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
422 struct spi_transfer *transfer);
424 /* gpio chip select */
428 static inline void *spi_master_get_devdata(struct spi_master *master)
430 return dev_get_drvdata(&master->dev);
433 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
435 dev_set_drvdata(&master->dev, data);
438 static inline struct spi_master *spi_master_get(struct spi_master *master)
440 if (!master || !get_device(&master->dev))
445 static inline void spi_master_put(struct spi_master *master)
448 put_device(&master->dev);
451 /* PM calls that need to be issued by the driver */
452 extern int spi_master_suspend(struct spi_master *master);
453 extern int spi_master_resume(struct spi_master *master);
455 /* Calls the driver make to interact with the message queue */
456 extern struct spi_message *spi_get_next_queued_message(struct spi_master *master);
457 extern void spi_finalize_current_message(struct spi_master *master);
458 extern void spi_finalize_current_transfer(struct spi_master *master);
460 /* the spi driver core manages memory for the spi_master classdev */
461 extern struct spi_master *
462 spi_alloc_master(struct device *host, unsigned size);
464 extern int spi_register_master(struct spi_master *master);
465 extern int devm_spi_register_master(struct device *dev,
466 struct spi_master *master);
467 extern void spi_unregister_master(struct spi_master *master);
469 extern struct spi_master *spi_busnum_to_master(u16 busnum);
471 /*---------------------------------------------------------------------------*/
474 * I/O INTERFACE between SPI controller and protocol drivers
476 * Protocol drivers use a queue of spi_messages, each transferring data
477 * between the controller and memory buffers.
479 * The spi_messages themselves consist of a series of read+write transfer
480 * segments. Those segments always read the same number of bits as they
481 * write; but one or the other is easily ignored by passing a null buffer
482 * pointer. (This is unlike most types of I/O API, because SPI hardware
485 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
486 * up to the protocol driver, which guarantees the integrity of both (as
487 * well as the data buffers) for as long as the message is queued.
491 * struct spi_transfer - a read/write buffer pair
492 * @tx_buf: data to be written (dma-safe memory), or NULL
493 * @rx_buf: data to be read (dma-safe memory), or NULL
494 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
495 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
496 * @tx_nbits: number of bits used for writting. If 0 the default
497 * (SPI_NBITS_SINGLE) is used.
498 * @rx_nbits: number of bits used for reading. If 0 the default
499 * (SPI_NBITS_SINGLE) is used.
500 * @len: size of rx and tx buffers (in bytes)
501 * @speed_hz: Select a speed other than the device default for this
502 * transfer. If 0 the default (from @spi_device) is used.
503 * @bits_per_word: select a bits_per_word other than the device default
504 * for this transfer. If 0 the default (from @spi_device) is used.
505 * @cs_change: affects chipselect after this transfer completes
506 * @delay_usecs: microseconds to delay after this transfer before
507 * (optionally) changing the chipselect status, then starting
508 * the next transfer or completing this @spi_message.
509 * @transfer_list: transfers are sequenced through @spi_message.transfers
511 * SPI transfers always write the same number of bytes as they read.
512 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
513 * In some cases, they may also want to provide DMA addresses for
514 * the data being transferred; that may reduce overhead, when the
515 * underlying driver uses dma.
517 * If the transmit buffer is null, zeroes will be shifted out
518 * while filling @rx_buf. If the receive buffer is null, the data
519 * shifted in will be discarded. Only "len" bytes shift out (or in).
520 * It's an error to try to shift out a partial word. (For example, by
521 * shifting out three bytes with word size of sixteen or twenty bits;
522 * the former uses two bytes per word, the latter uses four bytes.)
524 * In-memory data values are always in native CPU byte order, translated
525 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
526 * for example when bits_per_word is sixteen, buffers are 2N bytes long
527 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
529 * When the word size of the SPI transfer is not a power-of-two multiple
530 * of eight bits, those in-memory words include extra bits. In-memory
531 * words are always seen by protocol drivers as right-justified, so the
532 * undefined (rx) or unused (tx) bits are always the most significant bits.
534 * All SPI transfers start with the relevant chipselect active. Normally
535 * it stays selected until after the last transfer in a message. Drivers
536 * can affect the chipselect signal using cs_change.
538 * (i) If the transfer isn't the last one in the message, this flag is
539 * used to make the chipselect briefly go inactive in the middle of the
540 * message. Toggling chipselect in this way may be needed to terminate
541 * a chip command, letting a single spi_message perform all of group of
542 * chip transactions together.
544 * (ii) When the transfer is the last one in the message, the chip may
545 * stay selected until the next transfer. On multi-device SPI busses
546 * with nothing blocking messages going to other devices, this is just
547 * a performance hint; starting a message to another device deselects
548 * this one. But in other cases, this can be used to ensure correctness.
549 * Some devices need protocol transactions to be built from a series of
550 * spi_message submissions, where the content of one message is determined
551 * by the results of previous messages and where the whole transaction
552 * ends when the chipselect goes intactive.
554 * When SPI can transfer in 1x,2x or 4x. It can get this tranfer information
555 * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
556 * two should both be set. User can set transfer mode with SPI_NBITS_SINGLE(1x)
557 * SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
559 * The code that submits an spi_message (and its spi_transfers)
560 * to the lower layers is responsible for managing its memory.
561 * Zero-initialize every field you don't set up explicitly, to
562 * insulate against future API updates. After you submit a message
563 * and its transfers, ignore them until its completion callback.
565 struct spi_transfer {
566 /* it's ok if tx_buf == rx_buf (right?)
567 * for MicroWire, one buffer must be null
568 * buffers must work with dma_*map_single() calls, unless
569 * spi_message.is_dma_mapped reports a pre-existing mapping
578 unsigned cs_change:1;
581 #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
582 #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
583 #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
588 struct list_head transfer_list;
592 * struct spi_message - one multi-segment SPI transaction
593 * @transfers: list of transfer segments in this transaction
594 * @spi: SPI device to which the transaction is queued
595 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
596 * addresses for each transfer buffer
597 * @complete: called to report transaction completions
598 * @context: the argument to complete() when it's called
599 * @actual_length: the total number of bytes that were transferred in all
600 * successful segments
601 * @status: zero for success, else negative errno
602 * @queue: for use by whichever driver currently owns the message
603 * @state: for use by whichever driver currently owns the message
605 * A @spi_message is used to execute an atomic sequence of data transfers,
606 * each represented by a struct spi_transfer. The sequence is "atomic"
607 * in the sense that no other spi_message may use that SPI bus until that
608 * sequence completes. On some systems, many such sequences can execute as
609 * as single programmed DMA transfer. On all systems, these messages are
610 * queued, and might complete after transactions to other devices. Messages
611 * sent to a given spi_device are alway executed in FIFO order.
613 * The code that submits an spi_message (and its spi_transfers)
614 * to the lower layers is responsible for managing its memory.
615 * Zero-initialize every field you don't set up explicitly, to
616 * insulate against future API updates. After you submit a message
617 * and its transfers, ignore them until its completion callback.
620 struct list_head transfers;
622 struct spi_device *spi;
624 unsigned is_dma_mapped:1;
626 /* REVISIT: we might want a flag affecting the behavior of the
627 * last transfer ... allowing things like "read 16 bit length L"
628 * immediately followed by "read L bytes". Basically imposing
629 * a specific message scheduling algorithm.
631 * Some controller drivers (message-at-a-time queue processing)
632 * could provide that as their default scheduling algorithm. But
633 * others (with multi-message pipelines) could need a flag to
634 * tell them about such special cases.
637 /* completion is reported through a callback */
638 void (*complete)(void *context);
640 unsigned frame_length;
641 unsigned actual_length;
644 /* for optional use by whatever driver currently owns the
645 * spi_message ... between calls to spi_async and then later
646 * complete(), that's the spi_master controller driver.
648 struct list_head queue;
652 static inline void spi_message_init(struct spi_message *m)
654 memset(m, 0, sizeof *m);
655 INIT_LIST_HEAD(&m->transfers);
659 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
661 list_add_tail(&t->transfer_list, &m->transfers);
665 spi_transfer_del(struct spi_transfer *t)
667 list_del(&t->transfer_list);
671 * spi_message_init_with_transfers - Initialize spi_message and append transfers
672 * @m: spi_message to be initialized
673 * @xfers: An array of spi transfers
674 * @num_xfers: Number of items in the xfer array
676 * This function initializes the given spi_message and adds each spi_transfer in
677 * the given array to the message.
680 spi_message_init_with_transfers(struct spi_message *m,
681 struct spi_transfer *xfers, unsigned int num_xfers)
686 for (i = 0; i < num_xfers; ++i)
687 spi_message_add_tail(&xfers[i], m);
690 /* It's fine to embed message and transaction structures in other data
691 * structures so long as you don't free them while they're in use.
694 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
696 struct spi_message *m;
698 m = kzalloc(sizeof(struct spi_message)
699 + ntrans * sizeof(struct spi_transfer),
703 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
705 INIT_LIST_HEAD(&m->transfers);
706 for (i = 0; i < ntrans; i++, t++)
707 spi_message_add_tail(t, m);
712 static inline void spi_message_free(struct spi_message *m)
717 extern int spi_setup(struct spi_device *spi);
718 extern int spi_async(struct spi_device *spi, struct spi_message *message);
719 extern int spi_async_locked(struct spi_device *spi,
720 struct spi_message *message);
722 /*---------------------------------------------------------------------------*/
724 /* All these synchronous SPI transfer routines are utilities layered
725 * over the core async transfer primitive. Here, "synchronous" means
726 * they will sleep uninterruptibly until the async transfer completes.
729 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
730 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
731 extern int spi_bus_lock(struct spi_master *master);
732 extern int spi_bus_unlock(struct spi_master *master);
735 * spi_write - SPI synchronous write
736 * @spi: device to which data will be written
738 * @len: data buffer size
741 * This writes the buffer and returns zero or a negative error code.
742 * Callable only from contexts that can sleep.
745 spi_write(struct spi_device *spi, const void *buf, size_t len)
747 struct spi_transfer t = {
751 struct spi_message m;
753 spi_message_init(&m);
754 spi_message_add_tail(&t, &m);
755 return spi_sync(spi, &m);
759 * spi_read - SPI synchronous read
760 * @spi: device from which data will be read
762 * @len: data buffer size
765 * This reads the buffer and returns zero or a negative error code.
766 * Callable only from contexts that can sleep.
769 spi_read(struct spi_device *spi, void *buf, size_t len)
771 struct spi_transfer t = {
775 struct spi_message m;
777 spi_message_init(&m);
778 spi_message_add_tail(&t, &m);
779 return spi_sync(spi, &m);
783 * spi_sync_transfer - synchronous SPI data transfer
784 * @spi: device with which data will be exchanged
785 * @xfers: An array of spi_transfers
786 * @num_xfers: Number of items in the xfer array
789 * Does a synchronous SPI data transfer of the given spi_transfer array.
791 * For more specific semantics see spi_sync().
793 * It returns zero on success, else a negative error code.
796 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
797 unsigned int num_xfers)
799 struct spi_message msg;
801 spi_message_init_with_transfers(&msg, xfers, num_xfers);
803 return spi_sync(spi, &msg);
806 /* this copies txbuf and rxbuf data; for small transfers only! */
807 extern int spi_write_then_read(struct spi_device *spi,
808 const void *txbuf, unsigned n_tx,
809 void *rxbuf, unsigned n_rx);
812 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
813 * @spi: device with which data will be exchanged
814 * @cmd: command to be written before data is read back
817 * This returns the (unsigned) eight bit number returned by the
818 * device, or else a negative error code. Callable only from
819 * contexts that can sleep.
821 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
826 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
828 /* return negative errno or unsigned value */
829 return (status < 0) ? status : result;
833 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
834 * @spi: device with which data will be exchanged
835 * @cmd: command to be written before data is read back
838 * This returns the (unsigned) sixteen bit number returned by the
839 * device, or else a negative error code. Callable only from
840 * contexts that can sleep.
842 * The number is returned in wire-order, which is at least sometimes
845 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
850 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
852 /* return negative errno or unsigned value */
853 return (status < 0) ? status : result;
856 /*---------------------------------------------------------------------------*/
859 * INTERFACE between board init code and SPI infrastructure.
861 * No SPI driver ever sees these SPI device table segments, but
862 * it's how the SPI core (or adapters that get hotplugged) grows
863 * the driver model tree.
865 * As a rule, SPI devices can't be probed. Instead, board init code
866 * provides a table listing the devices which are present, with enough
867 * information to bind and set up the device's driver. There's basic
868 * support for nonstatic configurations too; enough to handle adding
869 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
873 * struct spi_board_info - board-specific template for a SPI device
874 * @modalias: Initializes spi_device.modalias; identifies the driver.
875 * @platform_data: Initializes spi_device.platform_data; the particular
876 * data stored there is driver-specific.
877 * @controller_data: Initializes spi_device.controller_data; some
878 * controllers need hints about hardware setup, e.g. for DMA.
879 * @irq: Initializes spi_device.irq; depends on how the board is wired.
880 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
881 * from the chip datasheet and board-specific signal quality issues.
882 * @bus_num: Identifies which spi_master parents the spi_device; unused
883 * by spi_new_device(), and otherwise depends on board wiring.
884 * @chip_select: Initializes spi_device.chip_select; depends on how
885 * the board is wired.
886 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
887 * wiring (some devices support both 3WIRE and standard modes), and
888 * possibly presence of an inverter in the chipselect path.
890 * When adding new SPI devices to the device tree, these structures serve
891 * as a partial device template. They hold information which can't always
892 * be determined by drivers. Information that probe() can establish (such
893 * as the default transfer wordsize) is not included here.
895 * These structures are used in two places. Their primary role is to
896 * be stored in tables of board-specific device descriptors, which are
897 * declared early in board initialization and then used (much later) to
898 * populate a controller's device tree after the that controller's driver
899 * initializes. A secondary (and atypical) role is as a parameter to
900 * spi_new_device() call, which happens after those controller drivers
901 * are active in some dynamic board configuration models.
903 struct spi_board_info {
904 /* the device name and module name are coupled, like platform_bus;
905 * "modalias" is normally the driver name.
907 * platform_data goes to spi_device.dev.platform_data,
908 * controller_data goes to spi_device.controller_data,
911 char modalias[SPI_NAME_SIZE];
912 const void *platform_data;
913 void *controller_data;
916 /* slower signaling on noisy or low voltage boards */
920 /* bus_num is board specific and matches the bus_num of some
921 * spi_master that will probably be registered later.
923 * chip_select reflects how this chip is wired to that master;
924 * it's less than num_chipselect.
929 /* mode becomes spi_device.mode, and is essential for chips
930 * where the default of SPI_CS_HIGH = 0 is wrong.
934 /* ... may need additional spi_device chip config data here.
935 * avoid stuff protocol drivers can set; but include stuff
936 * needed to behave without being bound to a driver:
937 * - quirks like clock rate mattering when not selected
943 spi_register_board_info(struct spi_board_info const *info, unsigned n);
945 /* board init code may ignore whether SPI is configured or not */
947 spi_register_board_info(struct spi_board_info const *info, unsigned n)
952 /* If you're hotplugging an adapter with devices (parport, usb, etc)
953 * use spi_new_device() to describe each device. You can also call
954 * spi_unregister_device() to start making that device vanish, but
955 * normally that would be handled by spi_unregister_master().
957 * You can also use spi_alloc_device() and spi_add_device() to use a two
958 * stage registration sequence for each spi_device. This gives the caller
959 * some more control over the spi_device structure before it is registered,
960 * but requires that caller to initialize fields that would otherwise
961 * be defined using the board info.
963 extern struct spi_device *
964 spi_alloc_device(struct spi_master *master);
967 spi_add_device(struct spi_device *spi);
969 extern struct spi_device *
970 spi_new_device(struct spi_master *, struct spi_board_info *);
973 spi_unregister_device(struct spi_device *spi)
976 device_unregister(&spi->dev);
979 extern const struct spi_device_id *
980 spi_get_device_id(const struct spi_device *sdev);
982 #endif /* __LINUX_SPI_H */