2 * include/linux/spi/mxs-spi.h
4 * Freescale i.MX233/i.MX28 SPI controller register definition
6 * Copyright 2008 Embedded Alley Solutions, Inc.
7 * Copyright 2009-2011 Freescale Semiconductor, Inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 #ifndef __LINUX_SPI_MXS_SPI_H__
25 #define __LINUX_SPI_MXS_SPI_H__
27 #define ssp_is_old(host) ((host)->devid == IMX23_SSP)
30 #define HW_SSP_CTRL0 0x000
31 #define BM_SSP_CTRL0_RUN (1 << 29)
32 #define BM_SSP_CTRL0_SDIO_IRQ_CHECK (1 << 28)
33 #define BM_SSP_CTRL0_IGNORE_CRC (1 << 26)
34 #define BM_SSP_CTRL0_READ (1 << 25)
35 #define BM_SSP_CTRL0_DATA_XFER (1 << 24)
36 #define BP_SSP_CTRL0_BUS_WIDTH 22
37 #define BM_SSP_CTRL0_BUS_WIDTH (0x3 << 22)
38 #define BM_SSP_CTRL0_WAIT_FOR_IRQ (1 << 21)
39 #define BM_SSP_CTRL0_LONG_RESP (1 << 19)
40 #define BM_SSP_CTRL0_GET_RESP (1 << 17)
41 #define BM_SSP_CTRL0_ENABLE (1 << 16)
42 #define BP_SSP_CTRL0_XFER_COUNT 0
43 #define BM_SSP_CTRL0_XFER_COUNT 0xffff
44 #define HW_SSP_CMD0 0x010
45 #define BM_SSP_CMD0_DBL_DATA_RATE_EN (1 << 25)
46 #define BM_SSP_CMD0_SLOW_CLKING_EN (1 << 22)
47 #define BM_SSP_CMD0_CONT_CLKING_EN (1 << 21)
48 #define BM_SSP_CMD0_APPEND_8CYC (1 << 20)
49 #define BP_SSP_CMD0_BLOCK_SIZE 16
50 #define BM_SSP_CMD0_BLOCK_SIZE (0xf << 16)
51 #define BP_SSP_CMD0_BLOCK_COUNT 8
52 #define BM_SSP_CMD0_BLOCK_COUNT (0xff << 8)
53 #define BP_SSP_CMD0_CMD 0
54 #define BM_SSP_CMD0_CMD 0xff
55 #define HW_SSP_CMD1 0x020
56 #define HW_SSP_XFER_SIZE 0x030
57 #define HW_SSP_BLOCK_SIZE 0x040
58 #define BP_SSP_BLOCK_SIZE_BLOCK_COUNT 4
59 #define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4)
60 #define BP_SSP_BLOCK_SIZE_BLOCK_SIZE 0
61 #define BM_SSP_BLOCK_SIZE_BLOCK_SIZE 0xf
62 #define HW_SSP_TIMING(h) (ssp_is_old(h) ? 0x050 : 0x070)
63 #define BP_SSP_TIMING_TIMEOUT 16
64 #define BM_SSP_TIMING_TIMEOUT (0xffff << 16)
65 #define BP_SSP_TIMING_CLOCK_DIVIDE 8
66 #define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8)
67 #define BP_SSP_TIMING_CLOCK_RATE 0
68 #define BM_SSP_TIMING_CLOCK_RATE 0xff
69 #define HW_SSP_CTRL1(h) (ssp_is_old(h) ? 0x060 : 0x080)
70 #define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)
71 #define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
72 #define BM_SSP_CTRL1_RESP_ERR_IRQ (1 << 29)
73 #define BM_SSP_CTRL1_RESP_ERR_IRQ_EN (1 << 28)
74 #define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ (1 << 27)
75 #define BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN (1 << 26)
76 #define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ (1 << 25)
77 #define BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN (1 << 24)
78 #define BM_SSP_CTRL1_DATA_CRC_IRQ (1 << 23)
79 #define BM_SSP_CTRL1_DATA_CRC_IRQ_EN (1 << 22)
80 #define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ (1 << 21)
81 #define BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ_EN (1 << 20)
82 #define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ (1 << 17)
83 #define BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN (1 << 16)
84 #define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ (1 << 15)
85 #define BM_SSP_CTRL1_FIFO_OVERRUN_IRQ_EN (1 << 14)
86 #define BM_SSP_CTRL1_DMA_ENABLE (1 << 13)
87 #define BM_SSP_CTRL1_POLARITY (1 << 9)
88 #define BP_SSP_CTRL1_WORD_LENGTH 4
89 #define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4)
90 #define BP_SSP_CTRL1_SSP_MODE 0
91 #define BM_SSP_CTRL1_SSP_MODE 0xf
92 #define HW_SSP_SDRESP0(h) (ssp_is_old(h) ? 0x080 : 0x0a0)
93 #define HW_SSP_SDRESP1(h) (ssp_is_old(h) ? 0x090 : 0x0b0)
94 #define HW_SSP_SDRESP2(h) (ssp_is_old(h) ? 0x0a0 : 0x0c0)
95 #define HW_SSP_SDRESP3(h) (ssp_is_old(h) ? 0x0b0 : 0x0d0)
96 #define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100)
97 #define BM_SSP_STATUS_CARD_DETECT (1 << 28)
98 #define BM_SSP_STATUS_SDIO_IRQ (1 << 17)
100 #define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
102 #define SSP_PIO_NUM 3
109 #endif /* __LINUX_SPI_MXS_SPI_H__ */