include/linux/rk_fb.h

   1 /* drivers/video/rk_fb.h
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #ifndef __ARCH_ARM_MACH_RK30_FB_H
  17 #define __ARCH_ARM_MACH_RK30_FB_H
  18
  19 #include <linux/fb.h>
  20 #include <linux/platform_device.h>
  21 #include<linux/completion.h>
  22 #include<linux/spinlock.h>
  23 #include<asm/atomic.h>
  24 #include<mach/board.h>
  25 #include<linux/rk_screen.h>
  26
  27 #define RK30_MAX_LCDC_SUPPORT   4
  28 #define RK30_MAX_LAYER_SUPPORT  4
  29 #define RK_MAX_FB_SUPPORT       8
  30
  31
  32
  33 #define FB0_IOCTL_STOP_TIMER_FLUSH              0x6001
  34 #define FB0_IOCTL_SET_PANEL                             0x6002
  35
  36 #ifdef CONFIG_FB_WIMO
  37 #define FB_WIMO_FLAG
  38 #endif
  39 #ifdef FB_WIMO_FLAG
  40 #define FB0_IOCTL_SET_BUF                               0x6017
  41 #define FB0_IOCTL_COPY_CURBUF                           0x6018
  42 #define FB0_IOCTL_CLOSE_BUF                             0x6019
  43 #endif
  44
  45 #define RK_FBIOGET_PANEL_SIZE           0x5001
  46 #define RK_FBIOSET_YUV_ADDR             0x5002
  47 #define RK_FBIOGET_SCREEN_STATE         0X4620
  48 #define RK_FBIOGET_16OR32               0X4621
  49 #define RK_FBIOGET_IDLEFBUff_16OR32     0X4622
  50 #define RK_FBIOSET_COMPOSE_LAYER_COUNTS    0X4623
  51
  52 #define RK_FBIOSET_ROTATE               0x5003
  53 #define RK_FB_IOCTL_SET_I2P_ODD_ADDR       0x5005
  54 #define RK_FB_IOCTL_SET_I2P_EVEN_ADDR      0x5006
  55 #define RK_FBIOSET_OVERLAY_STATE        0x5018
  56 #define RK_FBIOGET_OVERLAY_STATE        0X4619
  57 #define RK_FBIOSET_ENABLE               0x5019
  58 #define RK_FBIOGET_ENABLE               0x5020
  59 #define RK_FBIOSET_CONFIG_DONE          0x4628
  60 #define RK_FBIOSET_VSYNC_ENABLE         0x4629
  61 #define RK_FBIOPUT_NUM_BUFFERS  0x4625
  62
  63
  64 /********************************************************************
  65 **          display output interface supported by rockchip lcdc                       *
  66 ********************************************************************/
  67 /* */
  68 #define OUT_P888            0   //24bit screen,connect to lcdc D0~D23
  69 #define OUT_P666            1   //18bit screen,connect to lcdc D0~D17
  70 #define OUT_P565            2
  71 #define OUT_S888x           4
  72 #define OUT_CCIR656         6
  73 #define OUT_S888            8
  74 #define OUT_S888DUMY        12
  75 #define OUT_P16BPP4         24
  76 #define OUT_D888_P666       0x21 //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
  77 #define OUT_D888_P565       0x22
  78
  79 /**
  80  * pixel format definitions,this is copy from android/system/core/include/system/graphics.h
  81  */
  82
  83 enum {
  84     HAL_PIXEL_FORMAT_RGBA_8888          = 1,
  85     HAL_PIXEL_FORMAT_RGBX_8888          = 2,
  86     HAL_PIXEL_FORMAT_RGB_888            = 3,
  87     HAL_PIXEL_FORMAT_RGB_565            = 4,
  88     HAL_PIXEL_FORMAT_BGRA_8888          = 5,
  89     HAL_PIXEL_FORMAT_RGBA_5551          = 6,
  90     HAL_PIXEL_FORMAT_RGBA_4444          = 7,
  91
  92     /* 0x8 - 0xFF range unavailable */
  93
  94     /*
  95      * 0x100 - 0x1FF
  96      *
  97      * This range is reserved for pixel formats that are specific to the HAL
  98      * implementation.  Implementations can use any value in this range to
  99      * communicate video pixel formats between their HAL modules.  These formats
 100      * must not have an alpha channel.  Additionally, an EGLimage created from a
 101      * gralloc buffer of one of these formats must be supported for use with the
 102      * GL_OES_EGL_image_external OpenGL ES extension.
 103      */
 104
 105     /*
 106      * Android YUV format:
 107      *
 108      * This format is exposed outside of the HAL to software decoders and
 109      * applications.  EGLImageKHR must support it in conjunction with the
 110      * OES_EGL_image_external extension.
 111      *
 112      * YV12 is a 4:2:0 YCrCb planar format comprised of a WxH Y plane followed
 113      * by (W/2) x (H/2) Cr and Cb planes.
 114      *
 115      * This format assumes
 116      * - an even width
 117      * - an even height
 118      * - a horizontal stride multiple of 16 pixels
 119      * - a vertical stride equal to the height
 120      *
 121      *   y_size = stride * height
 122      *   c_size = ALIGN(stride/2, 16) * height/2
 123      *   size = y_size + c_size * 2
 124      *   cr_offset = y_size
 125      *   cb_offset = y_size + c_size
 126      *
 127      */
 128     HAL_PIXEL_FORMAT_YV12   = 0x32315659, // YCrCb 4:2:0 Planar
 129
 130
 131
 132     /* Legacy formats (deprecated), used by ImageFormat.java */
 133     HAL_PIXEL_FORMAT_YCbCr_422_SP       = 0x10, // NV16
 134     HAL_PIXEL_FORMAT_YCrCb_420_SP       = 0x11, // NV21
 135     HAL_PIXEL_FORMAT_YCbCr_422_I        = 0x14, // YUY2
 136     HAL_PIXEL_FORMAT_YCrCb_NV12         = 0x20, // YUY2
 137     HAL_PIXEL_FORMAT_YCrCb_NV12_VIDEO   = 0x21, // YUY2
 138     HAL_PIXEL_FORMAT_YCrCb_444          = 0x22, //yuv444
 139
 140
 141 };
 142
 143
 144 //display data format
 145 enum data_format{
 146         ARGB888 = 0,
 147         RGB888,
 148         RGB565,
 149         YUV420 = 4,
 150         YUV422,
 151         YUV444,
 152         XRGB888,
 153         XBGR888,
 154         ABGR888,
 155 };
 156
 157 enum fb_win_map_order{
 158         FB_DEFAULT_ORDER           = 0,
 159         FB0_WIN2_FB1_WIN1_FB2_WIN0 = 12,
 160         FB0_WIN1_FB1_WIN2_FB2_WIN0 = 21,
 161         FB0_WIN2_FB1_WIN0_FB2_WIN1 = 102,
 162         FB0_WIN0_FB1_WIN2_FB2_WIN1 = 120,
 163         FB0_WIN0_FB1_WIN1_FB2_WIN2 = 210,
 164         FB0_WIN1_FB1_WIN0_FB2_WIN2 = 201,
 165 };
 166
 167 struct rk_fb_rgb {
 168         struct fb_bitfield      red;
 169         struct fb_bitfield      green;
 170         struct fb_bitfield      blue;
 171         struct fb_bitfield      transp;
 172 };
 173
 174 struct rk_fb_vsync {
 175         wait_queue_head_t       wait;
 176         ktime_t                 timestamp;
 177         bool                    active;
 178         int                     irq_refcount;
 179         struct mutex            irq_lock;
 180         struct task_struct      *thread;
 181 };
 182
 183 typedef enum _TRSP_MODE
 184 {
 185     TRSP_CLOSE = 0,
 186     TRSP_FMREG,
 187     TRSP_FMREGEX,
 188     TRSP_FMRAM,
 189     TRSP_FMRAMEX,
 190     TRSP_MASK,
 191     TRSP_INVAL
 192 } TRSP_MODE;
 193
 194 struct layer_par {
 195     char name[5];
 196     int id;
 197     bool state;         //on or off
 198     u32 pseudo_pal[16];
 199     u32 y_offset;       //yuv/rgb offset  -->LCDC_WINx_YRGB_MSTx
 200     u32 c_offset;     //cb cr offset--->LCDC_WINx_CBR_MSTx
 201     u32 xpos;         //start point in panel  --->LCDC_WINx_DSP_ST
 202     u32 ypos;
 203     u16 xsize;        // display window width/height  -->LCDC_WINx_DSP_INFO
 204     u16 ysize;
 205     u16 xact;        //origin display window size -->LCDC_WINx_ACT_INFO
 206     u16 yact;
 207     u16 xvir;       //virtual width/height     -->LCDC_WINx_VIR
 208     u16 yvir;
 209     unsigned long smem_start;
 210     unsigned long cbr_start;  // Cbr memory start address
 211     enum data_format format;
 212
 213     bool support_3d;
 214
 215 };
 216
 217 struct rk_lcdc_device_driver{
 218         char name[6];
 219         int id;
 220         struct device  *dev;
 221
 222         struct layer_par *layer_par[RK_MAX_FB_SUPPORT];
 223         struct layer_par *def_layer_par;
 224         int num_layer;
 225         int num_buf;                            //the num_of buffer
 226         int fb_index_base;                     //the first fb index of the lcdc device
 227         rk_screen *screen0;                   //some platform have only one lcdc,but extend
 228         rk_screen *screen1;                   //two display devices for dual display,such as rk2918,rk2928
 229         rk_screen *cur_screen;               //screen0 is primary screen ,like lcd panel,screen1 is  extend screen,like hdmi
 230         u32 pixclock;
 231
 232
 233         char fb0_win_id;
 234         char fb1_win_id;
 235         char fb2_win_id;
 236         struct mutex fb_win_id_mutex;
 237
 238         struct completion  frame_done;            //sync for pan_display,whe we set a new frame address to lcdc register,we must make sure the frame begain to display
 239         spinlock_t  cpl_lock;                    //lock for completion  frame done
 240         int first_frame ;
 241         struct rk_fb_vsync       vsync_info;
 242         int wait_fs;                            //wait for new frame start in kernel
 243
 244         struct rk29fb_info *screen_ctr_info;
 245         int (*open)(struct rk_lcdc_device_driver *dev_drv,int layer_id,bool open);
 246         int (*init_lcdc)(struct rk_lcdc_device_driver *dev_drv);
 247         int (*ioctl)(struct rk_lcdc_device_driver *dev_drv, unsigned int cmd,unsigned long arg,int layer_id);
 248         int (*suspend)(struct rk_lcdc_device_driver *dev_drv);
 249         int (*resume)(struct rk_lcdc_device_driver *dev_drv);
 250         int (*blank)(struct rk_lcdc_device_driver *dev_drv,int layer_id,int blank_mode);
 251         int (*set_par)(struct rk_lcdc_device_driver *dev_drv,int layer_id);
 252         int (*pan_display)(struct rk_lcdc_device_driver *dev_drv,int layer_id);
 253         ssize_t (*get_disp_info)(struct rk_lcdc_device_driver *dev_drv,char *buf,int layer_id);
 254         int (*load_screen)(struct rk_lcdc_device_driver *dev_drv, bool initscreen);
 255         int (*get_layer_state)(struct rk_lcdc_device_driver *dev_drv,int layer_id);
 256         int (*ovl_mgr)(struct rk_lcdc_device_driver *dev_drv,int swap,bool set);  //overlay manager
 257         int (*fps_mgr)(struct rk_lcdc_device_driver *dev_drv,int fps,bool set);
 258         int (*fb_get_layer)(struct rk_lcdc_device_driver *dev_drv,const char *id);                                      //find layer for fb
 259         int (*fb_layer_remap)(struct rk_lcdc_device_driver *dev_drv,enum fb_win_map_order order);
 260         int (*set_dsp_lut)(struct rk_lcdc_device_driver *dev_drv,int *lut);
 261         int (*read_dsp_lut)(struct rk_lcdc_device_driver *dev_drv,int *lut);
 262         int (*lcdc_hdmi_process)(struct rk_lcdc_device_driver *dev_drv,int mode); //some lcdc need to some process in hdmi mode
 263         int (*lcdc_rst)(struct rk_lcdc_device_driver *dev_drv);
 264
 265 };
 266
 267 struct rk_fb_inf {
 268         struct rk29fb_info * mach_info;     //lcd io control info
 269         struct fb_info *fb[RK_MAX_FB_SUPPORT];
 270         int num_fb;
 271
 272         struct rk_lcdc_device_driver *lcdc_dev_drv[RK30_MAX_LCDC_SUPPORT];
 273         int num_lcdc;
 274
 275         int video_mode;  //when play video set it to 1
 276         struct workqueue_struct *workqueue;
 277         struct delayed_work delay_work;
 278 };
 279 extern int rk_fb_register(struct rk_lcdc_device_driver *dev_drv,
 280         struct rk_lcdc_device_driver *def_drv,int id);
 281 extern int rk_fb_unregister(struct rk_lcdc_device_driver *dev_drv);
 282 extern int get_fb_layer_id(struct fb_fix_screeninfo *fix);
 283 extern struct rk_lcdc_device_driver * rk_get_lcdc_drv(char *name);
 284 extern int rk_fb_switch_screen(rk_screen *screen ,int enable ,int lcdc_id);
 285 extern int rk_fb_disp_scale(u8 scale_x, u8 scale_y,u8 lcdc_id);
 286 extern int rkfb_create_sysfs(struct fb_info *fbi);
 287 static int inline rk_fb_calc_fps(rk_screen *screen,u32 pixclock)
 288 {
 289         int x, y;
 290         unsigned long long hz;
 291         if(!screen)
 292         {
 293                 printk(KERN_ERR "%s:null screen!\n",__func__);
 294                 return 0;
 295         }
 296         x = screen->x_res + screen->left_margin + screen->right_margin + screen->hsync_len;
 297         y = screen->y_res + screen->upper_margin + screen->lower_margin + screen->vsync_len;
 298
 299         hz = 1000000000000ULL;          /* 1e12 picoseconds per second */
 300
 301         hz += (x * y) / 2;
 302         do_div(hz, x * y);              /* divide by x * y with rounding */
 303
 304         hz += pixclock / 2;
 305         do_div(hz,pixclock);            /* divide by pixclock with rounding */
 306
 307         return  hz;
 308 }
 309
 310 static int inline __rk_platform_add_display_devices(struct platform_device *fb,
 311         struct platform_device *lcdc0,struct platform_device *lcdc1,
 312         struct platform_device *bl)
 313 {
 314         struct rk29fb_info *lcdc0_screen_info = NULL;
 315         struct rk29fb_info *lcdc1_screen_info = NULL;
 316         struct platform_device *prmry_lcdc = NULL;
 317         struct platform_device *extend_lcdc = NULL;
 318
 319         if(!fb)
 320         {
 321                 printk(KERN_ERR "warning:no rockchip fb device!\n");
 322         }
 323         else
 324         {
 325                 platform_device_register(fb);
 326         }
 327
 328         if((!lcdc0)&&(!lcdc1))
 329         {
 330                 printk(KERN_ERR "warning:no lcdc device!\n");
 331         }
 332         else
 333         {
 334                 if(lcdc0)
 335                 {
 336                         lcdc0_screen_info = lcdc0->dev.platform_data;
 337                         if(lcdc0_screen_info->prop == PRMRY)
 338                         {
 339                                 prmry_lcdc = lcdc0;
 340                                 printk(KERN_INFO "lcdc0 is used as primary display device contoller!\n");
 341                         }
 342                         else
 343                         {
 344                                 extend_lcdc = lcdc0;
 345                                 printk(KERN_INFO "lcdc0 is used as external display device contoller!\n");
 346                         }
 347
 348
 349                 }
 350                 else
 351                 {
 352                         printk(KERN_INFO "warning:lcdc0 not add to system!\n");
 353                 }
 354
 355                 if(lcdc1)
 356                 {
 357                         lcdc1_screen_info = lcdc1->dev.platform_data;
 358                         if(lcdc1_screen_info->prop == PRMRY)
 359                         {
 360                                 prmry_lcdc = lcdc1;
 361                                 printk(KERN_INFO "lcdc1 is used as primary display device controller!\n");
 362                         }
 363                         else
 364                         {
 365                                 extend_lcdc = lcdc1;
 366                                 printk(KERN_INFO "lcdc1 is used as external display device controller!\n");
 367                         }
 368
 369
 370                 }
 371                 else
 372                 {
 373                         printk(KERN_INFO "warning:lcdc1 not add to system!\n");
 374                 }
 375         }
 376
 377         if(prmry_lcdc)
 378                 platform_device_register(prmry_lcdc);
 379         if(extend_lcdc)
 380                 platform_device_register(extend_lcdc);
 381         if(bl)
 382                 platform_device_register(bl);
 383
 384         return 0;
 385 }
 386 #endif