4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 /* Include the ID list */
56 #include <linux/pci_ids.h>
58 /* pci_slot represents a physical slot */
60 struct pci_bus *bus; /* The bus this slot is on */
61 struct list_head list; /* node in list of slots on this bus */
62 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
63 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
67 /* File state for mmap()s on /proc/bus/pci/X/Y */
73 /* This defines the direction arg to the DMA mapping routines. */
74 #define PCI_DMA_BIDIRECTIONAL 0
75 #define PCI_DMA_TODEVICE 1
76 #define PCI_DMA_FROMDEVICE 2
77 #define PCI_DMA_NONE 3
79 #define DEVICE_COUNT_RESOURCE 12
81 typedef int __bitwise pci_power_t;
83 #define PCI_D0 ((pci_power_t __force) 0)
84 #define PCI_D1 ((pci_power_t __force) 1)
85 #define PCI_D2 ((pci_power_t __force) 2)
86 #define PCI_D3hot ((pci_power_t __force) 3)
87 #define PCI_D3cold ((pci_power_t __force) 4)
88 #define PCI_UNKNOWN ((pci_power_t __force) 5)
89 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
91 /** The pci_channel state describes connectivity between the CPU and
92 * the pci device. If some PCI bus between here and the pci device
93 * has crashed or locked up, this info is reflected here.
95 typedef unsigned int __bitwise pci_channel_state_t;
97 enum pci_channel_state {
98 /* I/O channel is in normal state */
99 pci_channel_io_normal = (__force pci_channel_state_t) 1,
101 /* I/O to channel is blocked */
102 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
104 /* PCI card is dead */
105 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
108 typedef unsigned int __bitwise pcie_reset_state_t;
110 enum pcie_reset_state {
111 /* Reset is NOT asserted (Use to deassert reset) */
112 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
114 /* Use #PERST to reset PCI-E device */
115 pcie_warm_reset = (__force pcie_reset_state_t) 2,
117 /* Use PCI-E Hot Reset to reset device */
118 pcie_hot_reset = (__force pcie_reset_state_t) 3
121 typedef unsigned short __bitwise pci_dev_flags_t;
123 /* INTX_DISABLE in PCI_COMMAND register disables MSI
126 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
129 enum pci_irq_reroute_variant {
130 INTEL_IRQ_REROUTE_VARIANT = 1,
131 MAX_IRQ_REROUTE_VARIANTS = 3
134 typedef unsigned short __bitwise pci_bus_flags_t;
136 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
137 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
140 struct pci_cap_saved_state {
141 struct hlist_node next;
146 struct pcie_link_state;
150 * The pci_dev structure is used to describe PCI devices.
153 struct list_head bus_list; /* node in per-bus list */
154 struct pci_bus *bus; /* bus this device is on */
155 struct pci_bus *subordinate; /* bus this device bridges to */
157 void *sysdata; /* hook for sys-specific extension */
158 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
159 struct pci_slot *slot; /* Physical slot this device is in */
161 unsigned int devfn; /* encoded device & function index */
162 unsigned short vendor;
163 unsigned short device;
164 unsigned short subsystem_vendor;
165 unsigned short subsystem_device;
166 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
167 u8 revision; /* PCI revision, low byte of class word */
168 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
169 u8 pcie_type; /* PCI-E device/port type */
170 u8 rom_base_reg; /* which config register controls the ROM */
171 u8 pin; /* which interrupt pin this device uses */
173 struct pci_driver *driver; /* which driver has allocated this device */
174 u64 dma_mask; /* Mask of the bits of bus address this
175 device implements. Normally this is
176 0xffffffff. You only need to change
177 this if your device has broken DMA
178 or supports 64-bit transfers. */
180 struct device_dma_parameters dma_parms;
182 pci_power_t current_state; /* Current operating state. In ACPI-speak,
183 this is D0-D3, D0 being fully functional,
185 int pm_cap; /* PM capability offset in the
186 configuration space */
187 unsigned int pme_support:5; /* Bitmask of states from which PME#
189 unsigned int d1_support:1; /* Low power state D1 is supported */
190 unsigned int d2_support:1; /* Low power state D2 is supported */
191 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
193 #ifdef CONFIG_PCIEASPM
194 struct pcie_link_state *link_state; /* ASPM link state. */
197 pci_channel_state_t error_state; /* current connectivity state */
198 struct device dev; /* Generic device interface */
200 int cfg_size; /* Size of configuration space */
203 * Instead of touching interrupt line and base address registers
204 * directly, use the values stored here. They might be different!
207 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
209 /* These fields are used by common fixups */
210 unsigned int transparent:1; /* Transparent PCI bridge */
211 unsigned int multifunction:1;/* Part of multi-function device */
212 /* keep track of device state */
213 unsigned int is_added:1;
214 unsigned int is_busmaster:1; /* device is busmaster */
215 unsigned int no_msi:1; /* device may not use msi */
216 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
217 unsigned int broken_parity_status:1; /* Device generates false positive parity */
218 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
219 unsigned int msi_enabled:1;
220 unsigned int msix_enabled:1;
221 unsigned int is_managed:1;
222 unsigned int is_pcie:1;
223 pci_dev_flags_t dev_flags;
224 atomic_t enable_cnt; /* pci_enable_device has been called */
226 u32 saved_config_space[16]; /* config space saved at suspend time */
227 struct hlist_head saved_cap_space;
228 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
229 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
230 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
231 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
232 #ifdef CONFIG_PCI_MSI
233 struct list_head msi_list;
238 extern struct pci_dev *alloc_pci_dev(void);
240 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
241 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
242 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
244 static inline int pci_channel_offline(struct pci_dev *pdev)
246 return (pdev->error_state != pci_channel_io_normal);
249 static inline struct pci_cap_saved_state *pci_find_saved_cap(
250 struct pci_dev *pci_dev, char cap)
252 struct pci_cap_saved_state *tmp;
253 struct hlist_node *pos;
255 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
256 if (tmp->cap_nr == cap)
262 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
263 struct pci_cap_saved_state *new_cap)
265 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
269 * For PCI devices, the region numbers are assigned this way:
271 * 0-5 standard PCI regions
273 * 7-10 bridges: address space assigned to buses behind the bridge
276 #define PCI_ROM_RESOURCE 6
277 #define PCI_BRIDGE_RESOURCES 7
278 #define PCI_NUM_RESOURCES 11
280 #ifndef PCI_BUS_NUM_RESOURCES
281 #define PCI_BUS_NUM_RESOURCES 16
284 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
287 struct list_head node; /* node in list of buses */
288 struct pci_bus *parent; /* parent bus this bridge is on */
289 struct list_head children; /* list of child buses */
290 struct list_head devices; /* list of devices on this bus */
291 struct pci_dev *self; /* bridge device as seen by parent */
292 struct list_head slots; /* list of slots on this bus */
293 struct resource *resource[PCI_BUS_NUM_RESOURCES];
294 /* address space routed to this bus */
296 struct pci_ops *ops; /* configuration access functions */
297 void *sysdata; /* hook for sys-specific extension */
298 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
300 unsigned char number; /* bus number */
301 unsigned char primary; /* number of primary bridge */
302 unsigned char secondary; /* number of secondary bridge */
303 unsigned char subordinate; /* max number of subordinate buses */
307 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
308 pci_bus_flags_t bus_flags; /* Inherited by child busses */
309 struct device *bridge;
311 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
312 struct bin_attribute *legacy_mem; /* legacy mem */
313 unsigned int is_added:1;
316 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
317 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
320 * Error values that may be returned by PCI functions.
322 #define PCIBIOS_SUCCESSFUL 0x00
323 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
324 #define PCIBIOS_BAD_VENDOR_ID 0x83
325 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
326 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
327 #define PCIBIOS_SET_FAILED 0x88
328 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
330 /* Low-level architecture-dependent routines */
333 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
334 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
338 * ACPI needs to be able to access PCI config space before we've done a
339 * PCI bus scan and created pci_bus structures.
341 extern int raw_pci_read(unsigned int domain, unsigned int bus,
342 unsigned int devfn, int reg, int len, u32 *val);
343 extern int raw_pci_write(unsigned int domain, unsigned int bus,
344 unsigned int devfn, int reg, int len, u32 val);
346 struct pci_bus_region {
347 resource_size_t start;
352 spinlock_t lock; /* protects list, index */
353 struct list_head list; /* for IDs added at runtime */
354 unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
357 /* ---------------------------------------------------------------- */
358 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
359 * a set of callbacks in struct pci_error_handlers, then that device driver
360 * will be notified of PCI bus errors, and will be driven to recovery
361 * when an error occurs.
364 typedef unsigned int __bitwise pci_ers_result_t;
366 enum pci_ers_result {
367 /* no result/none/not supported in device driver */
368 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
370 /* Device driver can recover without slot reset */
371 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
373 /* Device driver wants slot to be reset. */
374 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
376 /* Device has completely failed, is unrecoverable */
377 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
379 /* Device driver is fully recovered and operational */
380 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
383 /* PCI bus error event callbacks */
384 struct pci_error_handlers {
385 /* PCI bus error detected on this device */
386 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
387 enum pci_channel_state error);
389 /* MMIO has been re-enabled, but not DMA */
390 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
392 /* PCI Express link has been reset */
393 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
395 /* PCI slot has been reset */
396 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
398 /* Device driver may resume normal operations */
399 void (*resume)(struct pci_dev *dev);
402 /* ---------------------------------------------------------------- */
406 struct list_head node;
408 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
409 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
410 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
411 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
412 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
413 int (*resume_early) (struct pci_dev *dev);
414 int (*resume) (struct pci_dev *dev); /* Device woken up */
415 void (*shutdown) (struct pci_dev *dev);
416 struct pm_ext_ops *pm;
417 struct pci_error_handlers *err_handler;
418 struct device_driver driver;
419 struct pci_dynids dynids;
422 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
425 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
426 * @_table: device table name
428 * This macro is used to create a struct pci_device_id array (a device table)
429 * in a generic manner.
431 #define DEFINE_PCI_DEVICE_TABLE(_table) \
432 const struct pci_device_id _table[] __devinitconst
435 * PCI_DEVICE - macro used to describe a specific pci device
436 * @vend: the 16 bit PCI Vendor ID
437 * @dev: the 16 bit PCI Device ID
439 * This macro is used to create a struct pci_device_id that matches a
440 * specific device. The subvendor and subdevice fields will be set to
443 #define PCI_DEVICE(vend,dev) \
444 .vendor = (vend), .device = (dev), \
445 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
448 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
449 * @dev_class: the class, subclass, prog-if triple for this device
450 * @dev_class_mask: the class mask for this device
452 * This macro is used to create a struct pci_device_id that matches a
453 * specific PCI class. The vendor, device, subvendor, and subdevice
454 * fields will be set to PCI_ANY_ID.
456 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
457 .class = (dev_class), .class_mask = (dev_class_mask), \
458 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
459 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
462 * PCI_VDEVICE - macro used to describe a specific pci device in short form
463 * @vend: the vendor name
464 * @dev: the 16 bit PCI Device ID
466 * This macro is used to create a struct pci_device_id that matches a
467 * specific PCI device. The subvendor, and subdevice fields will be set
468 * to PCI_ANY_ID. The macro allows the next field to follow as the device
472 #define PCI_VDEVICE(vendor, device) \
473 PCI_VENDOR_ID_##vendor, (device), \
474 PCI_ANY_ID, PCI_ANY_ID, 0, 0
476 /* these external functions are only available when PCI support is enabled */
479 extern struct bus_type pci_bus_type;
481 /* Do NOT directly access these two variables, unless you are arch specific pci
482 * code, or pci core code. */
483 extern struct list_head pci_root_buses; /* list of all known PCI buses */
484 /* Some device drivers need know if pci is initiated */
485 extern int no_pci_devices(void);
487 void pcibios_fixup_bus(struct pci_bus *);
488 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
489 char *pcibios_setup(char *str);
491 /* Used only when drivers/pci/setup.c is used */
492 void pcibios_align_resource(void *, struct resource *, resource_size_t,
494 void pcibios_update_irq(struct pci_dev *, int irq);
496 /* Generic PCI functions used internally */
498 extern struct pci_bus *pci_find_bus(int domain, int busnr);
499 void pci_bus_add_devices(struct pci_bus *bus);
500 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
501 struct pci_ops *ops, void *sysdata);
502 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
505 struct pci_bus *root_bus;
506 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
508 pci_bus_add_devices(root_bus);
511 struct pci_bus *pci_create_bus(struct device *parent, int bus,
512 struct pci_ops *ops, void *sysdata);
513 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
515 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
517 void pci_destroy_slot(struct pci_slot *slot);
518 void pci_update_slot_number(struct pci_slot *slot, int slot_nr);
519 int pci_scan_slot(struct pci_bus *bus, int devfn);
520 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
521 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
522 unsigned int pci_scan_child_bus(struct pci_bus *bus);
523 int __must_check pci_bus_add_device(struct pci_dev *dev);
524 void pci_read_bridge_bases(struct pci_bus *child);
525 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
526 struct resource *res);
527 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
528 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
529 extern void pci_dev_put(struct pci_dev *dev);
530 extern void pci_remove_bus(struct pci_bus *b);
531 extern void pci_remove_bus_device(struct pci_dev *dev);
532 extern void pci_stop_bus_device(struct pci_dev *dev);
533 void pci_setup_cardbus(struct pci_bus *bus);
534 extern void pci_sort_breadthfirst(void);
536 /* Generic PCI functions exported to card drivers */
538 #ifdef CONFIG_PCI_LEGACY
539 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
541 const struct pci_dev *from);
542 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
544 #endif /* CONFIG_PCI_LEGACY */
546 int pci_find_capability(struct pci_dev *dev, int cap);
547 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
548 int pci_find_ext_capability(struct pci_dev *dev, int cap);
549 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
550 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
551 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
553 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
554 struct pci_dev *from);
555 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
556 unsigned int ss_vendor, unsigned int ss_device,
557 const struct pci_dev *from);
558 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
559 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
560 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
561 int pci_dev_present(const struct pci_device_id *ids);
563 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
565 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
566 int where, u16 *val);
567 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
568 int where, u32 *val);
569 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
571 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
573 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
576 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
578 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
580 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
582 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
584 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
587 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
589 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
591 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
593 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
595 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
597 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
600 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
603 int __must_check pci_enable_device(struct pci_dev *dev);
604 int __must_check pci_enable_device_io(struct pci_dev *dev);
605 int __must_check pci_enable_device_mem(struct pci_dev *dev);
606 int __must_check pci_reenable_device(struct pci_dev *);
607 int __must_check pcim_enable_device(struct pci_dev *pdev);
608 void pcim_pin_device(struct pci_dev *pdev);
610 static inline int pci_is_managed(struct pci_dev *pdev)
612 return pdev->is_managed;
615 void pci_disable_device(struct pci_dev *dev);
616 void pci_set_master(struct pci_dev *dev);
617 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
618 #define HAVE_PCI_SET_MWI
619 int __must_check pci_set_mwi(struct pci_dev *dev);
620 int pci_try_set_mwi(struct pci_dev *dev);
621 void pci_clear_mwi(struct pci_dev *dev);
622 void pci_intx(struct pci_dev *dev, int enable);
623 void pci_msi_off(struct pci_dev *dev);
624 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
625 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
626 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
627 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
628 int pcix_get_max_mmrbc(struct pci_dev *dev);
629 int pcix_get_mmrbc(struct pci_dev *dev);
630 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
631 int pcie_get_readrq(struct pci_dev *dev);
632 int pcie_set_readrq(struct pci_dev *dev, int rq);
633 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
634 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
635 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
637 /* ROM control related routines */
638 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
639 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
640 size_t pci_get_rom_size(void __iomem *rom, size_t size);
642 /* Power management related routines */
643 int pci_save_state(struct pci_dev *dev);
644 int pci_restore_state(struct pci_dev *dev);
645 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
646 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
647 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
648 int pci_prepare_to_sleep(struct pci_dev *dev);
649 int pci_back_from_sleep(struct pci_dev *dev);
651 /* Functions for PCI Hotplug drivers to use */
652 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
654 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
655 void pci_bus_assign_resources(struct pci_bus *bus);
656 void pci_bus_size_bridges(struct pci_bus *bus);
657 int pci_claim_resource(struct pci_dev *, int);
658 void pci_assign_unassigned_resources(void);
659 void pdev_enable_device(struct pci_dev *);
660 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
661 int pci_enable_resources(struct pci_dev *, int mask);
662 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
663 int (*)(struct pci_dev *, u8, u8));
664 #define HAVE_PCI_REQ_REGIONS 2
665 int __must_check pci_request_regions(struct pci_dev *, const char *);
666 void pci_release_regions(struct pci_dev *);
667 int __must_check pci_request_region(struct pci_dev *, int, const char *);
668 void pci_release_region(struct pci_dev *, int);
669 int pci_request_selected_regions(struct pci_dev *, int, const char *);
670 void pci_release_selected_regions(struct pci_dev *, int);
672 /* drivers/pci/bus.c */
673 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
674 struct resource *res, resource_size_t size,
675 resource_size_t align, resource_size_t min,
676 unsigned int type_mask,
677 void (*alignf)(void *, struct resource *,
678 resource_size_t, resource_size_t),
680 void pci_enable_bridges(struct pci_bus *bus);
682 /* Proper probing supporting hot-pluggable devices */
683 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
684 const char *mod_name);
685 static inline int __must_check pci_register_driver(struct pci_driver *driver)
687 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
690 void pci_unregister_driver(struct pci_driver *dev);
691 void pci_remove_behind_bridge(struct pci_dev *dev);
692 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
693 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
694 struct pci_dev *dev);
695 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
698 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
700 int pci_cfg_space_size_ext(struct pci_dev *dev);
701 int pci_cfg_space_size(struct pci_dev *dev);
702 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
704 /* kmem_cache style wrapper around pci_alloc_consistent() */
706 #include <linux/dmapool.h>
708 #define pci_pool dma_pool
709 #define pci_pool_create(name, pdev, size, align, allocation) \
710 dma_pool_create(name, &pdev->dev, size, align, allocation)
711 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
712 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
713 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
715 enum pci_dma_burst_strategy {
716 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
717 strategy_parameter is N/A */
718 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
720 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
721 strategy_parameter byte boundaries */
725 u16 vector; /* kernel uses to write allocated vector */
726 u16 entry; /* driver uses to specify entry, OS writes */
730 #ifndef CONFIG_PCI_MSI
731 static inline int pci_enable_msi(struct pci_dev *dev)
736 static inline void pci_msi_shutdown(struct pci_dev *dev)
738 static inline void pci_disable_msi(struct pci_dev *dev)
741 static inline int pci_enable_msix(struct pci_dev *dev,
742 struct msix_entry *entries, int nvec)
747 static inline void pci_msix_shutdown(struct pci_dev *dev)
749 static inline void pci_disable_msix(struct pci_dev *dev)
752 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
755 static inline void pci_restore_msi_state(struct pci_dev *dev)
758 extern int pci_enable_msi(struct pci_dev *dev);
759 extern void pci_msi_shutdown(struct pci_dev *dev);
760 extern void pci_disable_msi(struct pci_dev *dev);
761 extern int pci_enable_msix(struct pci_dev *dev,
762 struct msix_entry *entries, int nvec);
763 extern void pci_msix_shutdown(struct pci_dev *dev);
764 extern void pci_disable_msix(struct pci_dev *dev);
765 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
766 extern void pci_restore_msi_state(struct pci_dev *dev);
770 /* The functions a driver should call */
771 int ht_create_irq(struct pci_dev *dev, int idx);
772 void ht_destroy_irq(unsigned int irq);
773 #endif /* CONFIG_HT_IRQ */
775 extern void pci_block_user_cfg_access(struct pci_dev *dev);
776 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
779 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
780 * a PCI domain is defined to be a set of PCI busses which share
781 * configuration space.
783 #ifdef CONFIG_PCI_DOMAINS
784 extern int pci_domains_supported;
786 enum { pci_domains_supported = 0 };
787 static inline int pci_domain_nr(struct pci_bus *bus)
792 static inline int pci_proc_domain(struct pci_bus *bus)
796 #endif /* CONFIG_PCI_DOMAINS */
798 #else /* CONFIG_PCI is not enabled */
801 * If the system does not have PCI, clearly these return errors. Define
802 * these as simple inline functions to avoid hair in drivers.
805 #define _PCI_NOP(o, s, t) \
806 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
808 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
810 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
811 _PCI_NOP(o, word, u16 x) \
812 _PCI_NOP(o, dword, u32 x)
813 _PCI_NOP_ALL(read, *)
816 static inline struct pci_dev *pci_find_device(unsigned int vendor,
818 const struct pci_dev *from)
823 static inline struct pci_dev *pci_find_slot(unsigned int bus,
829 static inline struct pci_dev *pci_get_device(unsigned int vendor,
831 struct pci_dev *from)
836 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
838 unsigned int ss_vendor,
839 unsigned int ss_device,
840 const struct pci_dev *from)
845 static inline struct pci_dev *pci_get_class(unsigned int class,
846 struct pci_dev *from)
851 #define pci_dev_present(ids) (0)
852 #define no_pci_devices() (1)
853 #define pci_dev_put(dev) do { } while (0)
855 static inline void pci_set_master(struct pci_dev *dev)
858 static inline int pci_enable_device(struct pci_dev *dev)
863 static inline void pci_disable_device(struct pci_dev *dev)
866 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
871 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
876 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
882 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
888 static inline int pci_assign_resource(struct pci_dev *dev, int i)
893 static inline int __pci_register_driver(struct pci_driver *drv,
894 struct module *owner)
899 static inline int pci_register_driver(struct pci_driver *drv)
904 static inline void pci_unregister_driver(struct pci_driver *drv)
907 static inline int pci_find_capability(struct pci_dev *dev, int cap)
912 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
918 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
923 /* Power management related routines */
924 static inline int pci_save_state(struct pci_dev *dev)
929 static inline int pci_restore_state(struct pci_dev *dev)
934 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
939 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
945 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
951 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
956 static inline void pci_release_regions(struct pci_dev *dev)
959 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
961 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
964 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
967 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
970 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
974 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
978 #endif /* CONFIG_PCI */
980 /* Include architecture-dependent settings and functions */
984 /* these helpers provide future and backwards compatibility
985 * for accessing popular PCI BAR info */
986 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
987 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
988 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
989 #define pci_resource_len(dev,bar) \
990 ((pci_resource_start((dev), (bar)) == 0 && \
991 pci_resource_end((dev), (bar)) == \
992 pci_resource_start((dev), (bar))) ? 0 : \
994 (pci_resource_end((dev), (bar)) - \
995 pci_resource_start((dev), (bar)) + 1))
997 /* Similar to the helpers above, these manipulate per-pci_dev
998 * driver-specific data. They are really just a wrapper around
999 * the generic device structure functions of these calls.
1001 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1003 return dev_get_drvdata(&pdev->dev);
1006 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1008 dev_set_drvdata(&pdev->dev, data);
1011 /* If you want to know what to call your pci_dev, ask this function.
1012 * Again, it's a wrapper around the generic device.
1014 static inline const char *pci_name(struct pci_dev *pdev)
1016 return dev_name(&pdev->dev);
1020 /* Some archs don't want to expose struct resource to userland as-is
1021 * in sysfs and /proc
1023 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1024 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1025 const struct resource *rsrc, resource_size_t *start,
1026 resource_size_t *end)
1028 *start = rsrc->start;
1031 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1035 * The world is not perfect and supplies us with broken PCI devices.
1036 * For at least a part of these bugs we need a work-around, so both
1037 * generic (drivers/pci/quirks.c) and per-architecture code can define
1038 * fixup hooks to be called for particular buggy devices.
1042 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1043 void (*hook)(struct pci_dev *dev);
1046 enum pci_fixup_pass {
1047 pci_fixup_early, /* Before probing BARs */
1048 pci_fixup_header, /* After reading configuration header */
1049 pci_fixup_final, /* Final phase of device fixups */
1050 pci_fixup_enable, /* pci_enable_device() time */
1051 pci_fixup_resume, /* pci_device_resume() */
1052 pci_fixup_suspend, /* pci_device_suspend */
1053 pci_fixup_resume_early, /* pci_device_resume_early() */
1056 /* Anonymous variables would be nice... */
1057 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1058 static const struct pci_fixup __pci_fixup_##name __used \
1059 __attribute__((__section__(#section))) = { vendor, device, hook };
1060 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1061 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1062 vendor##device##hook, vendor, device, hook)
1063 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1064 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1065 vendor##device##hook, vendor, device, hook)
1066 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1067 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1068 vendor##device##hook, vendor, device, hook)
1069 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1070 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1071 vendor##device##hook, vendor, device, hook)
1072 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1073 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1074 resume##vendor##device##hook, vendor, device, hook)
1075 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1076 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1077 resume_early##vendor##device##hook, vendor, device, hook)
1078 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1079 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1080 suspend##vendor##device##hook, vendor, device, hook)
1083 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1085 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1086 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1087 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1088 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1089 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1091 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1093 extern int pci_pci_problems;
1094 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1095 #define PCIPCI_TRITON 2
1096 #define PCIPCI_NATOMA 4
1097 #define PCIPCI_VIAETBF 8
1098 #define PCIPCI_VSFX 16
1099 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1100 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1102 extern unsigned long pci_cardbus_io_size;
1103 extern unsigned long pci_cardbus_mem_size;
1105 int pcibios_add_platform_entries(struct pci_dev *dev);
1106 void pcibios_disable_device(struct pci_dev *dev);
1107 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1108 enum pcie_reset_state state);
1110 #ifdef CONFIG_PCI_MMCONFIG
1111 extern void __init pci_mmcfg_early_init(void);
1112 extern void __init pci_mmcfg_late_init(void);
1114 static inline void pci_mmcfg_early_init(void) { }
1115 static inline void pci_mmcfg_late_init(void) { }
1118 #endif /* __KERNEL__ */
1119 #endif /* LINUX_PCI_H */