5 * Flexible Static Memory Controller (FSMC)
6 * platform data interface and header file
8 * Copyright © 2010 ST Microelectronics
9 * Vipin Kumar <vipin.kumar@st.com>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
19 #include <linux/platform_device.h>
20 #include <linux/mtd/physmap.h>
21 #include <linux/types.h>
22 #include <linux/mtd/partitions.h>
23 #include <asm/param.h>
25 #define FSMC_NAND_BW8 1
26 #define FSMC_NAND_BW16 2
29 * The placement of the Command Latch Enable (CLE) and
30 * Address Latch Enable (ALE) is twised around in the
31 * SPEAR310 implementation.
33 #if defined(CONFIG_MACH_SPEAR310)
34 #define PLAT_NAND_CLE (1 << 17)
35 #define PLAT_NAND_ALE (1 << 16)
37 #define PLAT_NAND_CLE (1 << 16)
38 #define PLAT_NAND_ALE (1 << 17)
41 #define FSMC_MAX_NOR_BANKS 4
42 #define FSMC_MAX_NAND_BANKS 4
44 #define FSMC_FLASH_WIDTH8 1
45 #define FSMC_FLASH_WIDTH16 2
47 struct fsmc_nor_bank_regs {
52 /* ctrl register definitions */
53 #define BANK_ENABLE (1 << 0)
54 #define MUXED (1 << 1)
55 #define NOR_DEV (2 << 2)
56 #define WIDTH_8 (0 << 4)
57 #define WIDTH_16 (1 << 4)
58 #define RSTPWRDWN (1 << 6)
59 #define WPROT (1 << 7)
60 #define WRT_ENABLE (1 << 12)
61 #define WAIT_ENB (1 << 13)
63 /* ctrl_tim register definitions */
65 struct fsms_nand_bank_regs {
76 #define FSMC_NOR_REG_SIZE 0x40
79 struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
80 uint8_t reserved_1[0x40 - 0x20];
81 struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
82 uint8_t reserved_2[0xfe0 - 0xc0];
83 uint32_t peripid0; /* 0xfe0 */
84 uint32_t peripid1; /* 0xfe4 */
85 uint32_t peripid2; /* 0xfe8 */
86 uint32_t peripid3; /* 0xfec */
87 uint32_t pcellid0; /* 0xff0 */
88 uint32_t pcellid1; /* 0xff4 */
89 uint32_t pcellid2; /* 0xff8 */
90 uint32_t pcellid3; /* 0xffc */
93 #define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ)
95 /* pc register definitions */
96 #define FSMC_RESET (1 << 0)
97 #define FSMC_WAITON (1 << 1)
98 #define FSMC_ENABLE (1 << 2)
99 #define FSMC_DEVTYPE_NAND (1 << 3)
100 #define FSMC_DEVWID_8 (0 << 4)
101 #define FSMC_DEVWID_16 (1 << 4)
102 #define FSMC_ECCEN (1 << 6)
103 #define FSMC_ECCPLEN_512 (0 << 7)
104 #define FSMC_ECCPLEN_256 (1 << 7)
105 #define FSMC_TCLR_1 (1 << 9)
106 #define FSMC_TAR_1 (1 << 13)
108 /* sts register definitions */
109 #define FSMC_CODE_RDY (1 << 15)
111 /* comm register definitions */
112 #define FSMC_TSET_0 (0 << 0)
113 #define FSMC_TWAIT_6 (6 << 8)
114 #define FSMC_THOLD_4 (4 << 16)
115 #define FSMC_THIZ_1 (1 << 24)
117 /* peripid2 register definitions */
118 #define FSMC_REVISION_MSK (0xf)
119 #define FSMC_REVISION_SHFT (0x4)
130 static inline uint32_t get_fsmc_version(struct fsmc_regs *regs)
132 return (readl(®s->peripid2) >> FSMC_REVISION_SHFT) &
137 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
138 * and it has to be read consecutively and immediately after the 512
139 * byte data block for hardware to generate the error bit offsets
140 * Managing the ecc bytes in the following way is easier. This way is
141 * similar to oobfree structure maintained already in u-boot nand driver
143 #define MAX_ECCPLACE_ENTRIES 32
145 struct fsmc_nand_eccplace {
150 struct fsmc_eccplace {
151 struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
155 * fsmc_nand_platform_data - platform specific NAND controller config
156 * @partitions: partition table for the platform, use a default fallback
158 * @nr_partitions: the number of partitions in the previous entry
159 * @options: different options for the driver
161 * @bank: default bank
162 * @select_bank: callback to select a certain bank, this is
163 * platform-specific. If the controller only supports one bank
164 * this may be set to NULL
166 struct fsmc_nand_platform_data {
167 struct mtd_partition *partitions;
168 unsigned int nr_partitions;
169 unsigned int options;
172 void (*select_bank)(uint32_t bank, uint32_t busw);
175 extern int __init fsmc_nor_init(struct platform_device *pdev,
176 unsigned long base, uint32_t bank, uint32_t width);
177 extern void __init fsmc_init_board_info(struct platform_device *pdev,
178 struct mtd_partition *partitions, unsigned int nr_partitions,
181 #endif /* __MTD_FSMC_H */