2 * linux/include/linux/clk-provider.h
4 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
5 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #ifndef __LINUX_CLK_PROVIDER_H
12 #define __LINUX_CLK_PROVIDER_H
14 #include <linux/clk.h>
16 #ifdef CONFIG_COMMON_CLK
19 * struct clk_hw - handle for traversing from a struct clk to its corresponding
20 * hardware-specific structure. struct clk_hw should be declared within struct
21 * clk_foo and then referenced by the struct clk instance that uses struct
24 * clk: pointer to the struct clk instance that points back to this struct
32 * flags used across common struct clk. these flags should only affect the
33 * top-level framework. custom flags for dealing with hardware specifics
34 * belong in struct clk_foo
36 #define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */
37 #define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
38 #define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
39 #define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
40 #define CLK_IS_ROOT BIT(4) /* root clk, has no parent */
43 * struct clk_ops - Callback operations for hardware clocks; these are to
44 * be provided by the clock implementation, and will be called by drivers
45 * through the clk_* api.
47 * @prepare: Prepare the clock for enabling. This must not return until
48 * the clock is fully prepared, and it's safe to call clk_enable.
49 * This callback is intended to allow clock implementations to
50 * do any initialisation that may sleep. Called with
53 * @unprepare: Release the clock from its prepared state. This will typically
54 * undo any work done in the @prepare callback. Called with
57 * @enable: Enable the clock atomically. This must not return until the
58 * clock is generating a valid clock signal, usable by consumer
59 * devices. Called with enable_lock held. This function must not
62 * @disable: Disable the clock atomically. Called with enable_lock held.
63 * This function must not sleep.
65 * @recalc_rate Recalculate the rate of this clock, by quering hardware. The
66 * parent rate is an input parameter. It is up to the caller to
67 * insure that the prepare_mutex is held across this call.
68 * Returns the calculated rate. Optional, but recommended - if
69 * this op is not set then clock rate will be initialized to 0.
71 * @round_rate: Given a target rate as input, returns the closest rate actually
72 * supported by the clock.
74 * @get_parent: Queries the hardware to determine the parent of a clock. The
75 * return value is a u8 which specifies the index corresponding to
76 * the parent clock. This index can be applied to either the
77 * .parent_names or .parents arrays. In short, this function
78 * translates the parent value read from hardware into an array
79 * index. Currently only called when the clock is initialized by
80 * __clk_init. This callback is mandatory for clocks with
81 * multiple parents. It is optional (and unnecessary) for clocks
82 * with 0 or 1 parents.
84 * @set_parent: Change the input source of this clock; for clocks with multiple
85 * possible parents specify a new parent by passing in the index
86 * as a u8 corresponding to the parent in either the .parent_names
87 * or .parents arrays. This function in affect translates an
88 * array index into the value programmed into the hardware.
89 * Returns 0 on success, -EERROR otherwise.
91 * @set_rate: Change the rate of this clock. The requested rate is specified
92 * by the second argument, which should typically be the return
93 * of .round_rate call. The third argument gives the parent rate
94 * which is likely helpful for most .set_rate implementation.
95 * Returns 0 on success, -EERROR otherwise.
97 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
98 * implementations to split any work between atomic (enable) and sleepable
99 * (prepare) contexts. If enabling a clock requires code that might sleep,
100 * this must be done in clk_prepare. Clock enable code that will never be
101 * called in a sleepable context may be implement in clk_enable.
103 * Typically, drivers will call clk_prepare when a clock may be needed later
104 * (eg. when a device is opened), and clk_enable when the clock is actually
105 * required (eg. from an interrupt). Note that clk_prepare MUST have been
106 * called before clk_enable.
109 int (*prepare)(struct clk_hw *hw);
110 void (*unprepare)(struct clk_hw *hw);
111 int (*enable)(struct clk_hw *hw);
112 void (*disable)(struct clk_hw *hw);
113 int (*is_enabled)(struct clk_hw *hw);
114 unsigned long (*recalc_rate)(struct clk_hw *hw,
115 unsigned long parent_rate);
116 long (*round_rate)(struct clk_hw *hw, unsigned long,
118 int (*set_parent)(struct clk_hw *hw, u8 index);
119 u8 (*get_parent)(struct clk_hw *hw);
120 int (*set_rate)(struct clk_hw *hw, unsigned long,
122 void (*init)(struct clk_hw *hw);
126 * DOC: Basic clock implementations common to many platforms
128 * Each basic clock hardware type is comprised of a structure describing the
129 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
130 * unique flags for that hardware type, a registration function and an
131 * alternative macro for static initialization
135 * struct clk_fixed_rate - fixed-rate clock
136 * @hw: handle between common and hardware-specific interfaces
137 * @fixed_rate: constant frequency of clock
139 struct clk_fixed_rate {
141 unsigned long fixed_rate;
145 extern const struct clk_ops clk_fixed_rate_ops;
146 struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
147 const char *parent_name, unsigned long flags,
148 unsigned long fixed_rate);
151 * struct clk_gate - gating clock
153 * @hw: handle between common and hardware-specific interfaces
154 * @reg: register controlling gate
155 * @bit_idx: single bit controlling gate
156 * @flags: hardware-specific flags
157 * @lock: register lock
159 * Clock which can gate its output. Implements .enable & .disable
162 * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to
163 * enable the clock. Setting this flag does the opposite: setting the bit
164 * disable the clock and clearing it enables the clock
174 #define CLK_GATE_SET_TO_DISABLE BIT(0)
176 extern const struct clk_ops clk_gate_ops;
177 struct clk *clk_register_gate(struct device *dev, const char *name,
178 const char *parent_name, unsigned long flags,
179 void __iomem *reg, u8 bit_idx,
180 u8 clk_gate_flags, spinlock_t *lock);
183 * struct clk_divider - adjustable divider clock
185 * @hw: handle between common and hardware-specific interfaces
186 * @reg: register containing the divider
187 * @shift: shift to the divider bit field
188 * @width: width of the divider bit field
189 * @lock: register lock
191 * Clock with an adjustable divider affecting its output frequency. Implements
192 * .recalc_rate, .set_rate and .round_rate
195 * CLK_DIVIDER_ONE_BASED - by default the divisor is the value read from the
196 * register plus one. If CLK_DIVIDER_ONE_BASED is set then the divider is
197 * the raw value read from the register, with the value of zero considered
199 * CLK_DIVIDER_POWER_OF_TWO - clock divisor is 2 raised to the value read from
200 * the hardware register
211 #define CLK_DIVIDER_ONE_BASED BIT(0)
212 #define CLK_DIVIDER_POWER_OF_TWO BIT(1)
214 extern const struct clk_ops clk_divider_ops;
215 struct clk *clk_register_divider(struct device *dev, const char *name,
216 const char *parent_name, unsigned long flags,
217 void __iomem *reg, u8 shift, u8 width,
218 u8 clk_divider_flags, spinlock_t *lock);
221 * struct clk_mux - multiplexer clock
223 * @hw: handle between common and hardware-specific interfaces
224 * @reg: register controlling multiplexer
225 * @shift: shift to multiplexer bit field
226 * @width: width of mutliplexer bit field
227 * @num_clks: number of parent clocks
228 * @lock: register lock
230 * Clock with multiple selectable parents. Implements .get_parent, .set_parent
234 * CLK_MUX_INDEX_ONE - register index starts at 1, not 0
235 * CLK_MUX_INDEX_BIT - register index is a single bit (power of two)
246 #define CLK_MUX_INDEX_ONE BIT(0)
247 #define CLK_MUX_INDEX_BIT BIT(1)
249 extern const struct clk_ops clk_mux_ops;
250 struct clk *clk_register_mux(struct device *dev, const char *name,
251 const char **parent_names, u8 num_parents, unsigned long flags,
252 void __iomem *reg, u8 shift, u8 width,
253 u8 clk_mux_flags, spinlock_t *lock);
256 * clk_register - allocate a new clock, register it and return an opaque cookie
257 * @dev: device that is registering this clock
259 * @ops: operations this clock supports
260 * @hw: link to hardware-specific clock data
261 * @parent_names: array of string names for all possible parents
262 * @num_parents: number of possible parents
263 * @flags: framework-level hints and quirks
265 * clk_register is the primary interface for populating the clock tree with new
266 * clock nodes. It returns a pointer to the newly allocated struct clk which
267 * cannot be dereferenced by driver code but may be used in conjuction with the
268 * rest of the clock API. In the event of an error clk_register will return an
269 * error code; drivers must test for an error code after calling clk_register.
271 struct clk *clk_register(struct device *dev, const char *name,
272 const struct clk_ops *ops, struct clk_hw *hw,
273 const char **parent_names, u8 num_parents, unsigned long flags);
275 /* helper functions */
276 const char *__clk_get_name(struct clk *clk);
277 struct clk_hw *__clk_get_hw(struct clk *clk);
278 u8 __clk_get_num_parents(struct clk *clk);
279 struct clk *__clk_get_parent(struct clk *clk);
280 inline int __clk_get_enable_count(struct clk *clk);
281 inline int __clk_get_prepare_count(struct clk *clk);
282 unsigned long __clk_get_rate(struct clk *clk);
283 unsigned long __clk_get_flags(struct clk *clk);
284 int __clk_is_enabled(struct clk *clk);
285 struct clk *__clk_lookup(const char *name);
288 * FIXME clock api without lock protection
290 int __clk_prepare(struct clk *clk);
291 void __clk_unprepare(struct clk *clk);
292 void __clk_reparent(struct clk *clk, struct clk *new_parent);
293 unsigned long __clk_round_rate(struct clk *clk, unsigned long rate);
295 #endif /* CONFIG_COMMON_CLK */
296 #endif /* CLK_PROVIDER_H */