dt-bindings: Add AUO H546DLB01 single channel MIPI screen dts
[firefly-linux-kernel-4.4.55.git] / include / dt-bindings / display / screen-timing / lcd-h546dlb01-mipi.dtsi
1 /*
2  * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  *
42  * include/dt-bindings/display/screen-timing/lcd-h546dlb01-mipi.dtsi
43  * author: bivvy.bi@rock-chips.com
44  * create date: 2016-09-02
45  * lcd Model: AUO h546dlb01
46  * resolution: 1080 X 1920
47  * mipi channel: single
48  */
49
50 disp_mipi_init: mipi_dsi_init {
51         compatible = "rockchip,mipi_dsi_init";
52         rockchip,screen_init = <1>;
53         rockchip,dsi_lane = <4>;
54         rockchip,dsi_hs_clk = <1050>;
55         rockchip,mipi_dsi_num = <1>;
56 };
57
58 disp_mipi_power_ctr: mipi_power_ctr {
59         compatible = "rockchip,mipi_power_ctr";
60 };
61
62 disp_mipi_init_cmds: screen-on-cmds {
63         compatible = "rockchip,screen-on-cmds";
64         rockchip,cmd_debug = <1>;
65
66         rockchip,on-cmds1 {
67                 compatible = "rockchip,on-cmds";
68                 rockchip,cmd_type = <LPDT>;
69                 rockchip,dsi_id = <0>;
70                 rockchip,cmd = <0x23 0xFE 0x08>;
71                 rockchip,cmd_delay = <0>;
72         };
73
74         rockchip,on-cmds2 {
75                 compatible = "rockchip,on-cmds";
76                 rockchip,cmd_type = <LPDT>;
77                 rockchip,dsi_id = <0>;
78                 rockchip,cmd = <0x23 0x03 0x40>;
79                 rockchip,cmd_delay = <0>;
80         };
81
82         rockchip,on-cmds3 {
83                 compatible = "rockchip,on-cmds";
84                 rockchip,cmd_type = <LPDT>;
85                 rockchip,dsi_id = <0>;
86                 rockchip,cmd = <0x23 0x07 0x1a>;
87                 rockchip,cmd_delay = <0>;
88         };
89
90         rockchip,on-cmds4 {
91                 compatible = "rockchip,on-cmds";
92                 rockchip,cmd_type = <LPDT>;
93                 rockchip,dsi_id = <0>;
94                 rockchip,cmd = <0x23 0xfe 0x0d>;
95                 rockchip,cmd_delay = <0>;
96         };
97
98         rockchip,on-cmds5 {
99                 compatible = "rockchip,on-cmds";
100                 rockchip,cmd_type = <LPDT>;
101                 rockchip,dsi_id = <0>;
102                 rockchip,cmd = <0x23 0x53 0xfe>;
103                 rockchip,cmd_delay = <0>;
104         };
105
106         rockchip,on-cmds6 {
107                 compatible = "rockchip,on-cmds";
108                 rockchip,cmd_type = <LPDT>;
109                 rockchip,dsi_id = <0>;
110                 rockchip,cmd = <0x23 0xfe 0x00>;
111                 rockchip,cmd_delay = <0>;
112         };
113
114         rockchip,on-cmds7 {
115                 compatible = "rockchip,on-cmds";
116                 rockchip,cmd_type = <LPDT>;
117                 rockchip,dsi_id = <0>;
118                 rockchip,cmd = <0x23 0x51 0xff>;
119                 rockchip,cmd_delay = <0>;
120         };
121
122         rockchip,on-cmds8 {
123                 compatible = "rockchip,on-cmds";
124                 rockchip,cmd_type = <LPDT>;
125                 rockchip,dsi_id = <0>;
126                 rockchip,cmd = <0x23 0xc2 0x03>;
127                 rockchip,cmd_delay = <0>;
128         };
129
130         rockchip,on-cmds9 {
131                 compatible = "rockchip,on-cmds";
132                 rockchip,cmd_type = <LPDT>;
133                 rockchip,dsi_id = <0>;
134                 rockchip,cmd = <0x05 dcs_exit_sleep_mode>;
135                 rockchip,cmd_delay = <120>;
136         };
137
138         rockchip,on-cmds10 {
139                 compatible = "rockchip,on-cmds";
140                 rockchip,cmd_type = <LPDT>;
141                 rockchip,dsi_id = <0>;
142                 rockchip,cmd = <0x05 dcs_set_display_on>;
143                 rockchip,cmd_delay = <0>;
144         };
145 };
146
147 disp_timings: display-timings {
148         native-mode = <&timing0>;
149         compatible = "rockchip,display-timings";
150
151         timing0: timing0 {
152                 screen-type = <SCREEN_MIPI>;
153                 lvds-format = <LVDS_8BIT_2>;
154                 out-face = <OUT_P888>;
155                 clock-frequency = <153000000>;
156                 hactive = <1080>;
157                 vactive = <1920>;
158                 hback-porch = <24>;
159                 hfront-porch = <8>;
160                 vback-porch = <7>;
161                 vfront-porch = <12>;
162                 hsync-len = <5>;
163                 vsync-len = <5>;
164                 hsync-active = <0>;
165                 vsync-active = <0>;
166                 de-active = <0>;
167                 pixelclk-active = <0>;
168                 swap-rb = <0>;
169                 swap-rg = <0>;
170                 swap-gb = <0>;
171         };
172 };