1 #ifndef _RK31XX_LVDS_H_
2 #define _RK31XX_LVDS_H_
4 #include <linux/rk_screen.h>
5 #include <linux/mfd/syscon.h>
6 #include <linux/regmap.h>
8 #define BITS(x, bit) ((x) << (bit))
9 #define BITS_MASK(x, mask, bit) BITS((x) & (mask), bit)
10 #define BITS_EN(mask, bit) BITS(mask, bit + 16)
12 /* RK312X_GRF_LVDS_CON0 */
13 #define v_LVDS_DATA_SEL(x) (BITS_MASK(x, 1, 0) | BITS_EN(1, 0))
14 #define v_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 1) | BITS_EN(3, 1))
15 #define v_LVDS_MSBSEL(x) (BITS_MASK(x, 1, 3) | BITS_EN(1, 3))
16 #define v_LVDSMODE_EN(x) (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
17 #define v_MIPIPHY_TTL_EN(x) (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
18 #define v_MIPIPHY_LANE0_EN(x) (BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
19 #define v_MIPIDPI_FORCEX_EN(x) (BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
21 /* RK3368_GRF_SOC_CON7 */
22 #define v_RK3368_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
23 #define v_RK3368_LVDS_MSBSEL(x) (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
24 #define v_RK3368_LVDSMODE_EN(x) (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
25 #define v_RK3368_MIPIPHY_TTL_EN(x) (BITS_MASK(x, 1, 15) | BITS_EN(1, 15))
26 #define v_RK3368_MIPIPHY_LANE0_EN(x) (BITS_MASK(x, 1, 5) | BITS_EN(1, 5))
27 #define v_RK3368_MIPIDPI_FORCEX_EN(x) (BITS_MASK(x, 1, 6) | BITS_EN(1, 6))
29 LVDS_DATA_FROM_LCDC = 0,
38 /* RK312X_GRF_SOC_CON1 */
39 #define v_MIPITTL_CLK_EN(x) (BITS_MASK(x, 1, 7) | BITS_EN(1, 7))
40 #define v_MIPITTL_LANE0_EN(x) (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
41 #define v_MIPITTL_LANE1_EN(x) (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
42 #define v_MIPITTL_LANE2_EN(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
43 #define v_MIPITTL_LANE3_EN(x) (BITS_MASK(x, 1, 14) | BITS_EN(1, 14))
46 #define MIPIPHY_REG0 0x0000
47 #define m_LANE_EN_0 BITS(1, 2)
48 #define m_LANE_EN_1 BITS(1, 3)
49 #define m_LANE_EN_2 BITS(1, 4)
50 #define m_LANE_EN_3 BITS(1, 5)
51 #define m_LANE_EN_CLK BITS(1, 5)
52 #define v_LANE_EN_0(x) BITS(1, 2)
53 #define v_LANE_EN_1(x) BITS(1, 3)
54 #define v_LANE_EN_2(x) BITS(1, 4)
55 #define v_LANE_EN_3(x) BITS(1, 5)
56 #define v_LANE_EN_CLK(x) BITS(1, 5)
58 #define MIPIPHY_REG1 0x0004
59 #define m_SYNC_RST BITS(1, 0)
60 #define m_LDO_PWR_DOWN BITS(1, 1)
61 #define m_PLL_PWR_DOWN BITS(1, 2)
62 #define v_SYNC_RST(x) BITS_MASK(x, 1, 0)
63 #define v_LDO_PWR_DOWN(x) BITS_MASK(x, 1, 1)
64 #define v_PLL_PWR_DOWN(x) BITS_MASK(x, 1, 2)
66 #define MIPIPHY_REG3 0x000c
67 #define m_PREDIV BITS(0x1f, 0)
68 #define m_FBDIV_MSB BITS(1, 5)
69 #define v_PREDIV(x) BITS_MASK(x, 0x1f, 0)
70 #define v_FBDIV_MSB(x) BITS_MASK(x, 1, 5)
72 #define MIPIPHY_REG4 0x0010
73 #define v_FBDIV_LSB(x) BITS_MASK(x, 0xff, 0)
75 #define MIPIPHY_REGE0 0x0380
76 #define m_MSB_SEL BITS(1, 0)
77 #define m_DIG_INTER_RST BITS(1, 2)
78 #define m_LVDS_MODE_EN BITS(1, 5)
79 #define m_TTL_MODE_EN BITS(1, 6)
80 #define m_MIPI_MODE_EN BITS(1, 7)
81 #define v_MSB_SEL(x) BITS_MASK(x, 1, 0)
82 #define v_DIG_INTER_RST(x) BITS_MASK(x, 1, 2)
83 #define v_LVDS_MODE_EN(x) BITS_MASK(x, 1, 5)
84 #define v_TTL_MODE_EN(x) BITS_MASK(x, 1, 6)
85 #define v_MIPI_MODE_EN(x) BITS_MASK(x, 1, 7)
87 #define MIPIPHY_REGE1 0x0384
88 #define m_DIG_INTER_EN BITS(1, 7)
89 #define v_DIG_INTER_EN(x) BITS_MASK(x, 1, 7)
91 #define MIPIPHY_REGE3 0x038c
92 #define m_MIPI_EN BITS(1, 0)
93 #define m_LVDS_EN BITS(1, 1)
94 #define m_TTL_EN BITS(1, 2)
95 #define v_MIPI_EN(x) BITS_MASK(x, 1, 0)
96 #define v_LVDS_EN(x) BITS_MASK(x, 1, 1)
97 #define v_TTL_EN(x) BITS_MASK(x, 1, 2)
99 #define MIPIPHY_REGE4 0x0390
100 #define m_VOCM BITS(3, 4)
101 #define m_DIFF_V BITS(3, 6)
103 #define v_VOCM(x) BITS_MASK(x, 3, 4)
104 #define v_DIFF_V(x) BITS_MASK(x, 3, 6)
106 #define MIPIPHY_REGE8 0x03a0
108 #define MIPIPHY_REGEB 0x03ac
109 #define v_PLL_PWR_OFF(x) BITS_MASK(x, 1, 2)
110 #define v_LANECLK_EN(x) BITS_MASK(x, 1, 3)
111 #define v_LANE3_EN(x) BITS_MASK(x, 1, 4)
112 #define v_LANE2_EN(x) BITS_MASK(x, 1, 5)
113 #define v_LANE1_EN(x) BITS_MASK(x, 1, 6)
114 #define v_LANE0_EN(x) BITS_MASK(x, 1, 7)
116 #define GRF_SOC_CON7_LVDS 0x041c
117 #define GRF_SOC_CON15_LVDS 0x043c
118 #define v_RK3368_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
124 struct rk_lvds_drvdata {
129 struct rk_lvds_device {
130 struct rk_lvds_drvdata *data;
132 void __iomem *regbase;
133 void __iomem *ctrl_reg;
134 struct regmap *grf_lvds_base;
135 struct clk *pclk; /*phb clk*/
136 struct clk *ctrl_pclk; /* mipi ctrl pclk*/
137 struct clk *ctrl_hclk; /* mipi ctrl hclk*/
138 struct rk_screen screen;
141 #ifdef CONFIG_PINCTRL
142 struct dev_pin_info *pins;
146 static inline int lvds_writel(struct rk_lvds_device *lvds, u32 offset, u32 val)
148 writel_relaxed(val, lvds->regbase + offset);
152 static inline int lvds_msk_reg(struct rk_lvds_device *lvds, u32 offset,
157 temp = readl_relaxed(lvds->regbase + offset) & (0xFF - (msk));
158 writel_relaxed(temp | ((val) & (msk)), lvds->regbase + offset);
162 static inline u32 lvds_readl(struct rk_lvds_device *lvds, u32 offset)
164 return readl_relaxed(lvds->regbase + offset);
167 static inline int lvds_grf_writel(struct rk_lvds_device *lvds,
170 regmap_write(lvds->grf_lvds_base, offset, val);
176 static inline int lvds_dsi_writel(struct rk_lvds_device *lvds,
179 writel_relaxed(val, lvds->ctrl_reg + offset);
185 static inline u32 lvds_phy_lockon(struct rk_lvds_device *lvds)
189 val = readl_relaxed(lvds->ctrl_reg + 0x10);