2 * drivers/video/rockchip/transmitter/rk31xx_lvds.c
4 * Copyright (C) 2014 ROCKCHIP, Inc.
5 * Author: zhuangwenlong<zwl@rock-chips.com>
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/slab.h>
21 #include <linux/types.h>
22 #include <linux/i2c.h>
23 #include <linux/rk_fb.h>
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/rockchip/iomap.h>
27 #include <linux/rockchip/grf.h>
28 #include "rk31xx_lvds.h"
31 #define grf_readl(offset) readl_relaxed(RK_GRF_VIRT + offset)
32 #define grf_writel(v,offset) \
34 writel_relaxed(v, RK_GRF_VIRT + offset); \
39 static struct rk_lvds_device *rk31xx_lvds;
41 static int rk31xx_lvds_clk_init(struct rk_lvds_device *lvds)
43 lvds->pclk = devm_clk_get(lvds->dev, "pclk_lvds");
44 if (IS_ERR(lvds->pclk)) {
45 dev_err(lvds->dev, "get pclk failed\n");
46 return PTR_ERR(lvds->pclk);
49 lvds->ctrl_pclk = devm_clk_get(lvds->dev, "pclk_lvds_ctl");
50 if (IS_ERR(lvds->ctrl_pclk)) {
51 dev_err(lvds->dev, "get ctrl pclk failed\n");
52 return PTR_ERR(lvds->ctrl_pclk);
55 if (lvds->data->soc_type == LVDS_SOC_RK312X) {
56 lvds->ctrl_hclk = devm_clk_get(lvds->dev, "hclk_vio_h2p");
57 if (IS_ERR(lvds->ctrl_hclk)) {
58 dev_err(lvds->dev, "get ctrl hclk failed\n");
59 return PTR_ERR(lvds->ctrl_hclk);
66 static int rk31xx_lvds_clk_enable(struct rk_lvds_device *lvds)
69 clk_prepare_enable(lvds->pclk);
70 clk_prepare_enable(lvds->ctrl_pclk);
71 if (lvds->data->soc_type == LVDS_SOC_RK312X)
72 clk_prepare_enable(lvds->ctrl_hclk);
79 static int rk31xx_lvds_clk_disable(struct rk_lvds_device *lvds)
82 clk_disable_unprepare(lvds->pclk);
83 if (lvds->data->soc_type == LVDS_SOC_RK312X)
84 clk_disable_unprepare(lvds->ctrl_hclk);
85 clk_disable_unprepare(lvds->ctrl_pclk);
92 static int rk31xx_lvds_pwr_on(void)
94 struct rk_lvds_device *lvds = rk31xx_lvds;
96 if (lvds->screen.type == SCREEN_LVDS) {
97 /* power up lvds pll and ldo */
98 lvds_msk_reg(lvds, MIPIPHY_REG1,
99 m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
100 v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) | v_PLL_PWR_DOWN(0));
102 /* enable lvds lane and power on pll */
103 lvds_writel(lvds, MIPIPHY_REGEB,
104 v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
105 v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
108 lvds_msk_reg(lvds, MIPIPHY_REGE3,
109 m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
110 v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
112 lvds_msk_reg(lvds, MIPIPHY_REGE3,
113 m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
114 v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
119 static int rk31xx_lvds_pwr_off(void)
121 struct rk_lvds_device *lvds = rk31xx_lvds;
123 /* disable lvds lane and power off pll */
124 lvds_writel(lvds, MIPIPHY_REGEB,
125 v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
126 v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
128 /* power down lvds pll and bandgap */
129 lvds_msk_reg(lvds, MIPIPHY_REG1,
130 m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
131 v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
134 lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
135 v_LVDS_EN(0) | v_TTL_EN(0));
139 static int rk31xx_lvds_disable(void)
141 struct rk_lvds_device *lvds = rk31xx_lvds;
143 if (unlikely(!lvds) || !lvds->sys_state)
146 grf_writel(v_LVDSMODE_EN(0) | v_MIPIPHY_TTL_EN(0), RK312X_GRF_LVDS_CON0);
148 rk31xx_lvds_pwr_off();
149 rk31xx_lvds_clk_disable(lvds);
151 #if !defined(CONFIG_RK_FPGA)
152 #ifdef CONFIG_PINCTRL
153 if (lvds->screen.type == SCREEN_RGB) {
154 if (lvds->dev->pins) {
155 pinctrl_select_state(lvds->dev->pins->p,
156 lvds->dev->pins->sleep_state);
157 } else if (lvds->pins && !IS_ERR(lvds->pins->sleep_state)) {
158 pinctrl_select_state(lvds->pins->p,
159 lvds->pins->sleep_state);
164 lvds->sys_state = false;
168 static void rk31xx_output_lvds(struct rk_lvds_device *lvds,
169 struct rk_screen *screen)
172 u32 delay_times = 20;
174 /* if LVDS transmitter source from VOP, vop_dclk need get invert
175 * set iomux in dts pinctrl
177 if (lvds->data->soc_type == LVDS_SOC_RK3368) {
178 /* enable lvds mode */
179 val |= v_RK3368_LVDSMODE_EN(1) | v_RK3368_MIPIPHY_TTL_EN(0);
180 /* config data source */
181 /*val |= v_LVDS_DATA_SEL(LVDS_DATA_FROM_LCDC); */
182 /* config lvds_format */
183 val |= v_RK3368_LVDS_OUTPUT_FORMAT(screen->lvds_format);
184 /* LSB receive mode */
185 val |= v_RK3368_LVDS_MSBSEL(LVDS_MSB_D7);
186 val |= v_RK3368_MIPIPHY_LANE0_EN(1) |
187 v_RK3368_MIPIDPI_FORCEX_EN(1);
188 /*rk3368 RK3368_GRF_SOC_CON7 = 0X0041C*/
189 grf_writel(val, 0x0041C);
191 /* enable lvds mode */
192 val |= v_LVDSMODE_EN(1) | v_MIPIPHY_TTL_EN(0);
193 /* config data source */
194 val |= v_LVDS_DATA_SEL(LVDS_DATA_FROM_LCDC);
195 /* config lvds_format */
196 val |= v_LVDS_OUTPUT_FORMAT(screen->lvds_format);
197 /* LSB receive mode */
198 val |= v_LVDS_MSBSEL(LVDS_MSB_D7);
199 val |= v_MIPIPHY_LANE0_EN(1) | v_MIPIDPI_FORCEX_EN(1);
200 /*rk312x RK312X_GRF_LVDS_CON0 = 0X00150*/
201 grf_writel(val, 0X00150);
203 /* digital internal disable */
204 lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(0));
206 /* set pll prediv and fbdiv */
207 lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
208 lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
210 lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
212 /* set lvds mode and reset phy config */
213 lvds_msk_reg(lvds, MIPIPHY_REGE0,
214 m_MSB_SEL | m_DIG_INTER_RST,
215 v_MSB_SEL(1) | v_DIG_INTER_RST(1));
217 /* power on pll and enable lane */
218 rk31xx_lvds_pwr_on();
220 /* delay for waitting pll lock on */
221 while (delay_times--) {
222 if (lvds_phy_lockon(lvds)) {
228 /* digital internal enable */
229 lvds_msk_reg(lvds, MIPIPHY_REGE1, m_DIG_INTER_EN, v_DIG_INTER_EN(1));
232 lvds_writel(lvds, MIPIPHY_REGE2, 0xa0); /* timing */
233 lvds_writel(lvds, MIPIPHY_REGE7, 0xfc); /* phase */
238 static void rk31xx_output_lvttl(struct rk_lvds_device *lvds,
239 struct rk_screen *screen)
244 #if defined(CONFIG_RK_FPGA)
245 grf_writel(0xffff5555, RK312X_GRF_GPIO2B_IOMUX);
246 grf_writel(0x00ff0055, RK312X_GRF_GPIO2C_IOMUX);
247 grf_writel(0x77771111, 0x00e8); /* RK312X_GRF_GPIO2C_IOMUX2 */
248 grf_writel(0x700c1004, RK312X_GRF_GPIO2D_IOMUX);
250 #ifdef CONFIG_PINCTRL
251 if (lvds->pins && !IS_ERR(lvds->pins->default_state))
252 pinctrl_select_state(lvds->pins->p, lvds->pins->default_state);
256 val |= v_LVDSMODE_EN(0) | v_MIPIPHY_TTL_EN(1); /* enable lvds mode */
257 val |= v_LVDS_DATA_SEL(LVDS_DATA_FROM_LCDC); /* config data source */
258 grf_writel(0xffff0380, RK312X_GRF_LVDS_CON0);
260 val = v_MIPITTL_CLK_EN(1) | v_MIPITTL_LANE0_EN(1) |
261 v_MIPITTL_LANE1_EN(1) | v_MIPITTL_LANE2_EN(1) |
262 v_MIPITTL_LANE3_EN(1);
263 grf_writel(val, RK312X_GRF_SOC_CON1);
266 lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
267 val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) | v_LANE3_EN(1) |
268 v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
269 lvds_writel(lvds, MIPIPHY_REGEB, val);
271 /* set ttl mode and reset phy config */
272 val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
273 v_MSB_SEL(1) | v_DIG_INTER_RST(1);
274 lvds_writel(lvds, MIPIPHY_REGE0, val);
276 rk31xx_lvds_pwr_on();
280 static int rk31xx_lvds_en(void)
282 struct rk_lvds_device *lvds = rk31xx_lvds;
283 struct rk_screen *screen;
285 if (unlikely(!lvds) || lvds->sys_state)
288 screen = &lvds->screen;
289 rk_fb_get_prmry_screen(screen);
292 rk31xx_lvds_clk_enable(lvds);
294 switch (screen->type) {
296 rk31xx_output_lvds(lvds, screen);
299 rk31xx_output_lvttl(lvds, screen);
302 printk("unsupport screen type\n");
306 lvds->sys_state = true;
310 static struct rk_fb_trsm_ops trsm_lvds_ops = {
311 .enable = rk31xx_lvds_en,
312 .disable = rk31xx_lvds_disable,
313 .dsp_pwr_on = rk31xx_lvds_pwr_on,
314 .dsp_pwr_off = rk31xx_lvds_pwr_off,
316 #if defined(CONFIG_OF)
317 static struct rk_lvds_drvdata rk31xx_lvds_drvdata = {
318 .soc_type = LVDS_SOC_RK312X,
321 static struct rk_lvds_drvdata rk3368_lvds_drvdata = {
322 .soc_type = LVDS_SOC_RK3368,
326 static const struct of_device_id rk31xx_lvds_dt_ids[] = {
327 {.compatible = "rockchip,rk31xx-lvds",
328 .data = (void *)&rk31xx_lvds_drvdata,},
329 {.compatible = "rockchip,rk3368-lvds",
330 .data = (void *)&rk3368_lvds_drvdata,},
334 /*MODULE_DEVICE_TABLE(of, rk31xx_lvds_dt_ids);*/
338 static int rk31xx_lvds_probe(struct platform_device *pdev)
340 struct rk_lvds_device *lvds;
341 struct resource *res;
342 struct device_node *np = pdev->dev.of_node;
343 const struct of_device_id *match;
347 dev_err(&pdev->dev, "Don't find lvds device tree node.\n");
351 lvds = devm_kzalloc(&pdev->dev, sizeof(struct rk_lvds_device), GFP_KERNEL);
353 dev_err(&pdev->dev, "kzalloc rk31xx lvds failed\n");
356 lvds->dev = &pdev->dev;
357 match = of_match_node(rk31xx_lvds_dt_ids, np);
358 lvds->data = (struct rk_lvds_drvdata *)match->data;
359 dev_info(lvds->dev, "%s,type=%d\n",
360 __func__, lvds->data->soc_type);
362 rk_fb_get_prmry_screen(&lvds->screen);
363 if ((lvds->screen.type != SCREEN_RGB) &&
364 (lvds->screen.type != SCREEN_LVDS)) {
365 dev_err(&pdev->dev, "screen is not lvds/rgb!\n");
367 goto err_screen_type;
370 platform_set_drvdata(pdev, lvds);
371 dev_set_name(lvds->dev, "rk31xx-lvds");
373 #ifdef CONFIG_PINCTRL
374 if (lvds->dev->pins == NULL && lvds->screen.type == SCREEN_RGB) {
375 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*(lvds->pins)),
378 dev_err(lvds->dev, "kzalloc lvds pins failed\n");
382 lvds->pins->p = devm_pinctrl_get(lvds->dev);
383 if (IS_ERR(lvds->pins->p)) {
384 dev_info(lvds->dev, "no pinctrl handle\n");
385 devm_kfree(lvds->dev, lvds->pins);
388 lvds->pins->default_state =
389 pinctrl_lookup_state(lvds->pins->p, "lcdc");
390 lvds->pins->sleep_state =
391 pinctrl_lookup_state(lvds->pins->p, "sleep");
392 if (IS_ERR(lvds->pins->default_state)) {
393 dev_info(lvds->dev, "no default pinctrl state\n");
394 devm_kfree(lvds->dev, lvds->pins);
401 /* lvds regs on MIPIPHY_REG */
402 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mipi_lvds_phy");
403 lvds->regbase = devm_ioremap_resource(&pdev->dev, res);
404 if (IS_ERR(lvds->regbase)) {
405 dev_err(&pdev->dev, "ioremap mipi-lvds phy reg failed\n");
406 return PTR_ERR(lvds->regbase);
409 /* pll lock on status reg that is MIPICTRL Register */
410 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mipi_lvds_ctl");
411 lvds->ctrl_reg = devm_ioremap_resource(&pdev->dev, res);
412 if (IS_ERR(lvds->ctrl_reg)) {
413 dev_err(&pdev->dev, "ioremap mipi-lvds ctl reg failed\n");
414 return PTR_ERR(lvds->ctrl_reg);
417 ret = rk31xx_lvds_clk_init(lvds);
421 if (support_uboot_display())
422 rk31xx_lvds_clk_enable(lvds);
425 rk_fb_trsm_ops_register(&trsm_lvds_ops, SCREEN_LVDS);
426 dev_info(&pdev->dev, "rk31xx lvds driver probe success\n");
432 devm_kfree(&pdev->dev, lvds);
437 static int rk31xx_lvds_remove(struct platform_device *pdev)
442 static void rk31xx_lvds_shutdown(struct platform_device *pdev)
448 static struct platform_driver rk31xx_lvds_driver = {
450 .name = "rk31xx-lvds",
451 .owner = THIS_MODULE,
452 #if defined(CONFIG_OF)
453 .of_match_table = of_match_ptr(rk31xx_lvds_dt_ids),
456 .probe = rk31xx_lvds_probe,
457 .remove = rk31xx_lvds_remove,
458 .shutdown = rk31xx_lvds_shutdown,
461 static int __init rk31xx_lvds_init(void)
463 return platform_driver_register(&rk31xx_lvds_driver);
466 static void __exit rk31xx_lvds_exit(void)
468 platform_driver_unregister(&rk31xx_lvds_driver);
471 fs_initcall(rk31xx_lvds_init);
472 module_exit(rk31xx_lvds_exit);