drivers/video/rockchip/transmitter/dp501.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/fs.h>
   4 #include <linux/seq_file.h>
   5 #include <linux/time.h>
   6 #include <linux/delay.h>
   7 #include <linux/slab.h>
   8 #include <linux/device.h>
   9 #include <linux/i2c.h>
  10 #include <linux/gpio.h>
  11 #include <linux/dp501.h>
  12 #include <linux/debugfs.h>
  13
  14
  15
  16 static int dp501_write_reg(struct i2c_client *client,char index,char reg,char val)
  17 {
  18         int ret;
  19         if(index == 0)  //page 0
  20         {
  21                 client->addr = (DP501_P0_ADDR >> 1);
  22         }
  23         else if(index == 1) //page1
  24         {
  25                 client->addr = (DP501_P1_ADDR >> 1);
  26         }
  27         else if(index == 2) //page 2
  28         {
  29                 client->addr = (DP501_P2_ADDR >> 1);
  30         }
  31         else if(index == 3)
  32         {
  33                 client->addr = (DP501_P3_ADDR >> 1);
  34         }
  35         else
  36         {
  37                 dev_err(&client->dev,"invalid page number\n");
  38                 return -EINVAL;
  39         }
  40         ret = i2c_master_reg8_send(client, reg, &val, 1,DP501_SCL_RATE);
  41         if(ret < 0)
  42         {
  43
  44                 dev_err(&client->dev,"%s page%d:0x%x err\n",__func__,index,reg);
  45                 ret = -EINVAL;
  46         }
  47
  48         return ret;
  49
  50 }
  51
  52 static char dp501_read_reg(struct i2c_client *client,char index,char reg)
  53 {
  54         int ret;
  55         char val;
  56         if(index == 0)  //page 0
  57         {
  58                 client->addr = (DP501_P0_ADDR >> 1);
  59         }
  60         else if(index == 1) //page1
  61         {
  62                 client->addr = (DP501_P1_ADDR>>1);
  63         }
  64         else if(index == 2) //page 2
  65         {
  66                 client->addr = (DP501_P2_ADDR>>1);
  67         }
  68         else if(index == 3)
  69         {
  70                 client->addr = (DP501_P3_ADDR>>1);
  71         }
  72         else
  73         {
  74                 dev_err(&client->dev,"invalid page number\n");
  75                 return -EINVAL;
  76         }
  77
  78
  79         ret = i2c_master_reg8_recv(client, reg, &val, 1, DP501_SCL_RATE);
  80         if(ret < 0)
  81         {
  82                 dev_err(&client->dev,"%s page%d:0x%x err\n",__func__,index,reg);
  83                 return  -EINVAL;
  84         }
  85
  86         return val;
  87
  88 }
  89 static int get_dp_chip_id(struct i2c_client *client)
  90 {
  91         char c1,c2;
  92         int id;
  93         c1 = dp501_read_reg(client,2,CHIP_ID_L);
  94         c2 = dp501_read_reg(client,2,CHIP_ID_H);
  95         id = c2;
  96         return (id<<8)|c1;
  97         return 0;
  98 }
  99
 100 static int dp501_init(struct i2c_client *client)
 101 {
 102         char val,val1;
 103
 104         dp501_write_reg(client,2,0x00,0x6C);
 105         dp501_write_reg(client,2,0x01,0x68);
 106         dp501_write_reg(client,2,0x02,0x28);
 107         dp501_write_reg(client,2,0x03,0x2A);
 108         dp501_write_reg(client,2,0x16,0x50);
 109         dp501_write_reg(client,2,0x24,0x22);
 110         dp501_write_reg(client,2,0x25,0x04);
 111         dp501_write_reg(client,2,0x26,0x10); //PIO setting
 112
 113         dp501_write_reg(client,0,0x0a,0x0c); //block 74 & 76
 114         dp501_write_reg(client,0,0x20,0x00);
 115         dp501_write_reg(client,0,0x27,0x30); //auto detect CRTC
 116         dp501_write_reg(client,0,0x2f,0x82); //reset tpfifo at v blank
 117         dp501_write_reg(client,0,0x24,0xc0); //DVO mapping ; crtc follow mode
 118         dp501_write_reg(client,0,0x28,0x07); //crtc follow mode
 119         dp501_write_reg(client,0,0x87,0x7f); //aux retry
 120         dp501_write_reg(client,0,0x88,0x1e); //aux retry
 121         dp501_write_reg(client,0,0xbb,0x06); //aux retry
 122         dp501_write_reg(client,0,0x72,0xa9); //DPCD readable
 123         dp501_write_reg(client,0,0x60,0x00); //Scramble on
 124         dp501_write_reg(client,0,0x8f,0x02); //debug select, read P0.0x8d[2] can check HPD
 125
 126
 127         //second, set up training
 128         dp501_write_reg(client,0,0x5d,0x06); //training link rate(2.7Gbps)
 129         dp501_write_reg(client,0,0x5e,0x84); //training lane count(4Lanes),
 130         dp501_write_reg(client,0,0x74,0x00); //idle pattern
 131         dp501_write_reg(client,0,0x5f,0x0d); //trigger training
 132         mdelay(100); //delay 100ms
 133
 134         //then, check training result
 135         val = dp501_read_reg(client,0,0x63);
 136         val1 = dp501_read_reg(client,0,0x64); //Each 4bits stand for one lane, 0x77/0x77 means training succeed with 4Lanes.
 137         dev_info(&client->dev,"training result:>>val:0x%x>>val1:0x%x\n",val,val1);
 138
 139         return 0;
 140 }
 141
 142
 143
 144 static int edp_reg_show(struct seq_file *s, void *v)
 145 {
 146         int i = 0;
 147         char val;
 148         struct  dp501 *dp501= s->private;
 149
 150         seq_printf(s,"page 0:\n");
 151         for(i=0;i< MAX_REG;i++)
 152         {
 153                 val = dp501_read_reg(dp501->client,0,i);
 154                 seq_printf(s,"0x%02x>>0x%02x\n",i,val);
 155         }
 156
 157         seq_printf(s,"page 1:\n");
 158         for(i=0;i< MAX_REG;i++)
 159         {
 160                 val = dp501_read_reg(dp501->client,1,i);
 161                 seq_printf(s,"0x%02x>>0x%02x\n",i,val);
 162         }
 163
 164         seq_printf(s,"page 2:\n");
 165         for(i=0;i< MAX_REG;i++)
 166         {
 167                 val = dp501_read_reg(dp501->client,0,i);
 168                 seq_printf(s,"0x%02x>>0x%02x\n",2,val);
 169         }
 170
 171         seq_printf(s,"page 3:\n");
 172         for(i=0;i< MAX_REG;i++)
 173         {
 174                 val = dp501_read_reg(dp501->client,3,i);
 175                 seq_printf(s,"0x%02x>>0x%02x\n",i,val);
 176         }
 177
 178         return 0;
 179 }
 180
 181 static int edp_reg_open(struct inode *inode, struct file *file)
 182 {
 183         struct dp501 *dp501 = inode->i_private;
 184         return single_open(file,edp_reg_show,dp501);
 185 }
 186
 187 static const struct file_operations edp_reg_fops = {
 188         .owner          = THIS_MODULE,
 189         .open           = edp_reg_open,
 190         .read           = seq_read,
 191         .llseek         = seq_lseek,
 192         .release        = single_release,
 193 };
 194
 195 #ifdef CONFIG_HAS_EARLYSUSPEND
 196 static void dp501_early_suspend(struct early_suspend *h)
 197 {
 198         struct dp501 *dp501 = container_of(h, struct dp501, early_suspend);
 199         gpio_set_value(dp501->pdata->dvdd33_en_pin,!dp501->pdata->dvdd33_en_val);
 200         gpio_set_value(dp501->pdata->dvdd18_en_pin,!dp501->pdata->dvdd18_en_val);
 201
 202 }
 203
 204 static void dp501_late_resume(struct early_suspend *h)
 205 {
 206         struct dp501 *dp501 = container_of(h, struct dp501, early_suspend);
 207         gpio_set_value(dp501->pdata->dvdd33_en_pin,dp501->pdata->dvdd33_en_val);
 208         gpio_set_value(dp501->pdata->dvdd18_en_pin,dp501->pdata->dvdd18_en_val);
 209         gpio_set_value(dp501->pdata->edp_rst_pin,0);
 210         msleep(10);
 211         gpio_set_value(dp501->pdata->edp_rst_pin,1);
 212         dp501->edp_init(dp501->client);
 213 }
 214 #endif
 215 static int dp501_i2c_probe(struct i2c_client *client,const struct i2c_device_id *id)
 216 {
 217         int ret;
 218
 219         struct dp501 *dp501 = NULL;
 220         int chip_id;
 221
 222
 223         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 224         {
 225                 dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
 226                 ret = -ENODEV;
 227         }
 228         dp501 = kzalloc(sizeof(struct dp501), GFP_KERNEL);
 229         if (dp501 == NULL)
 230         {
 231                 dev_err(&client->dev,"alloc for struct dp501 fail\n");
 232                 ret = -ENOMEM;
 233         }
 234
 235         dp501->client = client;
 236         dp501->pdata = client->dev.platform_data;
 237         i2c_set_clientdata(client,dp501);
 238         if(dp501->pdata->power_ctl)
 239                 dp501->pdata->power_ctl();
 240
 241         debugfs_create_file("edp-reg", S_IRUSR,NULL,dp501,&edp_reg_fops);
 242
 243 #ifdef CONFIG_HAS_EARLYSUSPEND
 244         dp501->early_suspend.suspend = dp501_early_suspend;
 245         dp501->early_suspend.resume = dp501_late_resume;
 246         dp501->early_suspend.level = EARLY_SUSPEND_LEVEL_STOP_DRAWING;
 247         register_early_suspend(&dp501->early_suspend);
 248 #endif
 249
 250         chip_id = get_dp_chip_id(client);
 251         dp501->edp_init = dp501_init;
 252         dp501->edp_init(client);
 253
 254
 255         printk("edp dp%x probe ok\n",chip_id);
 256
 257         return ret;
 258 }
 259
 260 static int __devexit dp501_i2c_remove(struct i2c_client *client)
 261 {
 262         return 0;
 263 }
 264
 265
 266 static const struct i2c_device_id id_table[] = {
 267         {"dp501", 0 },
 268         { }
 269 };
 270
 271 static struct i2c_driver dp501_i2c_driver  = {
 272         .driver = {
 273                 .name  = "dp501",
 274                 .owner = THIS_MODULE,
 275         },
 276         .probe          = &dp501_i2c_probe,
 277         .remove         = &dp501_i2c_remove,
 278         .id_table       = id_table,
 279 };
 280
 281
 282 static int __init dp501_module_init(void)
 283 {
 284         return i2c_add_driver(&dp501_i2c_driver);
 285 }
 286
 287 static void __exit dp501_module_exit(void)
 288 {
 289         i2c_del_driver(&dp501_i2c_driver);
 290 }
 291
 292 fs_initcall_sync(dp501_module_init);
 293 module_exit(dp501_module_exit);
 294