3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
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7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
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9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
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11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
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15 #include <linux/memory.h>
\r
16 #include <linux/dma-mapping.h>
\r
17 #include <linux/scatterlist.h>
\r
18 #include <asm/memory.h>
\r
19 #include <asm/atomic.h>
\r
20 #include <asm/cacheflush.h>
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21 #include "rga2_mmu_info.h"
\r
23 extern struct rga2_service_info rga2_service;
\r
24 extern struct rga2_mmu_buf_t rga2_mmu_buf;
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26 //extern int mmu_buff_temp[1024];
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28 #define KERNEL_SPACE_VALID 0xc0000000
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30 #define V7_VATOPA_SUCESS_MASK (0x1)
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31 #define V7_VATOPA_GET_PADDR(X) (X & 0xFFFFF000)
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32 #define V7_VATOPA_GET_INER(X) ((X>>4) & 7)
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33 #define V7_VATOPA_GET_OUTER(X) ((X>>2) & 3)
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34 #define V7_VATOPA_GET_SH(X) ((X>>7) & 1)
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35 #define V7_VATOPA_GET_NS(X) ((X>>9) & 1)
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36 #define V7_VATOPA_GET_SS(X) ((X>>1) & 1)
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39 static unsigned int armv7_va_to_pa(unsigned int v_addr)
\r
41 unsigned int p_addr;
\r
42 __asm__ volatile ( "mcr p15, 0, %1, c7, c8, 0\n"
\r
45 "mrc p15, 0, %0, c7, c4, 0\n"
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50 if (p_addr & V7_VATOPA_SUCESS_MASK)
\r
53 return (V7_VATOPA_GET_SS(p_addr) ? 0xFFFFFFFF : V7_VATOPA_GET_PADDR(p_addr));
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57 static int rga2_mmu_buf_get(struct rga2_mmu_buf_t *t, uint32_t size)
\r
59 mutex_lock(&rga2_service.lock);
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61 mutex_unlock(&rga2_service.lock);
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66 static int rga2_mmu_buf_get_try(struct rga2_mmu_buf_t *t, uint32_t size)
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68 mutex_lock(&rga2_service.lock);
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69 if((t->back - t->front) > t->size) {
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70 if(t->front + size > t->back - t->size)
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74 if((t->front + size) > t->back)
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77 if(t->front + size > t->size) {
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78 if (size > (t->back - t->size)) {
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84 mutex_unlock(&rga2_service.lock);
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89 static int rga2_mem_size_cal(unsigned long Mem, uint32_t MemSize, unsigned long *StartAddr)
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91 unsigned long start, end;
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94 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
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95 start = Mem >> PAGE_SHIFT;
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96 pageCount = end - start;
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101 static int rga2_buf_size_cal(unsigned long yrgb_addr, unsigned long uv_addr, unsigned long v_addr,
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102 int format, uint32_t w, uint32_t h, unsigned long *StartAddr )
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104 uint32_t size_yrgb = 0;
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105 uint32_t size_uv = 0;
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106 uint32_t size_v = 0;
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107 uint32_t stride = 0;
\r
108 unsigned long start, end;
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109 uint32_t pageCount;
\r
113 case RGA2_FORMAT_RGBA_8888 :
\r
114 stride = (w * 4 + 3) & (~3);
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115 size_yrgb = stride*h;
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116 start = yrgb_addr >> PAGE_SHIFT;
\r
117 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
119 case RGA2_FORMAT_RGBX_8888 :
\r
120 stride = (w * 4 + 3) & (~3);
\r
121 size_yrgb = stride*h;
\r
122 start = yrgb_addr >> PAGE_SHIFT;
\r
123 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
125 case RGA2_FORMAT_RGB_888 :
\r
126 stride = (w * 3 + 3) & (~3);
\r
127 size_yrgb = stride*h;
\r
128 start = yrgb_addr >> PAGE_SHIFT;
\r
129 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
131 case RGA2_FORMAT_BGRA_8888 :
\r
133 start = yrgb_addr >> PAGE_SHIFT;
\r
134 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
136 case RGA2_FORMAT_RGB_565 :
\r
137 stride = (w*2 + 3) & (~3);
\r
138 size_yrgb = stride * h;
\r
139 start = yrgb_addr >> PAGE_SHIFT;
\r
140 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
142 case RGA2_FORMAT_RGBA_5551 :
\r
143 stride = (w*2 + 3) & (~3);
\r
144 size_yrgb = stride * h;
\r
145 start = yrgb_addr >> PAGE_SHIFT;
\r
146 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
148 case RGA2_FORMAT_RGBA_4444 :
\r
149 stride = (w*2 + 3) & (~3);
\r
150 size_yrgb = stride * h;
\r
151 start = yrgb_addr >> PAGE_SHIFT;
\r
152 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
154 case RGA2_FORMAT_BGR_888 :
\r
155 stride = (w*3 + 3) & (~3);
\r
156 size_yrgb = stride * h;
\r
157 start = yrgb_addr >> PAGE_SHIFT;
\r
158 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
162 case RGA2_FORMAT_YCbCr_422_SP :
\r
163 case RGA2_FORMAT_YCrCb_422_SP :
\r
164 stride = (w + 3) & (~3);
\r
165 size_yrgb = stride * h;
\r
166 size_uv = stride * h;
\r
167 start = MIN(yrgb_addr, uv_addr);
\r
168 start >>= PAGE_SHIFT;
\r
169 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
170 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
171 pageCount = end - start;
\r
173 case RGA2_FORMAT_YCbCr_422_P :
\r
174 case RGA2_FORMAT_YCrCb_422_P :
\r
175 stride = (w + 3) & (~3);
\r
176 size_yrgb = stride * h;
\r
177 size_uv = ((stride >> 1) * h);
\r
178 size_v = ((stride >> 1) * h);
\r
179 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
180 start = start >> PAGE_SHIFT;
\r
181 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
182 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
183 pageCount = end - start;
\r
185 case RGA2_FORMAT_YCbCr_420_SP :
\r
186 case RGA2_FORMAT_YCrCb_420_SP :
\r
187 stride = (w + 3) & (~3);
\r
188 size_yrgb = stride * h;
\r
189 size_uv = (stride * (h >> 1));
\r
190 start = MIN(yrgb_addr, uv_addr);
\r
191 start >>= PAGE_SHIFT;
\r
192 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
193 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
194 pageCount = end - start;
\r
195 //printk("yrgb_addr = %.8x\n", yrgb_addr);
\r
196 //printk("uv_addr = %.8x\n", uv_addr);
\r
198 case RGA2_FORMAT_YCbCr_420_P :
\r
199 case RGA2_FORMAT_YCrCb_420_P :
\r
200 stride = (w + 3) & (~3);
\r
201 size_yrgb = stride * h;
\r
202 size_uv = ((stride >> 1) * (h >> 1));
\r
203 size_v = ((stride >> 1) * (h >> 1));
\r
204 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
205 start >>= PAGE_SHIFT;
\r
206 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
207 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
208 pageCount = end - start;
\r
211 case RK_FORMAT_BPP1 :
\r
213 case RK_FORMAT_BPP2 :
\r
215 case RK_FORMAT_BPP4 :
\r
217 case RK_FORMAT_BPP8 :
\r
226 *StartAddr = start;
\r
230 static int rga2_MapUserMemory(struct page **pages,
\r
231 uint32_t *pageTable,
\r
232 unsigned long Memory,
\r
233 uint32_t pageCount)
\r
238 unsigned long Address;
\r
245 down_read(¤t->mm->mmap_sem);
\r
246 result = get_user_pages(current,
\r
248 Memory << PAGE_SHIFT,
\r
255 up_read(¤t->mm->mmap_sem);
\r
257 if(result <= 0 || result < pageCount)
\r
259 struct vm_area_struct *vma;
\r
262 down_read(¤t->mm->mmap_sem);
\r
263 for (i = 0; i < result; i++)
\r
264 put_page(pages[i]);
\r
265 up_read(¤t->mm->mmap_sem);
\r
268 for(i=0; i<pageCount; i++)
\r
270 vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);
\r
272 if (vma)//&& (vma->vm_flags & VM_PFNMAP) )
\r
282 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
284 if(pgd_val(*pgd) == 0)
\r
286 //printk("rga pgd value is zero \n");
\r
290 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
293 pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
296 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
299 pte_unmap_unlock(pte, ptl);
\r
313 pfn = pte_pfn(*pte);
\r
314 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
315 pte_unmap_unlock(pte, ptl);
\r
319 pageTable[i] = (uint32_t)Address;
\r
323 status = RGA2_OUT_OF_RESOURCES;
\r
331 /* Fill the page table. */
\r
332 for(i=0; i<pageCount; i++)
\r
334 /* Get the physical address from page struct. */
\r
335 pageTable[i] = page_to_phys(pages[i]);
\r
338 down_read(¤t->mm->mmap_sem);
\r
339 for (i = 0; i < result; i++)
\r
340 put_page(pages[i]);
\r
341 up_read(¤t->mm->mmap_sem);
\r
350 static int rga2_MapION(struct sg_table *sg,
\r
356 unsigned long Address;
\r
357 uint32_t mapped_size = 0;
\r
359 struct scatterlist *sgl = sg->sgl;
\r
360 uint32_t sg_num = 0;
\r
361 uint32_t break_flag = 0;
\r
366 len = sg_dma_len(sgl) >> PAGE_SHIFT;
\r
367 Address = sg_phys(sgl);
\r
369 for(i=0; i<len; i++) {
\r
370 if (mapped_size + i >= pageCount) {
\r
374 Memory[mapped_size + i] = (uint32_t)(Address + (i << PAGE_SHIFT));
\r
378 mapped_size += len;
\r
381 while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));
\r
387 static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
389 int Src0MemSize, DstMemSize, Src1MemSize;
\r
390 unsigned long Src0Start, Src1Start, DstStart;
\r
392 uint32_t *MMU_Base, *MMU_Base_phys;
\r
395 uint32_t uv_size, v_size;
\r
397 struct page **pages = NULL;
\r
406 /* cal src0 buf mmu info */
\r
407 if(req->mmu_info.src0_mmu_flag & 1) {
\r
408 Src0MemSize = rga2_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
409 req->src.format, req->src.vir_w,
\r
412 if (Src0MemSize == 0) {
\r
417 /* cal src1 buf mmu info */
\r
418 if(req->mmu_info.src1_mmu_flag & 1) {
\r
419 Src1MemSize = rga2_buf_size_cal(req->src1.yrgb_addr, req->src1.uv_addr, req->src1.v_addr,
\r
420 req->src1.format, req->src1.vir_w,
\r
423 Src0MemSize = (Src0MemSize + 3) & (~3);
\r
424 if (Src1MemSize == 0) {
\r
430 /* cal dst buf mmu info */
\r
431 if(req->mmu_info.dst_mmu_flag & 1) {
\r
432 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
433 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
435 if(DstMemSize == 0) {
\r
440 /* Cal out the needed mem size */
\r
441 Src0MemSize = (Src0MemSize+15)&(~15);
\r
442 Src1MemSize = (Src1MemSize+15)&(~15);
\r
443 DstMemSize = (DstMemSize+15)&(~15);
\r
444 AllSize = Src0MemSize + Src1MemSize + DstMemSize;
\r
446 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
447 pr_err("RGA2 Get MMU mem failed\n");
\r
448 status = RGA2_MALLOC_ERROR;
\r
452 pages = rga2_mmu_buf.pages;
\r
454 mutex_lock(&rga2_service.lock);
\r
455 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
456 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
457 mutex_unlock(&rga2_service.lock);
\r
459 if (req->sg_src0) {
\r
460 ret = rga2_MapION(req->sg_src0, &MMU_Base[0], Src0MemSize);
\r
463 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], Src0Start, Src0MemSize);
\r
467 pr_err("rga2 map src0 memory failed\n");
\r
472 /* change the buf address in req struct */
\r
473 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
474 uv_size = (req->src.uv_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
475 v_size = (req->src.v_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
477 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
478 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);
\r
479 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);
\r
483 if (req->sg_src1) {
\r
484 ret = rga2_MapION(req->sg_src1, MMU_Base + Src0MemSize, Src1MemSize);
\r
487 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize, Src1Start, Src1MemSize);
\r
491 pr_err("rga2 map src1 memory failed\n");
\r
496 /* change the buf address in req struct */
\r
497 req->mmu_info.src1_base_addr = ((unsigned long)(MMU_Base_phys + Src0MemSize));
\r
498 req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
503 ret = rga2_MapION(req->sg_dst, MMU_Base + Src0MemSize + Src1MemSize, DstMemSize);
\r
506 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize + Src1MemSize, DstStart, DstMemSize);
\r
509 pr_err("rga2 map dst memory failed\n");
\r
514 /* change the buf address in req struct */
\r
515 req->mmu_info.dst_base_addr = ((unsigned long)(MMU_Base_phys + Src0MemSize + Src1MemSize));
\r
516 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
517 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
518 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
519 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((uv_size) << PAGE_SHIFT);
\r
520 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((v_size) << PAGE_SHIFT);
\r
523 /* flush data to DDR */
\r
525 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
526 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
527 #elif defined(CONFIG_ARM64)
\r
528 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
531 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
532 reg->MMU_len = AllSize;
\r
543 static int rga2_mmu_info_color_palette_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
545 int SrcMemSize, DstMemSize;
\r
546 unsigned long SrcStart, DstStart;
\r
547 struct page **pages = NULL;
\r
549 uint32_t *MMU_Base = NULL, *MMU_Base_phys;
\r
554 uint16_t sw, byte_num;
\r
556 shift = 3 - (req->palette_mode & 3);
\r
557 sw = req->src.vir_w*req->src.vir_h;
\r
558 byte_num = sw >> shift;
\r
559 stride = (byte_num + 3) & (~3);
\r
565 if (req->mmu_info.src0_mmu_flag) {
\r
566 SrcMemSize = rga2_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
567 if(SrcMemSize == 0) {
\r
572 if (req->mmu_info.dst_mmu_flag) {
\r
573 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
574 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
576 if(DstMemSize == 0) {
\r
581 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
582 DstMemSize = (DstMemSize + 15) & (~15);
\r
584 AllSize = SrcMemSize + DstMemSize;
\r
586 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
587 pr_err("RGA2 Get MMU mem failed\n");
\r
588 status = RGA2_MALLOC_ERROR;
\r
592 pages = rga2_mmu_buf.pages;
\r
593 if(pages == NULL) {
\r
594 pr_err("RGA MMU malloc pages mem failed\n");
\r
598 mutex_lock(&rga2_service.lock);
\r
599 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
600 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
601 mutex_unlock(&rga2_service.lock);
\r
604 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
606 pr_err("rga2 map src0 memory failed\n");
\r
611 /* change the buf address in req struct */
\r
612 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
613 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
617 ret = rga2_MapUserMemory(&pages[0], MMU_Base + SrcMemSize, DstStart, DstMemSize);
\r
619 pr_err("rga2 map dst memory failed\n");
\r
624 /* change the buf address in req struct */
\r
625 req->mmu_info.dst_base_addr = ((unsigned long)(MMU_Base_phys + SrcMemSize));
\r
626 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
629 /* flush data to DDR */
\r
631 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
632 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
633 #elif defined(CONFIG_ARM64)
\r
634 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
637 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
638 reg->MMU_len = AllSize;
\r
647 static int rga2_mmu_info_color_fill_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
650 unsigned long DstStart;
\r
651 struct page **pages = NULL;
\r
653 uint32_t *MMU_Base, *MMU_Base_phys;
\r
660 if(req->mmu_info.dst_mmu_flag & 1) {
\r
661 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
662 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
664 if(DstMemSize == 0) {
\r
669 AllSize = (DstMemSize + 15) & (~15);
\r
671 pages = rga2_mmu_buf.pages;
\r
673 if(rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
674 pr_err("RGA2 Get MMU mem failed\n");
\r
675 status = RGA2_MALLOC_ERROR;
\r
679 mutex_lock(&rga2_service.lock);
\r
680 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
681 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
682 mutex_unlock(&rga2_service.lock);
\r
686 ret = rga2_MapION(req->sg_dst, &MMU_Base[0], DstMemSize);
\r
689 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], DstStart, DstMemSize);
\r
692 pr_err("rga2 map dst memory failed\n");
\r
697 /* change the buf address in req struct */
\r
698 req->mmu_info.dst_base_addr = ((unsigned long)MMU_Base_phys);
\r
699 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
702 /* flush data to DDR */
\r
704 dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
705 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
\r
706 #elif defined(CONFIG_ARM64)
\r
707 __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
710 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
720 static int rga2_mmu_info_update_palette_table_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
723 unsigned long SrcStart;
\r
724 struct page **pages = NULL;
\r
726 uint32_t *MMU_Base, *MMU_Base_phys;
\r
732 /* cal src buf mmu info */
\r
733 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h, &SrcStart);
\r
734 if(SrcMemSize == 0) {
\r
738 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
739 AllSize = SrcMemSize;
\r
741 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
742 pr_err("RGA2 Get MMU mem failed\n");
\r
743 status = RGA2_MALLOC_ERROR;
\r
747 mutex_lock(&rga2_service.lock);
\r
748 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
749 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
750 mutex_unlock(&rga2_service.lock);
\r
752 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
755 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
757 pr_err("rga2 map palette memory failed\n");
\r
762 /* change the buf address in req struct */
\r
763 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
764 req->pat.yrgb_addr = (req->pat.yrgb_addr & (~PAGE_MASK));
\r
767 /* flush data to DDR */
\r
769 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
770 outer_flush_range(virt_to_phys(MMU_Base), virt_to_phys(MMU_Base + AllSize));
\r
771 #elif defined(CONFIG_ARM64)
\r
772 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
775 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
776 reg->MMU_len = AllSize;
\r
785 static int rga2_mmu_info_update_patten_buff_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
787 int SrcMemSize, CMDMemSize;
\r
788 unsigned long SrcStart, CMDStart;
\r
789 struct page **pages = NULL;
\r
792 uint32_t *MMU_Base, *MMU_p;
\r
795 MMU_Base = MMU_p = 0;
\r
798 /* cal src buf mmu info */
\r
799 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.act_w * req->pat.act_h * 4, &SrcStart);
\r
800 if(SrcMemSize == 0) {
\r
804 /* cal cmd buf mmu info */
\r
805 CMDMemSize = rga2_mem_size_cal((unsigned long)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
806 if(CMDMemSize == 0) {
\r
810 AllSize = SrcMemSize + CMDMemSize;
\r
812 pages = rga2_mmu_buf.pages;
\r
814 MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
816 for(i=0; i<CMDMemSize; i++) {
\r
817 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
820 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
822 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
824 pr_err("rga map src memory failed\n");
\r
831 MMU_p = MMU_Base + CMDMemSize;
\r
833 for(i=0; i<SrcMemSize; i++)
\r
835 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
840 * change the buf address in req struct
\r
841 * for the reason of lie to MMU
\r
843 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
845 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
847 /*record the malloc buf for the cmd end to release*/
\r
848 reg->MMU_base = MMU_Base;
\r
850 /* flush data to DDR */
\r
852 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
853 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
854 #elif defined(CONFIG_ARM64)
\r
855 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
866 int rga2_set_mmu_info(struct rga2_reg *reg, struct rga2_req *req)
\r
870 switch (req->render_mode) {
\r
872 ret = rga2_mmu_info_BitBlt_mode(reg, req);
\r
874 case color_palette_mode :
\r
875 ret = rga2_mmu_info_color_palette_mode(reg, req);
\r
877 case color_fill_mode :
\r
878 ret = rga2_mmu_info_color_fill_mode(reg, req);
\r
880 case update_palette_table_mode :
\r
881 ret = rga2_mmu_info_update_palette_table_mode(reg, req);
\r
883 case update_patten_buff_mode :
\r
884 ret = rga2_mmu_info_update_patten_buff_mode(reg, req);
\r