3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
\r
7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
\r
9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
\r
11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
\r
15 #include <linux/memory.h>
\r
16 #include <linux/dma-mapping.h>
\r
17 #include <linux/scatterlist.h>
\r
18 #include <asm/memory.h>
\r
19 #include <asm/atomic.h>
\r
20 #include <asm/cacheflush.h>
\r
21 #include "rga2_mmu_info.h"
\r
23 extern struct rga2_service_info rga2_service;
\r
24 extern struct rga2_mmu_buf_t rga2_mmu_buf;
\r
26 //extern int mmu_buff_temp[1024];
\r
28 #define KERNEL_SPACE_VALID 0xc0000000
\r
30 #define V7_VATOPA_SUCESS_MASK (0x1)
\r
31 #define V7_VATOPA_GET_PADDR(X) (X & 0xFFFFF000)
\r
32 #define V7_VATOPA_GET_INER(X) ((X>>4) & 7)
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33 #define V7_VATOPA_GET_OUTER(X) ((X>>2) & 3)
\r
34 #define V7_VATOPA_GET_SH(X) ((X>>7) & 1)
\r
35 #define V7_VATOPA_GET_NS(X) ((X>>9) & 1)
\r
36 #define V7_VATOPA_GET_SS(X) ((X>>1) & 1)
\r
39 static unsigned int armv7_va_to_pa(unsigned int v_addr)
\r
41 unsigned int p_addr;
\r
42 __asm__ volatile ( "mcr p15, 0, %1, c7, c8, 0\n"
\r
45 "mrc p15, 0, %0, c7, c4, 0\n"
\r
50 if (p_addr & V7_VATOPA_SUCESS_MASK)
\r
53 return (V7_VATOPA_GET_SS(p_addr) ? 0xFFFFFFFF : V7_VATOPA_GET_PADDR(p_addr));
\r
57 static int rga2_mmu_buf_get(struct rga2_mmu_buf_t *t, uint32_t size)
\r
59 mutex_lock(&rga2_service.lock);
\r
61 mutex_unlock(&rga2_service.lock);
\r
66 static int rga2_mmu_buf_get_try(struct rga2_mmu_buf_t *t, uint32_t size)
\r
68 mutex_lock(&rga2_service.lock);
\r
69 if((t->back - t->front) > t->size) {
\r
70 if(t->front + size > t->back - t->size) {
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71 pr_info("front %d, back %d dsize %d size %d", t->front, t->back, t->size, size);
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76 if((t->front + size) > t->back) {
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77 pr_info("front %d, back %d dsize %d size %d", t->front, t->back, t->size, size);
\r
81 if(t->front + size > t->size) {
\r
82 if (size > (t->back - t->size)) {
\r
83 pr_info("front %d, back %d dsize %d size %d", t->front, t->back, t->size, size);
\r
89 mutex_unlock(&rga2_service.lock);
\r
94 static int rga2_mem_size_cal(unsigned long Mem, uint32_t MemSize, unsigned long *StartAddr)
\r
96 unsigned long start, end;
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99 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
100 start = Mem >> PAGE_SHIFT;
\r
101 pageCount = end - start;
\r
102 *StartAddr = start;
\r
106 static int rga2_buf_size_cal(unsigned long yrgb_addr, unsigned long uv_addr, unsigned long v_addr,
\r
107 int format, uint32_t w, uint32_t h, unsigned long *StartAddr )
\r
109 uint32_t size_yrgb = 0;
\r
110 uint32_t size_uv = 0;
\r
111 uint32_t size_v = 0;
\r
112 uint32_t stride = 0;
\r
113 unsigned long start, end;
\r
114 uint32_t pageCount;
\r
118 case RGA2_FORMAT_RGBA_8888 :
\r
119 stride = (w * 4 + 3) & (~3);
\r
120 size_yrgb = stride*h;
\r
121 start = yrgb_addr >> PAGE_SHIFT;
\r
122 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
124 case RGA2_FORMAT_RGBX_8888 :
\r
125 stride = (w * 4 + 3) & (~3);
\r
126 size_yrgb = stride*h;
\r
127 start = yrgb_addr >> PAGE_SHIFT;
\r
128 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
130 case RGA2_FORMAT_RGB_888 :
\r
131 stride = (w * 3 + 3) & (~3);
\r
132 size_yrgb = stride*h;
\r
133 start = yrgb_addr >> PAGE_SHIFT;
\r
134 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
136 case RGA2_FORMAT_BGRA_8888 :
\r
138 start = yrgb_addr >> PAGE_SHIFT;
\r
139 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
141 case RGA2_FORMAT_RGB_565 :
\r
142 stride = (w*2 + 3) & (~3);
\r
143 size_yrgb = stride * h;
\r
144 start = yrgb_addr >> PAGE_SHIFT;
\r
145 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
147 case RGA2_FORMAT_RGBA_5551 :
\r
148 stride = (w*2 + 3) & (~3);
\r
149 size_yrgb = stride * h;
\r
150 start = yrgb_addr >> PAGE_SHIFT;
\r
151 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
153 case RGA2_FORMAT_RGBA_4444 :
\r
154 stride = (w*2 + 3) & (~3);
\r
155 size_yrgb = stride * h;
\r
156 start = yrgb_addr >> PAGE_SHIFT;
\r
157 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
159 case RGA2_FORMAT_BGR_888 :
\r
160 stride = (w*3 + 3) & (~3);
\r
161 size_yrgb = stride * h;
\r
162 start = yrgb_addr >> PAGE_SHIFT;
\r
163 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
167 case RGA2_FORMAT_YCbCr_422_SP :
\r
168 case RGA2_FORMAT_YCrCb_422_SP :
\r
169 stride = (w + 3) & (~3);
\r
170 size_yrgb = stride * h;
\r
171 size_uv = stride * h;
\r
172 start = MIN(yrgb_addr, uv_addr);
\r
173 start >>= PAGE_SHIFT;
\r
174 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
175 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
176 pageCount = end - start;
\r
178 case RGA2_FORMAT_YCbCr_422_P :
\r
179 case RGA2_FORMAT_YCrCb_422_P :
\r
180 stride = (w + 3) & (~3);
\r
181 size_yrgb = stride * h;
\r
182 size_uv = ((stride >> 1) * h);
\r
183 size_v = ((stride >> 1) * h);
\r
184 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
185 start = start >> PAGE_SHIFT;
\r
186 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
187 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
188 pageCount = end - start;
\r
190 case RGA2_FORMAT_YCbCr_420_SP :
\r
191 case RGA2_FORMAT_YCrCb_420_SP :
\r
192 stride = (w + 3) & (~3);
\r
193 size_yrgb = stride * h;
\r
194 size_uv = (stride * (h >> 1));
\r
195 start = MIN(yrgb_addr, uv_addr);
\r
196 start >>= PAGE_SHIFT;
\r
197 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
198 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
199 pageCount = end - start;
\r
200 //printk("yrgb_addr = %.8x\n", yrgb_addr);
\r
201 //printk("uv_addr = %.8x\n", uv_addr);
\r
203 case RGA2_FORMAT_YCbCr_420_P :
\r
204 case RGA2_FORMAT_YCrCb_420_P :
\r
205 stride = (w + 3) & (~3);
\r
206 size_yrgb = stride * h;
\r
207 size_uv = ((stride >> 1) * (h >> 1));
\r
208 size_v = ((stride >> 1) * (h >> 1));
\r
209 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
210 start >>= PAGE_SHIFT;
\r
211 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
212 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
213 pageCount = end - start;
\r
216 case RK_FORMAT_BPP1 :
\r
218 case RK_FORMAT_BPP2 :
\r
220 case RK_FORMAT_BPP4 :
\r
222 case RK_FORMAT_BPP8 :
\r
231 *StartAddr = start;
\r
235 static int rga2_MapUserMemory(struct page **pages,
\r
236 uint32_t *pageTable,
\r
237 unsigned long Memory,
\r
238 uint32_t pageCount)
\r
243 unsigned long Address;
\r
250 down_read(¤t->mm->mmap_sem);
\r
251 result = get_user_pages(current,
\r
253 Memory << PAGE_SHIFT,
\r
260 up_read(¤t->mm->mmap_sem);
\r
262 if(result <= 0 || result < pageCount)
\r
264 struct vm_area_struct *vma;
\r
267 down_read(¤t->mm->mmap_sem);
\r
268 for (i = 0; i < result; i++)
\r
269 put_page(pages[i]);
\r
270 up_read(¤t->mm->mmap_sem);
\r
273 for(i=0; i<pageCount; i++)
\r
275 vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);
\r
277 if (vma)//&& (vma->vm_flags & VM_PFNMAP) )
\r
287 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
289 if(pgd_val(*pgd) == 0)
\r
291 //printk("rga pgd value is zero \n");
\r
295 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
298 pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
301 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
304 pte_unmap_unlock(pte, ptl);
\r
318 pfn = pte_pfn(*pte);
\r
319 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
320 pte_unmap_unlock(pte, ptl);
\r
324 pageTable[i] = (uint32_t)Address;
\r
328 status = RGA2_OUT_OF_RESOURCES;
\r
336 /* Fill the page table. */
\r
337 for(i=0; i<pageCount; i++)
\r
339 /* Get the physical address from page struct. */
\r
340 pageTable[i] = page_to_phys(pages[i]);
\r
343 down_read(¤t->mm->mmap_sem);
\r
344 for (i = 0; i < result; i++)
\r
345 put_page(pages[i]);
\r
346 up_read(¤t->mm->mmap_sem);
\r
355 static int rga2_MapION(struct sg_table *sg,
\r
361 unsigned long Address;
\r
362 uint32_t mapped_size = 0;
\r
364 struct scatterlist *sgl = sg->sgl;
\r
365 uint32_t sg_num = 0;
\r
366 uint32_t break_flag = 0;
\r
371 len = sg_dma_len(sgl) >> PAGE_SHIFT;
\r
372 Address = sg_phys(sgl);
\r
374 for(i=0; i<len; i++) {
\r
375 if (mapped_size + i >= pageCount) {
\r
379 Memory[mapped_size + i] = (uint32_t)(Address + (i << PAGE_SHIFT));
\r
383 mapped_size += len;
\r
386 while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));
\r
392 static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
394 int Src0MemSize, DstMemSize, Src1MemSize;
\r
395 unsigned long Src0Start, Src1Start, DstStart;
\r
397 uint32_t *MMU_Base, *MMU_Base_phys;
\r
400 uint32_t uv_size, v_size;
\r
402 struct page **pages = NULL;
\r
411 /* cal src0 buf mmu info */
\r
412 if(req->mmu_info.src0_mmu_flag & 1) {
\r
413 Src0MemSize = rga2_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
414 req->src.format, req->src.vir_w,
\r
417 if (Src0MemSize == 0) {
\r
422 /* cal src1 buf mmu info */
\r
423 if(req->mmu_info.src1_mmu_flag & 1) {
\r
424 Src1MemSize = rga2_buf_size_cal(req->src1.yrgb_addr, req->src1.uv_addr, req->src1.v_addr,
\r
425 req->src1.format, req->src1.vir_w,
\r
428 Src0MemSize = (Src0MemSize + 3) & (~3);
\r
429 if (Src1MemSize == 0) {
\r
435 /* cal dst buf mmu info */
\r
436 if(req->mmu_info.dst_mmu_flag & 1) {
\r
437 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
438 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
440 if(DstMemSize == 0) {
\r
445 /* Cal out the needed mem size */
\r
446 Src0MemSize = (Src0MemSize+15)&(~15);
\r
447 Src1MemSize = (Src1MemSize+15)&(~15);
\r
448 DstMemSize = (DstMemSize+15)&(~15);
\r
449 AllSize = Src0MemSize + Src1MemSize + DstMemSize;
\r
451 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
452 pr_err("RGA2 Get MMU mem failed\n");
\r
453 status = RGA2_MALLOC_ERROR;
\r
457 pages = rga2_mmu_buf.pages;
\r
459 mutex_lock(&rga2_service.lock);
\r
460 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
461 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
462 mutex_unlock(&rga2_service.lock);
\r
464 if (req->sg_src0) {
\r
465 ret = rga2_MapION(req->sg_src0, &MMU_Base[0], Src0MemSize);
\r
468 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], Src0Start, Src0MemSize);
\r
472 pr_err("rga2 map src0 memory failed\n");
\r
477 /* change the buf address in req struct */
\r
478 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
479 uv_size = (req->src.uv_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
480 v_size = (req->src.v_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
482 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
483 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);
\r
484 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);
\r
488 if (req->sg_src1) {
\r
489 ret = rga2_MapION(req->sg_src1, MMU_Base + Src0MemSize, Src1MemSize);
\r
492 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize, Src1Start, Src1MemSize);
\r
496 pr_err("rga2 map src1 memory failed\n");
\r
501 /* change the buf address in req struct */
\r
502 req->mmu_info.src1_base_addr = ((unsigned long)(MMU_Base_phys + Src0MemSize));
\r
503 req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
508 ret = rga2_MapION(req->sg_dst, MMU_Base + Src0MemSize + Src1MemSize, DstMemSize);
\r
511 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize + Src1MemSize, DstStart, DstMemSize);
\r
514 pr_err("rga2 map dst memory failed\n");
\r
519 /* change the buf address in req struct */
\r
520 req->mmu_info.dst_base_addr = ((unsigned long)(MMU_Base_phys + Src0MemSize + Src1MemSize));
\r
521 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
522 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
523 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
524 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((uv_size) << PAGE_SHIFT);
\r
525 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((v_size) << PAGE_SHIFT);
\r
528 /* flush data to DDR */
\r
530 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
531 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
532 #elif defined(CONFIG_ARM64)
\r
533 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
536 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
537 reg->MMU_len = AllSize;
\r
548 static int rga2_mmu_info_color_palette_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
550 int SrcMemSize, DstMemSize;
\r
551 unsigned long SrcStart, DstStart;
\r
552 struct page **pages = NULL;
\r
554 uint32_t *MMU_Base = NULL, *MMU_Base_phys;
\r
559 uint16_t sw, byte_num;
\r
561 shift = 3 - (req->palette_mode & 3);
\r
562 sw = req->src.vir_w*req->src.vir_h;
\r
563 byte_num = sw >> shift;
\r
564 stride = (byte_num + 3) & (~3);
\r
572 if (req->mmu_info.src0_mmu_flag) {
\r
573 SrcMemSize = rga2_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
574 if(SrcMemSize == 0) {
\r
579 if (req->mmu_info.dst_mmu_flag) {
\r
580 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
581 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
583 if(DstMemSize == 0) {
\r
588 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
589 DstMemSize = (DstMemSize + 15) & (~15);
\r
591 AllSize = SrcMemSize + DstMemSize;
\r
593 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
594 pr_err("RGA2 Get MMU mem failed\n");
\r
595 status = RGA2_MALLOC_ERROR;
\r
599 pages = rga2_mmu_buf.pages;
\r
600 if(pages == NULL) {
\r
601 pr_err("RGA MMU malloc pages mem failed\n");
\r
605 mutex_lock(&rga2_service.lock);
\r
606 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
607 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
608 mutex_unlock(&rga2_service.lock);
\r
611 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
613 pr_err("rga2 map src0 memory failed\n");
\r
618 /* change the buf address in req struct */
\r
619 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
620 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
624 ret = rga2_MapUserMemory(&pages[0], MMU_Base + SrcMemSize, DstStart, DstMemSize);
\r
626 pr_err("rga2 map dst memory failed\n");
\r
631 /* change the buf address in req struct */
\r
632 req->mmu_info.dst_base_addr = ((unsigned long)(MMU_Base_phys + SrcMemSize));
\r
633 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
636 /* flush data to DDR */
\r
638 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
639 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
640 #elif defined(CONFIG_ARM64)
\r
641 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
644 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
645 reg->MMU_len = AllSize;
\r
654 static int rga2_mmu_info_color_fill_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
657 unsigned long DstStart;
\r
658 struct page **pages = NULL;
\r
660 uint32_t *MMU_Base, *MMU_Base_phys;
\r
668 if(req->mmu_info.dst_mmu_flag & 1) {
\r
669 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
670 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
672 if(DstMemSize == 0) {
\r
677 AllSize = (DstMemSize + 15) & (~15);
\r
679 pages = rga2_mmu_buf.pages;
\r
681 if(rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
682 pr_err("RGA2 Get MMU mem failed\n");
\r
683 status = RGA2_MALLOC_ERROR;
\r
687 mutex_lock(&rga2_service.lock);
\r
688 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
689 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
690 mutex_unlock(&rga2_service.lock);
\r
694 ret = rga2_MapION(req->sg_dst, &MMU_Base[0], DstMemSize);
\r
697 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], DstStart, DstMemSize);
\r
700 pr_err("rga2 map dst memory failed\n");
\r
705 /* change the buf address in req struct */
\r
706 req->mmu_info.dst_base_addr = ((unsigned long)MMU_Base_phys);
\r
707 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
710 /* flush data to DDR */
\r
712 dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
713 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
\r
714 #elif defined(CONFIG_ARM64)
\r
715 __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
718 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
728 static int rga2_mmu_info_update_palette_table_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
731 unsigned long SrcStart;
\r
732 struct page **pages = NULL;
\r
734 uint32_t *MMU_Base, *MMU_Base_phys;
\r
740 /* cal src buf mmu info */
\r
741 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h, &SrcStart);
\r
742 if(SrcMemSize == 0) {
\r
746 SrcMemSize = (SrcMemSize + 15) & (~15);
\r
747 AllSize = SrcMemSize;
\r
749 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
750 pr_err("RGA2 Get MMU mem failed\n");
\r
751 status = RGA2_MALLOC_ERROR;
\r
755 mutex_lock(&rga2_service.lock);
\r
756 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
757 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
758 mutex_unlock(&rga2_service.lock);
\r
760 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
763 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);
\r
765 pr_err("rga2 map palette memory failed\n");
\r
770 /* change the buf address in req struct */
\r
771 req->mmu_info.src0_base_addr = (((unsigned long)MMU_Base_phys));
\r
772 req->pat.yrgb_addr = (req->pat.yrgb_addr & (~PAGE_MASK));
\r
775 /* flush data to DDR */
\r
777 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
778 outer_flush_range(virt_to_phys(MMU_Base), virt_to_phys(MMU_Base + AllSize));
\r
779 #elif defined(CONFIG_ARM64)
\r
780 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
783 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
784 reg->MMU_len = AllSize;
\r
793 static int rga2_mmu_info_update_patten_buff_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
795 int SrcMemSize, CMDMemSize;
\r
796 unsigned long SrcStart, CMDStart;
\r
797 struct page **pages = NULL;
\r
800 uint32_t *MMU_Base, *MMU_p;
\r
803 MMU_Base = MMU_p = 0;
\r
806 /* cal src buf mmu info */
\r
807 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.act_w * req->pat.act_h * 4, &SrcStart);
\r
808 if(SrcMemSize == 0) {
\r
812 /* cal cmd buf mmu info */
\r
813 CMDMemSize = rga2_mem_size_cal((unsigned long)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
814 if(CMDMemSize == 0) {
\r
818 AllSize = SrcMemSize + CMDMemSize;
\r
820 pages = rga2_mmu_buf.pages;
\r
822 MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
824 for(i=0; i<CMDMemSize; i++) {
\r
825 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
828 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
830 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
832 pr_err("rga map src memory failed\n");
\r
839 MMU_p = MMU_Base + CMDMemSize;
\r
841 for(i=0; i<SrcMemSize; i++)
\r
843 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
848 * change the buf address in req struct
\r
849 * for the reason of lie to MMU
\r
851 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
853 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
855 /*record the malloc buf for the cmd end to release*/
\r
856 reg->MMU_base = MMU_Base;
\r
858 /* flush data to DDR */
\r
860 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
861 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
862 #elif defined(CONFIG_ARM64)
\r
863 __dma_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
874 int rga2_set_mmu_info(struct rga2_reg *reg, struct rga2_req *req)
\r
878 switch (req->render_mode) {
\r
880 ret = rga2_mmu_info_BitBlt_mode(reg, req);
\r
882 case color_palette_mode :
\r
883 ret = rga2_mmu_info_color_palette_mode(reg, req);
\r
885 case color_fill_mode :
\r
886 ret = rga2_mmu_info_color_fill_mode(reg, req);
\r
888 case update_palette_table_mode :
\r
889 ret = rga2_mmu_info_update_palette_table_mode(reg, req);
\r
891 case update_patten_buff_mode :
\r
892 ret = rga2_mmu_info_update_patten_buff_mode(reg, req);
\r