3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
\r
7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
\r
9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
\r
11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
\r
15 #include <linux/memory.h>
\r
16 #include <linux/dma-mapping.h>
\r
17 #include <asm/memory.h>
\r
18 #include <asm/atomic.h>
\r
19 #include <asm/cacheflush.h>
\r
20 #include "rga2_mmu_info.h"
\r
22 extern struct rga2_service_info rga2_service;
\r
23 extern struct rga2_mmu_buf_t rga2_mmu_buf;
\r
25 //extern int mmu_buff_temp[1024];
\r
27 #define KERNEL_SPACE_VALID 0xc0000000
\r
29 #define V7_VATOPA_SUCESS_MASK (0x1)
\r
30 #define V7_VATOPA_GET_PADDR(X) (X & 0xFFFFF000)
\r
31 #define V7_VATOPA_GET_INER(X) ((X>>4) & 7)
\r
32 #define V7_VATOPA_GET_OUTER(X) ((X>>2) & 3)
\r
33 #define V7_VATOPA_GET_SH(X) ((X>>7) & 1)
\r
34 #define V7_VATOPA_GET_NS(X) ((X>>9) & 1)
\r
35 #define V7_VATOPA_GET_SS(X) ((X>>1) & 1)
\r
38 static unsigned int armv7_va_to_pa(unsigned int v_addr)
\r
40 unsigned int p_addr;
\r
41 __asm__ volatile ( "mcr p15, 0, %1, c7, c8, 0\n"
\r
44 "mrc p15, 0, %0, c7, c4, 0\n"
\r
49 if (p_addr & V7_VATOPA_SUCESS_MASK)
\r
52 return (V7_VATOPA_GET_SS(p_addr) ? 0xFFFFFFFF : V7_VATOPA_GET_PADDR(p_addr));
\r
56 static int rga2_mmu_buf_get(struct rga2_mmu_buf_t *t, uint32_t size)
\r
58 mutex_lock(&rga2_service.lock);
\r
60 mutex_unlock(&rga2_service.lock);
\r
65 static int rga2_mmu_buf_get_try(struct rga2_mmu_buf_t *t, uint32_t size)
\r
67 mutex_lock(&rga2_service.lock);
\r
68 if((t->back - t->front) > t->size) {
\r
69 if(t->front + size > t->back - t->size)
\r
73 if((t->front + size) > t->back)
\r
76 if(t->front + size > t->size) {
\r
77 if (size > (t->back - t->size)) {
\r
83 mutex_unlock(&rga2_service.lock);
\r
89 static int rga2_mmu_buf_cal(struct rga2_mmu_buf_t *t, uint32_t size)
\r
91 if((t->front + size) > t->back) {
\r
102 static int rga2_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr)
\r
104 uint32_t start, end;
\r
105 uint32_t pageCount;
\r
107 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
108 start = Mem >> PAGE_SHIFT;
\r
109 pageCount = end - start;
\r
110 *StartAddr = start;
\r
114 static int rga2_buf_size_cal(uint32_t yrgb_addr, uint32_t uv_addr, uint32_t v_addr,
\r
115 int format, uint32_t w, uint32_t h, uint32_t *StartAddr )
\r
117 uint32_t size_yrgb = 0;
\r
118 uint32_t size_uv = 0;
\r
119 uint32_t size_v = 0;
\r
120 uint32_t stride = 0;
\r
121 uint32_t start, end;
\r
122 uint32_t pageCount;
\r
126 case RGA2_FORMAT_RGBA_8888 :
\r
127 stride = (w * 4 + 3) & (~3);
\r
128 size_yrgb = stride*h;
\r
129 start = yrgb_addr >> PAGE_SHIFT;
\r
130 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
132 case RGA2_FORMAT_RGBX_8888 :
\r
133 stride = (w * 4 + 3) & (~3);
\r
134 size_yrgb = stride*h;
\r
135 start = yrgb_addr >> PAGE_SHIFT;
\r
136 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
138 case RGA2_FORMAT_RGB_888 :
\r
139 stride = (w * 3 + 3) & (~3);
\r
140 size_yrgb = stride*h;
\r
141 start = yrgb_addr >> PAGE_SHIFT;
\r
142 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
144 case RGA2_FORMAT_BGRA_8888 :
\r
146 start = yrgb_addr >> PAGE_SHIFT;
\r
147 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
149 case RGA2_FORMAT_RGB_565 :
\r
150 stride = (w*2 + 3) & (~3);
\r
151 size_yrgb = stride * h;
\r
152 start = yrgb_addr >> PAGE_SHIFT;
\r
153 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
155 case RGA2_FORMAT_RGBA_5551 :
\r
156 stride = (w*2 + 3) & (~3);
\r
157 size_yrgb = stride * h;
\r
158 start = yrgb_addr >> PAGE_SHIFT;
\r
159 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
161 case RGA2_FORMAT_RGBA_4444 :
\r
162 stride = (w*2 + 3) & (~3);
\r
163 size_yrgb = stride * h;
\r
164 start = yrgb_addr >> PAGE_SHIFT;
\r
165 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
167 case RGA2_FORMAT_BGR_888 :
\r
168 stride = (w*3 + 3) & (~3);
\r
169 size_yrgb = stride * h;
\r
170 start = yrgb_addr >> PAGE_SHIFT;
\r
171 pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;
\r
175 case RGA2_FORMAT_YCbCr_422_SP :
\r
176 case RGA2_FORMAT_YCrCb_422_SP :
\r
177 stride = (w + 3) & (~3);
\r
178 size_yrgb = stride * h;
\r
179 size_uv = stride * h;
\r
180 start = MIN(yrgb_addr, uv_addr);
\r
182 start >>= PAGE_SHIFT;
\r
183 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
184 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
185 pageCount = end - start;
\r
187 case RGA2_FORMAT_YCbCr_422_P :
\r
188 case RGA2_FORMAT_YCrCb_422_P :
\r
189 stride = (w + 3) & (~3);
\r
190 size_yrgb = stride * h;
\r
191 size_uv = ((stride >> 1) * h);
\r
192 size_v = ((stride >> 1) * h);
\r
193 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
194 start = start >> PAGE_SHIFT;
\r
195 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
196 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
197 pageCount = end - start;
\r
199 case RGA2_FORMAT_YCbCr_420_SP :
\r
200 case RGA2_FORMAT_YCrCb_420_SP :
\r
201 stride = (w + 3) & (~3);
\r
202 size_yrgb = stride * h;
\r
203 size_uv = (stride * (h >> 1));
\r
204 start = MIN(yrgb_addr, uv_addr);
\r
205 start >>= PAGE_SHIFT;
\r
206 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
207 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
208 pageCount = end - start;
\r
210 case RGA2_FORMAT_YCbCr_420_P :
\r
211 case RGA2_FORMAT_YCrCb_420_P :
\r
212 stride = (w + 3) & (~3);
\r
213 size_yrgb = stride * h;
\r
214 size_uv = ((stride >> 1) * (h >> 1));
\r
215 size_v = ((stride >> 1) * (h >> 1));
\r
216 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
217 start >>= PAGE_SHIFT;
\r
218 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
219 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
220 pageCount = end - start;
\r
223 case RK_FORMAT_BPP1 :
\r
225 case RK_FORMAT_BPP2 :
\r
227 case RK_FORMAT_BPP4 :
\r
229 case RK_FORMAT_BPP8 :
\r
238 *StartAddr = start;
\r
242 static int rga2_MapUserMemory(struct page **pages,
\r
243 uint32_t *pageTable,
\r
245 uint32_t pageCount)
\r
258 down_read(¤t->mm->mmap_sem);
\r
259 result = get_user_pages(current,
\r
261 Memory << PAGE_SHIFT,
\r
268 up_read(¤t->mm->mmap_sem);
\r
271 if(result <= 0 || result < pageCount)
\r
275 for(i=0; i<pageCount; i++)
\r
277 temp = armv7_va_to_pa((Memory + i) << PAGE_SHIFT);
\r
278 if (temp == 0xffffffff)
\r
280 printk("rga find mmu phy ddr error\n ");
\r
281 status = RGA_OUT_OF_RESOURCES;
\r
285 pageTable[i] = temp;
\r
291 if(result <= 0 || result < pageCount)
\r
293 struct vm_area_struct *vma;
\r
295 for(i=0; i<pageCount; i++)
\r
297 vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);
\r
299 if (vma)//&& (vma->vm_flags & VM_PFNMAP) )
\r
310 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
312 if(pgd_val(*pgd) == 0)
\r
314 //printk("rga pgd value is zero \n");
\r
318 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
321 pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
324 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
327 pte_unmap_unlock(pte, ptl);
\r
341 pfn = pte_pfn(*pte);
\r
342 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
343 pte_unmap_unlock(pte, ptl);
\r
357 pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);
\r
358 pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);
\r
359 pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);
\r
360 pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);
\r
362 pfn = pte_pfn(*pte);
\r
363 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
364 pte_unmap_unlock(pte, ptl);
\r
369 pageTable[i] = Address;
\r
373 status = RGA2_OUT_OF_RESOURCES;
\r
382 /* Fill the page table. */
\r
383 for(i=0; i<pageCount; i++)
\r
385 /* Get the physical address from page struct. */
\r
386 pageTable[i] = page_to_phys(pages[i]);
\r
396 static int rga2_mmu_info_BitBlt_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
398 int Src0MemSize, DstMemSize, Src1MemSize;
\r
399 uint32_t Src0Start, Src1Start, DstStart;
\r
401 uint32_t *MMU_Base, *MMU_Base_phys;
\r
404 uint32_t uv_size, v_size;
\r
406 struct page **pages = NULL;
\r
416 /* cal src0 buf mmu info */
\r
417 if(req->mmu_info.src0_mmu_flag & 1) {
\r
418 Src0MemSize = rga2_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
419 req->src.format, req->src.vir_w,
\r
422 if (Src0MemSize == 0) {
\r
427 /* cal src1 buf mmu info */
\r
428 if(req->mmu_info.src1_mmu_flag & 1) {
\r
429 Src1MemSize = rga2_buf_size_cal(req->src1.yrgb_addr, req->src1.uv_addr, req->src1.v_addr,
\r
430 req->src1.format, req->src1.vir_w,
\r
433 Src0MemSize = (Src0MemSize + 3) & (~3);
\r
434 if (Src1MemSize == 0) {
\r
440 /* cal dst buf mmu info */
\r
441 if(req->mmu_info.dst_mmu_flag & 1) {
\r
442 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
443 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
445 if(DstMemSize == 0) {
\r
450 /* Cal out the needed mem size */
\r
451 AllSize = ((Src0MemSize+3)&(~3)) + ((Src1MemSize+3)&(~3)) + ((DstMemSize+3)&(~3));
\r
453 pages = kzalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);
\r
454 if(pages == NULL) {
\r
455 pr_err("RGA MMU malloc pages mem failed\n");
\r
456 status = RGA2_MALLOC_ERROR;
\r
460 if (rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
461 pr_err("RGA2 Get MMU mem failed\n");
\r
462 status = RGA2_MALLOC_ERROR;
\r
466 mutex_lock(&rga2_service.lock);
\r
467 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
468 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
469 mutex_unlock(&rga2_service.lock);
\r
472 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], Src0Start, Src0MemSize);
\r
474 pr_err("rga2 map src0 memory failed\n");
\r
479 /* change the buf address in req struct */
\r
480 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys));
\r
481 uv_size = (req->src.uv_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
482 v_size = (req->src.v_addr - (Src0Start << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
484 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));
\r
485 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);
\r
486 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);
\r
489 Src0MemSize = (Src0MemSize + 3) & (~3);
\r
492 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize, Src1Start, Src1MemSize);
\r
494 pr_err("rga2 map src1 memory failed\n");
\r
499 /* change the buf address in req struct */
\r
500 req->mmu_info.src1_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize));
\r
501 req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (Src1MemSize << PAGE_SHIFT);
\r
504 Src1MemSize = (Src1MemSize + 3) & (~3);
\r
507 ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize + Src1MemSize, DstStart, DstMemSize);
\r
509 pr_err("rga2 map dst memory failed\n");
\r
514 /* change the buf address in req struct */
\r
515 req->mmu_info.dst_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize + Src1MemSize));
\r
516 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize) << PAGE_SHIFT);
\r
517 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
518 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
519 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize + uv_size) << PAGE_SHIFT);
\r
520 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize + v_size) << PAGE_SHIFT);
\r
523 /* flush data to DDR */
\r
524 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
525 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
527 rga2_mmu_buf_get(&rga2_mmu_buf, AllSize);
\r
528 reg->MMU_len = AllSize;
\r
532 /* Free the page table */
\r
533 if (pages != NULL) {
\r
542 /* Free the page table */
\r
543 if (pages != NULL) {
\r
547 /* Free MMU table */
\r
548 if(MMU_Base != NULL) {
\r
555 static int rga2_mmu_info_color_palette_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
557 int SrcMemSize, DstMemSize, CMDMemSize;
\r
558 uint32_t SrcStart, DstStart, CMDStart;
\r
559 struct page **pages = NULL;
\r
562 uint32_t *MMU_Base = NULL;
\r
568 uint16_t sw, byte_num;
\r
570 shift = 3 - (req->palette_mode & 3);
\r
571 sw = req->src.vir_w;
\r
572 byte_num = sw >> shift;
\r
573 stride = (byte_num + 3) & (~3);
\r
578 SrcMemSize = rga2_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
579 if(SrcMemSize == 0) {
\r
583 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
584 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
586 if(DstMemSize == 0) {
\r
590 CMDMemSize = rga2_mem_size_cal((uint32_t)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
591 if(CMDMemSize == 0) {
\r
595 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
597 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
598 if(pages == NULL) {
\r
599 pr_err("RGA MMU malloc pages mem failed\n");
\r
603 MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
604 if(MMU_Base == NULL) {
\r
605 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
610 for(i=0; i<CMDMemSize; i++)
\r
612 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<<PAGE_SHIFT));
\r
616 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
618 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
621 pr_err("rga map src memory failed\n");
\r
628 MMU_p = MMU_Base + CMDMemSize;
\r
630 for(i=0; i<SrcMemSize; i++)
\r
632 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
637 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
639 ret = rga2_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
642 pr_err("rga map dst memory failed\n");
\r
649 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
651 for(i=0; i<DstMemSize; i++)
\r
653 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
659 * change the buf address in req struct
\r
660 * for the reason of lie to MMU
\r
662 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base)>>2);
\r
663 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
664 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
667 /*record the malloc buf for the cmd end to release*/
\r
668 reg->MMU_base = MMU_Base;
\r
670 /* flush data to DDR */
\r
671 dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
672 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
\r
674 /* Free the page table */
\r
675 if (pages != NULL) {
\r
684 /* Free the page table */
\r
685 if (pages != NULL) {
\r
689 /* Free mmu table */
\r
690 if (MMU_Base != NULL) {
\r
697 static int rga2_mmu_info_color_fill_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
701 struct page **pages = NULL;
\r
703 uint32_t *MMU_Base, *MMU_Base_phys;
\r
711 if(req->mmu_info.dst_mmu_flag & 1) {
\r
712 DstMemSize = rga2_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
713 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
715 if(DstMemSize == 0) {
\r
720 AllSize = (DstMemSize + 3) & (~3);
\r
722 pages = kzalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);
\r
723 if(pages == NULL) {
\r
724 pr_err("RGA2 MMU malloc pages mem failed\n");
\r
725 status = RGA2_MALLOC_ERROR;
\r
729 if(rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize)) {
\r
730 pr_err("RGA2 Get MMU mem failed\n");
\r
731 status = RGA2_MALLOC_ERROR;
\r
735 mutex_lock(&rga2_service.lock);
\r
736 MMU_Base_phys = rga2_mmu_buf.buf + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
737 MMU_Base = rga2_mmu_buf.buf_virtual + (rga2_mmu_buf.front & (rga2_mmu_buf.size - 1));
\r
738 mutex_unlock(&rga2_service.lock);
\r
742 ret = rga2_MapUserMemory(&pages[0], &MMU_Base[0], DstStart, DstMemSize);
\r
744 pr_err("rga2 map dst memory failed\n");
\r
749 /* change the buf address in req struct */
\r
750 req->mmu_info.src0_base_addr = (((uint32_t)MMU_Base_phys)>>4);
\r
751 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));
\r
754 /* flush data to DDR */
\r
755 dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
\r
756 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
\r
758 rga2_mmu_buf_get_try(&rga2_mmu_buf, AllSize);
\r
760 /* Free the page table */
\r
771 if (MMU_Base != NULL)
\r
778 static int rga2_mmu_info_update_palette_table_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
780 int SrcMemSize, CMDMemSize;
\r
781 uint32_t SrcStart, CMDStart;
\r
782 struct page **pages = NULL;
\r
785 uint32_t *MMU_Base, *MMU_p;
\r
792 /* cal src buf mmu info */
\r
793 SrcMemSize = rga2_mem_size_cal(req->src.yrgb_addr, req->src.vir_w * req->src.vir_h, &SrcStart);
\r
794 if(SrcMemSize == 0) {
\r
798 /* cal cmd buf mmu info */
\r
799 CMDMemSize = rga2_mem_size_cal((uint32_t)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
800 if(CMDMemSize == 0) {
\r
804 AllSize = SrcMemSize + CMDMemSize;
\r
806 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
807 if(pages == NULL) {
\r
808 pr_err("RGA MMU malloc pages mem failed\n");
\r
809 status = RGA2_MALLOC_ERROR;
\r
813 MMU_Base = kzalloc((AllSize + 1)* sizeof(uint32_t), GFP_KERNEL);
\r
814 if(pages == NULL) {
\r
815 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
816 status = RGA2_MALLOC_ERROR;
\r
820 for(i=0; i<CMDMemSize; i++) {
\r
821 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
824 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
826 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
828 pr_err("rga map src memory failed\n");
\r
834 MMU_p = MMU_Base + CMDMemSize;
\r
836 for(i=0; i<SrcMemSize; i++)
\r
838 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
843 * change the buf address in req struct
\r
844 * for the reason of lie to MMU
\r
846 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
848 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
850 /*record the malloc buf for the cmd end to release*/
\r
851 reg->MMU_base = MMU_Base;
\r
853 /* flush data to DDR */
\r
854 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
855 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
857 if (pages != NULL) {
\r
858 /* Free the page table */
\r
869 if (MMU_Base != NULL)
\r
875 static int rga2_mmu_info_update_patten_buff_mode(struct rga2_reg *reg, struct rga2_req *req)
\r
877 int SrcMemSize, CMDMemSize;
\r
878 uint32_t SrcStart, CMDStart;
\r
879 struct page **pages = NULL;
\r
882 uint32_t *MMU_Base, *MMU_p;
\r
885 MMU_Base = MMU_p = 0;
\r
890 /* cal src buf mmu info */
\r
891 SrcMemSize = rga2_mem_size_cal(req->pat.yrgb_addr, req->pat.act_w * req->pat.act_h * 4, &SrcStart);
\r
892 if(SrcMemSize == 0) {
\r
896 /* cal cmd buf mmu info */
\r
897 CMDMemSize = rga2_mem_size_cal((uint32_t)rga2_service.cmd_buff, RGA2_CMD_BUF_SIZE, &CMDStart);
\r
898 if(CMDMemSize == 0) {
\r
902 AllSize = SrcMemSize + CMDMemSize;
\r
904 pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
905 if(pages == NULL) {
\r
906 pr_err("RGA MMU malloc pages mem failed\n");
\r
907 status = RGA2_MALLOC_ERROR;
\r
911 MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
912 if(pages == NULL) {
\r
913 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
914 status = RGA2_MALLOC_ERROR;
\r
918 for(i=0; i<CMDMemSize; i++) {
\r
919 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
922 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
924 ret = rga2_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
926 pr_err("rga map src memory failed\n");
\r
933 MMU_p = MMU_Base + CMDMemSize;
\r
935 for(i=0; i<SrcMemSize; i++)
\r
937 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
942 * change the buf address in req struct
\r
943 * for the reason of lie to MMU
\r
945 req->mmu_info.src0_base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
947 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
949 /*record the malloc buf for the cmd end to release*/
\r
950 reg->MMU_base = MMU_Base;
\r
952 /* flush data to DDR */
\r
953 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
954 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
956 if (pages != NULL) {
\r
957 /* Free the page table */
\r
969 if (MMU_Base != NULL)
\r
975 int rga2_set_mmu_info(struct rga2_reg *reg, struct rga2_req *req)
\r
979 switch (req->render_mode) {
\r
981 ret = rga2_mmu_info_BitBlt_mode(reg, req);
\r
983 case color_palette_mode :
\r
984 ret = rga2_mmu_info_color_palette_mode(reg, req);
\r
986 case color_fill_mode :
\r
987 ret = rga2_mmu_info_color_fill_mode(reg, req);
\r
989 case update_palette_table_mode :
\r
990 ret = rga2_mmu_info_update_palette_table_mode(reg, req);
\r
992 case update_patten_buff_mode :
\r
993 ret = rga2_mmu_info_update_patten_buff_mode(reg, req);
\r