3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
\r
7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
\r
9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
\r
11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
\r
15 #include <asm/atomic.h>
\r
18 #include "rga_mmu_info.h"
\r
20 extern rga_service_info rga_service;
\r
21 extern int mmu_buff_temp[1024];
\r
23 #define KERNEL_SPACE_VALID 0xc0000000
\r
27 static int rga_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr)
\r
29 uint32_t start, end;
\r
32 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
33 start = Mem >> PAGE_SHIFT;
\r
34 pageCount = end - start;
\r
39 static int rga_buf_size_cal(uint32_t yrgb_addr, uint32_t uv_addr, uint32_t v_addr,
\r
40 int format, uint32_t w, uint32_t h, uint32_t *StartAddr )
\r
42 uint32_t size_yrgb = 0;
\r
43 uint32_t size_uv = 0;
\r
44 uint32_t size_v = 0;
\r
45 uint32_t stride = 0;
\r
46 uint32_t start, end;
\r
51 case RK_FORMAT_RGBA_8888 :
\r
52 stride = (w * 4 + 3) & (~3);
\r
53 size_yrgb = stride*h;
\r
54 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
55 start = yrgb_addr >> PAGE_SHIFT;
\r
56 pageCount = end - start;
\r
58 case RK_FORMAT_RGBX_8888 :
\r
59 stride = (w * 4 + 3) & (~3);
\r
60 size_yrgb = stride*h;
\r
61 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
62 start = yrgb_addr >> PAGE_SHIFT;
\r
63 pageCount = end - start;
\r
65 case RK_FORMAT_RGB_888 :
\r
66 stride = (w * 3 + 3) & (~3);
\r
67 size_yrgb = stride*h;
\r
68 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
69 start = yrgb_addr >> PAGE_SHIFT;
\r
70 pageCount = end - start;
\r
72 case RK_FORMAT_BGRA_8888 :
\r
74 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
75 start = yrgb_addr >> PAGE_SHIFT;
\r
76 pageCount = end - start;
\r
78 case RK_FORMAT_RGB_565 :
\r
79 stride = (w*2 + 3) & (~3);
\r
80 size_yrgb = stride * h;
\r
81 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
82 start = yrgb_addr >> PAGE_SHIFT;
\r
83 pageCount = end - start;
\r
85 case RK_FORMAT_RGBA_5551 :
\r
86 stride = (w*2 + 3) & (~3);
\r
87 size_yrgb = stride * h;
\r
88 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
89 start = yrgb_addr >> PAGE_SHIFT;
\r
90 pageCount = end - start;
\r
92 case RK_FORMAT_RGBA_4444 :
\r
93 stride = (w*2 + 3) & (~3);
\r
94 size_yrgb = stride * h;
\r
95 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
96 start = yrgb_addr >> PAGE_SHIFT;
\r
97 pageCount = end - start;
\r
99 case RK_FORMAT_BGR_888 :
\r
100 stride = (w*3 + 3) & (~3);
\r
101 size_yrgb = stride * h;
\r
102 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
103 start = yrgb_addr >> PAGE_SHIFT;
\r
104 pageCount = end - start;
\r
108 case RK_FORMAT_YCbCr_422_SP :
\r
109 stride = (w + 3) & (~3);
\r
110 size_yrgb = stride * h;
\r
111 size_uv = stride * h;
\r
112 start = MIN(yrgb_addr, uv_addr);
\r
113 start >>= PAGE_SHIFT;
\r
114 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
115 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
116 pageCount = end - start;
\r
118 case RK_FORMAT_YCbCr_422_P :
\r
119 stride = (w + 3) & (~3);
\r
120 size_yrgb = stride * h;
\r
121 size_uv = ((stride >> 1) * h);
\r
122 size_v = ((stride >> 1) * h);
\r
123 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
124 start = start >> PAGE_SHIFT;
\r
125 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
126 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
127 pageCount = end - start;
\r
129 case RK_FORMAT_YCbCr_420_SP :
\r
130 stride = (w + 3) & (~3);
\r
131 size_yrgb = stride * h;
\r
132 size_uv = (stride * (h >> 1));
\r
133 start = MIN(yrgb_addr, uv_addr);
\r
134 start >>= PAGE_SHIFT;
\r
135 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
136 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
137 pageCount = end - start;
\r
139 case RK_FORMAT_YCbCr_420_P :
\r
140 stride = (w + 3) & (~3);
\r
141 size_yrgb = stride * h;
\r
142 size_uv = ((stride >> 1) * (h >> 1));
\r
143 size_v = ((stride >> 1) * (h >> 1));
\r
144 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
145 start >>= PAGE_SHIFT;
\r
146 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
147 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
148 pageCount = end - start;
\r
151 case RK_FORMAT_YCrCb_422_SP :
\r
152 stride = (w + 3) & (~3);
\r
153 size_yrgb = stride * h;
\r
154 size_uv = stride * h;
\r
155 start = MIN(yrgb_addr, uv_addr);
\r
156 start >>= PAGE_SHIFT;
\r
157 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
158 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
159 pageCount = end - start;
\r
161 case RK_FORMAT_YCrCb_422_P :
\r
162 stride = (w + 3) & (~3);
\r
163 size_yrgb = stride * h;
\r
164 size_uv = ((stride >> 1) * h);
\r
165 size_v = ((stride >> 1) * h);
\r
166 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
167 start >>= PAGE_SHIFT;
\r
168 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
169 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
170 pageCount = end - start;
\r
173 case RK_FORMAT_YCrCb_420_SP :
\r
174 stride = (w + 3) & (~3);
\r
175 size_yrgb = stride * h;
\r
176 size_uv = (stride * (h >> 1));
\r
177 start = MIN(yrgb_addr, uv_addr);
\r
178 start >>= PAGE_SHIFT;
\r
179 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
180 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
181 pageCount = end - start;
\r
183 case RK_FORMAT_YCrCb_420_P :
\r
184 stride = (w + 3) & (~3);
\r
185 size_yrgb = stride * h;
\r
186 size_uv = ((stride >> 1) * (h >> 1));
\r
187 size_v = ((stride >> 1) * (h >> 1));
\r
188 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
189 start >>= PAGE_SHIFT;
\r
190 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
191 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
192 pageCount = end - start;
\r
195 case RK_FORMAT_BPP1 :
\r
197 case RK_FORMAT_BPP2 :
\r
199 case RK_FORMAT_BPP4 :
\r
201 case RK_FORMAT_BPP8 :
\r
210 *StartAddr = start;
\r
214 static int rga_MapUserMemory(struct page **pages,
\r
215 uint32_t *pageTable,
\r
217 uint32_t pageCount)
\r
228 down_read(¤t->mm->mmap_sem);
\r
229 result = get_user_pages(current,
\r
231 Memory << PAGE_SHIFT,
\r
238 up_read(¤t->mm->mmap_sem);
\r
240 if(result <= 0 || result < pageCount)
\r
242 struct vm_area_struct *vma;
\r
244 for(i=0; i<pageCount; i++)
\r
246 t_mem = (Memory + i) << PAGE_SHIFT;
\r
248 vma = find_vma(current->mm, t_mem);
\r
250 if (vma && (vma->vm_flags & VM_PFNMAP) )
\r
256 unsigned long pfn;
\r
258 pgd_t * pgd = pgd_offset(current->mm, t_mem);
\r
259 pud_t * pud = pud_offset(pgd, t_mem);
\r
262 pmd_t * pmd = pmd_offset(pud, t_mem);
\r
265 pte = pte_offset_map_lock(current->mm, pmd, t_mem, &ptl);
\r
281 pfn = pte_pfn(*pte);
\r
282 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)t_mem) & ~PAGE_MASK));
\r
283 pte_unmap_unlock(pte, ptl);
\r
287 pageTable[i] = Address;
\r
291 status = RGA_OUT_OF_RESOURCES;
\r
299 for (i = 0; i < pageCount; i++)
\r
301 /* Flush the data cache. */
\r
303 dma_sync_single_for_device(
\r
305 page_to_phys(pages[i]),
\r
309 flush_dcache_page(pages[i]);
\r
313 /* Fill the page table. */
\r
314 for(i=0; i<pageCount; i++)
\r
316 /* Get the physical address from page struct. */
\r
317 pageTable[i] = page_to_phys(pages[i]);
\r
324 if (rgaIS_ERROR(status))
\r
326 /* Release page array. */
\r
327 if (result > 0 && pages != NULL)
\r
329 for (i = 0; i < result; i++)
\r
331 if (pages[i] == NULL)
\r
336 dma_sync_single_for_device(
\r
338 page_to_phys(pages[i]),
\r
342 page_cache_release(pages[i]);
\r
350 static int rga_mmu_info_BitBlt_mode(struct rga_reg *reg, struct rga_req *req)
\r
352 int SrcMemSize, DstMemSize, CMDMemSize;
\r
353 uint32_t SrcStart, DstStart, CMDStart;
\r
356 uint32_t *MMU_Base, *MMU_p;
\r
359 uint32_t uv_size, v_size;
\r
361 struct page **pages = NULL;
\r
367 /* cal src buf mmu info */
\r
368 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
369 req->src.format, req->src.vir_w, req->src.vir_h,
\r
371 if(SrcMemSize == 0) {
\r
375 /* cal dst buf mmu info */
\r
376 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
377 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
379 if(DstMemSize == 0) {
\r
384 /* cal cmd buf mmu info */
\r
385 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
386 if(CMDMemSize == 0) {
\r
390 /* Cal out the needed mem size */
\r
391 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
393 pages = (struct page **)kmalloc((AllSize + 1)* sizeof(struct page *), GFP_KERNEL);
\r
394 if(pages == NULL) {
\r
395 pr_err("RGA MMU malloc pages mem failed\n");
\r
396 status = RGA_MALLOC_ERROR;
\r
400 MMU_Base = (uint32_t *)kmalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);
\r
401 if(MMU_Base == NULL) {
\r
402 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
403 status = RGA_MALLOC_ERROR;
\r
407 for(i=0; i<CMDMemSize; i++) {
\r
408 MMU_Base[i] = (uint32_t)virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
411 if(req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
413 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
415 pr_err("rga map src memory failed\n");
\r
422 MMU_p = MMU_Base + CMDMemSize;
\r
424 if(req->src.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)
\r
426 /* Down scale ratio over 2, Last prc */
\r
427 /* MMU table copy from pre scale table */
\r
429 for(i=0; i<SrcMemSize; i++)
\r
431 MMU_p[i] = rga_service.pre_scale_buf[i];
\r
436 for(i=0; i<SrcMemSize; i++)
\r
438 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
443 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
446 ktime_t start, end;
\r
447 start = ktime_get();
\r
449 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
451 pr_err("rga map dst memory failed\n");
\r
458 end = ktime_sub(end, start);
\r
459 printk("dst mmu map time = %d\n", (int)ktime_to_us(end));
\r
464 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
466 for(i=0; i<DstMemSize; i++)
\r
468 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
473 * change the buf address in req struct
\r
476 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
478 uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
479 v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
481 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
482 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);
\r
483 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);
\r
485 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
487 /*record the malloc buf for the cmd end to release*/
\r
488 reg->MMU_base = MMU_Base;
\r
490 /* flush data to DDR */
\r
491 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
492 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
496 /* Free the page table */
\r
497 if (pages != NULL) {
\r
506 /* Free the page table */
\r
507 if (pages != NULL) {
\r
511 /* Free MMU table */
\r
512 if(MMU_Base != NULL) {
\r
519 static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *req)
\r
521 int SrcMemSize, DstMemSize, CMDMemSize;
\r
522 uint32_t SrcStart, DstStart, CMDStart;
\r
523 struct page **pages = NULL;
\r
526 uint32_t *MMU_Base = NULL;
\r
532 uint16_t sw, byte_num;
\r
534 shift = 3 - (req->palette_mode & 3);
\r
535 sw = req->src.vir_w;
\r
536 byte_num = sw >> shift;
\r
537 stride = (byte_num + 3) & (~3);
\r
542 SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
543 if(SrcMemSize == 0) {
\r
547 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
548 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
550 if(DstMemSize == 0) {
\r
554 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
555 if(CMDMemSize == 0) {
\r
559 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
561 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
562 if(pages == NULL) {
\r
563 pr_err("RGA MMU malloc pages mem failed\n");
\r
567 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
568 if(MMU_Base == NULL) {
\r
569 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
574 for(i=0; i<CMDMemSize; i++)
\r
576 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<<PAGE_SHIFT));
\r
580 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
582 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
585 pr_err("rga map src memory failed\n");
\r
592 MMU_p = MMU_Base + CMDMemSize;
\r
594 for(i=0; i<SrcMemSize; i++)
\r
596 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
601 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
603 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
606 pr_err("rga map dst memory failed\n");
\r
613 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
615 for(i=0; i<DstMemSize; i++)
\r
617 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
623 * change the buf address in req struct
\r
624 * for the reason of lie to MMU
\r
626 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
627 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
628 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
631 /*record the malloc buf for the cmd end to release*/
\r
632 reg->MMU_base = MMU_Base;
\r
634 /* flush data to DDR */
\r
635 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
636 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
638 /* Free the page table */
\r
639 if (pages != NULL) {
\r
648 /* Free the page table */
\r
649 if (pages != NULL) {
\r
653 /* Free mmu table */
\r
654 if (MMU_Base != NULL) {
\r
661 static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req)
\r
663 int DstMemSize, CMDMemSize;
\r
664 uint32_t DstStart, CMDStart;
\r
665 struct page **pages = NULL;
\r
668 uint32_t *MMU_Base, *MMU_p;
\r
676 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
677 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
679 if(DstMemSize == 0) {
\r
683 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
684 if(CMDMemSize == 0) {
\r
688 AllSize = DstMemSize + CMDMemSize;
\r
690 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
691 if(pages == NULL) {
\r
692 pr_err("RGA MMU malloc pages mem failed\n");
\r
693 status = RGA_MALLOC_ERROR;
\r
697 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
698 if(pages == NULL) {
\r
699 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
700 status = RGA_MALLOC_ERROR;
\r
704 for(i=0; i<CMDMemSize; i++) {
\r
705 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));
\r
708 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
710 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);
\r
712 pr_err("rga map dst memory failed\n");
\r
719 MMU_p = MMU_Base + CMDMemSize;
\r
721 for(i=0; i<DstMemSize; i++)
\r
723 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
729 * change the buf address in req struct
\r
732 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
733 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
\r
735 /*record the malloc buf for the cmd end to release*/
\r
736 reg->MMU_base = MMU_Base;
\r
738 /* flush data to DDR */
\r
739 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
740 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
742 /* Free the page table */
\r
743 if (pages != NULL)
\r
750 if (pages != NULL)
\r
753 if (MMU_Base != NULL)
\r
760 static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_req *req)
\r
762 int DstMemSize, CMDMemSize;
\r
763 uint32_t DstStart, CMDStart;
\r
764 struct page **pages = NULL;
\r
767 uint32_t *MMU_Base, *MMU_p;
\r
774 /* cal dst buf mmu info */
\r
775 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
776 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
778 if(DstMemSize == 0) {
\r
782 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
783 if(CMDMemSize == 0) {
\r
787 AllSize = DstMemSize + CMDMemSize;
\r
789 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
790 if(pages == NULL) {
\r
791 pr_err("RGA MMU malloc pages mem failed\n");
\r
792 status = RGA_MALLOC_ERROR;
\r
796 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
797 if(pages == NULL) {
\r
798 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
799 status = RGA_MALLOC_ERROR;
\r
803 for(i=0; i<CMDMemSize; i++) {
\r
804 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));
\r
807 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
809 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);
\r
811 pr_err("rga map dst memory failed\n");
\r
818 MMU_p = MMU_Base + CMDMemSize;
\r
820 for(i=0; i<DstMemSize; i++)
\r
822 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
827 * change the buf address in req struct
\r
828 * for the reason of lie to MMU
\r
830 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
831 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
\r
834 /*record the malloc buf for the cmd end to release*/
\r
835 reg->MMU_base = MMU_Base;
\r
837 /* flush data to DDR */
\r
838 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
839 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
841 /* Free the page table */
\r
842 if (pages != NULL) {
\r
854 if (MMU_Base != NULL)
\r
860 static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_req *req)
\r
862 int SrcMemSize, DstMemSize, CMDMemSize;
\r
863 uint32_t SrcStart, DstStart, CMDStart;
\r
864 struct page **pages = NULL;
\r
867 uint32_t *MMU_Base, *MMU_p;
\r
869 uint32_t uv_size, v_size;
\r
875 /* cal src buf mmu info */
\r
876 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
877 req->src.format, req->src.vir_w, req->src.vir_h,
\r
879 if(SrcMemSize == 0) {
\r
883 /* cal dst buf mmu info */
\r
884 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
885 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
887 if(DstMemSize == 0) {
\r
891 /* cal cmd buf mmu info */
\r
892 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
893 if(CMDMemSize == 0) {
\r
897 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
899 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
900 if(pages == NULL) {
\r
901 pr_err("RGA MMU malloc pages mem failed\n");
\r
902 status = RGA_MALLOC_ERROR;
\r
906 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
907 if(pages == NULL) {
\r
908 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
909 status = RGA_MALLOC_ERROR;
\r
913 for(i=0; i<CMDMemSize; i++) {
\r
914 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<< PAGE_SHIFT));
\r
917 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
919 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
922 pr_err("rga map src memory failed\n");
\r
929 MMU_p = MMU_Base + CMDMemSize;
\r
931 for(i=0; i<SrcMemSize; i++)
\r
933 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
938 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
940 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
943 pr_err("rga map dst memory failed\n");
\r
950 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
952 for(i=0; i<DstMemSize; i++)
\r
954 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
959 * change the buf address in req struct
\r
960 * for the reason of lie to MMU
\r
962 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
964 uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
965 v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
967 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
968 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);
\r
969 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);
\r
971 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
972 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
974 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
975 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + uv_size) << PAGE_SHIFT);
\r
976 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + v_size) << PAGE_SHIFT);
\r
979 /*record the malloc buf for the cmd end to release*/
\r
980 reg->MMU_base = MMU_Base;
\r
982 /* flush data to DDR */
\r
983 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
984 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
986 /* Free the page table */
\r
987 if (pages != NULL) {
\r
998 if (MMU_Base != NULL)
\r
1006 static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)
\r
1008 int SrcMemSize, DstMemSize, CMDMemSize;
\r
1009 uint32_t SrcStart, DstStart, CMDStart;
\r
1010 struct page **pages = NULL;
\r
1013 uint32_t *MMU_Base, *MMU_p;
\r
1016 uint32_t uv_size, v_size;
\r
1022 /* cal src buf mmu info */
\r
1023 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
1024 req->src.format, req->src.vir_w, req->src.vir_h,
\r
1026 if(SrcMemSize == 0) {
\r
1030 /* cal dst buf mmu info */
\r
1031 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
1032 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
1034 if(DstMemSize == 0) {
\r
1038 /* cal cmd buf mmu info */
\r
1039 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1040 if(CMDMemSize == 0) {
\r
1044 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
1046 pages = (struct page **)kmalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);
\r
1047 if(pages == NULL)
\r
1049 pr_err("RGA MMU malloc pages mem failed\n");
\r
1050 status = RGA_MALLOC_ERROR;
\r
1055 * Allocate MMU Index mem
\r
1056 * This mem release in run_to_done fun
\r
1058 MMU_Base = (uint32_t *)kmalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);
\r
1059 if(pages == NULL) {
\r
1060 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1061 status = RGA_MALLOC_ERROR;
\r
1065 for(i=0; i<CMDMemSize; i++) {
\r
1066 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1070 /* map src pages */
\r
1071 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1073 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1075 pr_err("rga map src memory failed\n");
\r
1082 MMU_p = MMU_Base + CMDMemSize;
\r
1084 for(i=0; i<SrcMemSize; i++)
\r
1086 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1091 if(req->dst.yrgb_addr >= KERNEL_SPACE_VALID)
\r
1093 /* kernel space */
\r
1094 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
1096 if(req->dst.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)
\r
1098 for(i=0; i<DstMemSize; i++)
\r
1100 MMU_p[i] = rga_service.pre_scale_buf[i];
\r
1105 for(i=0; i<DstMemSize; i++)
\r
1107 MMU_p[i] = virt_to_phys((uint32_t *)((DstStart + i)<< PAGE_SHIFT));
\r
1114 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
1117 pr_err("rga map dst memory failed\n");
\r
1124 * change the buf address in req struct
\r
1125 * for the reason of lie to MMU
\r
1128 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
1130 uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
1131 v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
1133 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1134 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);
\r
1135 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);
\r
1137 uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
1138 v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;
\r
1140 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
1141 req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + uv_size) << PAGE_SHIFT);
\r
1142 req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + v_size) << PAGE_SHIFT);
\r
1144 /*record the malloc buf for the cmd end to release*/
\r
1145 reg->MMU_base = MMU_Base;
\r
1147 /* flush data to DDR */
\r
1148 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1149 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1151 /* Free the page table */
\r
1152 if (pages != NULL)
\r
1161 if (pages != NULL)
\r
1164 if (MMU_Base != NULL)
\r
1171 static int rga_mmu_info_update_palette_table_mode(struct rga_reg *reg, struct rga_req *req)
\r
1173 int SrcMemSize, CMDMemSize;
\r
1174 uint32_t SrcStart, CMDStart;
\r
1175 struct page **pages = NULL;
\r
1178 uint32_t *MMU_Base, *MMU_p;
\r
1185 /* cal src buf mmu info */
\r
1186 SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, req->src.vir_w * req->src.vir_h, &SrcStart);
\r
1187 if(SrcMemSize == 0) {
\r
1191 /* cal cmd buf mmu info */
\r
1192 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1193 if(CMDMemSize == 0) {
\r
1197 AllSize = SrcMemSize + CMDMemSize;
\r
1199 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
1200 if(pages == NULL) {
\r
1201 pr_err("RGA MMU malloc pages mem failed\n");
\r
1202 status = RGA_MALLOC_ERROR;
\r
1206 MMU_Base = (uint32_t *)kmalloc((AllSize + 1)* sizeof(uint32_t), GFP_KERNEL);
\r
1207 if(pages == NULL) {
\r
1208 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1209 status = RGA_MALLOC_ERROR;
\r
1213 for(i=0; i<CMDMemSize; i++) {
\r
1214 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1217 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1219 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1221 pr_err("rga map src memory failed\n");
\r
1227 MMU_p = MMU_Base + CMDMemSize;
\r
1229 for(i=0; i<SrcMemSize; i++)
\r
1231 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1236 * change the buf address in req struct
\r
1237 * for the reason of lie to MMU
\r
1239 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
1241 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1243 /*record the malloc buf for the cmd end to release*/
\r
1244 reg->MMU_base = MMU_Base;
\r
1246 /* flush data to DDR */
\r
1247 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1248 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1250 if (pages != NULL) {
\r
1251 /* Free the page table */
\r
1259 if (pages != NULL)
\r
1262 if (MMU_Base != NULL)
\r
1268 static int rga_mmu_info_update_patten_buff_mode(struct rga_reg *reg, struct rga_req *req)
\r
1270 int SrcMemSize, CMDMemSize;
\r
1271 uint32_t SrcStart, CMDStart;
\r
1272 struct page **pages = NULL;
\r
1275 uint32_t *MMU_Base, *MMU_p;
\r
1278 MMU_Base = MMU_p = 0;
\r
1283 /* cal src buf mmu info */
\r
1284 SrcMemSize = rga_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h * 4, &SrcStart);
\r
1285 if(SrcMemSize == 0) {
\r
1289 /* cal cmd buf mmu info */
\r
1290 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1291 if(CMDMemSize == 0) {
\r
1295 AllSize = SrcMemSize + CMDMemSize;
\r
1297 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
1298 if(pages == NULL) {
\r
1299 pr_err("RGA MMU malloc pages mem failed\n");
\r
1300 status = RGA_MALLOC_ERROR;
\r
1304 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
1305 if(pages == NULL) {
\r
1306 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1307 status = RGA_MALLOC_ERROR;
\r
1311 for(i=0; i<CMDMemSize; i++) {
\r
1312 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1315 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1317 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1319 pr_err("rga map src memory failed\n");
\r
1326 MMU_p = MMU_Base + CMDMemSize;
\r
1328 for(i=0; i<SrcMemSize; i++)
\r
1330 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1335 * change the buf address in req struct
\r
1336 * for the reason of lie to MMU
\r
1338 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
1340 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1342 /*record the malloc buf for the cmd end to release*/
\r
1343 reg->MMU_base = MMU_Base;
\r
1345 /* flush data to DDR */
\r
1346 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1347 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1349 if (pages != NULL) {
\r
1350 /* Free the page table */
\r
1359 if (pages != NULL)
\r
1362 if (MMU_Base != NULL)
\r
1368 int rga_set_mmu_info(struct rga_reg *reg, struct rga_req *req)
\r
1372 switch (req->render_mode) {
\r
1373 case bitblt_mode :
\r
1374 ret = rga_mmu_info_BitBlt_mode(reg, req);
\r
1376 case color_palette_mode :
\r
1377 ret = rga_mmu_info_color_palette_mode(reg, req);
\r
1379 case color_fill_mode :
\r
1380 //printk("color_fill_mode is enable\n");
\r
1381 ret = rga_mmu_info_color_fill_mode(reg, req);
\r
1383 case line_point_drawing_mode :
\r
1384 ret = rga_mmu_info_line_point_drawing_mode(reg, req);
\r
1386 case blur_sharp_filter_mode :
\r
1387 ret = rga_mmu_info_blur_sharp_filter_mode(reg, req);
\r
1389 case pre_scaling_mode :
\r
1390 //printk("pre_scaleing_mode is enable\n");
\r
1391 ret = rga_mmu_info_pre_scale_mode(reg, req);
\r
1393 case update_palette_table_mode :
\r
1394 ret = rga_mmu_info_update_palette_table_mode(reg, req);
\r
1396 case update_patten_buff_mode :
\r
1397 ret = rga_mmu_info_update_patten_buff_mode(reg, req);
\r