3 #include <linux/version.h>
\r
4 #include <linux/init.h>
\r
5 #include <linux/module.h>
\r
6 #include <linux/fs.h>
\r
7 #include <linux/sched.h>
\r
8 #include <linux/signal.h>
\r
9 #include <linux/pagemap.h>
\r
10 #include <linux/seq_file.h>
\r
11 #include <linux/mm.h>
\r
12 #include <linux/mman.h>
\r
13 #include <linux/sched.h>
\r
14 #include <linux/slab.h>
\r
15 #include <asm/atomic.h>
\r
18 #include "rga_mmu_info.h"
\r
20 extern rga_service_info rga_service;
\r
21 extern int mmu_buf[1024];
\r
23 #define KERNEL_SPACE_VALID 0xc0000000
\r
25 static int rga_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr)
\r
27 uint32_t start, end;
\r
30 end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
31 start = Mem >> PAGE_SHIFT;
\r
32 pageCount = end - start;
\r
37 static int rga_buf_size_cal(uint32_t yrgb_addr, uint32_t uv_addr, uint32_t v_addr,
\r
38 int format, uint32_t w, uint32_t h, uint32_t *StartAddr )
\r
40 uint32_t size_yrgb = 0;
\r
41 uint32_t size_uv = 0;
\r
42 uint32_t size_v = 0;
\r
43 uint32_t stride = 0;
\r
44 uint32_t start, end;
\r
49 case RK_FORMAT_RGBA_8888 :
\r
50 stride = (w * 4 + 3) & (~3);
\r
51 size_yrgb = stride*h;
\r
52 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
53 start = yrgb_addr >> PAGE_SHIFT;
\r
54 pageCount = end - start;
\r
56 case RK_FORMAT_RGBX_8888 :
\r
57 stride = (w * 4 + 3) & (~3);
\r
58 size_yrgb = stride*h;
\r
59 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
60 start = yrgb_addr >> PAGE_SHIFT;
\r
61 pageCount = end - start;
\r
63 case RK_FORMAT_RGB_888 :
\r
64 stride = (w * 3 + 3) & (~3);
\r
65 size_yrgb = stride*h;
\r
66 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
67 start = yrgb_addr >> PAGE_SHIFT;
\r
68 pageCount = end - start;
\r
70 case RK_FORMAT_BGRA_8888 :
\r
72 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
73 start = yrgb_addr >> PAGE_SHIFT;
\r
74 pageCount = end - start;
\r
77 case RK_FORMAT_RGB_565 :
\r
78 stride = (w*2 + 3) & (~3);
\r
79 size_yrgb = stride * h;
\r
80 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
81 start = yrgb_addr >> PAGE_SHIFT;
\r
82 pageCount = end - start;
\r
84 case RK_FORMAT_RGBA_5551 :
\r
85 stride = (w*2 + 3) & (~3);
\r
86 size_yrgb = stride * h;
\r
87 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
88 start = yrgb_addr >> PAGE_SHIFT;
\r
89 pageCount = end - start;
\r
91 case RK_FORMAT_RGBA_4444 :
\r
92 stride = (w*2 + 3) & (~3);
\r
93 size_yrgb = stride * h;
\r
94 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
95 start = yrgb_addr >> PAGE_SHIFT;
\r
96 pageCount = end - start;
\r
98 case RK_FORMAT_BGR_888 :
\r
99 stride = (w*3 + 3) & (~3);
\r
100 size_yrgb = stride * h;
\r
101 end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
102 start = yrgb_addr >> PAGE_SHIFT;
\r
103 pageCount = end - start;
\r
107 case RK_FORMAT_YCbCr_422_SP :
\r
108 stride = (w + 3) & (~3);
\r
109 size_yrgb = stride * h;
\r
110 size_uv = stride * h;
\r
111 start = MIN(yrgb_addr, uv_addr);
\r
112 start >>= PAGE_SHIFT;
\r
113 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
114 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
115 pageCount = end - start;
\r
117 case RK_FORMAT_YCbCr_422_P :
\r
118 stride = (w + 3) & (~3);
\r
119 size_yrgb = stride * h;
\r
120 size_uv = ((stride >> 1) * h);
\r
121 size_v = ((stride >> 1) * h);
\r
122 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
123 start = start >> PAGE_SHIFT;
\r
124 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
125 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
126 pageCount = end - start;
\r
128 case RK_FORMAT_YCbCr_420_SP :
\r
129 stride = (w + 3) & (~3);
\r
130 size_yrgb = stride * h;
\r
131 size_uv = (stride * (h >> 1));
\r
132 start = MIN(yrgb_addr, uv_addr);
\r
133 start >>= PAGE_SHIFT;
\r
134 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
135 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
136 pageCount = end - start;
\r
138 case RK_FORMAT_YCbCr_420_P :
\r
139 stride = (w + 3) & (~3);
\r
140 size_yrgb = stride * h;
\r
141 size_uv = ((stride >> 1) * (h >> 1));
\r
142 size_v = ((stride >> 1) * (h >> 1));
\r
143 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
144 start >>= PAGE_SHIFT;
\r
145 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
146 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
147 pageCount = end - start;
\r
150 case RK_FORMAT_YCrCb_422_SP :
\r
151 stride = (w + 3) & (~3);
\r
152 size_yrgb = stride * h;
\r
153 size_uv = stride * h;
\r
154 start = MIN(yrgb_addr, uv_addr);
\r
155 start >>= PAGE_SHIFT;
\r
156 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
157 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
158 pageCount = end - start;
\r
160 case RK_FORMAT_YCrCb_422_P :
\r
161 stride = (w + 3) & (~3);
\r
162 size_yrgb = stride * h;
\r
163 size_uv = ((stride >> 1) * h);
\r
164 size_v = ((stride >> 1) * h);
\r
165 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
166 start >>= PAGE_SHIFT;
\r
167 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
168 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
169 pageCount = end - start;
\r
172 case RK_FORMAT_YCrCb_420_SP :
\r
173 stride = (w + 3) & (~3);
\r
174 size_yrgb = stride * h;
\r
175 size_uv = (stride * (h >> 1));
\r
176 start = MIN(yrgb_addr, uv_addr);
\r
177 start >>= PAGE_SHIFT;
\r
178 end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));
\r
179 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
180 pageCount = end - start;
\r
182 case RK_FORMAT_YCrCb_420_P :
\r
183 stride = (w + 3) & (~3);
\r
184 size_yrgb = stride * h;
\r
185 size_uv = ((stride >> 1) * (h >> 1));
\r
186 size_v = ((stride >> 1) * (h >> 1));
\r
187 start = MIN(MIN(yrgb_addr, uv_addr), v_addr);
\r
188 start >>= PAGE_SHIFT;
\r
189 end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));
\r
190 end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
\r
191 pageCount = end - start;
\r
194 case RK_FORMAT_BPP1 :
\r
196 case RK_FORMAT_BPP2 :
\r
198 case RK_FORMAT_BPP4 :
\r
200 case RK_FORMAT_BPP8 :
\r
209 *StartAddr = start;
\r
213 static int rga_MapUserMemory(struct page **pages,
\r
214 uint32_t *pageTable,
\r
216 uint32_t pageCount)
\r
226 down_read(¤t->mm->mmap_sem);
\r
227 result = get_user_pages(current,
\r
229 Memory << PAGE_SHIFT,
\r
236 up_read(¤t->mm->mmap_sem);
\r
238 if(result <= 0 || result < pageCount)
\r
240 struct vm_area_struct *vma;
\r
242 for(i=0; i<pageCount; i++)
\r
244 vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);
\r
246 if (vma && (vma->vm_flags & VM_PFNMAP) )
\r
254 pgd_t * pgd = pgd_offset(current->mm, ((Memory + i)<< PAGE_SHIFT));
\r
255 pud_t * pud = pud_offset(pgd, ((Memory + i) << PAGE_SHIFT));
\r
258 pmd_t * pmd = pmd_offset(pud, ((Memory + i) << PAGE_SHIFT));
\r
261 pte = pte_offset_map_lock(current->mm, pmd, ((Memory + i)<< PAGE_SHIFT), &ptl);
\r
277 pfn = pte_pfn(*pte);
\r
279 Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));
\r
281 pte_unmap_unlock(pte, ptl);
\r
283 /* Free the page table. */
\r
286 /* Release the pages if any. */
\r
289 for (i = 0; i < result; i++)
\r
291 if (pages[i] == NULL)
\r
296 page_cache_release(pages[i]);
\r
301 pageTable[i] = Address;
\r
307 status = RGA_OUT_OF_RESOURCES;
\r
315 for (i = 0; i < pageCount; i++)
\r
317 /* Flush the data cache. */
\r
319 dma_sync_single_for_device(
\r
321 page_to_phys(pages[i]),
\r
325 flush_dcache_page(pages[i]);
\r
329 /* Fill the page table. */
\r
330 for(i=0; i<pageCount; i++)
\r
332 /* Get the physical address from page struct. */
\r
333 pageTable[i] = page_to_phys(pages[i]);
\r
338 if (rgaIS_ERROR(status))
\r
340 /* Release page array. */
\r
341 if (result > 0 && pages != NULL)
\r
343 for (i = 0; i < result; i++)
\r
345 if (pages[i] == NULL)
\r
350 dma_sync_single_for_device(
\r
352 page_to_phys(pages[i]),
\r
356 page_cache_release(pages[i]);
\r
364 static int rga_mmu_info_BitBlt_mode(struct rga_reg *reg, struct rga_req *req)
\r
366 int SrcMemSize, DstMemSize, CMDMemSize;
\r
367 uint32_t SrcStart, DstStart, CMDStart;
\r
370 uint32_t *MMU_Base, *MMU_p;
\r
374 struct page **pages = NULL;
\r
380 /* cal src buf mmu info */
\r
381 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
382 req->src.format, req->src.vir_w, req->src.vir_h,
\r
384 if(SrcMemSize == 0) {
\r
389 /* cal dst buf mmu info */
\r
390 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
391 req->dst.format, req->dst.vir_w, (req->dst.act_h + req->dst.y_offset),
\r
393 if(DstMemSize == 0) {
\r
397 /* cal cmd buf mmu info */
\r
398 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
399 if(CMDMemSize == 0) {
\r
404 /* Cal out the needed mem size */
\r
405 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
407 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
408 if(pages == NULL) {
\r
409 pr_err("RGA MMU malloc pages mem failed\n");
\r
410 status = RGA_MALLOC_ERROR;
\r
414 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
415 if(MMU_Base == NULL) {
\r
416 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
417 status = RGA_MALLOC_ERROR;
\r
421 for(i=0; i<CMDMemSize; i++) {
\r
422 MMU_Base[i] = (uint32_t)virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
425 if(req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
428 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
430 pr_err("rga map src memory failed\n");
\r
438 MMU_p = MMU_Base + CMDMemSize;
\r
440 if(req->src.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)
\r
442 /* Down scale ratio over 2, Last prc */
\r
443 /* MMU table copy from pre scale table */
\r
445 for(i=0; i<SrcMemSize; i++)
\r
447 MMU_p[i] = rga_service.pre_scale_buf[i];
\r
452 for(i=0; i<SrcMemSize; i++)
\r
454 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
459 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
462 ktime_t start, end;
\r
463 start = ktime_get();
\r
465 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
467 pr_err("rga map dst memory failed\n");
\r
474 end = ktime_sub(end, start);
\r
475 printk("dst mmu map time = %d\n", (int)ktime_to_us(end));
\r
480 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
482 for(i=0; i<DstMemSize; i++)
\r
484 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
489 * change the buf address in req struct
\r
492 printk("CMDMemSize is %.8x\n", CMDMemSize);
\r
493 printk("SrcMemSize is %.8x\n", SrcMemSize);
\r
494 printk("DstMemSize is %.8x\n", DstMemSize);
\r
495 printk("CMDStart is %.8x\n", CMDStart);
\r
496 printk("SrcStart is %.8x\n", SrcStart);
\r
497 printk("DstStart is %.8x\n", DstStart);
\r
500 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
502 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
503 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
504 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
506 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
508 /*record the malloc buf for the cmd end to release*/
\r
509 reg->MMU_base = MMU_Base;
\r
511 /* flush data to DDR */
\r
512 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
513 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
517 /* Free the page table */
\r
518 if (pages != NULL) {
\r
527 /* Free the page table */
\r
528 if (pages != NULL) {
\r
532 /* Free MMU table */
\r
533 if(MMU_Base != NULL) {
\r
540 static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *req)
\r
542 int SrcMemSize, DstMemSize, CMDMemSize;
\r
543 uint32_t SrcStart, DstStart, CMDStart;
\r
544 struct page **pages = NULL;
\r
547 uint32_t *MMU_Base = NULL;
\r
553 uint16_t sw, byte_num;
\r
555 shift = 3 - (req->palette_mode & 3);
\r
556 sw = req->src.vir_w;
\r
557 byte_num = sw >> shift;
\r
558 stride = (byte_num + 3) & (~3);
\r
563 SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);
\r
564 if(SrcMemSize == 0) {
\r
568 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
569 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
571 if(DstMemSize == 0) {
\r
575 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
576 if(CMDMemSize == 0) {
\r
580 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
582 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
583 if(pages == NULL) {
\r
584 pr_err("RGA MMU malloc pages mem failed\n");
\r
588 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
589 if(MMU_Base == NULL) {
\r
590 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
595 for(i=0; i<CMDMemSize; i++)
\r
597 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<<PAGE_SHIFT));
\r
601 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
603 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
606 pr_err("rga map src memory failed\n");
\r
613 MMU_p = MMU_Base + CMDMemSize;
\r
615 for(i=0; i<SrcMemSize; i++)
\r
617 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
622 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
624 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
627 pr_err("rga map dst memory failed");
\r
634 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
636 for(i=0; i<DstMemSize; i++)
\r
638 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
644 * change the buf address in req struct
\r
645 * for the reason of lie to MMU
\r
647 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
648 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
649 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
652 /*record the malloc buf for the cmd end to release*/
\r
653 reg->MMU_base = MMU_Base;
\r
655 /* flush data to DDR */
\r
656 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
657 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
659 /* Free the page table */
\r
660 if (pages != NULL) {
\r
669 /* Free the page table */
\r
670 if (pages != NULL) {
\r
674 /* Free mmu table */
\r
675 if (MMU_Base != NULL) {
\r
682 static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req)
\r
684 int DstMemSize, CMDMemSize;
\r
685 uint32_t DstStart, CMDStart;
\r
686 struct page **pages = NULL;
\r
689 uint32_t *MMU_Base, *MMU_p;
\r
697 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
698 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
700 if(DstMemSize == 0) {
\r
704 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
705 if(CMDMemSize == 0) {
\r
709 AllSize = DstMemSize + CMDMemSize;
\r
711 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
712 if(pages == NULL) {
\r
713 pr_err("RGA MMU malloc pages mem failed");
\r
714 status = RGA_MALLOC_ERROR;
\r
718 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
719 if(pages == NULL) {
\r
720 pr_err("RGA MMU malloc MMU_Base point failed");
\r
721 status = RGA_MALLOC_ERROR;
\r
725 for(i=0; i<CMDMemSize; i++) {
\r
726 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));
\r
729 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
731 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);
\r
733 pr_err("rga map dst memory failed");
\r
740 MMU_p = MMU_Base + CMDMemSize;
\r
742 for(i=0; i<DstMemSize; i++)
\r
744 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
750 * change the buf address in req struct
\r
753 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
754 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
\r
756 /*record the malloc buf for the cmd end to release*/
\r
757 reg->MMU_base = MMU_Base;
\r
759 /* flush data to DDR */
\r
760 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
761 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
763 /* Free the page table */
\r
764 if (pages != NULL)
\r
771 if (pages != NULL)
\r
774 if (MMU_Base != NULL)
\r
781 static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_req *req)
\r
783 int DstMemSize, CMDMemSize;
\r
784 uint32_t DstStart, CMDStart;
\r
785 struct page **pages = NULL;
\r
788 uint32_t *MMU_Base, *MMU_p;
\r
795 /* cal dst buf mmu info */
\r
796 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
797 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
799 if(DstMemSize == 0) {
\r
803 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
804 if(CMDMemSize == 0) {
\r
808 AllSize = DstMemSize + CMDMemSize;
\r
810 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
811 if(pages == NULL) {
\r
812 pr_err("RGA MMU malloc pages mem failed");
\r
813 status = RGA_MALLOC_ERROR;
\r
817 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
818 if(pages == NULL) {
\r
819 pr_err("RGA MMU malloc MMU_Base point failed");
\r
820 status = RGA_MALLOC_ERROR;
\r
824 for(i=0; i<CMDMemSize; i++) {
\r
825 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));
\r
828 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
830 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);
\r
832 pr_err("rga map dst memory failed");
\r
839 MMU_p = MMU_Base + CMDMemSize;
\r
841 for(i=0; i<DstMemSize; i++)
\r
843 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
848 * change the buf address in req struct
\r
849 * for the reason of lie to MMU
\r
851 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
852 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
\r
855 /*record the malloc buf for the cmd end to release*/
\r
856 reg->MMU_base = MMU_Base;
\r
858 /* flush data to DDR */
\r
859 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
860 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
862 /* Free the page table */
\r
863 if (pages != NULL) {
\r
875 if (MMU_Base != NULL)
\r
881 static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_req *req)
\r
883 int SrcMemSize, DstMemSize, CMDMemSize;
\r
884 uint32_t SrcStart, DstStart, CMDStart;
\r
885 struct page **pages = NULL;
\r
888 uint32_t *MMU_Base, *MMU_p;
\r
895 /* cal src buf mmu info */
\r
896 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
897 req->src.format, req->src.vir_w, req->src.vir_h,
\r
899 if(SrcMemSize == 0) {
\r
903 /* cal dst buf mmu info */
\r
904 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
905 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
907 if(DstMemSize == 0) {
\r
911 /* cal cmd buf mmu info */
\r
912 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
913 if(CMDMemSize == 0) {
\r
917 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
919 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
920 if(pages == NULL) {
\r
921 pr_err("RGA MMU malloc pages mem failed\n");
\r
922 status = RGA_MALLOC_ERROR;
\r
926 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
927 if(pages == NULL) {
\r
928 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
929 status = RGA_MALLOC_ERROR;
\r
933 for(i=0; i<CMDMemSize; i++) {
\r
934 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<< PAGE_SHIFT));
\r
937 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
939 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
942 pr_err("rga map src memory failed\n");
\r
949 MMU_p = MMU_Base + CMDMemSize;
\r
951 for(i=0; i<SrcMemSize; i++)
\r
953 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
958 if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)
\r
960 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
963 pr_err("rga map dst memory failed\n");
\r
970 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
972 for(i=0; i<DstMemSize; i++)
\r
974 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));
\r
979 * change the buf address in req struct
\r
980 * for the reason of lie to MMU
\r
982 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
984 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
985 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
986 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
988 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
990 /*record the malloc buf for the cmd end to release*/
\r
991 reg->MMU_base = MMU_Base;
\r
993 /* flush data to DDR */
\r
994 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
995 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
997 /* Free the page table */
\r
998 if (pages != NULL) {
\r
1006 if (pages != NULL)
\r
1009 if (MMU_Base != NULL)
\r
1017 static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)
\r
1019 int SrcMemSize, DstMemSize, CMDMemSize;
\r
1020 uint32_t SrcStart, DstStart, CMDStart;
\r
1021 struct page **pages = NULL;
\r
1024 uint32_t *MMU_Base, *MMU_p;
\r
1032 /* cal src buf mmu info */
\r
1033 SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,
\r
1034 req->src.format, req->src.vir_w, req->src.vir_h,
\r
1036 if(SrcMemSize == 0) {
\r
1040 /* cal dst buf mmu info */
\r
1041 DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,
\r
1042 req->dst.format, req->dst.vir_w, req->dst.vir_h,
\r
1044 if(DstMemSize == 0) {
\r
1048 /* cal cmd buf mmu info */
\r
1049 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1050 if(CMDMemSize == 0) {
\r
1054 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
1058 printk("AllSize = %d\n", AllSize);
\r
1059 printk("SrcSize = %d\n", SrcMemSize);
\r
1060 printk("CMDSize = %d\n", CMDMemSize);
\r
1061 printk("DstSize = %d\n", DstMemSize);
\r
1062 printk("DstStart = %d\n", DstStart);
\r
1065 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
1066 if(pages == NULL)
\r
1068 pr_err("RGA MMU malloc pages mem failed\n");
\r
1069 status = RGA_MALLOC_ERROR;
\r
1074 * Allocate MMU Index mem
\r
1075 * This mem release in run_to_done fun
\r
1077 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
1078 if(pages == NULL) {
\r
1079 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1080 status = RGA_MALLOC_ERROR;
\r
1084 for(i=0; i<CMDMemSize; i++) {
\r
1085 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1089 /* map src pages */
\r
1090 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1092 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1094 pr_err("rga map src memory failed\n");
\r
1101 MMU_p = MMU_Base + CMDMemSize;
\r
1103 for(i=0; i<SrcMemSize; i++)
\r
1105 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1110 if(req->dst.yrgb_addr >= KERNEL_SPACE_VALID)
\r
1112 /* kernel space */
\r
1113 MMU_p = MMU_Base + CMDMemSize + SrcMemSize;
\r
1115 if(req->dst.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)
\r
1117 for(i=0; i<DstMemSize; i++)
\r
1119 MMU_p[i] = rga_service.pre_scale_buf[i];
\r
1124 for(i=0; i<DstMemSize; i++)
\r
1126 MMU_p[i] = virt_to_phys((uint32_t *)((DstStart + i)<< PAGE_SHIFT));
\r
1133 ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);
\r
1136 pr_err("rga map dst memory failed\n");
\r
1143 * change the buf address in req struct
\r
1144 * for the reason of lie to MMU
\r
1147 req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
\r
1149 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1150 req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1151 req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1153 req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
\r
1155 /*record the malloc buf for the cmd end to release*/
\r
1156 reg->MMU_base = MMU_Base;
\r
1158 /* flush data to DDR */
\r
1159 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1160 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1162 /* Free the page table */
\r
1163 if (pages != NULL)
\r
1172 if (pages != NULL)
\r
1175 if (MMU_Base != NULL)
\r
1182 static int rga_mmu_info_update_palette_table_mode(struct rga_reg *reg, struct rga_req *req)
\r
1184 int SrcMemSize, CMDMemSize;
\r
1185 uint32_t SrcStart, CMDStart;
\r
1186 struct page **pages = NULL;
\r
1189 uint32_t *MMU_Base, *MMU_p;
\r
1196 /* cal src buf mmu info */
\r
1197 SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, req->src.vir_w * req->src.vir_h, &SrcStart);
\r
1198 if(SrcMemSize == 0) {
\r
1202 /* cal cmd buf mmu info */
\r
1203 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1204 if(CMDMemSize == 0) {
\r
1208 AllSize = SrcMemSize + CMDMemSize;
\r
1210 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
1211 if(pages == NULL) {
\r
1212 pr_err("RGA MMU malloc pages mem failed\n");
\r
1213 status = RGA_MALLOC_ERROR;
\r
1217 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
1218 if(pages == NULL) {
\r
1219 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1220 status = RGA_MALLOC_ERROR;
\r
1224 for(i=0; i<CMDMemSize; i++) {
\r
1225 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1228 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1230 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1232 pr_err("rga map src memory failed\n");
\r
1238 MMU_p = MMU_Base + CMDMemSize;
\r
1240 for(i=0; i<SrcMemSize; i++)
\r
1242 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1247 * change the buf address in req struct
\r
1248 * for the reason of lie to MMU
\r
1250 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
1252 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1254 /*record the malloc buf for the cmd end to release*/
\r
1255 reg->MMU_base = MMU_Base;
\r
1257 /* flush data to DDR */
\r
1258 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1259 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1261 if (pages != NULL) {
\r
1262 /* Free the page table */
\r
1270 if (pages != NULL)
\r
1273 if (MMU_Base != NULL)
\r
1279 static int rga_mmu_info_update_patten_buff_mode(struct rga_reg *reg, struct rga_req *req)
\r
1281 int SrcMemSize, DstMemSize, CMDMemSize;
\r
1282 uint32_t SrcStart, CMDStart;
\r
1283 struct page **pages = NULL;
\r
1286 uint32_t *MMU_Base, *MMU_p;
\r
1292 /* cal src buf mmu info */
\r
1293 SrcMemSize = rga_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h * 4, &SrcStart);
\r
1294 if(SrcMemSize == 0) {
\r
1298 /* cal cmd buf mmu info */
\r
1299 CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);
\r
1300 if(CMDMemSize == 0) {
\r
1304 AllSize = SrcMemSize + DstMemSize + CMDMemSize;
\r
1306 pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
\r
1307 if(pages == NULL) {
\r
1308 pr_err("RGA MMU malloc pages mem failed\n");
\r
1309 status = RGA_MALLOC_ERROR;
\r
1313 MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
\r
1314 if(pages == NULL) {
\r
1315 pr_err("RGA MMU malloc MMU_Base point failed\n");
\r
1316 status = RGA_MALLOC_ERROR;
\r
1320 for(i=0; i<CMDMemSize; i++) {
\r
1321 MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));
\r
1324 if (req->src.yrgb_addr < KERNEL_SPACE_VALID)
\r
1326 ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);
\r
1328 pr_err("rga map src memory failed\n");
\r
1335 MMU_p = MMU_Base + CMDMemSize;
\r
1337 for(i=0; i<SrcMemSize; i++)
\r
1339 MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));
\r
1344 * change the buf address in req struct
\r
1345 * for the reason of lie to MMU
\r
1347 req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
\r
1349 req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
\r
1351 /*record the malloc buf for the cmd end to release*/
\r
1352 reg->MMU_base = MMU_Base;
\r
1354 /* flush data to DDR */
\r
1355 dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
\r
1356 outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
\r
1358 if (pages != NULL) {
\r
1359 /* Free the page table */
\r
1368 if (pages != NULL)
\r
1371 if (MMU_Base != NULL)
\r
1377 int rga_set_mmu_info(struct rga_reg *reg, struct rga_req *req)
\r
1381 switch (req->render_mode) {
\r
1382 case bitblt_mode :
\r
1383 ret = rga_mmu_info_BitBlt_mode(reg, req);
\r
1385 case color_palette_mode :
\r
1386 ret = rga_mmu_info_color_palette_mode(reg, req);
\r
1388 case color_fill_mode :
\r
1389 ret = rga_mmu_info_color_fill_mode(reg, req);
\r
1391 case line_point_drawing_mode :
\r
1392 ret = rga_mmu_info_line_point_drawing_mode(reg, req);
\r
1394 case blur_sharp_filter_mode :
\r
1395 ret = rga_mmu_info_blur_sharp_filter_mode(reg, req);
\r
1397 case pre_scaling_mode :
\r
1398 ret = rga_mmu_info_pre_scale_mode(reg, req);
\r
1400 case update_palette_table_mode :
\r
1401 ret = rga_mmu_info_update_palette_table_mode(reg, req);
\r
1403 case update_patten_buff_mode :
\r
1404 ret = rga_mmu_info_update_patten_buff_mode(reg, req);
\r