4 #include<linux/rk_fb.h>
7 #include<linux/mfd/syscon.h>
8 #include<linux/regmap.h>
10 #define VOP_INPUT_MAX_WIDTH 4096 /*3840 for LINCOLN*/
12 #define REG_CFG_DONE (0x0000)
13 #define VOP_CFG_DONE(x) (((x)&1)<<0)
14 #define WIN0_CFG_DONE(x) (((x)&1)<<1)
15 #define WIN1_CFG_DONE(x) (((x)&1)<<2)
16 #define WIN2_CFG_DONE(x) (((x)&1)<<3)
17 #define WIN3_CFG_DONE(x) (((x)&1)<<4)
18 #define HWC_CFG_DONE(x) (((x)&1)<<5)
19 #define IEP_CFG_DONE(x) (((x)&1)<<6)
20 #define FBDC_CFG_DONE(x) (((x)&1)<<7)
21 #define SYS_CFG_DONE(x) (((x)&1)<<8)
23 #define VOP_CFG_DONE_WMSK(x) (((x)&1)<<(0+16))
24 #define WIN0_CFG_DONE_WMSK(x) (((x)&1)<<(1+16))
25 #define WIN1_CFG_DONE_WMSK(x) (((x)&1)<<(2+16))
26 #define WIN2_CFG_DONE_WMSK(x) (((x)&1)<<(3+16))
27 #define WIN3_CFG_DONE_WMSK(x) (((x)&1)<<(4+16))
28 #define HWC_CFG_DONE_WMSK(x) (((x)&1)<<(5+16))
29 #define IEP_CFG_DONE_WMSK(x) (((x)&1)<<(6+16))
30 #define FBDC_CFG_DONE_WMSK(x) (((x)&1)<<(7+16))
31 #define SYS_CFG_DONE_WMSK(x) (((x)&1)<<(8+16))
33 #define VOP_REG_DONE (VOP_CFG_DONE(1) | VOP_CFG_DONE_WMSK(1))
34 #define WIN0_REG_DONE (WIN0_CFG_DONE(1) | WIN0_CFG_DONE_WMSK(1))
35 #define WIN1_REG_DONE (WIN1_CFG_DONE(1) | WIN1_CFG_DONE_WMSK(1))
36 #define WIN2_REG_DONE (WIN2_CFG_DONE(1) | WIN2_CFG_DONE_WMSK(1))
37 #define WIN3_REG_DONE (WIN3_CFG_DONE(1) | WIN3_CFG_DONE_WMSK(1))
38 #define HWC_REG_DONE (HWC_CFG_DONE(1) | HWC_CFG_DONE_WMSK(1))
39 #define IEP_REG_DONE (IEP_CFG_DONE(1) | IEP_CFG_DONE_WMSK(1))
40 #define FBDC_REG_DONE (FBDC_CFG_DONE(1) | FBDC_CFG_DONE_WMSK(1))
41 #define SYS_REG_DONE (SYS_CFG_DONE(1) | SYS_CFG_DONE_WMSK(1))
42 #define VERSION_INFO (0x0004)
43 #define m_RTL_VERSION (0xffff<<0)
44 #define m_FPGA_VERSION (0xffff<<16)
45 #define SYS_CTRL (0x0008)
46 #define v_DIRECT_PATH_EN(x) (((x)&1)<<0)
47 #define v_DIRECT_PATCH_SEL(x) (((x)&3)<<1)
48 #define v_DOUB_CHANNEL_EN(x) (((x)&1)<<3)
49 #define v_DOUB_CH_OVERLAP_NUM(x) (((x)&0xf)<<4)
50 #define v_EDPI_HALT_EN(x) (((x)&1)<<8)
51 #define v_EDPI_WMS_MODE(x) (((x)&1)<<9)
52 #define v_EDPI_WMS_FS(x) (((x)&1)<<10)
53 #define v_GLOBAL_REGDONE_EN(x) (((x)&1)<<11)
54 #define v_RGB_OUT_EN(x) (((x)&1)<<12)
55 #define v_HDMI_OUT_EN(x) (((x)&1)<<13)
56 #define v_EDP_OUT_EN(x) (((x)&1)<<14)
57 #define v_MIPI_OUT_EN(x) (((x)&1)<<15)
58 #define v_OVERLAY_MODE(x) (((x)&1)<<16)
59 #define v_FS_SAME_ADDR_MASK_EN(x) (((x)&1)<<17)
60 #define v_POST_LB_MODE(x) (((x)&1)<<18)
61 #define v_WIN23_PRI_OPT_MODE(x) (((x)&1)<<19)
62 #define v_MMU_EN(x) (((x)&1)<<20)
63 #define v_DMA_STOP(x) (((x)&1)<<21)
64 #define v_STANDBY_EN(x) (((x)&1)<<22)
65 #define v_AUTO_GATING_EN(x) (((x)&1)<<23)
67 #define m_DIRECT_PATH_EN (1<<0)
68 #define m_DIRECT_PATCH_SEL (3<<1)
69 #define m_DOUB_CHANNEL_EN (1<<3)
70 #define m_DOUB_CH_OVERLAP_NUM (0xf<<4)
71 #define m_EDPI_HALT_EN (1<<8)
72 #define m_EDPI_WMS_MODE (1<<9)
73 #define m_EDPI_WMS_FS (1<<10)
74 #define m_GLOBAL_REGDONE_EN (1<<11)
75 #define m_RGB_OUT_EN (1<<12)
76 #define m_HDMI_OUT_EN (1<<13)
77 #define m_EDP_OUT_EN (1<<14)
78 #define m_MIPI_OUT_EN (1<<15)
79 #define m_OVERLAY_MODE (1<<16)
80 #define m_FS_SAME_ADDR_MASK_EN (1<<17)
81 #define m_POST_LB_MODE (1<<18)
82 #define m_WIN23_PRI_OPT_MODE (1<<19)
83 #define m_MMU_EN (1<<20)
84 #define m_DMA_STOP (1<<21)
85 #define m_STANDBY_EN (1<<22)
86 #define m_AUTO_GATING_EN (1<<23)
88 #define SYS_CTRL1 (0x000c)
89 #define v_NOC_HURRY_EN(x) (((x)&0x1)<<0)
90 #define v_NOC_HURRY_VALUE(x) (((x)&0x3)<<1)
91 #define v_NOC_HURRY_THRESHOLD(x) (((x)&0x3f)<<3)
92 #define v_NOC_QOS_EN(x) (((x)&0x1)<<9)
93 #define v_NOC_WIN_QOS(x) (((x)&0x3)<<10)
94 #define v_AXI_MAX_OUTSTANDING_EN(x) (((x)&0x1)<<12)
95 #define v_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<13)
97 #define m_NOC_HURRY_EN (0x1<<0)
98 #define m_NOC_HURRY_VALUE (0x3<<1)
99 #define m_NOC_HURRY_THRESHOLD (0x3f<<3)
100 #define m_NOC_QOS_EN (0x1<<9)
101 #define m_NOC_WIN_QOS (0x3<<10)
102 #define m_AXI_MAX_OUTSTANDING_EN (0x1<<12)
103 #define m_AXI_OUTSTANDING_MAX_NUM (0x1f<<13)
105 #define DSP_CTRL0 (0x0010)
106 #define v_DSP_OUT_MODE(x) (((x)&0x0f)<<0)
107 #define v_DSP_DCLK_DDR(x) (((x)&1)<<8)
108 #define v_DSP_DDR_PHASE(x) (((x)&1)<<9)
109 #define v_DSP_INTERLACE(x) (((x)&1)<<10)
110 #define v_DSP_FIELD_POL(x) (((x)&1)<<11)
111 #define v_DSP_BG_SWAP(x) (((x)&1)<<12)
112 #define v_DSP_RB_SWAP(x) (((x)&1)<<13)
113 #define v_DSP_RG_SWAP(x) (((x)&1)<<14)
114 #define v_DSP_DELTA_SWAP(x) (((x)&1)<<15)
115 #define v_DSP_DUMMY_SWAP(x) (((x)&1)<<16)
116 #define v_DSP_OUT_ZERO(x) (((x)&1)<<17)
117 #define v_DSP_BLANK_EN(x) (((x)&1)<<18)
118 #define v_DSP_BLACK_EN(x) (((x)&1)<<19)
119 #define v_DSP_CCIR656_AVG(x) (((x)&1)<<20)
120 #define v_DSP_YUV_CLIP(x) (((x)&1)<<21)
121 #define v_DSP_X_MIR_EN(x) (((x)&1)<<22)
122 #define v_DSP_Y_MIR_EN(x) (((x)&1)<<23)
123 #define m_DSP_OUT_MODE (0x0f<<0)
124 #define m_DSP_DCLK_DDR (1<<8)
125 #define m_DSP_DDR_PHASE (1<<9)
126 #define m_DSP_INTERLACE (1<<10)
127 #define m_DSP_FIELD_POL (1<<11)
128 #define m_DSP_BG_SWAP (1<<12)
129 #define m_DSP_RB_SWAP (1<<13)
130 #define m_DSP_RG_SWAP (1<<14)
131 #define m_DSP_DELTA_SWAP (1<<15)
132 #define m_DSP_DUMMY_SWAP (1<<16)
133 #define m_DSP_OUT_ZERO (1<<17)
134 #define m_DSP_BLANK_EN (1<<18)
135 #define m_DSP_BLACK_EN (1<<19)
136 #define m_DSP_CCIR656_AVG (1<<20)
137 #define m_DSP_YUV_CLIP (1<<21)
138 #define m_DSP_X_MIR_EN (1<<22)
139 #define m_DSP_Y_MIR_EN (1<<23)
141 #define DSP_CTRL1 (0x0014)
142 #define v_DSP_LUT_EN(x) (((x)&1)<<0)
143 #define v_PRE_DITHER_DOWN_EN(x) (((x)&1)<<1)
144 #define v_DITHER_DOWN_EN(x) (((x)&1)<<2)
145 #define v_DITHER_DOWN_MODE(x) (((x)&1)<<3)
146 #define v_DITHER_DOWN_SEL(x) (((x)&1)<<4)
147 #define v_DITHER_UP_EN(x) (((x)&1)<<6)
148 #define v_DSP_LAYER0_SEL(x) (((x)&3)<<8)
149 #define v_DSP_LAYER1_SEL(x) (((x)&3)<<10)
150 #define v_DSP_LAYER2_SEL(x) (((x)&3)<<12)
151 #define v_DSP_LAYER3_SEL(x) (((x)&3)<<14)
153 #define v_RGB_LVDS_HSYNC_POL(x) (((x)&1)<<16)
154 #define v_RGB_LVDS_VSYNC_POL(x) (((x)&1)<<17)
155 #define v_RGB_LVDS_DEN_POL(x) (((x)&1)<<18)
156 #define v_RGB_LVDS_DCLK_POL(x) (((x)&1)<<19)
158 #define v_HDMI_HSYNC_POL(x) (((x)&1)<<20)
159 #define v_HDMI_VSYNC_POL(x) (((x)&1)<<21)
160 #define v_HDMI_DEN_POL(x) (((x)&1)<<22)
161 #define v_HDMI_DCLK_POL(x) (((x)&1)<<23)
163 #define v_EDP_HSYNC_POL(x) (((x)&1)<<24)
164 #define v_EDP_VSYNC_POL(x) (((x)&1)<<25)
165 #define v_EDP_DEN_POL(x) (((x)&1)<<26)
166 #define v_EDP_DCLK_POL(x) (((x)&1)<<27)
168 #define v_MIPI_HSYNC_POL(x) (((x)&1)<<28)
169 #define v_MIPI_VSYNC_POL(x) (((x)&1)<<29)
170 #define v_MIPI_DEN_POL(x) (((x)&1)<<30)
171 #define v_MIPI_DCLK_POL(x) (((x)&1)<<31)
173 #define m_DSP_LUT_EN (1<<0)
174 #define m_PRE_DITHER_DOWN_EN (1<<1)
175 #define m_DITHER_DOWN_EN (1<<2)
176 #define m_DITHER_DOWN_MODE (1<<3)
177 #define m_DITHER_DOWN_SEL (1<<4)
178 #define m_DITHER_UP_EN (1<<6)
179 #define m_DSP_LAYER0_SEL (3<<8)
180 #define m_DSP_LAYER1_SEL (3<<10)
181 #define m_DSP_LAYER2_SEL (3<<12)
182 #define m_DSP_LAYER3_SEL (3<<14)
184 #define m_RGB_LVDS_HSYNC_POL (1<<16)
185 #define m_RGB_LVDS_VSYNC_POL (1<<17)
186 #define m_RGB_LVDS_DEN_POL (1<<18)
187 #define m_RGB_LVDS_DCLK_POL (1<<19)
189 #define m_HDMI_HSYNC_POL (1<<20)
190 #define m_HDMI_VSYNC_POL (1<<21)
191 #define m_HDMI_DEN_POL (1<<22)
192 #define m_HDMI_DCLK_POL (1<<23)
194 #define m_EDP_HSYNC_POL (1<<24)
195 #define m_EDP_VSYNC_POL (1<<25)
196 #define m_EDP_DEN_POL (1<<26)
197 #define m_EDP_DCLK_POL (1<<27)
199 #define m_MIPI_HSYNC_POL (1<<28)
200 #define m_MIPI_VSYNC_POL (1<<29)
201 #define m_MIPI_DEN_POL (1<<30)
202 #define m_MIPI_DCLK_POL (1<<31)
204 #define DSP_BG (0x0018)
205 #define v_DSP_BG_BLUE(x) (((x)&0xff) << 0)
206 #define v_DSP_BG_GREEN(x) (((x)&0xff) << 8)
207 #define v_DSP_BG_RED(x) (((x)&0xff) << 16)
208 #define m_DSP_BG_BLUE (0xff << 0)
209 #define m_DSP_BG_GREEN (0xff << 8)
210 #define m_DSP_BG_RED (0xff << 16)
212 #define MCU_CTRL (0x001c)
213 #define v_MCU_PIX_TOTAL(x) (((x)&0x3f)<<0)
214 #define v_MCU_CS_PST(x) (((x)&0xf)<<6)
215 #define v_MCU_CS_PEND(x) (((x)&0x3f)<<10)
216 #define v_MCU_RW_PST(x) (((x)&0xf)<<16)
217 #define v_MCU_RW_PEND(x) (((x)&0x3f)<<20)
218 #define v_MCU_CLK_SEL(x) (((x)&1)<<26)
219 #define v_MCU_HOLD_MODE(x) (((x)&1)<<27)
220 #define v_MCU_FRAME_ST(x) (((x)&1)<<28)
221 #define v_MCU_RS(x) (((x)&1)<<29)
222 #define v_MCU_BYPASS(x) (((x)&1)<<30)
223 #define v_MCU_TYPE(x) (((x)&1)<<31)
224 #define m_MCU_PIX_TOTAL (0x3f<<0)
225 #define m_MCU_CS_PST (0xf<<6)
226 #define m_MCU_CS_PEND (0x3f<<10)
227 #define m_MCU_RW_PST (0xf<<16)
228 #define m_MCU_RW_PEND (0x3f<<20)
229 #define m_MCU_CLK_SEL (1<<26)
230 #define m_MCU_HOLD_MODE (1<<27)
231 #define m_MCU_FRAME_ST (1<<28)
232 #define m_MCU_RS (1<<29)
233 #define m_MCU_BYPASS (1<<30)
234 #define m_MCU_TYPE ((u32)1<<31)
236 #define LINE_FLAG (0x0020)
237 #define m_DSP_LINE_FLAG0_NUM (0x1fff<<0)
238 #define m_DSP_LINE_FLAG1_NUM (0x1fff<<16)
239 #define v_DSP_LINE_FLAG0_NUM(x) (((x)&0x1fff)<<0)
240 #define v_DSP_LINE_FLAG1_NUM(x) (((x)&0x1fff)<<16)
242 #define INTR_EN (0x0024)
243 #define v_FS_INTR_EN(x) ((((x)&1)<<0) | ((1<<(0+16))))
244 #define v_FS_NEW_INTR_EN(x) ((((x)&1)<<1) | ((1<<(1+16))))
245 #define v_ADDR_SAME_INTR_EN(x) ((((x)&1)<<2) | ((1<<(2+16))))
246 #define v_LINE_FLAG0_INTR_EN(x) ((((x)&1)<<3) | ((1<<(3+16))))
247 #define v_LINE_FLAG1_INTR_EN(x) ((((x)&1)<<4) | ((1<<(4+16))))
248 #define v_BUS_ERROR_INTR_EN(x) ((((x)&1)<<5) | ((1<<(5+16))))
249 #define v_WIN0_EMPTY_INTR_EN(x) ((((x)&1)<<6) | ((1<<(6+16))))
250 #define v_WIN1_EMPTY_INTR_EN(x) ((((x)&1)<<7) | ((1<<(7+16))))
251 #define v_WIN2_EMPTY_INTR_EN(x) ((((x)&1)<<8) | ((1<<(8+16))))
252 #define v_WIN3_EMPTY_INTR_EN(x) ((((x)&1)<<9) | ((1<<(9+16))))
253 #define v_HWC_EMPTY_INTR_EN(x) ((((x)&1)<<10) | ((1<<(10+16))))
254 #define v_POST_BUF_EMPTY_INTR_EN(x) ((((x)&1)<<11) | ((1<<(11+16))))
255 #define v_PWM_GEN_INTR_EN(x) ((((x)&1)<<12) | ((1<<(12+16))))
256 #define v_DSP_HOLD_VALID_INTR_EN(x) ((((x)&1)<<13) | ((1<<(13+16))))
258 #define m_FS_INTR_EN ((1<<0) | ((1<<(0+16))))
259 #define m_FS_NEW_INTR_EN ((1<<1) | ((1<<(1+16))))
260 #define m_ADDR_SAME_INTR_EN ((1<<2) | ((1<<(2+16))))
261 #define m_LINE_FLAG0_INTR_EN ((1<<3) | ((1<<(3+16))))
262 #define m_LINE_FLAG1_INTR_EN ((1<<4) | ((1<<(4+16))))
263 #define m_BUS_ERROR_INTR_EN ((1<<5) | ((1<<(5+16))))
264 #define m_WIN0_EMPTY_INTR_EN ((1<<6) | ((1<<(6+16))))
265 #define m_WIN1_EMPTY_INTR_EN ((1<<7) | ((1<<(7+16))))
266 #define m_WIN2_EMPTY_INTR_EN ((1<<8) | ((1<<(8+16))))
267 #define m_WIN3_EMPTY_INTR_EN ((1<<9) | ((1<<(9+16))))
268 #define m_HWC_EMPTY_INTR_EN ((1<<10) | ((1<<(10+16))))
269 #define m_POST_BUF_EMPTY_INTR_EN ((1<<11) | ((1<<(11+16))))
270 #define m_PWM_GEN_INTR_EN ((1<<12) | ((1<<(12+16))))
271 #define m_DSP_HOLD_VALID_INTR_EN ((1<<13) | ((1<<(13+16))))
273 #define INTR_CLEAR (0x0028)
274 #define v_FS_INTR_CLR(x) ((((x)&1)<<0) | (1<<(0+16)))
275 #define v_FS_NEW_INTR_CLR(x) ((((x)&1)<<1) | (1<<(1+16)))
276 #define v_ADDR_SAME_INTR_CLR(x) ((((x)&1)<<2) | (1<<(2+16)))
277 #define v_LINE_FLAG0_INTR_CLR(x) ((((x)&1)<<3) | (1<<(3+16)))
278 #define v_LINE_FLAG1_INTR_CLR(x) ((((x)&1)<<4) | (1<<(4+16)))
279 #define v_BUS_ERROR_INTR_CLR(x) ((((x)&1)<<5) | (1<<(5+16)))
280 #define v_WIN0_EMPTY_INTR_CLR(x) ((((x)&1)<<6) | (1<<(6+16)))
281 #define v_WIN1_EMPTY_INTR_CLR(x) ((((x)&1)<<7) | (1<<(7+16)))
282 #define v_WIN2_EMPTY_INTR_CLR(x) ((((x)&1)<<8) | (1<<(8+16)))
283 #define v_WIN3_EMPTY_INTR_CLR(x) ((((x)&1)<<9) | (1<<(9+16)))
284 #define v_HWC_EMPTY_INTR_CLR(x) ((((x)&1)<<10) | (1<<(10+16)))
285 #define v_POST_BUF_EMPTY_INTR_CLR(x) ((((x)&1)<<11) | (1<<(11+16)))
286 #define v_PWM_GEN_INTR_CLR(x) ((((x)&1)<<12) | (1<<(12+16)))
287 #define v_DSP_HOLD_VALID_INTR_CLR(x) ((((x)&1)<<13) | (1<<(13+16)))
289 #define m_FS_INTR_CLR ((1<<0) | ((1<<(0+16))))
290 #define m_FS_NEW_INTR_CLR ((1<<1) | ((1<<(1+16))))
291 #define m_ADDR_SAME_INTR_CLR ((1<<2) | ((1<<(2+16))))
292 #define m_LINE_FLAG0_INTR_CLR ((1<<3) | ((1<<(3+16))))
293 #define m_LINE_FLAG1_INTR_CLR ((1<<4) | ((1<<(4+16))))
294 #define m_BUS_ERROR_INTR_CLR ((1<<5) | ((1<<(5+16))))
295 #define m_WIN0_EMPTY_INTR_CLR ((1<<6) | ((1<<(5+16))))
296 #define m_WIN1_EMPTY_INTR_CLR ((1<<7) | ((1<<(7+16))))
297 #define m_WIN2_EMPTY_INTR_CLR ((1<<8) | ((1<<(8+16))))
298 #define m_WIN3_EMPTY_INTR_CLR ((1<<9) | ((1<<(9+16))))
299 #define m_HWC_EMPTY_INTR_CLR ((1<<10) | ((1<<(10+16))))
300 #define m_POST_BUF_EMPTY_INTR_CLR ((1<<11) | ((1<<(11+16))))
301 #define m_PWM_GEN_INTR_CLR ((1<<12) | ((1<<(12+16))))
302 #define m_DSP_HOLD_VALID_INTR_CLR ((1<<13) | ((1<<(13+16))))
304 #define INTR_STATUS (0x002c)
305 #define m_FS_INTR_STS (1<<0)
306 #define m_FS_NEW_INTR_STS (1<<1)
307 #define m_ADDR_SAME_INTR_STS (1<<2)
308 #define m_LINE_FLAG0_INTR_STS (1<<3)
309 #define m_LINE_FLAG1_INTR_STS (1<<4)
310 #define m_BUS_ERROR_INTR_STS (1<<5)
311 #define m_WIN0_EMPTY_INTR_STS (1<<6)
312 #define m_WIN1_EMPTY_INTR_STS (1<<7)
313 #define m_WIN2_EMPTY_INTR_STS (1<<8)
314 #define m_WIN3_EMPTY_INTR_STS (1<<9)
315 #define m_HWC_EMPTY_INTR_STS (1<<10)
316 #define m_POST_BUF_EMPTY_INTR_STS (1<<11)
317 #define m_PWM_GEN_INTR_STS (1<<12)
318 #define m_DSP_HOLD_VALID_INTR_STS (1<<13)
320 #define m_FS_INTR_RAWSTS (1<<(0+16))
321 #define m_FS_NEW_INTR_RAWSTS (1<<(1+16))
322 #define m_ADDR_SAME_INTR_RAWSTS (1<<(2+16))
323 #define m_LINE_FLAG0_INTR_RAWSTS (1<<(3+16))
324 #define m_LINE_FLAG1_INTR_RAWSTS (1<<(4+16))
325 #define m_BUS_ERROR_INTR_RAWSTS (1<<(5+16))
326 #define m_WIN0_EMPTY_INTR_RAWSTS (1<<(6+16))
327 #define m_WIN1_EMPTY_INTR_RAWSTS (1<<(7+16))
328 #define m_WIN2_EMPTY_INTR_RAWSTS (1<<(8+16))
329 #define m_WIN3_EMPTY_INTR_RAWSTS (1<<(9+16))
330 #define m_HWC_EMPTY_INTR_RAWSTS (1<<(10+16))
331 #define m_POST_BUF_EMPTY_INTR_RAWSTS (1<<(11+16))
332 #define m_PWM_GEN_INTR_RAWSTS (1<<(12+16))
333 #define m_DSP_HOLD_VALID_INTR_RAWSTS (1<<(13+16))
336 #define WIN0_CTRL0 (0x0030)
337 #define v_WIN0_EN(x) (((x)&1)<<0)
338 #define v_WIN0_DATA_FMT(x) (((x)&7)<<1)
339 #define v_WIN0_FMT_10(x) (((x)&1)<<4)
340 #define v_WIN0_LB_MODE(x) (((x)&7)<<5)
341 #define v_WIN0_INTERLACE_READ(x) (((x)&1)<<8)
342 #define v_WIN0_NO_OUTSTANDING(x) (((x)&1)<<9)
343 #define v_WIN0_CSC_MODE(x) (((x)&3)<<10)
344 #define v_WIN0_RB_SWAP(x) (((x)&1)<<12)
345 #define v_WIN0_ALPHA_SWAP(x) (((x)&1)<<13)
346 #define v_WIN0_MID_SWAP(x) (((x)&1)<<14)
347 #define v_WIN0_UV_SWAP(x) (((x)&1)<<15)
348 #define v_WIN0_HW_PRE_MUL_EN(x) (((x)&1)<<16)
349 #define v_WIN0_YRGB_DEFLICK(x) (((x)&1)<<18)
350 #define v_WIN0_CBR_DEFLICK(x) (((x)&1)<<19)
351 #define v_WIN0_YUV_CLIP(x) (((x)&1)<<20)
352 #define v_WIN0_X_MIRROR(x) (((x)&1)<<21)
353 #define v_WIN0_Y_MIRROR(x) (((x)&1)<<22)
354 #define v_WIN0_AXI_MAX_OUTSTANDING_EN(x) (((x)&1)<<24)
355 #define v_WIN0_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<25)
356 #define v_WIN0_DMA_BURST_LENGTH(x) (((x)&0x3)<<30)
358 #define m_WIN0_EN (1<<0)
359 #define m_WIN0_DATA_FMT (7<<1)
360 #define m_WIN0_FMT_10 (1<<4)
361 #define m_WIN0_LB_MODE (7<<5)
362 #define m_WIN0_INTERLACE_READ (1<<8)
363 #define m_WIN0_NO_OUTSTANDING (1<<9)
364 #define m_WIN0_CSC_MODE (3<<10)
365 #define m_WIN0_RB_SWAP (1<<12)
366 #define m_WIN0_ALPHA_SWAP (1<<13)
367 #define m_WIN0_MID_SWAP (1<<14)
368 #define m_WIN0_UV_SWAP (1<<15)
369 #define m_WIN0_HW_PRE_MUL_EN (1<<16)
370 #define m_WIN0_YRGB_DEFLICK (1<<18)
371 #define m_WIN0_CBR_DEFLICK (1<<19)
372 #define m_WIN0_YUV_CLIP (1<<20)
373 #define m_WIN0_X_MIRROR (1<<21)
374 #define m_WIN0_Y_MIRROR (1<<22)
375 #define m_WIN0_AXI_MAX_OUTSTANDING_EN (1<<24)
376 #define m_WIN0_AXI_OUTSTANDING_MAX_NUM (0x1f<<25)
377 #define m_WIN0_DMA_BURST_LENGTH (0x3<<30)
379 #define WIN0_CTRL1 (0x0034)
380 #define v_WIN0_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
381 #define v_WIN0_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
382 #define v_WIN0_BIC_COE_SEL(x) (((x)&3)<<2)
383 #define v_WIN0_VSD_YRGB_GT4(x) (((x)&1)<<4)
384 #define v_WIN0_VSD_YRGB_GT2(x) (((x)&1)<<5)
385 #define v_WIN0_VSD_CBR_GT4(x) (((x)&1)<<6)
386 #define v_WIN0_VSD_CBR_GT2(x) (((x)&1)<<7)
387 #define v_WIN0_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
388 #define v_WIN0_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
389 #define v_WIN0_LINE_LOAD_MODE(x) (((x)&1)<<15)
390 #define v_WIN0_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
391 #define v_WIN0_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
392 #define v_WIN0_YRGB_HSD_MODE(x) (((x)&3)<<20)
393 #define v_WIN0_YRGB_VSU_MODE(x) (((x)&1)<<22)
394 #define v_WIN0_YRGB_VSD_MODE(x) (((x)&1)<<23)
395 #define v_WIN0_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
396 #define v_WIN0_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
397 #define v_WIN0_CBR_HSD_MODE(x) (((x)&3)<<28)
398 #define v_WIN0_CBR_VSU_MODE(x) (((x)&1)<<30)
399 #define v_WIN0_CBR_VSD_MODE(x) (((x)&1)<<31)
401 #define m_WIN0_YRGB_AXI_GATHER_EN (1<<0)
402 #define m_WIN0_CBR_AXI_GATHER_EN (1<<1)
403 #define m_WIN0_BIC_COE_SEL (3<<2)
404 #define m_WIN0_VSD_YRGB_GT4 (1<<4)
405 #define m_WIN0_VSD_YRGB_GT2 (1<<5)
406 #define m_WIN0_VSD_CBR_GT4 (1<<6)
407 #define m_WIN0_VSD_CBR_GT2 (1<<7)
408 #define m_WIN0_YRGB_AXI_GATHER_NUM (0xf<<8)
409 #define m_WIN0_CBR_AXI_GATHER_NUM (7<<12)
410 #define m_WIN0_LINE_LOAD_MODE (1<<15)
411 #define m_WIN0_YRGB_HOR_SCL_MODE (3<<16)
412 #define m_WIN0_YRGB_VER_SCL_MODE (3<<18)
413 #define m_WIN0_YRGB_HSD_MODE (3<<20)
414 #define m_WIN0_YRGB_VSU_MODE (1<<22)
415 #define m_WIN0_YRGB_VSD_MODE (1<<23)
416 #define m_WIN0_CBR_HOR_SCL_MODE (3<<24)
417 #define m_WIN0_CBR_VER_SCL_MODE (3<<26)
418 #define m_WIN0_CBR_HSD_MODE (3<<28)
419 #define m_WIN0_CBR_VSU_MODE ((u32)1<<30)
420 #define m_WIN0_CBR_VSD_MODE ((u32)1<<31)
422 #define WIN0_COLOR_KEY (0x0038)
423 #define v_WIN0_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
424 #define v_WIN0_COLOR_KEY_EN(x) (((x)&1)<<31)
425 #define m_WIN0_COLOR_KEY (0x3fffffff<<0)
426 #define m_WIN0_COLOR_KEY_EN ((u32)1<<31)
428 #define WIN0_VIR (0x003c)
429 #define v_WIN0_VIR_STRIDE(x) (((x)&0xffff)<<0)
430 #define v_WIN0_VIR_STRIDE_UV(x) (((x)&0xffff)<<16)
431 #define m_WIN0_VIR_STRIDE (0xffff<<0)
432 #define m_WIN0_VIR_STRIDE_UV (0xffff<<16)
434 #define WIN0_YRGB_MST (0x0040)
435 #define WIN0_CBR_MST (0x0044)
436 #define WIN0_ACT_INFO (0x0048)
437 #define v_WIN0_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
438 #define v_WIN0_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
439 #define m_WIN0_ACT_WIDTH (0x1fff<<0)
440 #define m_WIN0_ACT_HEIGHT (0x1fff<<16)
442 #define WIN0_DSP_INFO (0x004c)
443 #define v_WIN0_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
444 #define v_WIN0_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
445 #define m_WIN0_DSP_WIDTH (0xfff<<0)
446 #define m_WIN0_DSP_HEIGHT (0xfff<<16)
448 #define WIN0_DSP_ST (0x0050)
449 #define v_WIN0_DSP_XST(x) (((x)&0x1fff)<<0)
450 #define v_WIN0_DSP_YST(x) (((x)&0x1fff)<<16)
451 #define m_WIN0_DSP_XST (0x1fff<<0)
452 #define m_WIN0_DSP_YST (0x1fff<<16)
454 #define WIN0_SCL_FACTOR_YRGB (0x0054)
455 #define v_WIN0_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
456 #define v_WIN0_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
457 #define m_WIN0_HS_FACTOR_YRGB (0xffff<<0)
458 #define m_WIN0_VS_FACTOR_YRGB ((u32)0xffff<<16)
460 #define WIN0_SCL_FACTOR_CBR (0x0058)
461 #define v_WIN0_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
462 #define v_WIN0_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
463 #define m_WIN0_HS_FACTOR_CBR (0xffff<<0)
464 #define m_WIN0_VS_FACTOR_CBR ((u32)0xffff<<16)
466 #define WIN0_SCL_OFFSET (0x005c)
467 #define v_WIN0_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
468 #define v_WIN0_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
469 #define v_WIN0_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
470 #define v_WIN0_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
472 #define m_WIN0_HS_OFFSET_YRGB (0xff<<0)
473 #define m_WIN0_HS_OFFSET_CBR (0xff<<8)
474 #define m_WIN0_VS_OFFSET_YRGB (0xff<<16)
475 #define m_WIN0_VS_OFFSET_CBR ((u32)0xff<<24)
477 #define WIN0_SRC_ALPHA_CTRL (0x0060)
478 #define v_WIN0_SRC_ALPHA_EN(x) (((x)&1)<<0)
479 #define v_WIN0_SRC_COLOR_M0(x) (((x)&1)<<1)
480 #define v_WIN0_SRC_ALPHA_M0(x) (((x)&1)<<2)
481 #define v_WIN0_SRC_BLEND_M0(x) (((x)&3)<<3)
482 #define v_WIN0_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
483 #define v_WIN0_SRC_FACTOR_M0(x) (((x)&7)<<6)
484 #define v_WIN0_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
485 #define v_WIN0_FADING_VALUE(x) (((x)&0xff)<<24)
487 #define m_WIN0_SRC_ALPHA_EN (1<<0)
488 #define m_WIN0_SRC_COLOR_M0 (1<<1)
489 #define m_WIN0_SRC_ALPHA_M0 (1<<2)
490 #define m_WIN0_SRC_BLEND_M0 (3<<3)
491 #define m_WIN0_SRC_ALPHA_CAL_M0 (1<<5)
492 #define m_WIN0_SRC_FACTOR_M0 (7<<6)
493 #define m_WIN0_SRC_GLOBAL_ALPHA (0xff<<16)
494 #define m_WIN0_FADING_VALUE (0xff<<24)
496 #define WIN0_DST_ALPHA_CTRL (0x0064)
497 #define v_WIN0_DST_FACTOR_M0(x) (((x)&7)<<6)
498 #define m_WIN0_DST_FACTOR_M0 (7<<6)
500 #define WIN0_FADING_CTRL (0x0068)
501 #define v_WIN0_FADING_OFFSET_R(x) (((x)&0xff)<<0)
502 #define v_WIN0_FADING_OFFSET_G(x) (((x)&0xff)<<8)
503 #define v_WIN0_FADING_OFFSET_B(x) (((x)&0xff)<<16)
504 #define v_WIN0_FADING_EN(x) (((x)&1)<<24)
506 #define m_WIN0_FADING_OFFSET_R (0xff<<0)
507 #define m_WIN0_FADING_OFFSET_G (0xff<<8)
508 #define m_WIN0_FADING_OFFSET_B (0xff<<16)
509 #define m_WIN0_FADING_EN (1<<24)
511 #define WIN0_CTRL2 (0x006c)
512 #define v_WIN_RID_WIN0_YRGB(x) (((x)&0xf)<<0)
513 #define v_WIN_RID_WIN0_CBR(x) (((x)&0xf)<<4)
514 #define m_WIN_RID_WIN0_YRGB ((0xf)<<0)
515 #define m_WIN_RID_WIN0_CBR ((0xf)<<4)
517 #define WIN1_CTRL0 (0x0070)
518 #define v_WIN1_EN(x) (((x)&1)<<0)
519 #define v_WIN1_DATA_FMT(x) (((x)&7)<<1)
520 #define v_WIN1_FMT_10(x) (((x)&1)<<4)
521 #define v_WIN1_LB_MODE(x) (((x)&7)<<5)
522 #define v_WIN1_INTERLACE_READ(x) (((x)&1)<<8)
523 #define v_WIN1_NO_OUTSTANDING(x) (((x)&1)<<9)
524 #define v_WIN1_CSC_MODE(x) (((x)&3)<<10)
525 #define v_WIN1_RB_SWAP(x) (((x)&1)<<12)
526 #define v_WIN1_ALPHA_SWAP(x) (((x)&1)<<13)
527 #define v_WIN1_MID_SWAP(x) (((x)&1)<<14)
528 #define v_WIN1_UV_SWAP(x) (((x)&1)<<15)
529 #define v_WIN1_HW_PRE_MUL_EN(x) (((x)&1)<<16)
530 #define v_WIN1_YRGB_DEFLICK(x) (((x)&1)<<18)
531 #define v_WIN1_CBR_DEFLICK(x) (((x)&1)<<19)
532 #define v_WIN1_YUV_CLIP(x) (((x)&1)<<20)
533 #define v_WIN1_X_MIRROR(x) (((x)&1)<<21)
534 #define v_WIN1_Y_MIRROR(x) (((x)&1)<<22)
535 #define v_WIN1_AXI_MAX_OUTSTANDING_EN(x) (((x)&1)<<24)
536 #define v_WIN1_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<25)
537 #define v_WIN1_DMA_BURST_LENGTH(x) (((x)&0x3)<<30)
538 #define m_WIN1_EN (1<<0)
539 #define m_WIN1_DATA_FMT (7<<1)
540 #define m_WIN1_FMT_10 (1<<4)
541 #define m_WIN1_LB_MODE (7<<5)
542 #define m_WIN1_INTERLACE_READ (1<<8)
543 #define m_WIN1_NO_OUTSTANDING (1<<9)
544 #define m_WIN1_CSC_MODE (3<<10)
545 #define m_WIN1_RB_SWAP (1<<12)
546 #define m_WIN1_ALPHA_SWAP (1<<13)
547 #define m_WIN1_MID_SWAP (1<<14)
548 #define m_WIN1_UV_SWAP (1<<15)
549 #define m_WIN1_HW_PRE_MUL_EN (1<<16)
550 #define m_WIN1_YRGB_DEFLICK (1<<18)
551 #define m_WIN1_CBR_DEFLICK (1<<19)
552 #define m_WIN1_YUV_CLIP (1<<20)
553 #define m_WIN1_X_MIRROR (1<<21)
554 #define m_WIN1_Y_MIRROR (1<<22)
555 #define m_WIN1_AXI_MAX_OUTSTANDING_EN (1<<24)
556 #define m_WIN1_AXI_OUTSTANDING_MAX_NUM (0x1f<<25)
557 #define m_WIN1_DMA_BURST_LENGTH (0x3<<30)
559 #define WIN1_CTRL1 (0x0074)
560 #define v_WIN1_YRGB_AXI_GATHER_EN(x) (((x)&1)<<0)
561 #define v_WIN1_CBR_AXI_GATHER_EN(x) (((x)&1)<<1)
562 #define v_WIN1_BIC_COE_SEL(x) (((x)&3)<<2)
563 #define v_WIN1_VSD_YRGB_GT4(x) (((x)&1)<<4)
564 #define v_WIN1_VSD_YRGB_GT2(x) (((x)&1)<<5)
565 #define v_WIN1_VSD_CBR_GT4(x) (((x)&1)<<6)
566 #define v_WIN1_VSD_CBR_GT2(x) (((x)&1)<<7)
567 #define v_WIN1_YRGB_AXI_GATHER_NUM(x) (((x)&0xf)<<8)
568 #define v_WIN1_CBR_AXI_GATHER_NUM(x) (((x)&7)<<12)
569 #define v_WIN1_LINE_LOAD_MODE(x) (((x)&1)<<15)
570 #define v_WIN1_YRGB_HOR_SCL_MODE(x) (((x)&3)<<16)
571 #define v_WIN1_YRGB_VER_SCL_MODE(x) (((x)&3)<<18)
572 #define v_WIN1_YRGB_HSD_MODE(x) (((x)&3)<<20)
573 #define v_WIN1_YRGB_VSU_MODE(x) (((x)&1)<<22)
574 #define v_WIN1_YRGB_VSD_MODE(x) (((x)&1)<<23)
575 #define v_WIN1_CBR_HOR_SCL_MODE(x) (((x)&3)<<24)
576 #define v_WIN1_CBR_VER_SCL_MODE(x) (((x)&3)<<26)
577 #define v_WIN1_CBR_HSD_MODE(x) (((x)&3)<<28)
578 #define v_WIN1_CBR_VSU_MODE(x) (((x)&1)<<30)
579 #define v_WIN1_CBR_VSD_MODE(x) (((x)&1)<<31)
581 #define m_WIN1_YRGB_AXI_GATHER_EN (1<<0)
582 #define m_WIN1_CBR_AXI_GATHER_EN (1<<1)
583 #define m_WIN1_BIC_COE_SEL (3<<2)
584 #define m_WIN1_VSD_YRGB_GT4 (1<<4)
585 #define m_WIN1_VSD_YRGB_GT2 (1<<5)
586 #define m_WIN1_VSD_CBR_GT4 (1<<6)
587 #define m_WIN1_VSD_CBR_GT2 (1<<7)
588 #define m_WIN1_YRGB_AXI_GATHER_NUM (0xf<<8)
589 #define m_WIN1_CBR_AXI_GATHER_NUM (7<<12)
590 #define m_WIN1_LINE_LOAD_MODE (1<<15)
591 #define m_WIN1_YRGB_HOR_SCL_MODE (3<<16)
592 #define m_WIN1_YRGB_VER_SCL_MODE (3<<18)
593 #define m_WIN1_YRGB_HSD_MODE (3<<20)
594 #define m_WIN1_YRGB_VSU_MODE (1<<22)
595 #define m_WIN1_YRGB_VSD_MODE (1<<23)
596 #define m_WIN1_CBR_HOR_SCL_MODE (3<<24)
597 #define m_WIN1_CBR_VER_SCL_MODE (3<<26)
598 #define m_WIN1_CBR_HSD_MODE (3<<28)
599 #define m_WIN1_CBR_VSU_MODE (1<<30)
600 #define m_WIN1_CBR_VSD_MODE ((u32)1<<31)
602 #define WIN1_COLOR_KEY (0x0078)
603 #define v_WIN1_COLOR_KEY(x) (((x)&0x3fffffff)<<0)
604 #define v_WIN1_COLOR_KEY_EN(x) (((x)&1)<<31)
605 #define m_WIN1_COLOR_KEY (0x3fffffff<<0)
606 #define m_WIN1_COLOR_KEY_EN ((u32)1<<31)
608 #define WIN1_VIR (0x007c)
609 #define v_WIN1_VIR_STRIDE(x) (((x)&0xffff)<<0)
610 #define v_WIN1_VIR_STRIDE_UV(x) (((x)&0xffff)<<16)
611 #define m_WIN1_VIR_STRIDE (0xffff<<0)
612 #define m_WIN1_VIR_STRIDE_UV (0xffff<<16)
614 #define WIN1_YRGB_MST (0x0080)
615 #define WIN1_CBR_MST (0x0084)
616 #define WIN1_ACT_INFO (0x0088)
617 #define v_WIN1_ACT_WIDTH(x) (((x-1)&0x1fff)<<0)
618 #define v_WIN1_ACT_HEIGHT(x) (((x-1)&0x1fff)<<16)
619 #define m_WIN1_ACT_WIDTH (0x1fff<<0)
620 #define m_WIN1_ACT_HEIGHT (0x1fff<<16)
622 #define WIN1_DSP_INFO (0x008c)
623 #define v_WIN1_DSP_WIDTH(x) (((x-1)&0xfff)<<0)
624 #define v_WIN1_DSP_HEIGHT(x) (((x-1)&0xfff)<<16)
625 #define m_WIN1_DSP_WIDTH (0xfff<<0)
626 #define m_WIN1_DSP_HEIGHT (0xfff<<16)
628 #define WIN1_DSP_ST (0x0090)
629 #define v_WIN1_DSP_XST(x) (((x)&0x1fff)<<0)
630 #define v_WIN1_DSP_YST(x) (((x)&0x1fff)<<16)
631 #define m_WIN1_DSP_XST (0x1fff<<0)
632 #define m_WIN1_DSP_YST (0x1fff<<16)
634 #define WIN1_SCL_FACTOR_YRGB (0x0094)
635 #define v_WIN1_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
636 #define v_WIN1_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
637 #define m_WIN1_HS_FACTOR_YRGB (0xffff<<0)
638 #define m_WIN1_VS_FACTOR_YRGB ((u32)0xffff<<16)
640 #define WIN1_SCL_FACTOR_CBR (0x0098)
641 #define v_WIN1_HS_FACTOR_CBR(x) (((x)&0xffff)<<0)
642 #define v_WIN1_VS_FACTOR_CBR(x) (((x)&0xffff)<<16)
643 #define m_WIN1_HS_FACTOR_CBR (0xffff<<0)
644 #define m_WIN1_VS_FACTOR_CBR ((u32)0xffff<<16)
646 #define WIN1_SCL_OFFSET (0x009c)
647 #define v_WIN1_HS_OFFSET_YRGB(x) (((x)&0xff)<<0)
648 #define v_WIN1_HS_OFFSET_CBR(x) (((x)&0xff)<<8)
649 #define v_WIN1_VS_OFFSET_YRGB(x) (((x)&0xff)<<16)
650 #define v_WIN1_VS_OFFSET_CBR(x) (((x)&0xff)<<24)
652 #define m_WIN1_HS_OFFSET_YRGB (0xff<<0)
653 #define m_WIN1_HS_OFFSET_CBR (0xff<<8)
654 #define m_WIN1_VS_OFFSET_YRGB (0xff<<16)
655 #define m_WIN1_VS_OFFSET_CBR ((u32)0xff<<24)
657 #define WIN1_SRC_ALPHA_CTRL (0x00a0)
658 #define v_WIN1_SRC_ALPHA_EN(x) (((x)&1)<<0)
659 #define v_WIN1_SRC_COLOR_M0(x) (((x)&1)<<1)
660 #define v_WIN1_SRC_ALPHA_M0(x) (((x)&1)<<2)
661 #define v_WIN1_SRC_BLEND_M0(x) (((x)&3)<<3)
662 #define v_WIN1_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
663 #define v_WIN1_SRC_FACTOR_M0(x) (((x)&7)<<6)
664 #define v_WIN1_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
665 #define v_WIN1_FADING_VALUE(x) (((x)&0xff)<<24)
667 #define m_WIN1_SRC_ALPHA_EN (1<<0)
668 #define m_WIN1_SRC_COLOR_M0 (1<<1)
669 #define m_WIN1_SRC_ALPHA_M0 (1<<2)
670 #define m_WIN1_SRC_BLEND_M0 (3<<3)
671 #define m_WIN1_SRC_ALPHA_CAL_M0 (1<<5)
672 #define m_WIN1_SRC_FACTOR_M0 (7<<6)
673 #define m_WIN1_SRC_GLOBAL_ALPHA (0xff<<16)
674 #define m_WIN1_FADING_VALUE (0xff<<24)
676 #define WIN1_DST_ALPHA_CTRL (0x00a4)
677 #define v_WIN1_DST_FACTOR_M0(x) (((x)&7)<<6)
678 #define m_WIN1_DST_FACTOR_M0 (7<<6)
680 #define WIN1_FADING_CTRL (0x00a8)
681 #define v_WIN1_FADING_OFFSET_R(x) (((x)&0xff)<<0)
682 #define v_WIN1_FADING_OFFSET_G(x) (((x)&0xff)<<8)
683 #define v_WIN1_FADING_OFFSET_B(x) (((x)&0xff)<<16)
684 #define v_WIN1_FADING_EN(x) (((x)&1)<<24)
686 #define m_WIN1_FADING_OFFSET_R (0xff<<0)
687 #define m_WIN1_FADING_OFFSET_G (0xff<<8)
688 #define m_WIN1_FADING_OFFSET_B (0xff<<16)
689 #define m_WIN1_FADING_EN (1<<24)
691 #define WIN1_CTRL2 (0xac)
692 #define v_WIN_RID_WIN1_YRGB(x) (((x)&0xf)<<0)
693 #define v_WIN_RID_WIN1_CBR(x) (((x)&0xf)<<4)
694 #define m_WIN_RID_WIN1_YRGB ((0xf)<<0)
695 #define m_WIN_RID_WIN1_CBR ((0xf)<<4)
697 #define WIN2_CTRL0 (0x00b0)
698 #define v_WIN2_EN(x) (((x)&1)<<0)
699 #define v_WIN2_INTERLACE_READ(x) (((x)&1)<<1)
700 #define v_WIN2_CSC_MODE(x) (((x)&1)<<2)
701 #define v_WIN2_MST0_EN(x) (((x)&1)<<4)
702 #define v_WIN2_DATA_FMT0(x) (((x)&3)<<5)
703 #define v_WIN2_MST1_EN(x) (((x)&1)<<8)
704 #define v_WIN2_DATA_FMT1(x) (((x)&3)<<9)
705 #define v_WIN2_MST2_EN(x) (((x)&1)<<12)
706 #define v_WIN2_DATA_FMT2(x) (((x)&3)<<13)
707 #define v_WIN2_MST3_EN(x) (((x)&1)<<16)
708 #define v_WIN2_DATA_FMT3(x) (((x)&3)<<17)
709 #define v_WIN2_RB_SWAP0(x) (((x)&1)<<20)
710 #define v_WIN2_ALPHA_SWAP0(x) (((x)&1)<<21)
711 #define v_WIN2_ENDIAN_SWAP0(x) (((x)&1)<<22)
712 #define v_WIN2_RB_SWAP1(x) (((x)&1)<<23)
713 #define v_WIN2_ALPHA_SWAP1(x) (((x)&1)<<24)
714 #define v_WIN2_ENDIAN_SWAP1(x) (((x)&1)<<25)
715 #define v_WIN2_RB_SWAP2(x) (((x)&1)<<26)
716 #define v_WIN2_ALPHA_SWAP2(x) (((x)&1)<<27)
717 #define v_WIN2_ENDIAN_SWAP2(x) (((x)&1)<<28)
718 #define v_WIN2_RB_SWAP3(x) (((x)&1)<<29)
719 #define v_WIN2_ALPHA_SWAP3(x) (((x)&1)<<30)
720 #define v_WIN2_ENDIAN_SWAP3(x) (((x)&1)<<31)
722 #define m_WIN2_EN (1<<0)
723 #define m_WIN2_INTERLACE_READ (1<<1)
724 #define m_WIN2_CSC_MODE (1<<2)
725 #define m_WIN2_MST0_EN (1<<4)
726 #define m_WIN2_DATA_FMT0 (3<<5)
727 #define m_WIN2_MST1_EN (1<<8)
728 #define m_WIN2_DATA_FMT1 (3<<9)
729 #define m_WIN2_MST2_EN (1<<12)
730 #define m_WIN2_DATA_FMT2 (3<<13)
731 #define m_WIN2_MST3_EN (1<<16)
732 #define m_WIN2_DATA_FMT3 (3<<17)
733 #define m_WIN2_RB_SWAP0 (1<<20)
734 #define m_WIN2_ALPHA_SWAP0 (1<<21)
735 #define m_WIN2_ENDIAN_SWAP0 (1<<22)
736 #define m_WIN2_RB_SWAP1 (1<<23)
737 #define m_WIN2_ALPHA_SWAP1 (1<<24)
738 #define m_WIN2_ENDIAN_SWAP1 (1<<25)
739 #define m_WIN2_RB_SWAP2 (1<<26)
740 #define m_WIN2_ALPHA_SWAP2 (1<<27)
741 #define m_WIN2_ENDIAN_SWAP2 (1<<28)
742 #define m_WIN2_RB_SWAP3 (1<<29)
743 #define m_WIN2_ALPHA_SWAP3 (1<<30)
744 #define m_WIN2_ENDIAN_SWAP3 (1<<31)
746 #define WIN2_CTRL1 (0x00b4)
747 #define v_WIN2_AXI_GATHER_EN(x) (((x)&1)<<0)
748 #define v_WIN2_AXI_MAX_OUTSTANDING_EN(x) (((x)&1)<<1)
749 #define v_WIN2_DMA_BURST_LENGTH(x) (((x)&0x3)<<2)
750 #define v_WIN2_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
751 #define v_WIN2_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<8)
752 #define v_WIN2_RGB2YUV_EN(x) (((x)&1)<<13)
753 #define v_WIN2_NO_OUTSTANDING(x) (((x)&1)<<14)
754 #define v_WIN2_Y_MIR(x) (((x)&1)<<15)
755 #define v_WIN2_LUT_EN(x) (((x)&1)<<16)
756 #define v_WIN_RID_WIN2(x) (((x)&0xf)<<20)
758 #define m_WIN2_AXI_GATHER_EN (1<<0)
759 #define m_WIN2_AXI_MAX_OUTSTANDING_EN (1<<1)
760 #define m_WIN2_DMA_BURST_LENGTH (0x3<<2)
761 #define m_WIN2_AXI_GATHER_NUM (0xf<<4)
762 #define m_WIN2_AXI_OUTSTANDING_MAX_NUM (0x1f<<8)
763 #define m_WIN2_RGB2YUV_EN (1<<13)
764 #define m_WIN2_NO_OUTSTANDING (1<<14)
765 #define m_WIN2_Y_MIR (1<<15)
766 #define m_WIN2_LUT_EN (1<<16)
767 #define m_WIN_RID_WIN2 (0xf<<20)
769 #define WIN2_VIR0_1 (0x00b8)
770 #define v_WIN2_VIR_STRIDE0(x) (((x)&0xffff)<<0)
771 #define v_WIN2_VIR_STRIDE1(x) (((x)&0xffff)<<16)
772 #define m_WIN2_VIR_STRIDE0 (((u32)0xffff)<<0)
773 #define m_WIN2_VIR_STRIDE1 (((u32)0xffff)<<16)
775 #define WIN2_VIR2_3 (0x00bc)
776 #define v_WIN2_VIR_STRIDE2(x) (((x)&0xffff)<<0)
777 #define v_WIN2_VIR_STRIDE3(x) (((x)&0xffff)<<16)
778 #define m_WIN2_VIR_STRIDE2 (((u32)0xffff)<<0)
779 #define m_WIN2_VIR_STRIDE3 (((u32)0xffff)<<16)
781 #define WIN2_MST0 (0x00c0)
782 #define WIN2_DSP_INFO0 (0x00c4)
783 #define v_WIN2_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
784 #define v_WIN2_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
785 #define m_WIN2_DSP_WIDTH0 (0xfff<<0)
786 #define m_WIN2_DSP_HEIGHT0 (0xfff<<16)
788 #define WIN2_DSP_ST0 (0x00c8)
789 #define v_WIN2_DSP_XST0(x) (((x)&0x1fff)<<0)
790 #define v_WIN2_DSP_YST0(x) (((x)&0x1fff)<<16)
791 #define m_WIN2_DSP_XST0 (0x1fff<<0)
792 #define m_WIN2_DSP_YST0 (0x1fff<<16)
794 #define WIN2_COLOR_KEY (0x00cc)
795 #define v_WIN2_COLOR_KEY(x) (((x)&0xffffff)<<0)
796 #define v_WIN2_KEY_EN(x) (((x)&1)<<24)
797 #define m_WIN2_COLOR_KEY (0xffffff<<0)
798 #define m_WIN2_KEY_EN ((u32)1<<24)
801 #define WIN2_MST1 (0x00d0)
802 #define WIN2_DSP_INFO1 (0x00d4)
803 #define v_WIN2_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
804 #define v_WIN2_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
806 #define m_WIN2_DSP_WIDTH1 (0xfff<<0)
807 #define m_WIN2_DSP_HEIGHT1 (0xfff<<16)
809 #define WIN2_DSP_ST1 (0x00d8)
810 #define v_WIN2_DSP_XST1(x) (((x)&0x1fff)<<0)
811 #define v_WIN2_DSP_YST1(x) (((x)&0x1fff)<<16)
812 #define m_WIN2_DSP_XST1 (0x1fff<<0)
813 #define m_WIN2_DSP_YST1 (0x1fff<<16)
815 #define WIN2_SRC_ALPHA_CTRL (0x00dc)
816 #define v_WIN2_SRC_ALPHA_EN(x) (((x)&1)<<0)
817 #define v_WIN2_SRC_COLOR_M0(x) (((x)&1)<<1)
818 #define v_WIN2_SRC_ALPHA_M0(x) (((x)&1)<<2)
819 #define v_WIN2_SRC_BLEND_M0(x) (((x)&3)<<3)
820 #define v_WIN2_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
821 #define v_WIN2_SRC_FACTOR_M0(x) (((x)&7)<<6)
822 #define v_WIN2_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
823 #define v_WIN2_FADING_VALUE(x) (((x)&0xff)<<24)
824 #define m_WIN2_SRC_ALPHA_EN (1<<0)
825 #define m_WIN2_SRC_COLOR_M0 (1<<1)
826 #define m_WIN2_SRC_ALPHA_M0 (1<<2)
827 #define m_WIN2_SRC_BLEND_M0 (3<<3)
828 #define m_WIN2_SRC_ALPHA_CAL_M0 (1<<5)
829 #define m_WIN2_SRC_FACTOR_M0 (7<<6)
830 #define m_WIN2_SRC_GLOBAL_ALPHA (0xff<<16)
831 #define m_WIN2_FADING_VALUE (0xff<<24)
833 #define WIN2_MST2 (0x00e0)
834 #define WIN2_DSP_INFO2 (0x00e4)
835 #define v_WIN2_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
836 #define v_WIN2_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
837 #define m_WIN2_DSP_WIDTH2 (0xfff<<0)
838 #define m_WIN2_DSP_HEIGHT2 (0xfff<<16)
840 #define WIN2_DSP_ST2 (0x00e8)
841 #define v_WIN2_DSP_XST2(x) (((x)&0x1fff)<<0)
842 #define v_WIN2_DSP_YST2(x) (((x)&0x1fff)<<16)
843 #define m_WIN2_DSP_XST2 (0x1fff<<0)
844 #define m_WIN2_DSP_YST2 (0x1fff<<16)
846 #define WIN2_DST_ALPHA_CTRL (0x00ec)
847 #define v_WIN2_DST_FACTOR_M0(x) (((x)&7)<<6)
848 #define m_WIN2_DST_FACTOR_M0 (7<<6)
850 #define WIN2_MST3 (0x00f0)
851 #define WIN2_DSP_INFO3 (0x00f4)
852 #define v_WIN2_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
853 #define v_WIN2_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
854 #define m_WIN2_DSP_WIDTH3 (0xfff<<0)
855 #define m_WIN2_DSP_HEIGHT3 (0xfff<<16)
857 #define WIN2_DSP_ST3 (0x00f8)
858 #define v_WIN2_DSP_XST3(x) (((x)&0x1fff)<<0)
859 #define v_WIN2_DSP_YST3(x) (((x)&0x1fff)<<16)
860 #define m_WIN2_DSP_XST3 (0x1fff<<0)
861 #define m_WIN2_DSP_YST3 (0x1fff<<16)
863 #define WIN2_FADING_CTRL (0x00fc)
864 #define v_WIN2_FADING_OFFSET_R(x) (((x)&0xff)<<0)
865 #define v_WIN2_FADING_OFFSET_G(x) (((x)&0xff)<<8)
866 #define v_WIN2_FADING_OFFSET_B(x) (((x)&0xff)<<16)
867 #define v_WIN2_FADING_EN(x) (((x)&1)<<24)
869 #define m_WIN2_FADING_OFFSET_R (0xff<<0)
870 #define m_WIN2_FADING_OFFSET_G (0xff<<8)
871 #define m_WIN2_FADING_OFFSET_B (0xff<<16)
872 #define m_WIN2_FADING_EN (1<<24)
875 #define WIN3_CTRL0 (0x0100)
876 #define v_WIN3_EN(x) (((x)&1)<<0)
877 #define v_WIN3_INTERLACE_READ(x) (((x)&1)<<1)
878 #define v_WIN3_CSC_MODE(x) (((x)&1)<<2)
879 #define v_WIN3_MST0_EN(x) (((x)&1)<<4)
880 #define v_WIN3_DATA_FMT0(x) (((x)&3)<<5)
881 #define v_WIN3_MST1_EN(x) (((x)&1)<<8)
882 #define v_WIN3_DATA_FMT1(x) (((x)&3)<<9)
883 #define v_WIN3_MST2_EN(x) (((x)&1)<<12)
884 #define v_WIN3_DATA_FMT2(x) (((x)&3)<<13)
885 #define v_WIN3_MST3_EN(x) (((x)&1)<<16)
886 #define v_WIN3_DATA_FMT3(x) (((x)&3)<<17)
887 #define v_WIN3_RB_SWAP0(x) (((x)&1)<<20)
888 #define v_WIN3_ALPHA_SWAP0(x) (((x)&1)<<21)
889 #define v_WIN3_ENDIAN_SWAP0(x) (((x)&1)<<22)
890 #define v_WIN3_RB_SWAP1(x) (((x)&1)<<23)
891 #define v_WIN3_ALPHA_SWAP1(x) (((x)&1)<<24)
892 #define v_WIN3_ENDIAN_SWAP1(x) (((x)&1)<<25)
893 #define v_WIN3_RB_SWAP2(x) (((x)&1)<<26)
894 #define v_WIN3_ALPHA_SWAP2(x) (((x)&1)<<27)
895 #define v_WIN3_ENDIAN_SWAP2(x) (((x)&1)<<28)
896 #define v_WIN3_RB_SWAP3(x) (((x)&1)<<29)
897 #define v_WIN3_ALPHA_SWAP3(x) (((x)&1)<<30)
898 #define v_WIN3_ENDIAN_SWAP3(x) (((x)&1)<<31)
900 #define m_WIN3_EN (1<<0)
901 #define m_WIN3_INTERLACE_READ (1<<1)
902 #define m_WIN3_CSC_MODE (1<<2)
903 #define m_WIN3_MST0_EN (1<<4)
904 #define m_WIN3_DATA_FMT0 (3<<5)
905 #define m_WIN3_MST1_EN (1<<8)
906 #define m_WIN3_DATA_FMT1 (3<<9)
907 #define m_WIN3_MST2_EN (1<<12)
908 #define m_WIN3_DATA_FMT2 (3<<13)
909 #define m_WIN3_MST3_EN (1<<16)
910 #define m_WIN3_DATA_FMT3 (3<<17)
911 #define m_WIN3_RB_SWAP0 (1<<20)
912 #define m_WIN3_ALPHA_SWAP0 (1<<21)
913 #define m_WIN3_ENDIAN_SWAP0 (1<<22)
914 #define m_WIN3_RB_SWAP1 (1<<23)
915 #define m_WIN3_ALPHA_SWAP1 (1<<24)
916 #define m_WIN3_ENDIAN_SWAP1 (1<<25)
917 #define m_WIN3_RB_SWAP2 (1<<26)
918 #define m_WIN3_ALPHA_SWAP2 (1<<27)
919 #define m_WIN3_ENDIAN_SWAP2 (1<<28)
920 #define m_WIN3_RB_SWAP3 (1<<29)
921 #define m_WIN3_ALPHA_SWAP3 (1<<30)
922 #define m_WIN3_ENDIAN_SWAP3 (1<<31)
924 #define WIN3_CTRL1 (0x0104)
925 #define v_WIN3_AXI_GATHER_EN(x) (((x)&1)<<0)
926 #define v_WIN3_AXI_MAX_OUTSTANDING_EN(x) (((x)&1)<<1)
927 #define v_WIN3_DMA_BURST_LENGTH(x) (((x)&0x3)<<2)
928 #define v_WIN3_AXI_GATHER_NUM(x) (((x)&0xf)<<4)
929 #define v_WIN3_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<8)
930 #define v_WIN3_NO_OUTSTANDING(x) (((x)&1)<<14)
931 #define v_WIN3_Y_MIR(x) (((x)&1)<<15)
932 #define v_WIN3_LUT_EN(x) (((x)&1)<<16)
933 #define v_WIN_RID_WIN3(x) (((x)&0xf)<<20)
935 #define m_WIN3_AXI_GATHER_EN (1<<0)
936 #define m_WIN3_AXI_MAX_OUTSTANDING_EN (1<<1)
937 #define m_WIN3_DMA_BURST_LENGTH (0x3<<2)
938 #define m_WIN3_AXI_GATHER_NUM (0xf<<4)
939 #define m_WIN3_AXI_OUTSTANDING_MAX_NUM (0x1f<<8)
940 #define m_WIN3_NO_OUTSTANDING (1<<14)
941 #define m_WIN3_Y_MIR (1<<15)
942 #define m_WIN3_LUT_EN (1<<16)
943 #define m_WIN_RID_WIN3 (0xf<<20)
945 #define WIN3_VIR0_1 (0x0108)
946 #define v_WIN3_VIR_STRIDE0(x) (((x)&0xffff)<<0)
947 #define v_WIN3_VIR_STRIDE1(x) (((x)&0xffff)<<16)
948 #define m_WIN3_VIR_STRIDE0 (0xffff<<0)
949 #define m_WIN3_VIR_STRIDE1 (0xffff<<16)
951 #define WIN3_VIR2_3 (0x010c)
952 #define v_WIN3_VIR_STRIDE2(x) (((x)&0xffff)<<0)
953 #define v_WIN3_VIR_STRIDE3(x) (((x)&0xffff)<<16)
954 #define m_WIN3_VIR_STRIDE2 (0xffff<<0)
955 #define m_WIN3_VIR_STRIDE3 (0xffff<<16)
957 #define WIN3_MST0 (0x0110)
958 #define WIN3_DSP_INFO0 (0x0114)
959 #define v_WIN3_DSP_WIDTH0(x) (((x-1)&0xfff)<<0)
960 #define v_WIN3_DSP_HEIGHT0(x) (((x-1)&0xfff)<<16)
961 #define m_WIN3_DSP_WIDTH0 (0xfff<<0)
962 #define m_WIN3_DSP_HEIGHT0 (0xfff<<16)
964 #define WIN3_DSP_ST0 (0x0118)
965 #define v_WIN3_DSP_XST0(x) (((x)&0x1fff)<<0)
966 #define v_WIN3_DSP_YST0(x) (((x)&0x1fff)<<16)
967 #define m_WIN3_DSP_XST0 (0x1fff<<0)
968 #define m_WIN3_DSP_YST0 (0x1fff<<16)
970 #define WIN3_COLOR_KEY (0x011c)
971 #define v_WIN3_COLOR_KEY(x) (((x)&0xffffff)<<0)
972 #define v_WIN3_KEY_EN(x) (((x)&1)<<24)
973 #define m_WIN3_COLOR_KEY (0xffffff<<0)
974 #define m_WIN3_KEY_EN ((u32)1<<24)
976 #define WIN3_MST1 (0x0120)
977 #define WIN3_DSP_INFO1 (0x0124)
978 #define v_WIN3_DSP_WIDTH1(x) (((x-1)&0xfff)<<0)
979 #define v_WIN3_DSP_HEIGHT1(x) (((x-1)&0xfff)<<16)
980 #define m_WIN3_DSP_WIDTH1 (0xfff<<0)
981 #define m_WIN3_DSP_HEIGHT1 (0xfff<<16)
983 #define WIN3_DSP_ST1 (0x0128)
984 #define v_WIN3_DSP_XST1(x) (((x)&0x1fff)<<0)
985 #define v_WIN3_DSP_YST1(x) (((x)&0x1fff)<<16)
986 #define m_WIN3_DSP_XST1 (0x1fff<<0)
987 #define m_WIN3_DSP_YST1 (0x1fff<<16)
989 #define WIN3_SRC_ALPHA_CTRL (0x012c)
990 #define v_WIN3_SRC_ALPHA_EN(x) (((x)&1)<<0)
991 #define v_WIN3_SRC_COLOR_M0(x) (((x)&1)<<1)
992 #define v_WIN3_SRC_ALPHA_M0(x) (((x)&1)<<2)
993 #define v_WIN3_SRC_BLEND_M0(x) (((x)&3)<<3)
994 #define v_WIN3_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
995 #define v_WIN3_SRC_FACTOR_M0(x) (((x)&7)<<6)
996 #define v_WIN3_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
997 #define v_WIN3_FADING_VALUE(x) (((x)&0xff)<<24)
999 #define m_WIN3_SRC_ALPHA_EN (1<<0)
1000 #define m_WIN3_SRC_COLOR_M0 (1<<1)
1001 #define m_WIN3_SRC_ALPHA_M0 (1<<2)
1002 #define m_WIN3_SRC_BLEND_M0 (3<<3)
1003 #define m_WIN3_SRC_ALPHA_CAL_M0 (1<<5)
1004 #define m_WIN3_SRC_FACTOR_M0 (7<<6)
1005 #define m_WIN3_SRC_GLOBAL_ALPHA (0xff<<16)
1006 #define m_WIN3_FADING_VALUE (0xff<<24)
1008 #define WIN3_MST2 (0x0130)
1009 #define WIN3_DSP_INFO2 (0x0134)
1010 #define v_WIN3_DSP_WIDTH2(x) (((x-1)&0xfff)<<0)
1011 #define v_WIN3_DSP_HEIGHT2(x) (((x-1)&0xfff)<<16)
1012 #define m_WIN3_DSP_WIDTH2 (0xfff<<0)
1013 #define m_WIN3_DSP_HEIGHT2 (0xfff<<16)
1015 #define WIN3_DSP_ST2 (0x0138)
1016 #define v_WIN3_DSP_XST2(x) (((x)&0x1fff)<<0)
1017 #define v_WIN3_DSP_YST2(x) (((x)&0x1fff)<<16)
1018 #define m_WIN3_DSP_XST2 (0x1fff<<0)
1019 #define m_WIN3_DSP_YST2 (0x1fff<<16)
1021 #define WIN3_DST_ALPHA_CTRL (0x013c)
1022 #define v_WIN3_DST_FACTOR_M0(x) (((x)&7)<<6)
1023 #define m_WIN3_DST_FACTOR_M0 (7<<6)
1026 #define WIN3_MST3 (0x0140)
1027 #define WIN3_DSP_INFO3 (0x0144)
1028 #define v_WIN3_DSP_WIDTH3(x) (((x-1)&0xfff)<<0)
1029 #define v_WIN3_DSP_HEIGHT3(x) (((x-1)&0xfff)<<16)
1030 #define m_WIN3_DSP_WIDTH3 (0xfff<<0)
1031 #define m_WIN3_DSP_HEIGHT3 (0xfff<<16)
1033 #define WIN3_DSP_ST3 (0x0148)
1034 #define v_WIN3_DSP_XST3(x) (((x)&0x1fff)<<0)
1035 #define v_WIN3_DSP_YST3(x) (((x)&0x1fff)<<16)
1036 #define m_WIN3_DSP_XST3 (0x1fff<<0)
1037 #define m_WIN3_DSP_YST3 (0x1fff<<16)
1039 #define WIN3_FADING_CTRL (0x014c)
1040 #define v_WIN3_FADING_OFFSET_R(x) (((x)&0xff)<<0)
1041 #define v_WIN3_FADING_OFFSET_G(x) (((x)&0xff)<<8)
1042 #define v_WIN3_FADING_OFFSET_B(x) (((x)&0xff)<<16)
1043 #define v_WIN3_FADING_EN(x) (((x)&1)<<24)
1045 #define m_WIN3_FADING_OFFSET_R (0xff<<0)
1046 #define m_WIN3_FADING_OFFSET_G (0xff<<8)
1047 #define m_WIN3_FADING_OFFSET_B (0xff<<16)
1048 #define m_WIN3_FADING_EN (1<<24)
1052 #define HWC_CTRL0 (0x0150)
1053 #define v_HWC_EN(x) (((x)&1)<<0)
1054 #define v_HWC_DATA_FMT(x) (((x)&7)<<1)
1055 #define v_HWC_MODE(x) (((x)&1)<<4)
1056 #define v_HWC_SIZE(x) (((x)&3)<<5)
1057 #define v_HWC_INTERLACE_READ(x) (((x)&1)<<8)
1058 #define v_HWC_CSC_MODE(x) (((x)&1)<<10)
1059 #define v_HWC_RB_SWAP(x) (((x)&1)<<12)
1060 #define v_HWC_ALPHA_SWAP(x) (((x)&1)<<13)
1061 #define v_HWC_ENDIAN_SWAP(x) (((x)&1)<<14)
1063 #define m_HWC_EN (1<<0)
1064 #define m_HWC_DATA_FMT (7<<1)
1065 #define m_HWC_MODE (1<<4)
1066 #define m_HWC_SIZE (3<<5)
1067 #define m_HWC_INTERLACE_READ (1<<8)
1068 #define m_HWC_CSC_MODE (1<<10)
1069 #define m_HWC_RB_SWAP (1<<12)
1070 #define m_HWC_ALPHA_SWAP (1<<13)
1071 #define m_HWC_ENDIAN_SWAP (1<<14)
1074 #define HWC_CTRL1 (0x0154)
1075 #define v_HWC_AXI_GATHER_EN(x) (((x)&1)<<0)
1076 #define v_HWC_AXI_MAX_OUTSTANDING_EN(x) (((x)&1)<<1)
1077 #define v_HWC_DMA_BURST_LENGTH(x) (((x)&0x3)<<2)
1078 #define v_HWC_AXI_GATHER_NUM(x) (((x)&0x7)<<4)
1079 #define v_HWC_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<8)
1080 #define v_HWC_RGB2YUV_EN(x) (((x)&1)<<13)
1081 #define v_HWC_NO_OUTSTANDING(x) (((x)&1)<<14)
1082 #define v_HWC_Y_MIR(x) (((x)&1)<<15)
1083 #define v_HWC_LUT_EN(x) (((x)&1)<<16)
1084 #define v_WIN_RID_HWC(x) (((x)&0xf)<<20)
1086 #define m_HWC_AXI_GATHER_EN (1<<0)
1087 #define m_HWC_AXI_MAX_OUTSTANDING_EN (1<<1)
1088 #define m_HWC_DMA_BURST_LENGTH (0x3<<2)
1089 #define m_HWC_AXI_GATHER_NUM (0x7<<4)
1090 #define m_HWC_AXI_OUTSTANDING_MAX_NUM (0x1f<<8)
1091 #define m_HWC_RGB2YUV_EN (1<<13)
1092 #define m_HWC_NO_OUTSTANDING (1<<14)
1093 #define m_HWC_Y_MIR (1<<15)
1094 #define m_HWC_LUT_EN (1<<16)
1095 #define m_WIN_RID_HWC (0xf<<20)
1097 #define HWC_MST (0x0158)
1098 #define HWC_DSP_ST (0x015c)
1099 #define v_HWC_DSP_XST(x) (((x)&0x1fff)<<0)
1100 #define v_HWC_DSP_YST(x) (((x)&0x1fff)<<16)
1101 #define m_HWC_DSP_XST (0x1fff<<0)
1102 #define m_HWC_DSP_YST (0x1fff<<16)
1104 #define HWC_SRC_ALPHA_CTRL (0x0160)
1105 #define v_HWC_SRC_ALPHA_EN(x) (((x)&1)<<0)
1106 #define v_HWC_SRC_COLOR_M0(x) (((x)&1)<<1)
1107 #define v_HWC_SRC_ALPHA_M0(x) (((x)&1)<<2)
1108 #define v_HWC_SRC_BLEND_M0(x) (((x)&3)<<3)
1109 #define v_HWC_SRC_ALPHA_CAL_M0(x) (((x)&1)<<5)
1110 #define v_HWC_SRC_FACTOR_M0(x) (((x)&7)<<6)
1111 #define v_HWC_SRC_GLOBAL_ALPHA(x) (((x)&0xff)<<16)
1112 #define v_HWC_FADING_VALUE(x) (((x)&0xff)<<24)
1114 #define m_HWC_SRC_ALPHA_EN (1<<0)
1115 #define m_HWC_SRC_COLOR_M0 (1<<1)
1116 #define m_HWC_SRC_ALPHA_M0 (1<<2)
1117 #define m_HWC_SRC_BLEND_M0 (3<<3)
1118 #define m_HWC_SRC_ALPHA_CAL_M0 (1<<5)
1119 #define m_HWC_SRC_FACTOR_M0 (7<<6)
1120 #define m_HWC_SRC_GLOBAL_ALPHA (0xff<<16)
1121 #define m_HWC_FADING_VALUE (0xff<<24)
1123 #define HWC_DST_ALPHA_CTRL (0x0164)
1124 #define v_HWC_DST_FACTOR_M0(x) (((x)&7)<<6)
1125 #define m_HWC_DST_FACTOR_M0 (7<<6)
1128 #define HWC_FADING_CTRL (0x0168)
1129 #define v_HWC_FADING_OFFSET_R(x) (((x)&0xff)<<0)
1130 #define v_HWC_FADING_OFFSET_G(x) (((x)&0xff)<<8)
1131 #define v_HWC_FADING_OFFSET_B(x) (((x)&0xff)<<16)
1132 #define v_HWC_FADING_EN(x) (((x)&1)<<24)
1134 #define m_HWC_FADING_OFFSET_R (0xff<<0)
1135 #define m_HWC_FADING_OFFSET_G (0xff<<8)
1136 #define m_HWC_FADING_OFFSET_B (0xff<<16)
1137 #define m_HWC_FADING_EN (1<<24)
1139 /*post process register*/
1140 #define POST_DSP_HACT_INFO (0x0170)
1141 #define v_DSP_HACT_END_POST(x) (((x)&0x1fff)<<0)
1142 #define v_DSP_HACT_ST_POST(x) (((x)&0x1fff)<<16)
1143 #define m_DSP_HACT_END_POST (0x1fff<<0)
1144 #define m_DSP_HACT_ST_POST (0x1fff<<16)
1146 #define POST_DSP_VACT_INFO (0x0174)
1147 #define v_DSP_VACT_END_POST(x) (((x)&0x1fff)<<0)
1148 #define v_DSP_VACT_ST_POST(x) (((x)&0x1fff)<<16)
1149 #define m_DSP_VACT_END_POST (0x1fff<<0)
1150 #define m_DSP_VACT_ST_POST (0x1fff<<16)
1152 #define POST_SCL_FACTOR_YRGB (0x0178)
1153 #define v_POST_HS_FACTOR_YRGB(x) (((x)&0xffff)<<0)
1154 #define v_POST_VS_FACTOR_YRGB(x) (((x)&0xffff)<<16)
1155 #define m_POST_HS_FACTOR_YRGB (0xffff<<0)
1156 #define m_POST_VS_FACTOR_YRGB (0xffff<<16)
1158 #define POST_SCL_CTRL (0x0180)
1159 #define v_POST_HOR_SD_EN(x) (((x)&1)<<0)
1160 #define v_POST_VER_SD_EN(x) (((x)&1)<<1)
1162 #define m_POST_HOR_SD_EN (0x1<<0)
1163 #define m_POST_VER_SD_EN (0x1<<1)
1165 #define POST_DSP_VACT_INFO_F1 (0x0184)
1166 #define v_DSP_VACT_END_POST_F1(x) (((x)&0x1fff)<<0)
1167 #define v_DSP_VACT_ST_POST_F1(x) (((x)&0x1fff)<<16)
1169 #define m_DSP_VACT_END_POST_F1 (0x1fff<<0)
1170 #define m_DSP_VACT_ST_POST_F1 (0x1fff<<16)
1172 #define DSP_HTOTAL_HS_END (0x0188)
1173 #define v_DSP_HS_PW(x) (((x)&0x1fff)<<0)
1174 #define v_DSP_HTOTAL(x) (((x)&0x1fff)<<16)
1175 #define m_DSP_HS_PW (0x1fff<<0)
1176 #define m_DSP_HTOTAL (0x1fff<<16)
1178 #define DSP_HACT_ST_END (0x018c)
1179 #define v_DSP_HACT_END(x) (((x)&0x1fff)<<0)
1180 #define v_DSP_HACT_ST(x) (((x)&0x1fff)<<16)
1181 #define m_DSP_HACT_END (0x1fff<<0)
1182 #define m_DSP_HACT_ST (0x1fff<<16)
1184 #define DSP_VTOTAL_VS_END (0x0190)
1185 #define v_DSP_VS_PW(x) (((x)&0x1fff)<<0)
1186 #define v_DSP_VTOTAL(x) (((x)&0x1fff)<<16)
1187 #define m_DSP_VS_PW (0x1fff<<0)
1188 #define m_DSP_VTOTAL (0x1fff<<16)
1190 #define DSP_VACT_ST_END (0x0194)
1191 #define v_DSP_VACT_END(x) (((x)&0x1fff)<<0)
1192 #define v_DSP_VACT_ST(x) (((x)&0x1fff)<<16)
1193 #define m_DSP_VACT_END (0x1fff<<0)
1194 #define m_DSP_VACT_ST (0x1fff<<16)
1196 #define DSP_VS_ST_END_F1 (0x0198)
1197 #define v_DSP_VS_END_F1(x) (((x)&0x1fff)<<0)
1198 #define v_DSP_VS_ST_F1(x) (((x)&0x1fff)<<16)
1199 #define m_DSP_VS_END_F1 (0x1fff<<0)
1200 #define m_DSP_VS_ST_F1 (0x1fff<<16)
1202 #define DSP_VACT_ST_END_F1 (0x019c)
1203 #define v_DSP_VACT_END_F1(x) (((x)&0x1fff)<<0)
1204 #define v_DSP_VAC_ST_F1(x) (((x)&0x1fff)<<16)
1205 #define m_DSP_VACT_END_F1 (0x1fff<<0)
1206 #define m_DSP_VAC_ST_F1 (0x1fff<<16)
1210 #define PWM_CTRL (0x01a0)
1211 #define v_PWM_EN(x) (((x)&1)<<0)
1212 #define v_PWM_MODE(x) (((x)&3)<<1)
1214 #define v_DUTY_POL(x) (((x)&1)<<3)
1215 #define v_INACTIVE_POL(x) (((x)&1)<<4)
1216 #define v_OUTPUT_MODE(x) (((x)&1)<<5)
1217 #define v_BL_EN(x) (((x)&1)<<8)
1218 #define v_CLK_SEL(x) (((x)&1)<<9)
1219 #define v_PRESCALE(x) (((x)&7)<<12)
1220 #define v_CABC_PWM_OUT_POL(x) (((x)&1)<<15)
1221 #define v_SCALE(x) (((x)&0xff)<<16)
1222 #define v_RPT(x) (((x)&0xff)<<24)
1224 #define m_PWM_EN (1<<0)
1225 #define m_PWM_MODE (3<<1)
1227 #define m_DUTY_POL (1<<3)
1228 #define m_INACTIVE_POL (1<<4)
1229 #define m_OUTPUT_MODE (1<<5)
1230 #define m_BL_EN (1<<8)
1231 #define m_CLK_SEL (1<<9)
1232 #define m_CABC_PWM_OUT_POL (1<<15)
1234 #define m_PRESCALE (7<<12)
1235 #define m_SCALE (0xff<<16)
1236 #define m_RPT ((u32)0xff<<24)
1238 #define PWM_PERIOD_HPR (0x01a4)
1239 #define PWM_DUTY_LPR (0x01a8)
1240 #define PWM_CNT (0x01ac)
1243 #define BCSH_COLOR_BAR (0x01b0)
1244 #define v_BCSH_EN(x) (((x)&1)<<0)
1245 #define v_BCSH_COLOR_BAR_Y(x) (((x)&0xff)<<8)
1246 #define v_BCSH_COLOR_BAR_U(x) (((x)&0xff)<<16)
1247 #define v_BCSH_COLOR_BAR_V(x) (((x)&0xff)<<24)
1248 #define m_BCSH_EN (1<<0)
1249 #define m_BCSH_COLOR_BAR_Y (0xff<<8)
1250 #define m_BCSH_COLOR_BAR_U (0xff<<16)
1251 #define m_BCSH_COLOR_BAR_V (0xff<<24)
1253 #define BCSH_BCS (0x01b4)
1254 #define v_BCSH_BRIGHTNESS(x) (((x)&0xff)<<0)
1255 #define v_BCSH_CONTRAST(x) (((x)&0x1ff)<<8)
1256 #define v_BCSH_SAT_CON(x) (((x)&0x3ff)<<20)
1257 #define v_BCSH_OUT_MODE(x) (((x)&0x3)<<30)
1258 #define m_BCSH_BRIGHTNESS (0xff<<0)
1259 #define m_BCSH_CONTRAST (0x1ff<<8)
1260 #define m_BCSH_SAT_CON (0x3ff<<20)
1261 #define m_BCSH_OUT_MODE ((u32)0x3<<30)
1263 #define BCSH_H (0x01b8)
1264 #define v_BCSH_SIN_HUE(x) (((x)&0x1ff)<<0)
1265 #define v_BCSH_COS_HUE(x) (((x)&0x1ff)<<16)
1267 #define m_BCSH_SIN_HUE (0x1ff<<0)
1268 #define m_BCSH_COS_HUE (0x1ff<<16)
1270 #define BCSH_CTRL (0x01bc)
1271 #define m_BCSH_Y2R_EN (0x1<<0)
1272 #define m_BCSH_Y2R_CSC_MODE (0x3<<2)
1273 #define m_BCSH_R2Y_EN (0x1<<4)
1274 #define m_BCSH_R2Y_CSC_MODE (0x1<<6)
1275 #define v_BCSH_Y2R_EN(x) (((x)&0x1)<<0)
1276 #define v_BCSH_Y2R_CSC_MODE(x) (((x)&0x3)<<2)
1277 #define v_BCSH_R2Y_EN(x) (((x)&0x1)<<4)
1278 #define v_BCSH_R2Y_CSC_MODE(x) (((x)&0x1)<<6)
1280 #define CABC_CTRL0 (0x01c0)
1281 #define v_CABC_EN(x) (((x)&1)<<0)
1282 #define v_CABC_CALC_PIXEL_NUM(x) (((x)&0xffffff)<<1)
1283 #define m_CABC_EN (1<<0)
1284 #define m_CABC_CALC_PIXEL_NUM (0xffffff<<1)
1287 #define CABC_CTRL1 (0x01c4)
1288 #define v_CABC_LUT_EN(x) (((x)&1)<<0)
1289 #define v_CABC_TOTAL_PIXEL_NUM(x) (((x)&0xffffff)<<1)
1290 #define m_CABC_LUT_EN (1<<0)
1291 #define m_CABC_TOTAL_PIXEL_NUM (0xffffff<<1)
1293 #define CABC_CTRL2 (0x01c8)
1294 #define v_CABC_STAGE_UP_REC(x) (((x)&0xff)<<0)
1295 #define m_CABC_STAGE_UP_REC (0xff<<0)
1296 #define v_CABC_STAGE_UP(x) (((x)&0x1ff)<<8)
1297 #define m_CABC_STAGE_UP (0x1ff<<8)
1298 #define v_CABC_GLOBAL_SU_LIMIT_EN(x) (((x)&0x1)<<23)
1299 #define m_CABC_GLOBAL_SU_LIMIT_EN (0x1<<23)
1300 #define v_CABC_GLOBAL_SU_REC(x) (((x)&0xff)<<24)
1301 #define m_CABC_GLOBAL_SU_REC (0xff<<24)
1303 #define CABC_CTRL3 (0x01cc)
1304 #define v_CABC_STAGE_DOWN(x) (((x)&0xff)<<0)
1305 #define m_CABC_STAGE_DOWN (0xff<<0)
1306 #define v_CABC_STAGE_DOWN_REC(x) (((x)&0x1ff)<<8)
1307 #define m_CABC_STAGE_DOWN_REC (0x1ff<<8)
1308 #define v_CABC_GLOBAL_SU(x) (((x)&0x1ff)<<23)
1309 #define m_CABC_GLOBAL_SU (0x1ff<<23)
1310 #define CABC_GAUSS_LINE0_0 (0x01d0)
1311 #define v_CABC_T_LINE0_0(x) (((x)&0xff)<<0)
1312 #define v_CABC_T_LINE0_1(x) (((x)&0xff)<<8)
1313 #define v_CABC_T_LINE0_2(x) (((x)&0xff)<<16)
1314 #define v_CABC_T_LINE0_3(x) (((x)&0xff)<<24)
1315 #define m_CABC_T_LINE0_0 (0xff<<0)
1316 #define m_CABC_T_LINE0_1 (0xff<<8)
1317 #define m_CABC_T_LINE0_2 (0xff<<16)
1318 #define m_CABC_T_LINE0_3 ((u32)0xff<<24)
1320 #define CABC_GAUSS_LINE0_1 (0x01d4)
1321 #define v_CABC_T_LINE0_4(x) (((x)&0xff)<<0)
1322 #define v_CABC_T_LINE0_5(x) (((x)&0xff)<<8)
1323 #define v_CABC_T_LINE0_6(x) (((x)&0xff)<<16)
1324 #define m_CABC_T_LINE0_4 (0xff<<0)
1325 #define m_CABC_T_LINE0_5 (0xff<<8)
1326 #define m_CABC_T_LINE0_6 (0xff<<16)
1329 #define CABC_GAUSS_LINE1_0 (0x01d8)
1330 #define v_CABC_T_LINE1_0(x) (((x)&0xff)<<0)
1331 #define v_CABC_T_LINE1_1(x) (((x)&0xff)<<8)
1332 #define v_CABC_T_LINE1_2(x) (((x)&0xff)<<16)
1333 #define v_CABC_T_LINE1_3(x) (((x)&0xff)<<24)
1334 #define m_CABC_T_LINE1_0 (0xff<<0)
1335 #define m_CABC_T_LINE1_1 (0xff<<8)
1336 #define m_CABC_T_LINE1_2 (0xff<<16)
1337 #define m_CABC_T_LINE1_3 ((u32)0xff<<24)
1340 #define CABC_GAUSS_LINE1_1 (0x01dc)
1341 #define v_CABC_T_LINE1_4(x) (((x)&0xff)<<0)
1342 #define v_CABC_T_LINE1_5(x) (((x)&0xff)<<8)
1343 #define v_CABC_T_LINE1_6(x) (((x)&0xff)<<16)
1344 #define m_CABC_T_LINE1_4 (0xff<<0)
1345 #define m_CABC_T_LINE1_5 (0xff<<8)
1346 #define m_CABC_T_LINE1_6 (0xff<<16)
1349 #define CABC_GAUSS_LINE2_0 (0x01e0)
1350 #define v_CABC_T_LINE2_0(x) (((x)&0xff)<<0)
1351 #define v_CABC_T_LINE2_1(x) (((x)&0xff)<<8)
1352 #define v_CABC_T_LINE2_2(x) (((x)&0xff)<<16)
1353 #define v_CABC_T_LINE2_3(x) (((x)&0xff)<<24)
1354 #define m_CABC_T_LINE2_0 (0xff<<0)
1355 #define m_CABC_T_LINE2_1 (0xff<<8)
1356 #define m_CABC_T_LINE2_2 (0xff<<16)
1357 #define m_CABC_T_LINE2_3 ((u32)0xff<<24)
1360 #define CABC_GAUSS_LINE2_1 (0x01e4)
1361 #define v_CABC_T_LINE2_4(x) (((x)&0xff)<<0)
1362 #define v_CABC_T_LINE2_5(x) (((x)&0xff)<<8)
1363 #define v_CABC_T_LINE2_6(x) (((x)&0xff)<<16)
1364 #define m_CABC_T_LINE2_4 (0xff<<0)
1365 #define m_CABC_T_LINE2_5 (0xff<<8)
1366 #define m_CABC_T_LINE2_6 (0xff<<16)
1369 #define FRC_LOWER01_0 (0x01e8)
1370 #define v_FRC_LOWER01_FRM0(x) (((x)&0xffff)<<0)
1371 #define v_FRC_LOWER01_FRM1(x) (((x)&0xffff)<<16)
1372 #define m_FRC_LOWER01_FRM0 (0xffff<<0)
1373 #define m_FRC_LOWER01_FRM1 ((u32)0xffff<<16)
1375 #define FRC_LOWER01_1 (0x01ec)
1376 #define v_FRC_LOWER01_FRM2(x) (((x)&0xffff)<<0)
1377 #define v_FRC_LOWER01_FRM3(x) (((x)&0xffff)<<16)
1378 #define m_FRC_LOWER01_FRM2 (0xffff<<0)
1379 #define m_FRC_LOWER01_FRM3 ((u32)0xffff<<16)
1382 #define FRC_LOWER10_0 (0x01f0)
1383 #define v_FRC_LOWER10_FRM0(x) (((x)&0xffff)<<0)
1384 #define v_FRC_LOWER10_FRM1(x) (((x)&0xffff)<<16)
1385 #define m_FRC_LOWER10_FRM0 (0xffff<<0)
1386 #define m_FRC_LOWER10_FRM1 ((u32)0xffff<<16)
1389 #define FRC_LOWER10_1 (0x01f4)
1390 #define v_FRC_LOWER10_FRM2(x) (((x)&0xffff)<<0)
1391 #define v_FRC_LOWER10_FRM3(x) (((x)&0xffff)<<16)
1392 #define m_FRC_LOWER10_FRM2 (0xffff<<0)
1393 #define m_FRC_LOWER10_FRM3 ((u32)0xffff<<16)
1396 #define FRC_LOWER11_0 (0x01f8)
1397 #define v_FRC_LOWER11_FRM0(x) (((x)&0xffff)<<0)
1398 #define v_FRC_LOWER11_FRM1(x) (((x)&0xffff)<<16)
1399 #define m_FRC_LOWER11_FRM0 (0xffff<<0)
1400 #define m_FRC_LOWER11_FRM1 ((u32)0xffff<<16)
1403 #define FRC_LOWER11_1 (0x01fc)
1404 #define v_FRC_LOWER11_FRM2(x) (((x)&0xffff)<<0)
1405 #define v_FRC_LOWER11_FRM3(x) (((x)&0xffff)<<16)
1406 #define m_FRC_LOWER11_FRM2 (0xffff<<0)
1407 #define m_FRC_LOWER11_FRM3 ((u32)0xffff<<16)
1409 #define IFBDC_CTRL (0x0200)
1410 #define v_IFBDC_CTRL_FBDC_EN(x) (((x)&0x1)<<0)
1411 #define v_IFBDC_CTRL_FBDC_COR_EN(x) (((x)&0x1)<<1)
1412 #define v_IFBDC_CTRL_FBDC_WIN_SEL(x) (((x)&0x3)<<2)
1413 #define v_IFBDC_CTRL_FBDC_ROTATION_MODE(x) (((x)&0x7)<<4)
1414 #define v_IFBDC_CTRL_FBDC_FMT(x) (((x)&0x7f)<<7)
1415 #define v_IFBDC_AXI_MAX_OUTSTANDING_EN(x) (((x)&0x1)<<14)
1416 #define v_IFBDC_AXI_OUTSTANDING_MAX_NUM(x) (((x)&0x1f)<<15)
1417 #define v_IFBDC_CTRL_WIDTH_RATIO(x) (((x)&0x1)<<20)
1418 #define v_IFBDC_FRAME_RST_EN(x) (((x)&0x1)<<21)
1419 #define v_IFBDC_ICTRL_NOTIFY(x) (((x)&0x1)<<22)
1420 #define v_IFBDC_INVALIDATE_PENDING_O(x) (((x)&0x1)<<23)
1421 #define v_IFBDC_RID(x) (((x)&0xf)<<24)
1422 #define v_IFBDC_RSTN(x) (((x)&0x1)<<28)
1424 #define m_IFBDC_CTRL_FBDC_EN (0x1<<0)
1425 #define m_IFBDC_CTRL_FBDC_COR_EN (0x1<<1)
1426 #define m_IFBDC_CTRL_FBDC_WIN_SEL (0x3<<2)
1427 #define m_IFBDC_CTRL_FBDC_ROTATION_MODE (0x7<<4)
1428 #define m_IFBDC_CTRL_FBDC_FMT (0x7f<<7)
1429 #define m_IFBDC_AXI_MAX_OUTSTANDING_EN (0x1<<14)
1430 #define m_IFBDC_AXI_OUTSTANDING_MAX_NUM (0x1f<<15)
1431 #define m_IFBDC_CTRL_WIDTH_RATIO (0x1<<20)
1432 #define m_IFBDC_FRAME_RST_EN (0x1<<21)
1433 #define m_IFBDC_ICTRL_NOTIFY (0x1<<22)
1434 #define m_IFBDC_INVALIDATE_PENDING_O (0x1<<23)
1435 #define m_IFBDC_RID (0xf<<24)
1436 #define m_IFBDC_RSTN (0x1<<28)
1438 #define IFBDC_TILES_NUM (0x0204)
1439 #define v_IFBDC_TILES_NUM(x) (((x-1)&0x7fffff)<<0)
1440 #define m_IFBDC_TILES_NUM (0x7fffff<<0)
1442 #define IFBDC_FRAME_RST_CYCLE (0x0208)
1443 #define v_IFBDC_FRAME_RST_CYCLE(x) (((x)&0x3ff)<<0)
1444 #define v_DMA_IFBDC_FRAME_RST_CYCLE(x) (((x)&0x3ff)<<16)
1445 #define m_IFBDC_FRAME_RST_CYCLE ((0x3ff)<<0)
1446 #define m_DMA_IFBDC_FRAME_RST_CYCLE ((0x3ff)<<16)
1450 #define IFBDC_BASE_ADDR (0x20c)
1451 #define v_IFBDC_BASE_ADDR(x) (((x)&0xffffffff)<<0)
1452 #define m_IFBDC_BASE_ADDR ((0xffffffff)<<0)
1454 #define IFBDC_MB_SIZE (0x210)
1455 #define v_IFBDC_MB_SIZE_WIDTH(x) (((x-1)&0x7f)<<0)
1456 #define v_IFBDC_MB_SIZE_HEIGHT(x) (((x-1)&0x1ff)<<16)
1457 #define m_IFBDC_MB_SIZE_WIDTH ((0x7f)<<0)
1458 #define m_IFBDC_MB_SIZE_HEIGHT ((0x1ff)<<16)
1461 #define IFBDC_CMP_INDEX_INIT (0x0214)
1462 #define v_IFBDC_CMP_INDEX_INIT(x) (((x)&0x7fffff) << 0)
1463 #define m_IFBDC_CMP_INDEX_INIT (0x7fffff<<0)
1465 #define IFBDC_MB_VIR_WIDTH (0x220)
1466 #define v_IFBDC_MB_VIR_WIDTH(x) (((x)&0xff)<<0)
1467 #define m_IFBDC_MB_VIR_WIDTH ((0xff)<<0)
1469 #define IFBDC_DEBUG0 (0x230)
1470 #define v_DBG_IFBDC_MB_Y_WCNT(x) (((x)&0x1ff)<<0)
1471 #define v_DBG_IFBDC_IDLE(x) (((x)&0x1)<<12)
1472 #define v_DBG_IFBDC_LB_RCNT(x) (((x)&0x7FF)<<16)
1473 #define v_DBG_IFBDC_INVALIDATE_PENDING_I(x) (((x)&0x1)<<28)
1475 #define m_DBG_IFBDC_MB_Y_WCNT (0x1ff<<0)
1476 #define m_DBG_IFBDC_IDLE (0x1<<12)
1477 #define m_DBG_IFBDC_LB_RCNT (0x7FF<<16)
1478 #define m_DBG_IFBDC_INVALIDATE_PENDING_I (0x1<<28)
1480 #define IFBDC_DEBUG1 (0x234)
1481 #define V_DBG_FBDC_CMP_TILE_INDEX(x) (((x)&0x7fffff)<<0)
1482 #define m_DBG_FBDC_CMP_TILE_INDEX (0x7fffff<<0)
1484 #define LATENCY_CTRL0 (0x250)
1485 #define v_RD_LATENCY_EN(x) (((x)&0x1)<<0)
1486 #define v_HAND_LATENCY_CLR(x) (((x)&0x1)<<1)
1487 #define v_RD_LATENCY_MODE(x) (((x)&0x1)<<2)
1488 #define v_RD_LATENCY_ID0(x) (((x)&0xf)<<4)
1489 #define v_RD_LATENCY_THR(x) (((x)&0xfff)<<8)
1490 #define v_RD_LATENCY_ST_NUM(x) (((x)&0x1f)<<20)
1491 #define m_RD_LATENCY_EN (0x1<<0)
1492 #define m_HAND_LATENCY_CLR (0x1<<1)
1493 #define m_RD_LATENCY_MODE (0x1<<2)
1494 #define m_RD_LATENCY_ID0 (0xf<<4)
1495 #define m_RD_LATENCY_THR (0xfff<<8)
1496 #define m_RD_LATENCY_ST_NUM (0x1f<<20)
1498 #define RD_MAX_LATENCY_NUM0 (0x254)
1499 #define v_RD_MAX_LATENCY_NUM_CH0(x) (((x)&0xFFF)<<0)
1500 #define v_RD_LATENCY_OVERFLOW_CH0(x) (((x)&0x1)<<16)
1501 #define m_RD_MAX_LATENCY_NUM_CH0 (0xFFF<<0)
1502 #define m_RD_LATENCY_OVERFLOW_CH0 (0x1<<16)
1504 #define RD_LATENCY_THR_NUM0 (0x258)
1505 #define v_RD_LATENCY_THR_NUM_CH0(x) (((x)&0xFFFFFF)<<0)
1506 #define m_RD_LATENCY_THR_NUM_CH0 (0xFFFFFF<<0)
1508 #define RD_LATENCY_SWAP_NUM0 (0x25c)
1509 #define v_RD_LATENCY_SAMP_NUM_CH0(x) (((x)&0xFFFFFF)<<0)
1510 #define m_RD_LATENCY_SAMP_NUM_CH0 (0xFFFFFF<<0)
1512 #define WIN0_DSP_BG (0x260)
1513 #define v_WIN0_DSP_BG_BLUE(x) (((x)&0xff)<<0)
1514 #define v_WIN0_DSP_BG_GREEN(x) (((x)&0xff)<<8)
1515 #define v_WIN0_DSP_BG_RED(x) (((x)&0xff)<<16)
1516 #define v_WIN0_DSP_BG_EN(x) (((x)&1)<<31)
1517 #define m_WIN0_DSP_BG_BLUE (0xff<<0)
1518 #define m_WIN0_DSP_BG_GREEN (0xff<<8)
1519 #define m_WIN0_DSP_BG_RED (0xff<<16)
1520 #define m_WIN0_DSP_BG_EN (0x1<<31)
1522 #define WIN1_DSP_BG (0x264)
1523 #define v_WIN1_DSP_BG_BLUE(x) (((x)&0xff)<<0)
1524 #define v_WIN1_DSP_BG_GREEN(x) (((x)&0xff)<<8)
1525 #define v_WIN1_DSP_BG_RED(x) (((x)&0xff)<<16)
1526 #define v_WIN1_DSP_BG_EN(x) (((x)&1)<<31)
1527 #define m_WIN1_DSP_BG_BLUE (0xff<<0)
1528 #define m_WIN1_DSP_BG_GREEN (0xff<<8)
1529 #define m_WIN1_DSP_BG_RED (0xff<<16)
1530 #define m_WIN1_DSP_BG_EN (0x1<<31)
1532 #define WIN2_DSP_BG (0x268)
1533 #define v_WIN2_DSP_BG_BLUE(x) (((x)&0xff)<<0)
1534 #define v_WIN2_DSP_BG_GREEN(x) (((x)&0xff)<<8)
1535 #define v_WIN2_DSP_BG_RED(x) (((x)&0xff)<<16)
1536 #define v_WIN2_DSP_BG_EN(x) (((x)&1)<<31)
1537 #define m_WIN2_DSP_BG_BLUE (0xff<<0)
1538 #define m_WIN2_DSP_BG_GREEN (0xff<<8)
1539 #define m_WIN2_DSP_BG_RED (0xff<<16)
1540 #define m_WIN2_DSP_BG_EN (0x1<<31)
1542 #define WIN3_DSP_BG (0x26c)
1543 #define v_WIN3_DSP_BG_BLUE(x) (((x)&0xff)<<0)
1544 #define v_WIN3_DSP_BG_GREEN(x) (((x)&0xff)<<8)
1545 #define v_WIN3_DSP_BG_RED(x) (((x)&0xff)<<16)
1546 #define v_WIN3_DSP_BG_EN(x) (((x)&1)<<31)
1547 #define m_WIN3_DSP_BG_BLUE (0xff<<0)
1548 #define m_WIN3_DSP_BG_GREEN (0xff<<8)
1549 #define m_WIN3_DSP_BG_RED (0xff<<16)
1550 #define m_WIN3_DSP_BG_EN (0x1<<31)
1552 #define SCAN_LINE_NUM (0x270)
1553 #define CABC_DEBUG0 (0x274)
1554 #define CABC_DEBUG1 (0x278)
1555 #define CABC_DEBUG2 (0x27c)
1556 #define DBG_REG_000 (0x280)
1557 #define DBG_REG_001 (0x284)
1558 #define DBG_REG_002 (0x288)
1559 #define DBG_REG_003 (0x28c)
1560 #define DBG_REG_004 (0x290)
1561 #define DBG_REG_005 (0x294)
1562 #define DBG_REG_006 (0x298)
1563 #define DBG_REG_007 (0x29c)
1564 #define DBG_REG_008 (0x2a0)
1565 #define DBG_REG_016 (0x2c0)
1566 #define DBG_REG_017 (0x2c4)
1567 #define DBG_REG_018 (0x2c8)
1568 #define DBG_REG_019 (0x2cc)
1569 #define DBG_REG_020 (0x2d0)
1570 #define DBG_REG_021 (0x2d4)
1571 #define DBG_REG_022 (0x2d8)
1572 #define DBG_REG_023 (0x2dc)
1573 #define DBG_REG_028 (0x2f0)
1575 #define MMU_DTE_ADDR (0x0300)
1576 #define v_MMU_DTE_ADDR(x) (((x)&0xffffffff)<<0)
1577 #define m_MMU_DTE_ADDR (0xffffffff<<0)
1579 #define MMU_STATUS (0x0304)
1580 #define v_PAGING_ENABLED(x) (((x)&1)<<0)
1581 #define v_PAGE_FAULT_ACTIVE(x) (((x)&1)<<1)
1582 #define v_STAIL_ACTIVE(x) (((x)&1)<<2)
1583 #define v_MMU_IDLE(x) (((x)&1)<<3)
1584 #define v_REPLAY_BUFFER_EMPTY(x) (((x)&1)<<4)
1585 #define v_PAGE_FAULT_IS_WRITE(x) (((x)&1)<<5)
1586 #define v_PAGE_FAULT_BUS_ID(x) (((x)&0x1f)<<6)
1587 #define m_PAGING_ENABLED (1<<0)
1588 #define m_PAGE_FAULT_ACTIVE (1<<1)
1589 #define m_STAIL_ACTIVE (1<<2)
1590 #define m_MMU_IDLE (1<<3)
1591 #define m_REPLAY_BUFFER_EMPTY (1<<4)
1592 #define m_PAGE_FAULT_IS_WRITE (1<<5)
1593 #define m_PAGE_FAULT_BUS_ID (0x1f<<6)
1595 #define MMU_COMMAND (0x0308)
1596 #define v_MMU_CMD(x) (((x)&0x3)<<0)
1597 #define m_MMU_CMD (0x3<<0)
1599 #define MMU_PAGE_FAULT_ADDR (0x030c)
1600 #define v_PAGE_FAULT_ADDR(x) (((x)&0xffffffff)<<0)
1601 #define m_PAGE_FAULT_ADDR (0xffffffff<<0)
1603 #define MMU_ZAP_ONE_LINE (0x0310)
1604 #define v_MMU_ZAP_ONE_LINE(x) (((x)&0xffffffff)<<0)
1605 #define m_MMU_ZAP_ONE_LINE (0xffffffff<<0)
1607 #define MMU_INT_RAWSTAT (0x0314)
1608 #define v_PAGE_FAULT_RAWSTAT(x) (((x)&1)<<0)
1609 #define v_READ_BUS_ERROR_RAWSTAT(x) (((x)&1)<<1)
1610 #define m_PAGE_FAULT_RAWSTAT (1<<0)
1611 #define m_READ_BUS_ERROR_RAWSTAT (1<<1)
1613 #define MMU_INT_CLEAR (0x0318)
1614 #define v_PAGE_FAULT_CLEAR(x) (((x)&1)<<0)
1615 #define v_READ_BUS_ERROR_CLEAR(x) (((x)&1)<<1)
1616 #define m_PAGE_FAULT_CLEAR (1<<0)
1617 #define m_READ_BUS_ERROR_CLEAR (1<<1)
1619 #define MMU_INT_MASK (0x031c)
1620 #define v_PAGE_FAULT_MASK(x) (((x)&1)<<0)
1621 #define v_READ_BUS_ERROR_MASK(x) (((x)&1)<<1)
1622 #define m_PAGE_FAULT_MASK (1<<0)
1623 #define m_READ_BUS_ERROR_MASK (1<<1)
1625 #define MMU_INT_STATUS (0x0320)
1626 #define v_PAGE_FAULT_STATUS(x) (((x)&1)<<0)
1627 #define v_READ_BUS_ERROR_STATUS(x) (((x)&1)<<1)
1628 #define m_PAGE_FAULT_STATUS (1<<0)
1629 #define m_READ_BUS_ERROR_STATUS (1<<1)
1631 #define MMU_AUTO_GATING (0x0324)
1632 #define v_MMU_AUTO_GATING(x) (((x)&1)<<0)
1633 #define m_MMU_AUTO_GATING (1<<0)
1635 #define WIN2_LUT_ADDR (0x0400)
1636 #define WIN3_LUT_ADDR (0x0800)
1637 #define HWC_LUT_ADDR (0x0c00)
1638 #define GAMMA_LUT_ADDR (0x1000)
1639 #define CABC_GAMMA_LUT_ADDR (0x1800)
1640 #define MCU_BYPASS_WPORT (0x2200)
1641 #define MCU_BYPASS_RPORT (0x2300)
1643 #define PMUGRF_SOC_CON0_VOP (0x0100)
1646 LB_YUV_3840X5 = 0x0,
1647 LB_YUV_2560X8 = 0x1,
1648 LB_RGB_3840X2 = 0x2,
1649 LB_RGB_2560X4 = 0x3,
1650 LB_RGB_1920X5 = 0x4,
1654 enum sacle_up_mode {
1659 enum scale_down_mode {
1660 SCALE_DOWN_BIL = 0x0,
1661 SCALE_DOWN_AVG = 0x1
1664 /*ALPHA BLENDING MODE*/
1665 enum alpha_mode { /* Fs Fd */
1666 AB_USER_DEFINE = 0x0,
1667 AB_CLEAR = 0x1,/* 0 0*/
1668 AB_SRC = 0x2,/* 1 0*/
1669 AB_DST = 0x3,/* 0 1 */
1670 AB_SRC_OVER = 0x4,/* 1 1-As''*/
1671 AB_DST_OVER = 0x5,/* 1-Ad'' 1*/
1679 AB_SRC_OVER_GLOBAL = 0xd
1680 }; /*alpha_blending_mode*/
1682 enum src_alpha_mode {
1685 };/*src_alpha_mode*/
1687 enum global_alpha_mode {
1690 AA_PER_PIX_GLOBAL = 0x2
1691 };/*src_global_alpha_mode*/
1693 enum src_alpha_sel {
1698 enum src_color_mode {
1699 AA_SRC_PRE_MUL = 0x0,
1700 AA_SRC_NO_PRE_MUL = 0x1
1701 };/*src_color_mode*/
1707 AA_SRC_INVERSE = 0x3,
1709 };/*src_factor_mode && dst_factor_mode*/
1711 enum _vop_r2y_csc_mode {
1712 VOP_R2Y_CSC_BT601 = 0,
1716 enum _vop_y2r_csc_mode {
1717 VOP_Y2R_CSC_MPEG = 0,
1723 VOP_FORMAT_ARGB888 = 0,
1726 VOP_FORMAT_YCBCR420 = 4,
1727 VOP_FORMAT_YCBCR422,
1731 enum _vop_overlay_mode {
1736 struct lcdc_device {
1738 struct rk_lcdc_driver driver;
1740 struct rk_screen *screen;
1743 void *regsbak; /*back up reg*/
1744 u32 reg_phy_base; /* physical basic address of lcdc register*/
1745 struct regmap *grf_base;
1746 struct regmap *pmugrf_base;
1747 u32 len; /* physical map length of lcdc register*/
1748 /*one time only one process allowed to config the register*/
1749 spinlock_t reg_lock;
1751 int __iomem *dsp_lut_addr_base;
1752 int __iomem *cabc_lut_addr_base;
1755 int prop; /*used for primary or extended display device*/
1757 bool pwr18; /*if lcdc use 1.8v power supply*/
1758 /*if aclk or hclk is closed ,acess to register is not allowed*/
1760 /*active layer counter,when atv_layer_cnt = 0,disable lcdc*/
1766 struct clk *pd; /*lcdc power domain*/
1767 struct clk *hclk; /*lcdc AHP clk*/
1768 struct clk *dclk; /*lcdc dclk*/
1769 struct clk *aclk; /*lcdc share memory frequency*/
1772 u32 standby; /*1:standby,0:wrok*/
1774 struct backlight_device *backlight;
1775 struct clk *pll_sclk;
1778 struct alpha_config {
1779 enum src_alpha_mode src_alpha_mode; /*win0_src_alpha_m0*/
1780 u32 src_global_alpha_val; /*win0_src_global_alpha*/
1781 enum global_alpha_mode src_global_alpha_mode;/*win0_src_blend_m0*/
1782 enum src_alpha_sel src_alpha_cal_m0; /*win0_src_alpha_cal_m0*/
1783 enum src_color_mode src_color_mode; /*win0_src_color_m0*/
1784 enum factor_mode src_factor_mode; /*win0_src_factor_m0*/
1785 enum factor_mode dst_factor_mode; /*win0_dst_factor_m0*/
1788 struct lcdc_cabc_mode {
1789 u32 pixel_num; /* pixel precent number */
1790 u16 stage_up; /* up stride */
1791 u16 stage_down; /* down stride */
1795 static inline void lcdc_writel(struct lcdc_device *lcdc_dev, u32 offset, u32 v)
1797 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1799 _pv += (offset >> 2);
1801 writel_relaxed(v, lcdc_dev->regs + offset);
1804 static inline u32 lcdc_readl(struct lcdc_device *lcdc_dev, u32 offset)
1808 v = readl_relaxed(lcdc_dev->regs + offset);
1812 static inline u32 lcdc_readl_backup(struct lcdc_device *lcdc_dev, u32 offset)
1815 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1817 _pv += (offset >> 2);
1818 v = readl_relaxed(lcdc_dev->regs + offset);
1823 static inline u32 lcdc_read_bit(struct lcdc_device *lcdc_dev,
1824 u32 offset, u32 msk)
1827 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1828 u32 _v = readl_relaxed(lcdc_dev->regs + offset);
1830 _pv += (offset >> 2);
1837 static inline void lcdc_set_bit(struct lcdc_device *lcdc_dev,
1838 u32 offset, u32 msk)
1840 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1842 _pv += (offset >> 2);
1844 writel_relaxed(*_pv, lcdc_dev->regs + offset);
1847 static inline void lcdc_clr_bit(struct lcdc_device *lcdc_dev,
1848 u32 offset, u32 msk)
1850 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1852 _pv += (offset >> 2);
1854 writel_relaxed(*_pv, lcdc_dev->regs + offset);
1857 static inline void lcdc_msk_reg(struct lcdc_device *lcdc_dev,
1858 u32 offset, u32 msk, u32 v)
1860 u32 *_pv = (u32 *)lcdc_dev->regsbak;
1862 _pv += (offset >> 2);
1865 writel_relaxed(*_pv, lcdc_dev->regs + offset);
1866 if (offset == INTR_CLEAR)
1870 static inline void lcdc_cfg_done(struct lcdc_device *lcdc_dev)
1872 writel_relaxed(0x01, lcdc_dev->regs + REG_CFG_DONE);
1876 static inline int lcdc_grf_writel(struct regmap *base,
1877 u32 offset, u32 val)
1879 regmap_write(base, offset, val);
1885 #define CUBIC_PRECISE 0
1886 #define CUBIC_SPLINE 1
1887 #define CUBIC_CATROM 2
1888 #define CUBIC_MITCHELL 3
1890 #define FBDC_FMT_RGB565 0x5
1891 #define FBDC_FMT_U8U8U8U8 0xc /*ARGB888*/
1892 #define FBDC_FMT_U8U8U8 0x3a /*RGBP888*/
1894 #define CUBIC_MODE_SELETION CUBIC_PRECISE
1896 /*************************************************************/
1897 #define SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT 12 /* 4.12*/
1898 #define SCALE_FACTOR_BILI_DN_FIXPOINT(x) \
1899 ((INT32)((x) * (1 << SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT)))
1901 #define SCALE_FACTOR_BILI_UP_FIXPOINT_SHIFT 16 /* 0.16*/
1903 #define SCALE_FACTOR_AVRG_FIXPOINT_SHIFT 16 /*0.16*/
1904 #define SCALE_FACTOR_AVRG_FIXPOINT(x) \
1905 ((INT32)((x) * (1 << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT)))
1907 #define SCALE_FACTOR_BIC_FIXPOINT_SHIFT 16 /* 0.16*/
1908 #define SCALE_FACTOR_BIC_FIXPOINT(x) \
1909 ((INT32)((x) * (1 << SCALE_FACTOR_BIC_FIXPOINT_SHIFT)))
1911 #define SCALE_FACTOR_DEFAULT_FIXPOINT_SHIFT 12 /*NONE SCALE,vsd_bil*/
1912 #define SCALE_FACTOR_VSDBIL_FIXPOINT_SHIFT 12 /*VER SCALE DOWN BIL*/
1914 /*********************************************************/
1916 /*#define GET_SCALE_FACTOR_BILI(src, dst) \
1917 ((((src) - 1) << SCALE_FACTOR_BILI_FIXPOINT_SHIFT) / ((dst) - 1))*/
1918 /*#define GET_SCALE_FACTOR_BIC(src, dst) \
1919 ((((src) - 1) << SCALE_FACTOR_BIC_FIXPOINT_SHIFT) / ((dst) - 1))*/
1921 #define GET_SCALE_FACTOR_BILI_DN(src, dst) \
1922 ((((src) * 2 - 3) << (SCALE_FACTOR_BILI_DN_FIXPOINT_SHIFT - 1)) \
1924 #define GET_SCALE_FACTOR_BILI_UP(src, dst) \
1925 ((((src) * 2 - 3) << (SCALE_FACTOR_BILI_UP_FIXPOINT_SHIFT - 1)) \
1927 #define GET_SCALE_FACTOR_BIC(src, dst) \
1928 ((((src) * 2 - 3) << (SCALE_FACTOR_BIC_FIXPOINT_SHIFT - 1)) \
1931 /*********************************************************/
1932 /*NOTE: hardware in order to save resource , srch first to get interlace line
1933 (srch+vscalednmult-1)/vscalednmult; and do scale*/
1934 #define GET_SCALE_DN_ACT_HEIGHT(srch, vscalednmult) \
1935 (((srch) + (vscalednmult) - 1) / (vscalednmult))
1937 /*#define VSKIP_MORE_PRECISE*/
1939 #ifdef VSKIP_MORE_PRECISE
1940 #define MIN_SCALE_FACTOR_AFTER_VSKIP 1.5f
1941 #define GET_SCALE_FACTOR_BILI_DN_VSKIP(srch, dsth, vscalednmult) \
1942 (GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT((srch),\
1943 (vscalednmult)), (dsth)))
1945 #define MIN_SCALE_FACTOR_AFTER_VSKIP 1
1947 #define GET_SCALE_FACTOR_BILI_DN_VSKIP(srch, dsth, vscalednmult) \
1948 ((GET_SCALE_DN_ACT_HEIGHT((srch), (vscalednmult)) == (dsth))\
1949 ? (GET_SCALE_FACTOR_BILI_DN((srch),\
1950 (dsth))/(vscalednmult))\
1951 : GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT((srch),\
1952 (vscalednmult)), (dsth)))
1954 #define GET_SCALE_FACTOR_BILI_DN_VSKIP(srch, dsth, vscalednmult) \
1955 ((GET_SCALE_DN_ACT_HEIGHT((srch) , (vscalednmult)) == (dsth)) \
1956 ? (GET_SCALE_FACTOR_BILI_DN((srch) , (dsth)) / (vscalednmult)) \
1957 : (GET_SCALE_DN_ACT_HEIGHT((srch) , (vscalednmult)) == ((dsth) * 2)) \
1958 ? GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT(((srch) - 1),\
1959 (vscalednmult)) , (dsth)) : \
1960 GET_SCALE_FACTOR_BILI_DN(GET_SCALE_DN_ACT_HEIGHT((srch),\
1961 (vscalednmult)) , (dsth)))
1966 /*****************************************************************/
1969 /*scalefactor must >= dst/src, or pixels at end of line may be unused*/
1970 /*scalefactor must < dst/(src-1), or dst buffer may overflow*/
1971 /*avrg old code: ((((dst) << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT))\
1972 /((src) - 1)) hxx_chgsrc*/
1973 /*modified by hpz:*/
1974 #define GET_SCALE_FACTOR_AVRG(src, dst) ((((dst) << \
1975 (SCALE_FACTOR_AVRG_FIXPOINT_SHIFT + 1))) / (2 * (src) - 1))
1977 /*************************************************************************/
1978 /*Scale Coordinate Accumulate, x.16*/
1979 #define SCALE_COOR_ACC_FIXPOINT_SHIFT 16
1980 #define SCALE_COOR_ACC_FIXPOINT_ONE (1 << SCALE_COOR_ACC_FIXPOINT_SHIFT)
1981 #define SCALE_COOR_ACC_FIXPOINT(x) \
1982 ((INT32)((x)*(1 << SCALE_COOR_ACC_FIXPOINT_SHIFT)))
1983 #define SCALE_COOR_ACC_FIXPOINT_REVERT(x) \
1984 ((((x) >> (SCALE_COOR_ACC_FIXPOINT_SHIFT - 1)) + 1) >> 1)
1986 #define SCALE_GET_COOR_ACC_FIXPOINT(scalefactor, factorfixpointshift) \
1988 (SCALE_COOR_ACC_FIXPOINT_SHIFT - (factorfixpointshift)))
1991 /************************************************************************/
1992 /*CoarsePart of Scale Coordinate Accumulate, used for pixel mult-add factor, 0.8*/
1993 #define SCALE_FILTER_FACTOR_FIXPOINT_SHIFT 8
1994 #define SCALE_FILTER_FACTOR_FIXPOINT_ONE \
1995 (1 << SCALE_FILTER_FACTOR_FIXPOINT_SHIFT)
1996 #define SCALE_FILTER_FACTOR_FIXPOINT(x) \
1997 ((INT32)((x) * (1 << SCALE_FILTER_FACTOR_FIXPOINT_SHIFT)))
1998 #define SCALE_FILTER_FACTOR_FIXPOINT_REVERT(x) \
1999 ((((x) >> (SCALE_FILTER_FACTOR_FIXPOINT_SHIFT-1)) + 1) >> 1)
2001 #define SCALE_GET_FILTER_FACTOR_FIXPOINT(cooraccumulate, \
2002 cooraccfixpointshift) \
2003 (((cooraccumulate) >> \
2004 ((cooraccfixpointshift) - SCALE_FILTER_FACTOR_FIXPOINT_SHIFT)) & \
2005 (SCALE_FILTER_FACTOR_FIXPOINT_ONE - 1))
2007 #define SCALE_OFFSET_FIXPOINT_SHIFT 8
2008 #define SCALE_OFFSET_FIXPOINT(x) \
2009 ((INT32)((x) * (1 << SCALE_OFFSET_FIXPOINT_SHIFT)))
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