drivers/video/rockchip/lcdc/rk3036_lcdc.c

   1 /*
   2  * drivers/video/rockchip/lcdc/rk3036_lcdc.c
   3  *
   4  * Copyright (C) 2014 ROCKCHIP, Inc.
   5  * Author:zhengyang<zhengyang@rock-chips.com>
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/errno.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/slab.h>
  23 #include <linux/device.h>
  24 #include <linux/delay.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/clk.h>
  29 #include <asm/div64.h>
  30 #include <linux/uaccess.h>
  31 #include <linux/rockchip/cpu.h>
  32 #include <linux/rockchip/iomap.h>
  33 #include <linux/rockchip/grf.h>
  34 #include <linux/rockchip/common.h>
  35 #include <dt-bindings/clock/rk_system_status.h>
  36 #if defined(CONFIG_ION_ROCKCHIP)
  37 #include <linux/rockchip/iovmm.h>
  38 #include <linux/rockchip/sysmmu.h>
  39 #endif
  40 #include "rk3036_lcdc.h"
  41
  42 static int dbg_thresd;
  43 module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
  44
  45 #define DBG(level, x...) do {                   \
  46         if (unlikely(dbg_thresd >= level))      \
  47                 dev_info(dev_drv->dev, x);              \
  48         } while (0)
  49
  50 #define grf_writel(offset, v)   do { \
  51         writel_relaxed(v, RK_GRF_VIRT + offset); \
  52         dsb(); \
  53         } while (0)
  54
  55 static struct rk_lcdc_win lcdc_win[] = {
  56         [0] = {
  57                .name = "win0",
  58                .id = 0,
  59                .support_3d = false,
  60                },
  61         [1] = {
  62                .name = "win1",
  63                .id = 1,
  64                .support_3d = false,
  65                },
  66         [2] = {
  67                .name = "hwc",
  68                .id = 2,
  69                .support_3d = false,
  70                },
  71 };
  72
  73 static irqreturn_t rk3036_lcdc_isr(int irq, void *dev_id)
  74 {
  75         struct lcdc_device *lcdc_dev =
  76             (struct lcdc_device *)dev_id;
  77         ktime_t timestamp = ktime_get();
  78         u32 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
  79
  80         if (int_reg & m_FS_INT_STA) {
  81                 timestamp = ktime_get();
  82                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
  83                              v_FS_INT_CLEAR(1));
  84                 /*if (lcdc_dev->driver.wait_fs) {*/
  85                 if (0) {
  86                         spin_lock(&(lcdc_dev->driver.cpl_lock));
  87                         complete(&(lcdc_dev->driver.frame_done));
  88                         spin_unlock(&(lcdc_dev->driver.cpl_lock));
  89                 }
  90                 lcdc_dev->driver.vsync_info.timestamp = timestamp;
  91                 wake_up_interruptible_all(&lcdc_dev->driver.vsync_info.wait);
  92
  93         } else if (int_reg & m_LF_INT_STA) {
  94                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
  95                              v_LF_INT_CLEAR(1));
  96         }
  97         return IRQ_HANDLED;
  98 }
  99
 100 static int rk3036_lcdc_clk_enable(struct lcdc_device *lcdc_dev)
 101 {
 102 #ifdef CONFIG_RK_FPGA
 103         lcdc_dev->clk_on = 1;
 104         return 0;
 105 #endif
 106         if (!lcdc_dev->clk_on) {
 107                 clk_prepare_enable(lcdc_dev->hclk);
 108                 clk_prepare_enable(lcdc_dev->dclk);
 109                 clk_prepare_enable(lcdc_dev->aclk);
 110 /*              clk_prepare_enable(lcdc_dev->pd);*/
 111                 spin_lock(&lcdc_dev->reg_lock);
 112                 lcdc_dev->clk_on = 1;
 113                 spin_unlock(&lcdc_dev->reg_lock);
 114         }
 115
 116         return 0;
 117 }
 118
 119 static int rk3036_lcdc_clk_disable(struct lcdc_device *lcdc_dev)
 120 {
 121 #ifdef CONFIG_RK_FPGA
 122         lcdc_dev->clk_on = 0;
 123         return 0;
 124 #endif
 125         if (lcdc_dev->clk_on) {
 126                 spin_lock(&lcdc_dev->reg_lock);
 127                 lcdc_dev->clk_on = 0;
 128                 spin_unlock(&lcdc_dev->reg_lock);
 129                 mdelay(25);
 130                 clk_disable_unprepare(lcdc_dev->dclk);
 131                 clk_disable_unprepare(lcdc_dev->hclk);
 132                 clk_disable_unprepare(lcdc_dev->aclk);
 133 /*              clk_disable_unprepare(lcdc_dev->pd);*/
 134         }
 135
 136         return 0;
 137 }
 138
 139 static int rk3036_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
 140 {
 141         u32 mask, val;
 142         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 143                                         struct lcdc_device, driver);
 144         mask = m_FS_INT_CLEAR | m_FS_INT_EN;
 145         val = v_FS_INT_CLEAR(1) | v_FS_INT_EN(1);
 146         lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 147         return 0;
 148 }
 149
 150 static int rk3036_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
 151 {
 152         u32 mask, val;
 153
 154         spin_lock(&lcdc_dev->reg_lock);
 155         if (likely(lcdc_dev->clk_on)) {
 156                 mask = m_FS_INT_CLEAR | m_FS_INT_EN;
 157                 val = v_FS_INT_CLEAR(0) | v_FS_INT_EN(0);
 158                 lcdc_msk_reg(lcdc_dev, INT_STATUS, mask, val);
 159                 spin_unlock(&lcdc_dev->reg_lock);
 160         } else {
 161                 spin_unlock(&lcdc_dev->reg_lock);
 162         }
 163         mdelay(1);
 164         return 0;
 165 }
 166
 167 static void rk_lcdc_read_reg_defalut_cfg(struct lcdc_device
 168                                              *lcdc_dev)
 169 {
 170         int reg = 0;
 171         u32 value = 0;
 172
 173         spin_lock(&lcdc_dev->reg_lock);
 174         for (reg = 0; reg < 0xdc; reg += 4)
 175                 value = lcdc_readl(lcdc_dev, reg);
 176
 177         spin_unlock(&lcdc_dev->reg_lock);
 178 }
 179
 180 static int rk3036_lcdc_alpha_cfg(struct lcdc_device *lcdc_dev)
 181 {
 182         int win0_top = 0;
 183         u32 mask, val;
 184         enum data_format win0_format = lcdc_dev->driver.win[0]->format;
 185         enum data_format win1_format = lcdc_dev->driver.win[1]->format;
 186
 187         int win0_alpha_en = ((win0_format == ARGB888) ||
 188                                 (win0_format == ABGR888)) ? 1 : 0;
 189         int win1_alpha_en = ((win1_format == ARGB888) ||
 190                                 (win1_format == ABGR888)) ? 1 : 0;
 191         u32 *_pv = (u32 *)lcdc_dev->regsbak;
 192
 193         _pv += (DSP_CTRL0 >> 2);
 194         win0_top = ((*_pv) & (m_WIN0_TOP)) >> 8;
 195         if (win0_top && (lcdc_dev->atv_layer_cnt >= 2) && (win0_alpha_en)) {
 196                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN |
 197                         m_WIN1_PREMUL_SCALE;
 198                 val = v_WIN0_ALPHA_EN(1) | v_WIN1_ALPHA_EN(0) |
 199                         v_WIN1_PREMUL_SCALE(0);
 200                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 201
 202                 mask = m_WIN0_ALPHA_MODE | m_PREMUL_ALPHA_ENABLE |
 203                         m_ALPHA_MODE_SEL1;
 204                 val = v_WIN0_ALPHA_MODE(1) | v_PREMUL_ALPHA_ENABLE(1) |
 205                         v_ALPHA_MODE_SEL1(0);
 206                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 207         } else if ((!win0_top) && (lcdc_dev->atv_layer_cnt >= 2) &&
 208                    (win1_alpha_en)) {
 209                 mask =  m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN |
 210                         m_WIN1_PREMUL_SCALE;
 211                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(1) |
 212                         v_WIN1_PREMUL_SCALE(0);
 213                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 214
 215                 mask = m_WIN1_ALPHA_MODE | m_PREMUL_ALPHA_ENABLE |
 216                         m_ALPHA_MODE_SEL1;
 217                 val = v_WIN1_ALPHA_MODE(1) | v_PREMUL_ALPHA_ENABLE(1) |
 218                         v_ALPHA_MODE_SEL1(0);
 219                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 220         } else {
 221                 mask = m_WIN0_ALPHA_EN | m_WIN1_ALPHA_EN;
 222                 val = v_WIN0_ALPHA_EN(0) | v_WIN1_ALPHA_EN(0);
 223                 lcdc_msk_reg(lcdc_dev, ALPHA_CTRL, mask, val);
 224         }
 225         return 0;
 226 }
 227
 228 static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
 229                                    struct rk_lcdc_win *win)
 230 {
 231         u32 mask, val;
 232
 233         if (win->state == 1) {
 234                 if (win->id == 0) {
 235                         mask = m_WIN0_EN | m_WIN0_FORMAT | m_WIN0_RB_SWAP;
 236                         val = v_WIN0_EN(win->state) |
 237                               v_WIN0_FORMAT(win->fmt_cfg) |
 238                               v_WIN0_RB_SWAP(win->swap_rb);
 239                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 240
 241                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
 242                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 243                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 244                         lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_CBR,
 245                                     v_X_SCL_FACTOR(win->scale_cbcr_x) |
 246                                     v_Y_SCL_FACTOR(win->scale_cbcr_y));
 247                         lcdc_msk_reg(lcdc_dev, WIN0_VIR,
 248                                      m_YRGB_VIR | m_CBBR_VIR,
 249                                      v_YRGB_VIR(win->area[0].y_vir_stride) |
 250                                      v_CBBR_VIR(win->area[0].uv_vir_stride));
 251                         lcdc_writel(lcdc_dev, WIN0_ACT_INFO,
 252                                     v_ACT_WIDTH(win->area[0].xact) |
 253                                     v_ACT_HEIGHT(win->area[0].yact));
 254                         lcdc_writel(lcdc_dev, WIN0_DSP_ST,
 255                                     v_DSP_STX(win->area[0].dsp_stx) |
 256                                     v_DSP_STY(win->area[0].dsp_sty));
 257                         lcdc_writel(lcdc_dev, WIN0_DSP_INFO,
 258                                     v_DSP_WIDTH(win->area[0].xsize) |
 259                                     v_DSP_HEIGHT(win->area[0].ysize));
 260
 261                         lcdc_writel(lcdc_dev, WIN0_YRGB_MST,
 262                                     win->area[0].y_addr);
 263                         lcdc_writel(lcdc_dev, WIN0_CBR_MST,
 264                                     win->area[0].uv_addr);
 265                 } else if (win->id == 1) {
 266                         mask = m_WIN1_EN | m_WIN1_FORMAT | m_WIN1_RB_SWAP;
 267                         val = v_WIN1_EN(win->state) |
 268                               v_WIN1_FORMAT(win->fmt_cfg) |
 269                               v_WIN1_RB_SWAP(win->swap_rb);
 270                         lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
 271
 272                         lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
 273                                     v_X_SCL_FACTOR(win->scale_yrgb_x) |
 274                                     v_Y_SCL_FACTOR(win->scale_yrgb_y));
 275
 276                         lcdc_msk_reg(lcdc_dev, WIN1_VIR, m_YRGB_VIR,
 277                                      v_YRGB_VIR(win->area[0].y_vir_stride));
 278                         lcdc_writel(lcdc_dev, WIN1_ACT_INFO,
 279                                     v_ACT_WIDTH(win->area[0].xact) |
 280                                     v_ACT_HEIGHT(win->area[0].yact));
 281                         lcdc_writel(lcdc_dev, WIN1_DSP_INFO,
 282                                     v_DSP_WIDTH(win->area[0].xsize) |
 283                                     v_DSP_HEIGHT(win->area[0].ysize));
 284                         lcdc_writel(lcdc_dev, WIN1_DSP_ST,
 285                                     v_DSP_STX(win->area[0].dsp_stx) |
 286                                     v_DSP_STY(win->area[0].dsp_sty));
 287                         lcdc_writel(lcdc_dev, WIN1_MST, win->area[0].y_addr);
 288                 } /* else if (win->id == 2) {
 289                 }*/
 290         } else {
 291                 win->area[0].y_addr = 0;
 292                 win->area[0].uv_addr = 0;
 293                 if (win->id == 0)
 294                         lcdc_msk_reg(lcdc_dev,
 295                                      SYS_CTRL, m_WIN0_EN, v_WIN0_EN(0));
 296                 else if (win->id == 1)
 297                         lcdc_msk_reg(lcdc_dev,
 298                                      SYS_CTRL, m_WIN1_EN, v_WIN1_EN(0));
 299                 else if (win->id == 2)
 300                         lcdc_msk_reg(lcdc_dev,
 301                                      SYS_CTRL, m_HWC_EN, v_HWC_EN(0));
 302         }
 303         rk3036_lcdc_alpha_cfg(lcdc_dev);
 304 }
 305
 306 static void lcdc_layer_enable(struct lcdc_device *lcdc_dev,
 307                               unsigned int win_id, bool open)
 308 {
 309         spin_lock(&lcdc_dev->reg_lock);
 310         if (likely(lcdc_dev->clk_on) &&
 311             lcdc_dev->driver.win[win_id]->state != open) {
 312                 if (open) {
 313                         if (!lcdc_dev->atv_layer_cnt) {
 314                                 dev_info(lcdc_dev->dev,
 315                                          "wakeup from standby!\n");
 316                                 lcdc_dev->standby = 0;
 317                         }
 318                         lcdc_dev->atv_layer_cnt++;
 319                 } else if ((lcdc_dev->atv_layer_cnt > 0) && (!open)) {
 320                         lcdc_dev->atv_layer_cnt--;
 321                 }
 322                 lcdc_dev->driver.win[win_id]->state = open;
 323                 if (!open) {
 324                         lcdc_layer_update_regs(lcdc_dev,
 325                                                lcdc_dev->driver.win[win_id]);
 326                         lcdc_cfg_done(lcdc_dev);
 327                 }
 328                 /*if no layer used,disable lcdc*/
 329                 if (!lcdc_dev->atv_layer_cnt) {
 330                         dev_info(lcdc_dev->dev,
 331                                  "no layer is used, go to standby!\n");
 332                         lcdc_dev->standby = 1;
 333                 }
 334         }
 335         spin_unlock(&lcdc_dev->reg_lock);
 336 }
 337
 338 static int rk3036_lcdc_reg_update(struct rk_lcdc_driver *dev_drv)
 339 {
 340         struct lcdc_device *lcdc_dev =
 341             container_of(dev_drv, struct lcdc_device, driver);
 342         struct rk_lcdc_win *win0 = lcdc_dev->driver.win[0];
 343         struct rk_lcdc_win *win1 = lcdc_dev->driver.win[1];
 344         int timeout;
 345         unsigned long flags;
 346
 347         spin_lock(&lcdc_dev->reg_lock);
 348         if (likely(lcdc_dev->clk_on)) {
 349                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 350                              v_LCDC_STANDBY(lcdc_dev->standby));
 351                 lcdc_layer_update_regs(lcdc_dev, win0);
 352                 lcdc_layer_update_regs(lcdc_dev, win1);
 353                 rk3036_lcdc_alpha_cfg(lcdc_dev);
 354                 lcdc_cfg_done(lcdc_dev);
 355         }
 356         spin_unlock(&lcdc_dev->reg_lock);
 357         /* if (dev_drv->wait_fs) { */
 358         if (0) {
 359                 spin_lock_irqsave(&dev_drv->cpl_lock, flags);
 360                 init_completion(&dev_drv->frame_done);
 361                 spin_unlock_irqrestore(&dev_drv->cpl_lock, flags);
 362                 timeout = wait_for_completion_timeout(&dev_drv->frame_done,
 363                                                       msecs_to_jiffies
 364                                                       (dev_drv->cur_screen->ft
 365                                                        + 5));
 366                 if (!timeout && (!dev_drv->frame_done.done)) {
 367                         dev_warn(lcdc_dev->dev,
 368                                  "wait for new frame start time out!\n");
 369                         return -ETIMEDOUT;
 370                 }
 371         }
 372         DBG(2, "%s for lcdc%d\n", __func__, lcdc_dev->id);
 373         return 0;
 374 }
 375
 376 static void rk3036_lcdc_reg_restore(struct lcdc_device *lcdc_dev)
 377 {
 378         memcpy((u8 *)lcdc_dev->regs, (u8 *)lcdc_dev->regsbak, 0xdc);
 379 }
 380
 381 static void rk3036_lcdc_mmu_en(struct rk_lcdc_driver *dev_drv)
 382 {
 383         u32 mask, val;
 384         struct lcdc_device *lcdc_dev =
 385             container_of(dev_drv, struct lcdc_device, driver);
 386
 387         spin_lock(&lcdc_dev->reg_lock);
 388         if (likely(lcdc_dev->clk_on)) {
 389                 mask = m_MMU_EN | m_AXI_MAX_OUTSTANDING_EN |
 390                         m_AXI_OUTSTANDING_MAX_NUM;
 391                 val = v_MMU_EN(1) | v_AXI_OUTSTANDING_MAX_NUM(31) |
 392                         v_AXI_MAX_OUTSTANDING_EN(1);
 393                 lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 394         }
 395         spin_unlock(&lcdc_dev->reg_lock);
 396 }
 397
 398 static int rk3036_lcdc_set_dclk(struct rk_lcdc_driver *dev_drv)
 399 {
 400 #ifdef CONFIG_RK_FPGA
 401         return 0;
 402 #endif
 403         int ret, fps;
 404         struct lcdc_device *lcdc_dev =
 405             container_of(dev_drv, struct lcdc_device, driver);
 406         struct rk_screen *screen = dev_drv->cur_screen;
 407
 408         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 409         if (ret)
 410                 dev_err(dev_drv->dev,
 411                         "set lcdc%d dclk failed\n", lcdc_dev->id);
 412         lcdc_dev->pixclock =
 413                  div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 414         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 415
 416         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 417         screen->ft = 1000 / fps;
 418         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 419                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 420         return 0;
 421 }
 422
 423 /********do basic init*********/
 424 static int rk3036_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
 425 {
 426         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 427                                 struct lcdc_device, driver);
 428
 429         if (lcdc_dev->pre_init)
 430                 return 0;
 431         lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
 432         lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
 433         lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
 434 /*      lcdc_dev->pd   = devm_clk_get(lcdc_dev->dev, "pd_lcdc"); */
 435
 436         if (/*IS_ERR(lcdc_dev->pd) ||*/ (IS_ERR(lcdc_dev->aclk)) ||
 437             (IS_ERR(lcdc_dev->dclk)) || (IS_ERR(lcdc_dev->hclk))) {
 438                 dev_err(lcdc_dev->dev, "failed to get lcdc%d clk source\n",
 439                         lcdc_dev->id);
 440         }
 441
 442         rk_disp_pwr_enable(dev_drv);
 443         rk3036_lcdc_clk_enable(lcdc_dev);
 444
 445         /*backup reg config at uboot*/
 446         rk_lcdc_read_reg_defalut_cfg(lcdc_dev);
 447         lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN,
 448                      v_AUTO_GATING_EN(0));
 449         lcdc_cfg_done(lcdc_dev);
 450         if (dev_drv->iommu_enabled)
 451                 /*disable win0 to workaround iommu pagefault*/
 452                 lcdc_layer_enable(lcdc_dev, 0, 0);
 453         lcdc_dev->pre_init = true;
 454
 455         return 0;
 456 }
 457
 458 static int rk3036_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
 459 {
 460         int ret = -EINVAL;
 461         int fps;
 462         u16 face = 0;
 463         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 464                                                 struct lcdc_device, driver);
 465         struct rk_screen *screen = dev_drv->cur_screen;
 466         u16 right_margin = screen->mode.right_margin;
 467         u16 left_margin = screen->mode.left_margin;
 468         u16 lower_margin = screen->mode.lower_margin;
 469         u16 upper_margin = screen->mode.upper_margin;
 470         u16 x_res = screen->mode.xres;
 471         u16 y_res = screen->mode.yres;
 472         u32 mask, val;
 473
 474         spin_lock(&lcdc_dev->reg_lock);
 475         if (likely(lcdc_dev->clk_on)) {
 476                 switch (screen->type) {
 477                 case SCREEN_HDMI:
 478                         mask = m_HDMI_DCLK_EN;
 479                         val = v_HDMI_DCLK_EN(1);
 480                         if (screen->pixelrepeat) {
 481                                 mask |= m_CORE_CLK_DIV_EN;
 482                                 val |= v_CORE_CLK_DIV_EN(1);
 483                         } else {
 484                                 mask |= m_CORE_CLK_DIV_EN;
 485                                 val |= v_CORE_CLK_DIV_EN(0);
 486                         }
 487                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 488                         mask = (1 << 4) | (1 << 5) | (1 << 6);
 489                         val = (screen->pin_hsync << 4) |
 490                                 (screen->pin_vsync << 5) |
 491                                 (screen->pin_den << 6);
 492                         grf_writel(RK3036_GRF_SOC_CON2, (mask << 16) | val);
 493                         break;
 494                 case SCREEN_TVOUT:
 495                         mask = m_TVE_DAC_DCLK_EN;
 496                         val = v_TVE_DAC_DCLK_EN(1);
 497                         if (screen->pixelrepeat) {
 498                                 mask |= m_CORE_CLK_DIV_EN;
 499                                 val |= v_CORE_CLK_DIV_EN(1);
 500                         } else {
 501                                 mask |= m_CORE_CLK_DIV_EN;
 502                                 val |= v_CORE_CLK_DIV_EN(0);
 503                         }
 504                         lcdc_msk_reg(lcdc_dev, AXI_BUS_CTRL, mask, val);
 505                         if ((x_res == 720) && (y_res == 576)) {
 506                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 507                                              m_TVE_MODE, v_TVE_MODE(TV_PAL));
 508                         } else if ((x_res == 720) && (y_res == 480)) {
 509                                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 510                                              m_TVE_MODE, v_TVE_MODE(TV_NTSC));
 511                         } else {
 512                                 dev_err(lcdc_dev->dev,
 513                                         "unsupported video timing!\n");
 514                                 return -1;
 515                         }
 516                         break;
 517                 default:
 518                         dev_err(lcdc_dev->dev, "un supported interface!\n");
 519                         break;
 520                 }
 521
 522                 mask = m_DSP_OUT_FORMAT | m_HSYNC_POL | m_VSYNC_POL |
 523                     m_DEN_POL | m_DCLK_POL;
 524                 val = v_DSP_OUT_FORMAT(face) |
 525                         v_HSYNC_POL(screen->pin_hsync) |
 526                         v_VSYNC_POL(screen->pin_vsync) |
 527                         v_DEN_POL(screen->pin_den) |
 528                         v_DCLK_POL(screen->pin_dclk);
 529                 lcdc_msk_reg(lcdc_dev, DSP_CTRL0, mask, val);
 530
 531                 mask = m_BG_COLOR | m_DSP_BG_SWAP | m_DSP_RB_SWAP |
 532                     m_DSP_RG_SWAP | m_DSP_DELTA_SWAP |
 533                     m_DSP_DUMMY_SWAP | m_BLANK_EN;
 534
 535                 val = v_BG_COLOR(0x000000) | v_DSP_BG_SWAP(screen->swap_gb) |
 536                     v_DSP_RB_SWAP(screen->swap_rb) |
 537                     v_DSP_RG_SWAP(screen->swap_rg) |
 538                     v_DSP_DELTA_SWAP(screen->swap_delta) |
 539                                      v_DSP_DUMMY_SWAP(screen->swap_dumy) |
 540                                                       v_BLANK_EN(0) |
 541                                      v_BLACK_EN(0);
 542                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, mask, val);
 543                 val =
 544                     v_HSYNC(screen->mode.hsync_len) | v_HORPRD(screen->mode.
 545                                                                hsync_len +
 546                                                                left_margin +
 547                                                                x_res +
 548                                                                right_margin);
 549                 lcdc_writel(lcdc_dev, DSP_HTOTAL_HS_END, val);
 550                 val = v_HAEP(screen->mode.hsync_len + left_margin + x_res) |
 551                     v_HASP(screen->mode.hsync_len + left_margin);
 552                 lcdc_writel(lcdc_dev, DSP_HACT_ST_END, val);
 553
 554                 if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 555                         /*First Field Timing*/
 556                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END,
 557                                     v_VSYNC(screen->mode.vsync_len) |
 558                                     v_VERPRD(2 * (screen->mode.vsync_len +
 559                                                   upper_margin + lower_margin)
 560                                              + y_res + 1));
 561                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END,
 562                                     v_VAEP(screen->mode.vsync_len +
 563                                         upper_margin + y_res/2) |
 564                                     v_VASP(screen->mode.vsync_len +
 565                                         upper_margin));
 566                         /*Second Field Timing*/
 567                         lcdc_writel(lcdc_dev, DSP_VS_ST_END_F1,
 568                                     v_VSYNC_ST_F1(screen->mode.vsync_len +
 569                                                   upper_margin + y_res/2 +
 570                                                   lower_margin) |
 571                                     v_VSYNC_END_F1(2 * screen->mode.vsync_len
 572                                                    + upper_margin + y_res/2 +
 573                                                    lower_margin));
 574                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END_F1,
 575                                     v_VAEP(2 * (screen->mode.vsync_len +
 576                                                 upper_margin) + y_res +
 577                                                 lower_margin + 1) |
 578                                     v_VASP(2 * (screen->mode.vsync_len +
 579                                                 upper_margin) + y_res/2 +
 580                                                 lower_margin + 1));
 581
 582                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 583                                      m_INTERLACE_DSP_EN |
 584                                      m_WIN1_DIFF_DCLK_EN |
 585                                      m_WIN0_YRGB_DEFLICK_EN |
 586                                      m_WIN0_CBR_DEFLICK_EN,
 587                                      v_INTERLACE_DSP_EN(1) |
 588                                      v_WIN1_DIFF_DCLK_EN(1) |
 589                                      v_WIN0_YRGB_DEFLICK_EN(1) |
 590                                      v_WIN0_CBR_DEFLICK_EN(1));
 591                 } else {
 592                         val = v_VSYNC(screen->mode.vsync_len) |
 593                               v_VERPRD(screen->mode.vsync_len + upper_margin +
 594                                         y_res + lower_margin);
 595                         lcdc_writel(lcdc_dev, DSP_VTOTAL_VS_END, val);
 596
 597                         val = v_VAEP(screen->mode.vsync_len +
 598                                      upper_margin + y_res) |
 599                             v_VASP(screen->mode.vsync_len +
 600                                    screen->mode.upper_margin);
 601                         lcdc_writel(lcdc_dev, DSP_VACT_ST_END, val);
 602
 603                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
 604                                      m_INTERLACE_DSP_EN |
 605                                      m_WIN1_DIFF_DCLK_EN |
 606                                      m_WIN0_YRGB_DEFLICK_EN |
 607                                      m_WIN0_CBR_DEFLICK_EN,
 608                                      v_INTERLACE_DSP_EN(0) |
 609                                      v_WIN1_DIFF_DCLK_EN(0) |
 610                                      v_WIN0_YRGB_DEFLICK_EN(0) |
 611                                      v_WIN0_CBR_DEFLICK_EN(0));
 612                 }
 613         }
 614         spin_unlock(&lcdc_dev->reg_lock);
 615
 616         ret = clk_set_rate(lcdc_dev->dclk, screen->mode.pixclock);
 617         if (ret)
 618                 dev_err(dev_drv->dev,
 619                         "set lcdc%d dclk failed\n", lcdc_dev->id);
 620         lcdc_dev->pixclock =
 621             div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
 622         lcdc_dev->driver.pixclock = lcdc_dev->pixclock;
 623
 624         fps = rk_fb_calc_fps(screen, lcdc_dev->pixclock);
 625         screen->ft = 1000 / fps;
 626         dev_info(lcdc_dev->dev, "%s: dclk:%lu>>fps:%d ",
 627                  lcdc_dev->driver.name, clk_get_rate(lcdc_dev->dclk), fps);
 628         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
 629                 dev_drv->trsm_ops->enable();
 630         if (screen->init)
 631                 screen->init();
 632
 633         return 0;
 634 }
 635
 636 static int rk3036_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
 637                             bool open)
 638 {
 639         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 640                                         struct lcdc_device, driver);
 641
 642         /*enable clk,when first layer open */
 643         if ((open) && (!lcdc_dev->atv_layer_cnt)) {
 644                 rk3036_lcdc_pre_init(dev_drv);
 645                 rk3036_lcdc_clk_enable(lcdc_dev);
 646                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 647                 if (dev_drv->iommu_enabled) {
 648                         if (!dev_drv->mmu_dev) {
 649                                 dev_drv->mmu_dev =
 650                                 rockchip_get_sysmmu_device_by_compatible(
 651                                         dev_drv->mmu_dts_name);
 652                                 if (dev_drv->mmu_dev) {
 653                                         platform_set_sysmmu(dev_drv->mmu_dev,
 654                                                             dev_drv->dev);
 655                                 } else {
 656                                         dev_err(dev_drv->dev,
 657                                                 "failed to get iommu device\n"
 658                                                 );
 659                                         return -1;
 660                                 }
 661                         }
 662                         iovmm_activate(dev_drv->dev);
 663                 }
 664                 #endif
 665                 rk3036_lcdc_reg_restore(lcdc_dev);
 666                 if (dev_drv->iommu_enabled)
 667                         rk3036_lcdc_mmu_en(dev_drv);
 668                 if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
 669                         rk3036_lcdc_set_dclk(dev_drv);
 670                         rk3036_lcdc_enable_irq(dev_drv);
 671                 } else {
 672                         rk3036_load_screen(dev_drv, 1);
 673                 }
 674         }
 675
 676         if (win_id < ARRAY_SIZE(lcdc_win))
 677                 lcdc_layer_enable(lcdc_dev, win_id, open);
 678         else
 679                 dev_err(lcdc_dev->dev, "invalid win id:%d\n", win_id);
 680
 681         /*when all layer closed,disable clk */
 682         if ((!open) && (!lcdc_dev->atv_layer_cnt)) {
 683                 rk3036_lcdc_disable_irq(lcdc_dev);
 684                 rk3036_lcdc_reg_update(dev_drv);
 685                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 686                 if (dev_drv->iommu_enabled) {
 687                         if (dev_drv->mmu_dev)
 688                                 iovmm_deactivate(dev_drv->dev);
 689                 }
 690                 #endif
 691                 rk3036_lcdc_clk_disable(lcdc_dev);
 692         }
 693
 694         return 0;
 695 }
 696
 697 static int rk3036_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
 698 {
 699         struct lcdc_device *lcdc_dev =
 700                         container_of(dev_drv, struct lcdc_device, driver);
 701         struct rk_screen *screen = dev_drv->cur_screen;
 702         struct rk_lcdc_win *win = NULL;
 703         char fmt[9] = "NULL";
 704
 705         if (!screen) {
 706                 dev_err(dev_drv->dev, "screen is null!\n");
 707                 return -ENOENT;
 708         }
 709
 710         if (win_id == 0) {
 711                 win = dev_drv->win[0];
 712         } else if (win_id == 1) {
 713                 win = dev_drv->win[1];
 714         } else {
 715                 dev_err(dev_drv->dev, "un supported win number:%d\n", win_id);
 716                 return -EINVAL;
 717         }
 718
 719         spin_lock(&lcdc_dev->reg_lock);
 720         win->area[0].dsp_stx = win->area[0].xpos +
 721                                 screen->mode.left_margin +
 722                                 screen->mode.hsync_len;
 723         if (screen->mode.vmode == FB_VMODE_INTERLACED) {
 724                 win->area[0].ysize /= 2;
 725                 win->area[0].dsp_sty = win->area[0].ypos/2 +
 726                                         screen->mode.upper_margin +
 727                                         screen->mode.vsync_len;
 728         } else {
 729                 win->area[0].dsp_sty = win->area[0].ypos +
 730                                         screen->mode.upper_margin +
 731                                         screen->mode.vsync_len;
 732         }
 733         win->scale_yrgb_x = calscale(win->area[0].xact, win->area[0].xsize);
 734         win->scale_yrgb_y = calscale(win->area[0].yact, win->area[0].ysize);
 735         switch (win->format) {
 736         case ARGB888:
 737                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 738                 win->swap_rb = 0;
 739                 break;
 740         case XBGR888:
 741                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 742                 win->swap_rb = 1;
 743                 break;
 744         case ABGR888:
 745                 win->fmt_cfg = VOP_FORMAT_ARGB888;
 746                 win->swap_rb = 1;
 747                 break;
 748         case RGB888:
 749                 win->fmt_cfg = VOP_FORMAT_RGB888;
 750                 win->swap_rb = 0;
 751                 break;
 752         case RGB565:
 753                 win->fmt_cfg = VOP_FORMAT_RGB565;
 754                 win->swap_rb = 0;
 755                 break;
 756         case YUV444:
 757                 if (win_id == 0) {
 758                         win->fmt_cfg = VOP_FORMAT_YCBCR444;
 759                         win->scale_cbcr_x = calscale(win->area[0].xact,
 760                                                      win->area[0].xsize);
 761                         win->scale_cbcr_y = calscale(win->area[0].yact,
 762                                                      win->area[0].ysize);
 763                         win->swap_rb = 0;
 764                 } else {
 765                         dev_err(lcdc_dev->driver.dev,
 766                                 "%s:un supported format!\n",
 767                                 __func__);
 768                 }
 769                 break;
 770         case YUV422:
 771                 if (win_id == 0) {
 772                         win->fmt_cfg = VOP_FORMAT_YCBCR422;
 773                         win->scale_cbcr_x = calscale((win->area[0].xact / 2),
 774                                                      win->area[0].xsize);
 775                         win->scale_cbcr_y = calscale(win->area[0].yact,
 776                                                      win->area[0].ysize);
 777                         win->swap_rb = 0;
 778                 } else {
 779                         dev_err(lcdc_dev->driver.dev,
 780                                 "%s:un supported format!\n",
 781                                 __func__);
 782                 }
 783                 break;
 784         case YUV420:
 785                 if (win_id == 0) {
 786                         win->fmt_cfg = VOP_FORMAT_YCBCR420;
 787                         win->scale_cbcr_x = calscale(win->area[0].xact / 2,
 788                                                      win->area[0].xsize);
 789                         win->scale_cbcr_y = calscale(win->area[0].yact / 2,
 790                                                      win->area[0].ysize);
 791                         win->swap_rb = 0;
 792                 } else {
 793                         dev_err(lcdc_dev->driver.dev,
 794                                 "%s:un supported format!\n",
 795                                 __func__);
 796                 }
 797                 break;
 798         default:
 799                 dev_err(lcdc_dev->driver.dev, "%s:un supported format!\n",
 800                         __func__);
 801                 break;
 802         }
 803         spin_unlock(&lcdc_dev->reg_lock);
 804
 805         DBG(1, "lcdc%d>>%s\n"
 806                 ">>format:%s>>>xact:%d>>yact:%d>>xsize:%d>>ysize:%d\n"
 807                 ">>xvir:%d>>yvir:%d>>xpos:%d>>ypos:%d>>\n", lcdc_dev->id,
 808                 __func__, get_format_string(win->format, fmt),
 809                 win->area[0].xact, win->area[0].yact, win->area[0].xsize,
 810                 win->area[0].ysize, win->area[0].xvir, win->area[0].yvir,
 811                 win->area[0].xpos, win->area[0].ypos);
 812         return 0;
 813 }
 814
 815 static int rk3036_lcdc_pan_display(struct rk_lcdc_driver *dev_drv, int win_id)
 816 {
 817         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 818                                                 struct lcdc_device, driver);
 819         struct rk_lcdc_win *win = NULL;
 820         struct rk_screen *screen = dev_drv->cur_screen;
 821
 822         if (!screen) {
 823                 dev_err(dev_drv->dev, "screen is null!\n");
 824                 return -ENOENT;
 825         }
 826
 827         if (win_id == 0) {
 828                 win = dev_drv->win[0];
 829         } else if (win_id == 1) {
 830                 win = dev_drv->win[1];
 831         } else {
 832                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
 833                 return -EINVAL;
 834         }
 835
 836         spin_lock(&lcdc_dev->reg_lock);
 837         if (likely(lcdc_dev->clk_on)) {
 838                 win->area[0].y_addr = win->area[0].smem_start +
 839                                         win->area[0].y_offset;
 840                 win->area[0].uv_addr = win->area[0].cbr_start +
 841                                         win->area[0].c_offset;
 842                 if (win->area[0].y_addr)
 843                         lcdc_layer_update_regs(lcdc_dev, win);
 844                 /*lcdc_cfg_done(lcdc_dev);*/
 845         }
 846         spin_unlock(&lcdc_dev->reg_lock);
 847
 848         DBG(2, "lcdc%d>>%s:y_addr:0x%x>>uv_addr:0x%x>>offset:%d\n",
 849             lcdc_dev->id, __func__, win->area[0].y_addr,
 850             win->area[0].uv_addr, win->area[0].y_offset);
 851          /* this is the first frame of the system,
 852                 enable frame start interrupt*/
 853         if ((dev_drv->first_frame))  {
 854                 dev_drv->first_frame = 0;
 855                 rk3036_lcdc_enable_irq(dev_drv);
 856         }
 857         return 0;
 858 }
 859
 860 static int rk3036_lcdc_ioctl(struct rk_lcdc_driver *dev_drv, unsigned int cmd,
 861                              unsigned long arg, int win_id)
 862 {
 863         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 864                                         struct lcdc_device, driver);
 865         u32 panel_size[2];
 866         void __user *argp = (void __user *)arg;
 867         struct color_key_cfg clr_key_cfg;
 868
 869         switch (cmd) {
 870         case RK_FBIOGET_PANEL_SIZE:
 871                 panel_size[0] = lcdc_dev->screen->mode.xres;
 872                 panel_size[1] = lcdc_dev->screen->mode.yres;
 873                 if (copy_to_user(argp, panel_size, 8))
 874                         return -EFAULT;
 875                 break;
 876         case RK_FBIOPUT_COLOR_KEY_CFG:
 877                 if (copy_from_user(&clr_key_cfg, argp,
 878                                    sizeof(struct color_key_cfg)))
 879                         return -EFAULT;
 880                 lcdc_writel(lcdc_dev, WIN0_COLOR_KEY,
 881                             clr_key_cfg.win0_color_key_cfg);
 882                 lcdc_writel(lcdc_dev, WIN1_COLOR_KEY,
 883                             clr_key_cfg.win1_color_key_cfg);
 884                 break;
 885
 886         default:
 887                 break;
 888         }
 889         return 0;
 890 }
 891
 892 static int rk3036_lcdc_get_win_id(struct rk_lcdc_driver *dev_drv,
 893                                   const char *id)
 894 {
 895         int win_id = 0;
 896
 897         mutex_lock(&dev_drv->fb_win_id_mutex);
 898         if (!strcmp(id, "fb0"))
 899                 win_id = dev_drv->fb0_win_id;
 900         else if (!strcmp(id, "fb1"))
 901                 win_id = dev_drv->fb1_win_id;
 902         else if (!strcmp(id, "fb2"))
 903                 win_id = dev_drv->fb2_win_id;
 904         mutex_unlock(&dev_drv->fb_win_id_mutex);
 905
 906         return win_id;
 907 }
 908
 909 static int rk3036_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv,
 910                                      int win_id)
 911 {
 912         return dev_drv->win[win_id]->state;
 913 }
 914
 915 static int rk3036_lcdc_ovl_mgr(struct rk_lcdc_driver *dev_drv, int swap,
 916                                bool set)
 917 {
 918         struct lcdc_device *lcdc_dev =
 919             container_of(dev_drv, struct lcdc_device, driver);
 920         int ovl;
 921
 922         spin_lock(&lcdc_dev->reg_lock);
 923         if (lcdc_dev->clk_on) {
 924                 if (set) {
 925                         lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_TOP,
 926                                      v_WIN0_TOP(swap));
 927                         ovl = swap;
 928                 } else {
 929                         ovl = lcdc_read_bit(lcdc_dev, DSP_CTRL0, m_WIN0_TOP);
 930                 }
 931         } else {
 932                 ovl = -EPERM;
 933         }
 934         spin_unlock(&lcdc_dev->reg_lock);
 935
 936         return ovl;
 937 }
 938
 939 static int rk3036_lcdc_early_suspend(struct rk_lcdc_driver *dev_drv)
 940 {
 941         struct lcdc_device *lcdc_dev = container_of(dev_drv,
 942                                         struct lcdc_device, driver);
 943         if (dev_drv->suspend_flag)
 944                 return 0;
 945         dev_drv->suspend_flag = 1;
 946         flush_kthread_worker(&dev_drv->update_regs_worker);
 947
 948         if (dev_drv->trsm_ops && dev_drv->trsm_ops->disable)
 949                 dev_drv->trsm_ops->disable();
 950         spin_lock(&lcdc_dev->reg_lock);
 951         if (likely(lcdc_dev->clk_on)) {
 952                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
 953                              v_BLANK_EN(1));
 954                 lcdc_msk_reg(lcdc_dev, INT_STATUS, m_FS_INT_CLEAR,
 955                              v_FS_INT_CLEAR(1));
 956                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
 957                              v_DSP_OUT_ZERO(1));
 958                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 959                              v_LCDC_STANDBY(1));
 960                 lcdc_cfg_done(lcdc_dev);
 961                 #if defined(CONFIG_ROCKCHIP_IOMMU)
 962                 if (dev_drv->iommu_enabled) {
 963                         if (dev_drv->mmu_dev)
 964                                 iovmm_deactivate(dev_drv->dev);
 965                 }
 966                 #endif
 967                 spin_unlock(&lcdc_dev->reg_lock);
 968         } else {
 969                 spin_unlock(&lcdc_dev->reg_lock);
 970                 return 0;
 971         }
 972         rk3036_lcdc_clk_disable(lcdc_dev);
 973         rk_disp_pwr_disable(dev_drv);
 974         return 0;
 975 }
 976
 977 static int rk3036_lcdc_early_resume(struct rk_lcdc_driver *dev_drv)
 978 {
 979         struct lcdc_device *lcdc_dev =
 980             container_of(dev_drv, struct lcdc_device, driver);
 981
 982         if (!dev_drv->suspend_flag)
 983                 return 0;
 984         rk_disp_pwr_enable(dev_drv);
 985         dev_drv->suspend_flag = 0;
 986
 987         if (lcdc_dev->atv_layer_cnt) {
 988                 rk3036_lcdc_clk_enable(lcdc_dev);
 989                 rk3036_lcdc_reg_restore(lcdc_dev);
 990
 991                 spin_lock(&lcdc_dev->reg_lock);
 992
 993                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_DSP_OUT_ZERO,
 994                              v_DSP_OUT_ZERO(0));
 995                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
 996                              v_LCDC_STANDBY(0));
 997                 lcdc_msk_reg(lcdc_dev, DSP_CTRL1, m_BLANK_EN,
 998                              v_BLANK_EN(0));
 999                 lcdc_cfg_done(lcdc_dev);
1000
1001                 spin_unlock(&lcdc_dev->reg_lock);
1002         }
1003
1004         if (dev_drv->trsm_ops && dev_drv->trsm_ops->enable)
1005                 dev_drv->trsm_ops->enable();
1006         return 0;
1007 }
1008
1009
1010 static int rk3036_lcdc_blank(struct rk_lcdc_driver *dev_drv,
1011                              int win_id, int blank_mode)
1012 {
1013         switch (blank_mode) {
1014         case FB_BLANK_UNBLANK:
1015                 rk3036_lcdc_early_resume(dev_drv);
1016                 break;
1017         case FB_BLANK_NORMAL:
1018                 rk3036_lcdc_early_suspend(dev_drv);
1019                 break;
1020         default:
1021                 rk3036_lcdc_early_suspend(dev_drv);
1022                 break;
1023         }
1024
1025         dev_info(dev_drv->dev, "blank mode:%d\n", blank_mode);
1026
1027         return 0;
1028 }
1029
1030 static int rk3036_lcdc_cfg_done(struct rk_lcdc_driver *dev_drv)
1031 {
1032         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1033                                         struct lcdc_device, driver);
1034
1035         spin_lock(&lcdc_dev->reg_lock);
1036         if (lcdc_dev->clk_on) {
1037                 lcdc_msk_reg(lcdc_dev, SYS_CTRL, m_LCDC_STANDBY,
1038                              v_LCDC_STANDBY(lcdc_dev->standby));
1039                 lcdc_cfg_done(lcdc_dev);
1040         }
1041         spin_unlock(&lcdc_dev->reg_lock);
1042         return 0;
1043 }
1044
1045 /*
1046         a:[-30~0]:
1047             sin_hue = sin(a)*256 +0x100;
1048             cos_hue = cos(a)*256;
1049         a:[0~30]
1050             sin_hue = sin(a)*256;
1051             cos_hue = cos(a)*256;
1052 */
1053 static int rk3036_lcdc_get_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1054                                     bcsh_hue_mode mode)
1055 {
1056         struct lcdc_device *lcdc_dev =
1057             container_of(dev_drv, struct lcdc_device, driver);
1058         u32 val;
1059
1060         spin_lock(&lcdc_dev->reg_lock);
1061         if (lcdc_dev->clk_on) {
1062                 val = lcdc_readl(lcdc_dev, BCSH_H);
1063                 switch (mode) {
1064                 case H_SIN:
1065                         val &= m_BCSH_SIN_HUE;
1066                         break;
1067                 case H_COS:
1068                         val &= m_BCSH_COS_HUE;
1069                         val >>= 16;
1070                         break;
1071                 default:
1072                         break;
1073                 }
1074         }
1075         spin_unlock(&lcdc_dev->reg_lock);
1076
1077         return val;
1078 }
1079
1080
1081 static int rk3036_lcdc_set_bcsh_hue(struct rk_lcdc_driver *dev_drv,
1082                                     int sin_hue, int cos_hue)
1083 {
1084         struct lcdc_device *lcdc_dev =
1085             container_of(dev_drv, struct lcdc_device, driver);
1086         u32 mask, val;
1087
1088         spin_lock(&lcdc_dev->reg_lock);
1089         if (lcdc_dev->clk_on) {
1090                 mask = m_BCSH_SIN_HUE | m_BCSH_COS_HUE;
1091                 val = v_BCSH_SIN_HUE(sin_hue) | v_BCSH_COS_HUE(cos_hue);
1092                 lcdc_msk_reg(lcdc_dev, BCSH_H, mask, val);
1093                 lcdc_cfg_done(lcdc_dev);
1094         }
1095         spin_unlock(&lcdc_dev->reg_lock);
1096
1097         return 0;
1098 }
1099
1100 static int rk3036_lcdc_set_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1101                                     bcsh_bcs_mode mode, int value)
1102 {
1103         struct lcdc_device *lcdc_dev =
1104             container_of(dev_drv, struct lcdc_device, driver);
1105         u32 mask, val;
1106
1107         spin_lock(&lcdc_dev->reg_lock);
1108         if (lcdc_dev->clk_on) {
1109                 switch (mode) {
1110                 case BRIGHTNESS:
1111                 /*from 0 to 255,typical is 128*/
1112                         if (value < 0x80)
1113                                 value += 0x80;
1114                         else if (value >= 0x80)
1115                                 value = value - 0x80;
1116                         mask =  m_BCSH_BRIGHTNESS;
1117                         val = v_BCSH_BRIGHTNESS(value);
1118                         break;
1119                 case CONTRAST:
1120                 /*from 0 to 510,typical is 256*/
1121                         mask =  m_BCSH_CONTRAST;
1122                         val =  v_BCSH_CONTRAST(value);
1123                         break;
1124                 case SAT_CON:
1125                 /*from 0 to 1015,typical is 256*/
1126                         mask = m_BCSH_SAT_CON;
1127                         val = v_BCSH_SAT_CON(value);
1128                         break;
1129                 default:
1130                         break;
1131                 }
1132                 lcdc_msk_reg(lcdc_dev, BCSH_BCS, mask, val);
1133                 lcdc_cfg_done(lcdc_dev);
1134         }
1135         spin_unlock(&lcdc_dev->reg_lock);
1136         return val;
1137 }
1138
1139 static int rk3036_lcdc_get_bcsh_bcs(struct rk_lcdc_driver *dev_drv,
1140                                     bcsh_bcs_mode mode)
1141 {
1142         struct lcdc_device *lcdc_dev =
1143             container_of(dev_drv, struct lcdc_device, driver);
1144         u32 val;
1145
1146         spin_lock(&lcdc_dev->reg_lock);
1147         if (lcdc_dev->clk_on) {
1148                 val = lcdc_readl(lcdc_dev, BCSH_BCS);
1149                 switch (mode) {
1150                 case BRIGHTNESS:
1151                         val &= m_BCSH_BRIGHTNESS;
1152                         if (val > 0x80)
1153                                 val -= 0x80;
1154                         else
1155                                 val += 0x80;
1156                         break;
1157                 case CONTRAST:
1158                         val &= m_BCSH_CONTRAST;
1159                         val >>= 8;
1160                         break;
1161                 case SAT_CON:
1162                         val &= m_BCSH_SAT_CON;
1163                         val >>= 20;
1164                         break;
1165                 default:
1166                         break;
1167                 }
1168         }
1169         spin_unlock(&lcdc_dev->reg_lock);
1170         return val;
1171 }
1172
1173
1174 static int rk3036_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
1175 {
1176         struct lcdc_device *lcdc_dev =
1177             container_of(dev_drv, struct lcdc_device, driver);
1178         u32 mask, val;
1179
1180         spin_lock(&lcdc_dev->reg_lock);
1181         if (lcdc_dev->clk_on) {
1182                 if (open) {
1183                         lcdc_writel(lcdc_dev, BCSH_CTRL, 0x1);
1184                         lcdc_writel(lcdc_dev, BCSH_BCS, 0xd0010000);
1185                         lcdc_writel(lcdc_dev, BCSH_H, 0x01000000);
1186                 } else {
1187                         mask = m_BCSH_EN;
1188                         val = v_BCSH_EN(0);
1189                         lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
1190                 }
1191                 lcdc_cfg_done(lcdc_dev);
1192         }
1193         spin_unlock(&lcdc_dev->reg_lock);
1194         return 0;
1195 }
1196
1197 static int rk3036_fb_win_remap(struct rk_lcdc_driver *dev_drv,
1198                                enum fb_win_map_order order)
1199 {
1200         mutex_lock(&dev_drv->fb_win_id_mutex);
1201         if (order == FB_DEFAULT_ORDER)
1202                 order = FB0_WIN1_FB1_WIN0_FB2_WIN2;
1203         dev_drv->fb2_win_id = order / 100;
1204         dev_drv->fb1_win_id = (order / 10) % 10;
1205         dev_drv->fb0_win_id = order % 10;
1206         mutex_unlock(&dev_drv->fb_win_id_mutex);
1207
1208         return 0;
1209 }
1210
1211 static int rk3036_lcdc_fps_mgr(struct rk_lcdc_driver *dev_drv, int fps,
1212                                bool set)
1213 {
1214         struct lcdc_device *lcdc_dev =
1215             container_of(dev_drv, struct lcdc_device, driver);
1216         struct rk_screen *screen = dev_drv->cur_screen;
1217         u64 ft = 0;
1218         u32 dotclk;
1219         int ret;
1220         u32 pixclock;
1221         u32 x_total, y_total;
1222
1223         if (set) {
1224                 ft = div_u64(1000000000000llu, fps);
1225                 x_total =
1226                     screen->mode.upper_margin + screen->mode.lower_margin +
1227                     screen->mode.yres + screen->mode.vsync_len;
1228                 y_total =
1229                     screen->mode.left_margin + screen->mode.right_margin +
1230                     screen->mode.xres + screen->mode.hsync_len;
1231                 dev_drv->pixclock = div_u64(ft, x_total * y_total);
1232                 dotclk = div_u64(1000000000000llu, dev_drv->pixclock);
1233                 ret = clk_set_rate(lcdc_dev->dclk, dotclk);
1234         }
1235
1236         pixclock = div_u64(1000000000000llu, clk_get_rate(lcdc_dev->dclk));
1237         lcdc_dev->pixclock = pixclock;
1238         dev_drv->pixclock = pixclock;
1239         fps = rk_fb_calc_fps(lcdc_dev->screen, pixclock);
1240         screen->ft = 1000 / fps;        /*one frame time in ms */
1241
1242         if (set)
1243                 dev_info(dev_drv->dev, "%s:dclk:%lu,fps:%d\n", __func__,
1244                          clk_get_rate(lcdc_dev->dclk), fps);
1245
1246         return fps;
1247 }
1248
1249 static int rk3036_lcdc_poll_vblank(struct rk_lcdc_driver *dev_drv)
1250 {
1251         struct lcdc_device *lcdc_dev =
1252             container_of(dev_drv, struct lcdc_device, driver);
1253         u32 int_reg;
1254         int ret;
1255
1256         if (lcdc_dev->clk_on) {
1257                 int_reg = lcdc_readl(lcdc_dev, INT_STATUS);
1258                 if (int_reg & m_LF_INT_STA) {
1259                         lcdc_msk_reg(lcdc_dev, INT_STATUS, m_LF_INT_CLEAR,
1260                                      v_LF_INT_CLEAR(1));
1261                         ret = RK_LF_STATUS_FC;
1262                 } else {
1263                         ret = RK_LF_STATUS_FR;
1264                 }
1265         } else {
1266                 ret = RK_LF_STATUS_NC;
1267         }
1268
1269         return ret;
1270 }
1271
1272 static int rk3036_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,
1273                                     unsigned int *dsp_addr)
1274 {
1275         struct lcdc_device *lcdc_dev =
1276             container_of(dev_drv, struct lcdc_device, driver);
1277
1278         if (lcdc_dev->clk_on) {
1279                 dsp_addr[0] = lcdc_readl(lcdc_dev, WIN0_YRGB_MST);
1280                 dsp_addr[1] = lcdc_readl(lcdc_dev, WIN1_MST);
1281         }
1282         return 0;
1283 }
1284
1285 static ssize_t rk3036_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
1286                                          char *buf, int win_id)
1287 {
1288         struct rk_lcdc_win *win = NULL;
1289         char fmt[9] = "NULL";
1290         u32     size;
1291
1292         if (win_id < ARRAY_SIZE(lcdc_win)) {
1293                 win = dev_drv->win[win_id];
1294         } else {
1295                 dev_err(dev_drv->dev, "invalid win number:%d!\n", win_id);
1296                 return 0;
1297         }
1298
1299         size = snprintf(buf, PAGE_SIZE, "win%d: %s\n", win_id,
1300                         get_format_string(win->format, fmt));
1301         size += snprintf(buf + size, PAGE_SIZE - size,
1302                          "      xact %d yact %d xvir %d yvir %d\n",
1303                 win->area[0].xact, win->area[0].yact,
1304                 win->area[0].xvir, win->area[0].yvir);
1305         size += snprintf(buf + size, PAGE_SIZE - size,
1306                          "      xpos %d ypos %d xsize %d ysize %d\n",
1307                 win->area[0].xpos, win->area[0].ypos,
1308                 win->area[0].xsize, win->area[0].ysize);
1309         size += snprintf(buf + size, PAGE_SIZE - size,
1310                          "      yaddr 0x%x uvaddr 0x%x\n",
1311                 win->area[0].y_addr, win->area[0].uv_addr);
1312         return size;
1313 }
1314
1315 static int rk3036_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
1316 {
1317         struct lcdc_device *lcdc_dev = container_of(dev_drv,
1318                                                 struct lcdc_device,
1319                                                 driver);
1320         int *cbase = (int *)lcdc_dev->regs;
1321         int *regsbak = (int *)lcdc_dev->regsbak;
1322         int i, j;
1323
1324         dev_info(dev_drv->dev, "back up reg:\n");
1325         for (i = 0; i <= (0xDC >> 4); i++) {
1326                 for (j = 0; j < 4; j++)
1327                         dev_info(dev_drv->dev, "%08x  ",
1328                                  *(regsbak + i * 4 + j));
1329                 dev_info(dev_drv->dev, "\n");
1330         }
1331
1332         dev_info(dev_drv->dev, "lcdc reg:\n");
1333         for (i = 0; i <= (0xDC >> 4); i++) {
1334                 for (j = 0; j < 4; j++)
1335                         dev_info(dev_drv->dev, "%08x  ",
1336                                  readl_relaxed(cbase + i * 4 + j));
1337                 dev_info(dev_drv->dev, "\n");
1338         }
1339         return 0;
1340 }
1341
1342 static struct rk_lcdc_drv_ops lcdc_drv_ops = {
1343         .open                   = rk3036_lcdc_open,
1344         .load_screen            = rk3036_load_screen,
1345         .set_par                = rk3036_lcdc_set_par,
1346         .pan_display            = rk3036_lcdc_pan_display,
1347         .blank                  = rk3036_lcdc_blank,
1348         .ioctl                  = rk3036_lcdc_ioctl,
1349         .get_win_state          = rk3036_lcdc_get_win_state,
1350         .ovl_mgr                = rk3036_lcdc_ovl_mgr,
1351         .get_disp_info          = rk3036_lcdc_get_disp_info,
1352         .fps_mgr                = rk3036_lcdc_fps_mgr,
1353         .fb_get_win_id          = rk3036_lcdc_get_win_id,
1354         .fb_win_remap           = rk3036_fb_win_remap,
1355         .poll_vblank            = rk3036_lcdc_poll_vblank,
1356         .get_dsp_addr           = rk3036_lcdc_get_dsp_addr,
1357         .cfg_done               = rk3036_lcdc_cfg_done,
1358         .dump_reg               = rk3036_lcdc_reg_dump,
1359         .set_dsp_bcsh_hue       = rk3036_lcdc_set_bcsh_hue,
1360         .set_dsp_bcsh_bcs       = rk3036_lcdc_set_bcsh_bcs,
1361         .get_dsp_bcsh_hue       = rk3036_lcdc_get_bcsh_hue,
1362         .get_dsp_bcsh_bcs       = rk3036_lcdc_get_bcsh_bcs,
1363         .open_bcsh              = rk3036_lcdc_open_bcsh,
1364 };
1365
1366 static int rk3036_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
1367 {
1368 #if defined(CONFIG_ROCKCHIP_IOMMU)
1369         struct device_node *np = lcdc_dev->dev->of_node;
1370         int val;
1371
1372         if (of_property_read_u32(np, "rockchip,iommu-enabled", &val))
1373                 lcdc_dev->driver.iommu_enabled = 0;
1374         else
1375                 lcdc_dev->driver.iommu_enabled = val;
1376 #else
1377         lcdc_dev->driver.iommu_enabled = 0;
1378 #endif
1379         return 0;
1380 }
1381
1382 static int rk3036_lcdc_probe(struct platform_device *pdev)
1383 {
1384         struct lcdc_device *lcdc_dev = NULL;
1385         struct rk_lcdc_driver *dev_drv;
1386         struct device *dev = &pdev->dev;
1387         struct resource *res;
1388         int ret;
1389
1390         lcdc_dev = devm_kzalloc(dev,
1391                                 sizeof(struct lcdc_device), GFP_KERNEL);
1392         if (!lcdc_dev) {
1393                 dev_err(&pdev->dev, "rk3036 lcdc device kmalloc fail!");
1394                 return -ENOMEM;
1395         }
1396         platform_set_drvdata(pdev, lcdc_dev);
1397         lcdc_dev->dev = dev;
1398         rk3036_lcdc_parse_dt(lcdc_dev);
1399
1400         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1401         lcdc_dev->reg_phy_base = res->start;
1402         lcdc_dev->len = resource_size(res);
1403         lcdc_dev->regs = devm_ioremap_resource(dev, res);
1404         if (IS_ERR(lcdc_dev->regs))
1405                 return PTR_ERR(lcdc_dev->regs);
1406
1407         lcdc_dev->regsbak = devm_kzalloc(dev, lcdc_dev->len, GFP_KERNEL);
1408         if (IS_ERR(lcdc_dev->regsbak))
1409                 return PTR_ERR(lcdc_dev->regsbak);
1410
1411         dev_set_name(lcdc_dev->dev, "lcdc%d", lcdc_dev->id);
1412         dev_drv = &lcdc_dev->driver;
1413         dev_drv->dev = dev;
1414         dev_drv->prop = PRMRY;
1415         dev_drv->id = lcdc_dev->id;
1416         dev_drv->ops = &lcdc_drv_ops;
1417         dev_drv->lcdc_win_num = ARRAY_SIZE(lcdc_win);
1418         spin_lock_init(&lcdc_dev->reg_lock);
1419
1420         lcdc_dev->irq = platform_get_irq(pdev, 0);
1421         if (lcdc_dev->irq < 0) {
1422                 dev_err(&pdev->dev, "cannot find IRQ for lcdc%d\n",
1423                         lcdc_dev->id);
1424                 return -ENXIO;
1425         }
1426
1427         ret = devm_request_irq(dev, lcdc_dev->irq, rk3036_lcdc_isr,
1428                                IRQF_DISABLED | IRQF_SHARED,
1429                                dev_name(dev), lcdc_dev);
1430         if (ret) {
1431                 dev_err(&pdev->dev, "cannot requeset irq %d - err %d\n",
1432                         lcdc_dev->irq, ret);
1433                 return ret;
1434         }
1435
1436         if (dev_drv->iommu_enabled)
1437                 strcpy(dev_drv->mmu_dts_name, "iommu,vop_mmu");
1438
1439         ret = rk_fb_register(dev_drv, lcdc_win, lcdc_dev->id);
1440         if (ret < 0) {
1441                 dev_err(dev, "register fb for lcdc%d failed!\n", lcdc_dev->id);
1442                 return ret;
1443         }
1444         lcdc_dev->screen = dev_drv->screen0;
1445
1446         dev_info(dev, "lcdc probe ok, iommu %s\n",
1447                  dev_drv->iommu_enabled ? "enabled" : "disabled");
1448
1449         return 0;
1450 }
1451
1452 #if defined(CONFIG_PM)
1453 static int rk3036_lcdc_suspend(struct platform_device *pdev,
1454                                pm_message_t state)
1455 {
1456         return 0;
1457 }
1458
1459 static int rk3036_lcdc_resume(struct platform_device *pdev)
1460 {
1461         return 0;
1462 }
1463 #else
1464 #define rk3036_lcdc_suspend NULL
1465 #define rk3036_lcdc_resume  NULL
1466 #endif
1467
1468 static int rk3036_lcdc_remove(struct platform_device *pdev)
1469 {
1470         return 0;
1471 }
1472
1473 static void rk3036_lcdc_shutdown(struct platform_device *pdev)
1474 {
1475 }
1476
1477 #if defined(CONFIG_OF)
1478 static const struct of_device_id rk3036_lcdc_dt_ids[] = {
1479         {.compatible = "rockchip,rk3036-lcdc",},
1480         {}
1481 };
1482 #endif
1483
1484 static struct platform_driver rk3036_lcdc_driver = {
1485         .probe = rk3036_lcdc_probe,
1486         .remove = rk3036_lcdc_remove,
1487         .driver = {
1488                 .name = "rk3036-lcdc",
1489                 .owner = THIS_MODULE,
1490                 .of_match_table = of_match_ptr(rk3036_lcdc_dt_ids),
1491         },
1492         .suspend = rk3036_lcdc_suspend,
1493         .resume = rk3036_lcdc_resume,
1494         .shutdown = rk3036_lcdc_shutdown,
1495 };
1496
1497 static int __init rk3036_lcdc_module_init(void)
1498 {
1499         return platform_driver_register(&rk3036_lcdc_driver);
1500 }
1501
1502 static void __exit rk3036_lcdc_module_exit(void)
1503 {
1504         platform_driver_unregister(&rk3036_lcdc_driver);
1505 }
1506
1507 fs_initcall(rk3036_lcdc_module_init);
1508 module_exit(rk3036_lcdc_module_exit);